From: Bjorn Helgaas
Per PCIe r5.0 sec 7.5.2.1, PME may be generated from D0, so update
Documentation/power/pci.rst to reflect that.
Signed-off-by: Bjorn Helgaas
---
Documentation/power/pci.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/power/pci.rst
t only for certain combinations of intel and nvidia hardware
>
> Signed-off-by: Karol Herbst
> Cc: Bjorn Helgaas
> Cc: Lyude Paul
> Cc: Rafael J. Wysocki
> Cc: Mika Westerberg
> Cc: linux-...@vger.kernel.org
> Cc: linux...@vger.kernel.org
> Cc: dri-de...@lists.freede
Hi Yuri,
On Tue, Oct 15, 2019 at 05:11:11PM +0200, Yuri Volchkov wrote:
> Currently dmar_fault handler only prints a message in the dmesg. This
> commit introduces counters - how many faults have happened, and
> exposes them via sysfs. Each pci device will have an entry
> 'dmar_faults' reading fro
On Tue, Aug 27, 2019 at 03:21:44PM -0700, Rajat Jain wrote:
> The elements in the aer_uncorrectable_error_string[] refer to
> the bit names in Uncorrectable Error status Register in the PCIe spec
> (Sec 7.8.4.2 in PCIe 4.0)
>
> Add the last error bit in the strings array that was missing.
>
> Sig
idge_groups' was not
> declared. Should it be static?
> drivers/pci/pci-sysfs.c:1555:30: warning: symbol 'pcie_dev_groups' was not
> declared. Should it be static?
>
> Signed-off-by: Ben Dooks
> ---
> Cc: Bjorn Helgaas
> Cc: linux-...@vger.kernel.org
> Cc:
r the skipping should be done at the high
level (like calling either pci_power_up() or pci_set_power_state()) or
at a lower level (e.g., if everybody called pci_set_power_state() and
it could internally tell whether we're skipping the platform part).
If we could unify the paths as much as p
On Mon, Oct 14, 2019 at 06:00:09PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> Dexuan, the important thing here is the first patch, which is your [1],
> which I modified by doing pci_restore_state() as well as setting to D0:
>
> pci_set_power_sta
On Tue, Oct 08, 2019 at 08:46:52AM -0700, Christoph Hellwig wrote:
> > diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> > index a304f5ea11b9..9d259372fbfd 100644
> > --- a/drivers/pci/Kconfig
> > +++ b/drivers/pci/Kconfig
> > @@ -52,7 +52,7 @@ config PCI_MSI
> >If you don't know wha
On Mon, Oct 14, 2019 at 12:04:52PM +0200, Greg Kroah-Hartman wrote:
> The function pci_irq_get_node() is not used by anyone in the tree, so
> just delete it.
>
> Cc: Bjorn Helgaas
> Signed-off-by: Greg Kroah-Hartman
Applied with Andrew's Reviewed-by to psi/
On Thu, Oct 10, 2019 at 04:01:21PM +0200, Christoph Hellwig wrote:
> On Thu, Oct 10, 2019 at 07:47:46AM -0500, Bjorn Helgaas wrote:
> > + return bridge->link_state ? !!bridge->link_state->aspm_enabled : false;
>
> Can we unobsfucated this while we're at it?
>
From: Bjorn Helgaas
In reference to this thread:
https://lore.kernel.org/r/20191007223428.ga72...@google.com
This removes locking from pcie_aspm_enabled() because the reference count
held by the driver should provide all the locking we need.
Bjorn Helgaas (1):
PCI/ASPM: Remove
From: Bjorn Helgaas
The lifetime of the link_state structure (bridge->link_state) is not the
same as the lifetime of "bridge" itself. The link_state is allocated by
pcie_aspm_init_link_state() after children of the bridge have been
enumerated, and it is deallocated by pcie_aspm_ex
On Mon, Oct 07, 2019 at 04:32:42PM -0700,
sathyanarayanan.kuppusw...@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan
>
> Currently, pci_prg_resp_pasid_required() function reads the
> PASID Required bit status from register every time we call
> the function. Since PASID Required bit is
On Wed, Oct 09, 2019 at 12:54:37AM +0200, Rafael J. Wysocki wrote:
> On Tue, Oct 8, 2019 at 11:16 PM Bjorn Helgaas wrote:
> >
> > On Tue, Oct 08, 2019 at 11:27:51AM +0200, Rafael J. Wysocki wrote:
> > > On Tue, Oct 8, 2019 at 12:34 AM Bjorn Helgaas wrote:
> > >
On Wed, Oct 09, 2019 at 02:51:15AM +, George Cherian wrote:
> Hi Bjorn,
>
> Sorry for the late reply I was off for couple of days.
>
> On 10/8/19 2:32 PM, Bjorn Helgaas wrote:
> > External Email
> >
> >
On Tue, Oct 08, 2019 at 06:06:46PM -0400, Don Dutile wrote:
> On 10/08/2019 05:38 PM, Bjorn Helgaas wrote:
> > On Thu, Oct 03, 2019 at 05:10:07PM -0500, Bjorn Helgaas wrote:
> > > On Thu, Oct 03, 2019 at 11:04:45AM +0200, CREGUT Pierre IMT/OLN wrote:
> > > > ...
On Thu, Oct 03, 2019 at 05:10:07PM -0500, Bjorn Helgaas wrote:
> On Thu, Oct 03, 2019 at 11:04:45AM +0200, CREGUT Pierre IMT/OLN wrote:
> > ...
> > NIC drivers send netlink events when their state change, but it is
> > the core that changes the value of num_vfs. So I woul
On Tue, Oct 08, 2019 at 08:25:23AM +, Robert Richter wrote:
> On 04.10.19 14:48:13, Bjorn Helgaas wrote:
> > commit 37b22fbfec2d
> > Author: George Cherian
> > Date: Thu Sep 19 02:43:34 2019 +
> >
> > PCI: Apply Cavium ACS quirk to CN99xx and CN11xx
On Tue, Oct 08, 2019 at 11:27:51AM +0200, Rafael J. Wysocki wrote:
> On Tue, Oct 8, 2019 at 12:34 AM Bjorn Helgaas wrote:
> > On Thu, Aug 08, 2019 at 11:55:07PM +0200, Rafael J. Wysocki wrote:
> > > From: Rafael J. Wysocki
> > >
> > > Add a function checki
Enable PCI_MSI_IRQ_DOMAIN support for RISC-V")
>
> Signed-off-by: Kuldeep Dave
> Signed-off-by: Bharat Kumar Gogada
> Signed-off-by: Michal Simek
Acked-by: Bjorn Helgaas
> Arch part was sent here:
> https://lkml.org/lkml/2019/10/8/277
Can you please squash this drivers/p
[+cc Heiner]
On Thu, Aug 08, 2019 at 11:55:07PM +0200, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Add a function checking whether or not PCIe ASPM has been enabled for
> a given device.
>
> It will be used by the NVMe driver to decide how to handle the
> device during system suspend
On Fri, Aug 09, 2019 at 12:28:43PM +0200, Lukas Wunner wrote:
> A sysfs request to enable or disable a PCIe hotplug slot should not
> return before it has been carried out. That is sought to be achieved
> by waiting until the controller's "pending_events" have been cleared.
>
> However the IRQ th
On Mon, Sep 30, 2019 at 11:20:50PM +, Jayachandran Chandrasekharan Nair
wrote:
> On Mon, Sep 30, 2019 at 03:34:10PM -0500, Bjorn Helgaas wrote:
> > On Thu, Sep 19, 2019 at 02:43:34AM +, George Cherian wrote:
> > > Enhance the ACS quirk for Cavium Processors. Add the root
On Thu, Oct 03, 2019 at 03:19:46PM +0300, mika.westerb...@linux.intel.com wrote:
> On Fri, Jul 26, 2019 at 12:52:58PM +, Nicholas Johnson wrote:
> > Patch series rebased to 5.3-rc1.
> >
> > If possible, please have a quick read over while I am away (2019-07-27
> > to mid 2019-08-04), so I can
On Thu, Oct 03, 2019 at 02:11:28PM -0700, Kuppuswamy Sathyanarayanan wrote:
>
> On 10/3/19 2:01 PM, Bjorn Helgaas wrote:
> > On Thu, Oct 03, 2019 at 01:37:26PM -0700, Kuppuswamy Sathyanarayanan wrote:
> > > On Thu, Oct 03, 2019 at 02:04:13PM -0500, Bjorn Helgaas wrote:
&
[+cc Don, Alex, Jakub]
On Thu, Oct 03, 2019 at 11:04:45AM +0200, CREGUT Pierre IMT/OLN wrote:
> Le 02/10/2019 à 01:45, Bjorn Helgaas a écrit :
> > On Fri, Apr 26, 2019 at 10:11:54AM +0200, CREGUT Pierre IMT/OLN wrote:
> > > I also initially thought that kobject_uevent generated
On Thu, Oct 03, 2019 at 01:37:26PM -0700, Kuppuswamy Sathyanarayanan wrote:
> On Thu, Oct 03, 2019 at 02:04:13PM -0500, Bjorn Helgaas wrote:
> > On Thu, Oct 03, 2019 at 10:20:24AM -0700, Kuppuswamy Sathyanarayanan wrote:
> > > Hi Bjorn,
> > >
> > > Th
On Thu, Oct 03, 2019 at 10:20:24AM -0700, Kuppuswamy Sathyanarayanan wrote:
> Hi Bjorn,
>
> Thanks for looking into this patch set.
>
> On 9/5/19 12:18 PM, Bjorn Helgaas wrote:
> > On Wed, Aug 28, 2019 at 03:14:01PM -0700,
> > sathyanarayanan.kuppusw...@linux.
On Thu, Oct 03, 2019 at 10:21:24AM -0700, Kuppuswamy Sathyanarayanan wrote:
> Hi Bjorn,
>
> On 8/28/19 3:14 PM, sathyanarayanan.kuppusw...@linux.intel.com wrote:
> > From: Kuppuswamy Sathyanarayanan
> >
> >
> > As per PCIe r4.0, sec 9.3.6, VF must not implement Enhanced Allocation
> > Capabilit
On Tue, Sep 24, 2019 at 04:52:23PM +0100, Russell King - ARM Linux admin wrote:
> On Tue, Sep 24, 2019 at 03:18:47PM +0100, Russell King - ARM Linux admin
> wrote:
> > On Mon, Sep 16, 2019 at 10:17:36AM +0800, Xiaowei Bao wrote:
> > > This patch set are for adding Mobiveil EP driver and adding PCI
On Wed, Oct 02, 2019 at 01:32:07PM +0800, Kai-Heng Feng wrote:
> On Oct 2, 2019, at 08:07, Bjorn Helgaas wrote:
> > On Mon, Sep 02, 2019 at 10:52:52PM +0800, Kai-Heng Feng wrote:
> >> There's an xHCI device that doesn't wake when a USB 2.0 device gets
> >
[+cc Alan, Mathias, Rafael, Lukas]
On Mon, Sep 02, 2019 at 10:52:52PM +0800, Kai-Heng Feng wrote:
> There's an xHCI device that doesn't wake when a USB 2.0 device gets
> plugged to its USB 3.0 port. The driver's own runtime suspend callback
> was called, PME# signaling was enabled, but it stays at
re to deal with timing
issues "over there".
> In all cases, the device could be locked or the boolean set just
> after the test. But I don't think there is a case where causality
> would be violated.Thank you in advance for your recommendations. I will
> update the pat
On Tue, Oct 01, 2019 at 11:07:28AM +0100, Andrew Murray wrote:
> Hi Tom,
>
> Thanks for the patch.
>
> I'd suggest that you rename the subject of this series to "PCI: cadence: ..."
> to be consistent with the existing commit history, e.g. git log
> --oneline drivers/pci/controller/pcie-cadence*
On Tue, Oct 01, 2019 at 10:53:44AM +0800, Tiezhu Yang wrote:
> On 09/30/2019 10:02 PM, Andrew Murray wrote:
> > On Mon, Sep 30, 2019 at 12:55:20PM +0800, Tiezhu Yang wrote:
> > > Add the Loongson vendor ID and device IDs to pci_ids.h
> > > to be used in the future.
> > >
> > > The Loongson IDs can
On Mon, Aug 19, 2019 at 08:05:32AM +0200, Krzysztof Wilczynski wrote:
> Update arch/x86/pci/Makefile replacing the deprecated EXTRA_CFLAGS
> with the ccflags-y matching recommendation as per the section 3.7
> "Compilation flags" of the "Linux Kernel Makefiles" (see:
> Documentation/kbuild/makefiles
On Wed, Aug 28, 2019 at 03:53:22PM +0200, Krzysztof Wilczynski wrote:
> Add the missing "SPDX-License-Identifier" license header
> to the arch/x86/pci/numachip.c (use the GPL-2.0 identifier
> derived using the comment mentioning license from the
> top of the file), and remove license boilerplate as
On Tue, Sep 10, 2019 at 01:58:33PM -0600, Logan Gunthorpe wrote:
> The part_event_bitmap register is 64 bits wide and should be read with
> ioread64 instead of the 32-bit ioread32.
>
> Reported-by: Doug Meyer
> Signed-off-by: Logan Gunthorpe
> Cc: Bjorn Helgaas
> Cc: Ke
On Sat, Sep 14, 2019 at 11:30:32PM +0200, Krzysztof Wilczynski wrote:
> Move ATS function prototypes from include/linux/pci.h
> to include/linux/pci-ats.h as the ATS, PRI, and PASID
> interfaces are related, and are used only by the IOMMU
> drivers. This effecively reverts the change done in
> com
On Wed, Sep 18, 2019 at 09:58:06AM +0100, Andrew Murray wrote:
> On Mon, Sep 16, 2019 at 11:41:38PM +0300, Denis Efremov wrote:
> > Remove local definition PCI_BAR_COUNT for the number of PCI BARs and use
> > global one PCI_STD_NUM_BARS instead.
> >
> > Acked-by: Sebastian Ott
> > Cc: Gerald Scha
[+cc Vadim, Manish]
On Thu, Sep 19, 2019 at 02:43:34AM +, George Cherian wrote:
> Enhance the ACS quirk for Cavium Processors. Add the root port
> vendor ID's in an array and use the same in match function.
> For newer devices add the vendor ID's in the array so that the
> match function is si
On Wed, Sep 11, 2019 at 08:40:51PM +0800, tiantao6 wrote:
> From: tiantao
>
> drivers/pci/vc.c:351:5: warning: no previous prototype for
> pci_save_vc_state [-Wmissing-prototypes]
> int pci_save_vc_state(struct pci_dev *dev)
>
> drivers/pci/vc.c:388:6: warning: no previous prototype for
> pci_re
On Thu, Sep 26, 2019 at 05:05:31PM -0500, Bjorn Helgaas wrote:
> On Mon, Sep 16, 2019 at 11:41:34PM +0300, Denis Efremov wrote:
> > Replace the magic constant (6) with define PCI_STD_NUM_BARS representing
> > the number of PCI BARs.
>
> For some reason patches 0 and 1 didn&
On Thu, Sep 05, 2019 at 02:31:41PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> The current implementation of ATS, PASID, and PRI does not handle VF
> dependencies correctly. These are essentially Kuppuswamy's patches; I
> reordered and tweaked them slightly.
>
On Mon, Sep 16, 2019 at 11:41:34PM +0300, Denis Efremov wrote:
> Replace the magic constant (6) with define PCI_STD_NUM_BARS representing
> the number of PCI BARs.
For some reason patches 0 and 1 didn't make it to the list. Can you
resend them?
Dey
Acked-by: Bjorn Helgaas# for drivers/pci/msi.c
> ---
> arch/mips/pci/msi-xlp.c| 2 +-
> arch/s390/pci/pci_irq.c| 2 +-
> arch/x86/kernel/apic/msi.c | 2 +-
> arch/x86/pci/xen.c | 2 +-
> drivers/pci/msi.c | 19 ++-
&
On Thu, Sep 12, 2019 at 06:32:08PM -0700, Megha Dey wrote:
> Add the set_desc callback to the ims domain ops.
Elsewhere you capitalize "IMS" when it's an initialism.
Generally you capitalized "IRQ" and "MSI" in similar situations, but
there are a couple exceptions (in other commit logs).
> The s
On Thu, Sep 12, 2019 at 06:32:07PM -0700, Megha Dey wrote:
> This patch introduces APIs to allocate and free IMS interrupts.
> +int __dev_ims_alloc_irqs(struct device *dev, int nvec,
> + struct dev_ims_ops *ops,
> + struct irq_affinity *affd)
Should be st
vior. A user will be add in next patch.
>
> This is mostly the same as nouveau_pr3_present().
>
> Signed-off-by: Kai-Heng Feng
Acked-by: Bjorn Helgaas
I assume Takashi will merge this along with the ALSA patch.
> ---
> v5:
> - Add wording suggestion from Bjorn.
> v4:
On Mon, Sep 23, 2019 at 10:22:42PM -0400, Martin K. Petersen wrote:
>
> Denis,
>
> > Replace the magic constant (6) with define PCI_STD_NUM_BARS
> > representing the number of PCI BARs.
>
> Applied to 5.4/scsi-fixes. Thanks!
I think this depends on a previous patch that actually adds the
PCI_ST
arameter example
Ali Saidi (1):
PCI: Add ACS quirk for Amazon Annapurna Labs root ports
Bjorn Helgaas (21):
PCI: Fix typos and whitespace errors
PCI: pciehp: Refer to "Indicators" instead of "LEDs" in comments
Merge branch 'pci/aspm'
Merge
On Fri, Sep 20, 2019 at 09:48:07AM +0800, YueHaibing wrote:
> Fix build error without CONFIG_PINCTRL
>
> drivers/pci/controller/dwc/pcie-tegra194.c: In function tegra_pcie_config_rp:
> drivers/pci/controller/dwc/pcie-tegra194.c:1394:8: error: implicit
> declaration of function pinctrl_pm_select_d
[+cc Rafael]
On Fri, Sep 20, 2019 at 01:23:20PM +0200, Kai-Heng Feng wrote:
> On Mon, Sep 9, 2019 at 1:41 PM Bjorn Helgaas wrote:
> > > +bool pci_pr3_present(struct pci_dev *pdev)
> > > +{
> > > + struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);
Maybe:
PCI: Add pci_pr3_present() to check for Power Resources for D3hot
On Tue, Aug 27, 2019 at 09:47:55PM +0800, Kai-Heng Feng wrote:
> A driver may want to know the existence of _PR3, to choose different
> runtime suspend behavior. A user will be add in next patch.
Maybe include something l
s/Add support for DW based driver type/Add Amazon Annapurna Labs PCIe
controller driver/
On Thu, Sep 05, 2019 at 05:01:43PM +0300, Jonathan Chocron wrote:
> This driver is DT based and utilizes the DesignWare APIs.
>
> It allows using a smaller ECAM range for a larger bus range -
> usually an en
s/Add quirk to disable/Disable/ in subject
On Thu, Sep 05, 2019 at 05:00:18PM +0300, Jonathan Chocron wrote:
> The Root Port (identified by [1c36:0031]) doesn't support MSI-X. On some
> platforms it is configured to not advertise the capability at all, while
> on others it (mistakenly) does. This
n
> Reviewed-by: Gustavo Pimentel
Acked-by: Bjorn Helgaas
> ---
> drivers/pci/vpd.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/pci/vpd.c b/drivers/pci/vpd.c
> index 4963c2e2bd4c..7915d10f9aa1 100644
> --- a/drivers/pci/vpd.c
> +++ b/dri
nally, it's not possible
> for one RP to pass traffic to another RP.
>
> Signed-off-by: Ali Saidi
> Signed-off-by: Jonathan Chocron
> Reviewed-by: Gustavo Pimentel
> Reviewed-by: Andrew Murray
Acked-by: Bjorn Helgaas
But please tweak it as below ...
> ---
>
iProc PAXB Root Ports don't advertise an ACS capability, but they do not
+allow peer-to-peer transactions between Root Ports. Add an ACS quirk so
+each Root Port can be in a separate IOMMU group.
+[bhelgaas: commit log, comment, use common implementation style]
Link:
ht
On Tue, Sep 03, 2019 at 09:51:05AM -0600, Logan Gunthorpe wrote:
>
>
> On 2019-09-02 1:50 a.m., Christoph Hellwig wrote:
> > On Sat, Aug 31, 2019 at 12:49:32PM +, YueHaibing wrote:
> >> When allocating memory, the GFP_KERNEL cannot be used during the
> >> spin_lock period. It may cause schedu
On Thu, Aug 29, 2019 at 02:01:28AM +0800, Kai-Heng Feng wrote:
> It's a common practice to let dGPU unbound and use PCI platform power
> management to disable its power through _OFF method of power resource,
> which is listed by _PR3.
> When the dGPU comes with an HDA function, the HDA won't be sus
On Tue, Sep 03, 2019 at 02:10:17PM +0300, Denis Efremov wrote:
> PCIe defines two optional hotplug indicators: a Power indicator and an
> Attention indicator. Both are controlled by the same register, and each
> can be on, off or blinking. The current interfaces
> (pciehp_green_led_{on,off,blink}()
From: Bjorn Helgaas
The current implementation of ATS, PASID, and PRI does not handle VF
dependencies correctly. These are essentially Kuppuswamy's patches; I
reordered and tweaked them slightly.
Please treat this as a proposal, not a done deal, and post a v9 with any
changes needed.
Ch
pci_pri_init()]
Link: https://lore.kernel.org/r/0c5495d376faf6dbb8eb2165204c474438aaae65.156
7029860.git.sathyanarayanan.kuppusw...@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan
Signed-off-by: Bjorn Helgaas
---
drivers/pci/ats.c | 52 ++---
include
swamy Sathyanarayanan
Signed-off-by: Bjorn Helgaas
Cc: Ashok Raj
Cc: Keith Busch
---
drivers/pci/ats.c | 11 ---
include/linux/pci.h | 1 -
2 files changed, 12 deletions(-)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index ab928f8267cf..920deeccf38d 100644
--- a/drivers/pci/ats.c
+++ b/dr
ppusw...@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan
Signed-off-by: Bjorn Helgaas
Cc: Ashok Raj
Cc: Keith Busch
---
drivers/pci/ats.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index 3b1c9a2305c1..ab928f8267cf 1
yanan
Signed-off-by: Bjorn Helgaas
Cc: Ashok Raj
Cc: Keith Busch
---
drivers/pci/ats.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index e18499243f84..3b1c9a2305c1 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -
pci_pasid_init()]
Link:
https://lore.kernel.org/r/4957778959fa34eab3e8b3065d1951989c61cb0f.1567029860.git.sathyanarayanan.kuppusw...@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan
Signed-off-by: Bjorn Helgaas
---
drivers/pci/ats.c | 43
(pri_lock, pasid_lock) and added common
>resource lock to synchronize PRI/PASID updates between PF/VF.
> * Addressed comments from Bjorn Helgaas.
>
> Changes since v4:
> * Defined empty functions for pci_pri_init() and pci_pasid_init() for cases
>where CONFIG_PCI_PRI and CONFIG_PCI
On Wed, Aug 28, 2019 at 03:14:01PM -0700,
sathyanarayanan.kuppusw...@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan
>
> Since pci_prg_resp_pasid_required() function has dependency on both
> PASID and PRI, define it only if both CONFIG_PCI_PRI and
> CONFIG_PCI_PASID config options are
[+cc Bodong, Eli: just FYI since this affects sriov_drivers_autoprobe,
which you added with 0e7df22401a3]
On Thu, Sep 05, 2019 at 12:32:26AM -0600, Kelsey Skunberg wrote:
> sriov_numvfs and sriov_drivers_autoprobe have "unusual" permissions (0664)
> with no reported or found reason for allowing gr
[+cc Carolyn, author of 17a402a0075c]
On Wed, Sep 04, 2019 at 07:35:23AM +0200, Lukas Wunner wrote:
> On Tue, Sep 03, 2019 at 10:36:35PM -0600, Kelsey Skunberg wrote:
> > Change pci_dev_is_disconnected() call inside pci_dev_is_inaccessible() to:
> >
> > pdev->error_state == pci_channel_io_per
On Mon, Sep 02, 2019 at 11:19:58PM +0200, Rafael J. Wysocki wrote:
> On Wed, Aug 21, 2019 at 5:44 AM Wenwen Wang wrote:
> >
> > In acpi_pci_irq_enable(), 'entry' is allocated by kzalloc() in
> > acpi_pci_irq_check_entry() (invoked from acpi_pci_irq_lookup()). However,
> > it is not deallocated if
On Sat, Aug 31, 2019 at 3:49 AM Lorenzo Pieralisi
wrote:
>
> On Sat, Aug 31, 2019 at 09:51:05AM +0530, Vidya Sagar wrote:
> > On 8/30/2019 6:00 PM, Bjorn Helgaas wrote:
> > > [+cc Krzysztof]
> > >
> > > On Thu, Aug 29, 2019 at 10:23 PM Stephen Rothwel
[+cc Krzysztof]
On Thu, Aug 29, 2019 at 10:23 PM Stephen Rothwell wrote:
>
> Hi all,
>
> After merging the pci tree, today's linux-next build (x86_64 allmodconfig)
> failed like this:
>
> drivers/pci/controller/dwc/pcie-tegra194.c:24:10: fatal error:
> linux/pci-aspm.h: No such file or directory
Hi Rajat,
On Tue, Aug 27, 2019 at 03:21:45PM -0700, Rajat Jain wrote:
> Split the AER stats into multiple sysfs atributes. Note that
> this changes the ABI of the AER stats, but hopefully, there
> aren't active users that need to change. This is how the AERs
> are being exposed now:
>
> localhost
Maybe just:
PCI: hv: Make functions static
since we already know it's in pci-hyperv.c, and it's obvious that you
can only do this for functions that are only used locally.
On Mon, Aug 26, 2019 at 05:41:59PM +0200, Krzysztof Wilczynski wrote:
> Functions hv_read_config_block(), hv_write_config_
On Thu, Aug 22, 2019 at 10:10:10AM -0600, Logan Gunthorpe wrote:
> As requested, this is a refresh of this series. I rebased it on v5.3-rc5
> without any other changes.
>
> This is a cleanup of the resource_alignment parameter after finding
> an improved way to handle the static buffer for the dis
On Tue, Aug 27, 2019 at 11:49:48AM +0200, Krzysztof Wilczynski wrote:
> This series of patches moves the ACPI-specific code currently included
> as part of the drivers/pci/probe.c. First, the ACPI Hot Plug structs
> for Type 0, 1 and 2, and any relevant variable names, structs, function
> names, et
On Tue, Aug 27, 2019 at 11:56:20AM +0200, Krzysztof Wilczynski wrote:
> Merge PCI Express ASPM function prototypes and definitions
> from include/linux/pci-aspm.h into include/linux/pci.h.
>
> Function prototypes to move are pci_disable_link_state(),
> pci_disable_link_state_locked(), pcie_no_aspm
On Thu, Aug 01, 2019 at 04:25:29PM -0500, Bjorn Helgaas wrote:
> Hi,
>
> I got the following dmesg log from Fawad [1]:
>
> imx6q-pcie 1ffc000.pcie: host bridge /soc/pcie@1ffc000 ranges:
> imx6q-pcie 1ffc000.pcie:IO 0x01f8..0x01f8 -> 0x
> imx6q-
[+cc Thomas]
On Mon, Aug 26, 2019 at 05:14:36PM +0200, Krzysztof Wilczynski wrote:
> Move the static keyword to the front of declarations of
> pci_regs_behavior and pcie_cap_regs_behavior, and resolve
> compiler warning that can be seen when building with
> warnings enabled (W=1).
It would be use
On Mon, Aug 26, 2019 at 12:46:16AM +0200, Krzysztof Wilczynski wrote:
> Do not use printk_ratelimit() in drivers/pci/pci.c as it shares the
> rate limiting state with all other callers to the printk_ratelimit().
>
> Add pci_info_ratelimited macro similar to pci_notice_ratelimited
> added in the co
On Mon, Aug 19, 2019 at 08:06:24AM +0200, Krzysztof Wilczynski wrote:
> Add the missing "SPDX-License-Identifier" license header to the
> arch/x86/pci/numachip.c. Use GPL-2.0 identifier derived using
> the comment mentioning license from the top of the file.
>
> Signed-off-by: Krzysztof Wilczynsk
On Mon, Aug 26, 2019 at 11:51:43AM +0200, Krzysztof Wilczynski wrote:
> Remove unnecessary empty return statement at the end of a void
> function in the following:
>
> - drivers/pci/hotplug/cpci_hotplug_core.c: cleanup_slots()
> - drivers/pci/hotplug/cpqphp_core.c: pci_print_IRQ_route()
> -
On Mon, Aug 26, 2019 at 12:10:39AM +0200, Krzysztof Wilczynski wrote:
> Remove unnecessary empty return statement at the
> end of a void function mtk_pcie_intr_handler() in
> the drivers/pci/controller/pcie-mediatek.c.
>
> The surplus return statement was added as part of
> the work in commit 42fe
On Mon, Aug 19, 2019 at 01:53:06PM +0200, Krzysztof Wilczynski wrote:
> Fix misspelled words in include/linux/pci.h, drivers/pci/Kconfig,
> and in the documentation for Freescale i.MX6 and Marvell Armada 7K/8K
> PCIe interfaces. No functional change intended.
>
> Related commit 96291d565550 ("PCI
On Tue, Aug 27, 2019 at 05:32:54PM -0500, Bjorn Helgaas wrote:
> On Tue, Aug 20, 2019 at 03:16:43PM +0300, Denis Efremov wrote:
> > On 8/19/19 7:06 PM, Denis Efremov wrote:
> > > PCIe defines two optional hotplug indicators: a Power indicator and an
> > > Attention ind
On Sun, Aug 25, 2019 at 08:25:57PM +0200, Krzysztof Wilczynski wrote:
> Make the log facility used to print warnings to be KERN_WARNING
> explicitly, rather than rely on the current (or default) value
> of the MESSAGE_LOGLEVEL_DEFAULT set in Kconfig. This will make
> all the warnings in the arch/x
On Tue, Aug 20, 2019 at 03:16:43PM +0300, Denis Efremov wrote:
> On 8/19/19 7:06 PM, Denis Efremov wrote:
> > PCIe defines two optional hotplug indicators: a Power indicator and an
> > Attention indicator. Both are controlled by the same register, and each
> > can be on, off or blinking. The curren
On Tue, Aug 27, 2019 at 09:47:56PM +0800, Kai-Heng Feng wrote:
> It's a common practice to let dGPU unbound and use PCI port PM to
> disable its power through _PR3. When the dGPU comes with an HDA
> function, the HDA won't be suspended if the dGPU is unbound, so the dGPU
> power can't be disabled.
[+cc Peter, Mika, Dave]
https://lore.kernel.org/r/20190827134756.10807-1-kai.heng.f...@canonical.com
On Wed, Aug 28, 2019 at 12:58:28AM +0800, Kai-Heng Feng wrote:
> at 23:25, Takashi Iwai wrote:
> > On Tue, 27 Aug 2019 15:47:55 +0200,
> > Kai-Heng Feng wrote:
> > > A driver may want to know the
On Mon, Aug 26, 2019 at 05:42:42PM +0300, Mika Westerberg wrote:
> On Mon, Aug 26, 2019 at 09:07:12AM -0500, Bjorn Helgaas wrote:
> > On Mon, Aug 26, 2019 at 01:17:26PM +0300, Mika Westerberg wrote:
> > > On Fri, Aug 23, 2019 at 09:12:54PM -0500, Bjorn Helgaas wrote:
>
On Mon, Aug 26, 2019 at 01:17:26PM +0300, Mika Westerberg wrote:
> On Fri, Aug 23, 2019 at 09:12:54PM -0500, Bjorn Helgaas wrote:
> > Hi Mika,
>
> Hi,
>
> > I'm trying to figure out specifically why we need this and where it
> > should go. Questions bel
Hi Mika,
I'm trying to figure out specifically why we need this and where it
should go. Questions below.
On Wed, Aug 21, 2019 at 03:45:19PM +0300, Mika Westerberg wrote:
> Currently Linux does not follow PCIe spec regarding the required delays
> after reset. A concrete example is a Thunderbolt a
On Fri, Aug 23, 2019 at 11:44:15AM +0100, Andrew Murray wrote:
> On Thu, Aug 22, 2019 at 03:05:49PM -0500, Bjorn Helgaas wrote:
> > From: Bjorn Helgaas
> >
> > An MMIO read from a PCI device that doesn't exist or doesn't respond causes
> > a PCI error. Ther
PCI fixes:
- Reset both NVIDIA GPU and HDA in ThinkPad P50 quirk, which was
broken by another quirk that enabled the HDA device (Lyude Paul)
- Fix pciebus-howto.rst documentation filename typo (Bjorn Helgaas)
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b
From: Bjorn Helgaas
An MMIO read from a PCI device that doesn't exist or doesn't respond causes
a PCI error. There's no real data to return to satisfy the CPU read, so
most hardware fabricates ~0 data.
Add a PCI_ERROR_RESPONSE definition for that and use it where appropriat
From: Bjorn Helgaas
pci_raw_set_power_state() uses the Power Management capability to change a
device's power state. The capability is in config space, which is
accessible in D0, D1, D2, and D3hot, but not in D3cold.
If we call pci_raw_set_power_state() on a device that's in D3co
From: Bjorn Helgaas
Use pci_power_name() to print pci_power_t correctly. This changes:
"state 0" or "D0" to "D0"
"state 1" or "D1" to "D1"
"state 2" or "D2" to "D2"
"state 3&qu
801 - 900 of 4355 matches
Mail list logo
