On Thu, Jul 19, 2012 at 1:19 PM, Lance Ortiz lance.or...@hp.com wrote:
When an AER event occurs not all of the print notifications are at the
same log level. This can cause an incomplete AER log from the users
point of view when monitoring the console output.
The completion message in
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
On Mon, Jul 30, 2012 at 10:50:13AM -0600, Bjorn Helgaas wrote:
On Sun, Jul 29, 2012 at 6:26 PM, Jon Mason jon.ma...@intel.com wrote:
A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2
On Tue, Jul 31, 2012 at 10:02 AM, chetan loke loke.che...@gmail.com wrote:
On Tue, Jul 31, 2012 at 9:45 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Jul 30, 2012 at 12:15 PM, Jon Mason jon.ma...@intel.com wrote:
I've tried to make it all generic enough that non-Intel NTBs should plug
On Wed, Aug 29, 2012 at 10:36 AM, Yinghai Lu ying...@kernel.org wrote:
On Wed, Aug 29, 2012 at 8:57 AM, Yinghai Lu ying...@kernel.org wrote:
also have another version for probe_resource, please check attached version
-v8.
sorry, v8 forget removing two lines.
please -v9 instead.
-v8:
On Thu, Aug 30, 2012 at 1:16 PM, Toshi Kani toshi.k...@hp.com wrote:
Added acpi_lookup_driver(), which looks up an associated driver
for the notified ACPI device object by walking through the list
of ACPI drivers.
Signed-off-by: Toshi Kani toshi.k...@hp.com
---
drivers/acpi/scan.c |
On Wed, Aug 1, 2012 at 8:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu liu...@gmail.com
As suggested by Bjorn Helgaas and Don Dutile in threads
http://www.spinics.net/lists/linux-pci/msg15663.html, we could improve access
to PCIe capabilities register in to way:
1) cache content
On Mon, Jun 4, 2012 at 1:44 AM, Jiang Liu jiang@huawei.com wrote:
Commit 0d52f54e2ef64c189dedc332e680b2eb4a34590a (PCI / ACPI: Make acpiphp
ignore root bridges using PCIe native hotplug) added code that made the
acpiphp driver completely ignore PCIe root complexes for which the kernel
had
On Sun, Aug 12, 2012 at 3:26 PM, Rafael J. Wysocki r...@sisk.pl wrote:
Commit dbf0e4c (PCI: EHCI: fix crash during suspend on ASUS
computers) added a workaround for an ASUS suspend issue related to
USB EHCI and a bug in a number of ASUS BIOSes that attemt to shut
down the EHCI controller
On Sat, Aug 4, 2012 at 3:27 PM, Rafael J. Wysocki r...@sisk.pl wrote:
If a PCI device is put into D3_cold by acpi_bus_set_power(),
the message printed by acpi_pci_set_power_state() says that its
power state has been changed to D4, which doesn't make sense.
In turn, if the device is put into
On Thu, May 24, 2012 at 2:45 PM, Rafael J. Wysocki r...@sisk.pl wrote:
From: Rafael J. Wysocki r...@sisk.pl
We want to report that the kernel supports ASPM to the BIOS even if
the BIOS signals us that it doesn't. So, we need the flags to include
(OSC_ACTIVE_STATE_PWR_SUPPORT |
On Fri, May 25, 2012 at 1:23 AM, Jiang Liu jiang@huawei.com wrote:
There are some resources associated with PCI host bridges on
IA 64 platforms, they should be released when removing host
bridges. Otherwise it will cause memory leak and other strange
behavior.
For example, PCI IO port
On Sun, Jun 3, 2012 at 11:16 PM, Jiang Liu jiang@huawei.com wrote:
From: Jiang Liu liu...@gmail.com
According to device model documentation, the way to add/remove device
object should be symmetric.
I think this 6-patch series has been folded into your [RFC PATCH v1
00/22] introduce PCI
On Thu, Aug 16, 2012 at 8:49 AM, Alexander Gordeev agord...@redhat.com wrote:
The new function pci_enable_msi_block_auto() tries to allocate maximum
possible number of MSIs up to the number the device supports. It
generalizes a pattern when pci_enable_msi_block() contiguously called
until it
On Tue, Aug 7, 2012 at 2:50 PM, Don Dutile ddut...@redhat.com wrote:
On 08/06/2012 04:47 PM, Bjorn Helgaas wrote:
On Sun, Aug 5, 2012 at 11:55 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Sun, 2012-08-05 at 23:30 -0600, Bjorn Helgaas wrote:
On Sat, Aug 4, 2012 at 12:19 PM
On Wed, Aug 8, 2012 at 8:44 AM, Jiang Liu liu...@gmail.com wrote:
On 08/08/2012 07:38 AM, Toshi Kani wrote:
It is nice to see redundant ACPI namespace walks removed from the ACPI
drivers. But why do you need to add a new enumerator to create the
acpihp_slot tree, in addition to the current
If you can collect complete dmesg logs from the working kernel and the
broken kernel and post them, the differences might have a clue. You
might also collect /proc/iomem and lspci -vv for both cases while
you're at it.
On Wed, Aug 8, 2012 at 10:38 PM, Alexei Kornienko
alexei.kornie...@gmail.com
On Sun, Aug 19, 2012 at 6:09 PM, huang ying
huang.ying.cari...@gmail.com wrote:
Hi, Bjorn,
Could you please merge this patchset? They fix real bugs.
I assume you wanted the updated [PATCH 3/4] PCI/PM: Fix config reg
access ... patch posted Aug 15.
I merged these (with the updated 3/4 patch)
On Mon, Aug 20, 2012 at 9:40 PM, Cui, Dexuan dexuan@intel.com wrote:
Bjorn Helgaas wrote on 2012-08-21:
I am still concerned about reset_intel_82599_sfp_virtfn(). It looks
wrong and possibly unnecessary. It looks wrong because it sets
PCI_EXP_DEVCTL_BCR_FLR and blindly clears all other
when setting the
NOSNOOP flag.
I think you're right. I propose the following patch on top of your
original one:
commit 300ef7967e87467656b0fe24270edba66bce45e4
Author: Bjorn Helgaas bhelg...@google.com
Date: Wed Aug 22 10:29:42 2012 -0600
r8169: Preserve other Device Control bits when
On Wed, Aug 22, 2012 at 12:49 AM, Feng Tang feng.t...@intel.com wrote:
Hi Fengguang,
On Wed, 22 Aug 2012 10:50:08 +0800
Fengguang Wu fengguang...@intel.com wrote:
Feng,
I think it's pci_get_subsys() triggered this assert:
/*
* Oi! Can't be having __GFP_FS
On Thu, Aug 23, 2012 at 9:03 AM, Jiang Liu liu...@gmail.com wrote:
Hi Bjorn,
Could you please help to fold this small patch into
[5/40] PCI/core: Use PCI Express Capability accessors?
It fixes a bug reported by Fengguang.
Thanks, I folded it in. I looked briefly at whether a similar
On Thu, Aug 23, 2012 at 12:28:23AM -0700, Olof Johansson wrote:
Hi,
On Mon, Jul 9, 2012 at 11:20 AM, Bjorn Helgaas bhelg...@google.com wrote:
After 253d2e5498, we disable MEM and IO decoding for most devices while we
size 32-bit BARs. However, we restore the original COMMAND register
On Thu, Aug 23, 2012 at 10:36 AM, Matthew Garrett m...@redhat.com wrote:
EFI provides support for providing PCI ROMs via means other than the ROM
BAR. This support vanishes after we've exited boot services, so add support
for stashing copies of the ROMs in setup_data if they're not otherwise
On Mon, Aug 20, 2012 at 9:26 AM, Jiang Liu liu...@gmail.com wrote:
Hi Bjorn,
I have made following changes according to your suggestions,
1) get rid of the pci_ prefix for access functions.
2) rename pci_pcie_capability_change_{word|dword}() to
On Sun, Jul 29, 2012 at 3:53 PM, Matthew Garrett mj...@srcf.ucam.org wrote:
On Sun, Jul 29, 2012 at 10:49:42PM +0100, David Woodhouse wrote:
+ * Some devices may provide ROMs via a source other than the BAR
+ */
+ if (pdev-rom pdev-romlen) {
+ *size = pdev-romlen;
On Sat, Aug 4, 2012 at 12:19 PM, Alex Williamson
alex.william...@redhat.com wrote:
It's possible to have buses without an associated bridge
(bus-self == NULL). SR-IOV can generate such buses. When
we find these, skip to the parent bus to look for the next
ACS test.
To make sure I understand
On Sun, Aug 5, 2012 at 11:55 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Sun, 2012-08-05 at 23:30 -0600, Bjorn Helgaas wrote:
On Sat, Aug 4, 2012 at 12:19 PM, Alex Williamson
alex.william...@redhat.com wrote:
It's possible to have buses without an associated bridge
(bus-self
On Fri, Aug 17, 2012 at 2:19 AM, Alexander Gordeev agord...@redhat.com wrote:
On Thu, Aug 16, 2012 at 10:00:39AM -0600, Bjorn Helgaas wrote:
On Thu, Aug 16, 2012 at 8:49 AM, Alexander Gordeev agord...@redhat.com
wrote:
-4.2.3 pci_disable_msi
+4.2.3 pci_enable_msi_block_auto
+
+int
On Mon, Aug 20, 2012 at 9:26 AM, Jiang Liu liu...@gmail.com wrote:
On 08/14/2012 12:25 PM, Bjorn Helgaas wrote:
On Wed, Aug 1, 2012 at 8:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu liu...@gmail.com
As suggested by Bjorn Helgaas and Don Dutile in threads
http://www.spinics.net
On Mon, Aug 20, 2012 at 9:47 AM, Jiang Liu liu...@gmail.com wrote:
On 08/20/2012 11:35 PM, Bjorn Helgaas wrote:
On Mon, Aug 20, 2012 at 9:26 AM, Jiang Liu liu...@gmail.com wrote:
On 08/14/2012 12:25 PM, Bjorn Helgaas wrote:
On Wed, Aug 1, 2012 at 8:54 AM, Jiang Liu liu...@gmail.com wrote
On Mon, Aug 20, 2012 at 10:10 AM, Bjorn Helgaas bhelg...@google.com wrote:
So I'll try pulling your branch (I'll do something about the tsi721.c
stuff myself).
I pulled this into
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
pci/jiang-pcie-cap with the following changes
. The
other fixes D3/D3cold/D4 messages related to the D3cold support we
merged in v3.6-rc1.
We'd like both to be included in v3.6.
Bjorn Helgaas (1):
Merge branch 'pci/rafael-3.6-fixes' into for-linus
Rafael J. Wysocki (2
On Thursday 31 January 2008 05:50:13 pm Linus Torvalds wrote:
On Thu, 31 Jan 2008, Robert Hancock wrote:
I think so. There was one objection that it introduced a dependency on
pnpacpi
loading after PCI bus enumeration, though.
Linus also suggested that pnpacpi could be marking the
On Monday 04 February 2008 11:18:09 am Linus Torvalds wrote:
On Mon, 4 Feb 2008, Bjorn Helgaas wrote:
I think the problem here is that the PCI BAR is bigger and spans the
region reported by ACPI:
Ok, then it doesn't help that it's not busy.
In that case, the only real fix
On Monday 04 February 2008 02:16:52 pm Linus Torvalds wrote:
On Mon, 4 Feb 2008, Bjorn Helgaas wrote:
So where in this would you put the
pcibios_init() - pcibios_resource_survey()
call (it's a subsys_initcall)?
THAT is the thing that actually registers the PCI resurces we've
On Tuesday 05 February 2008 11:15:12 am Linus Torvalds wrote:
On Tue, 5 Feb 2008, Bjorn Helgaas wrote:
- PnP/ACPI resource allocation *after* it, but before driver loading
(which wll cause new resources to be allocated). This could be
fs_initcall, or whatever (that's what
On Tuesday 05 February 2008 04:12:09 pm Len Brown wrote:
is there
a version of cat that prints the file name before
the contents of each file?
I use grep . * for this sort of thing.
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To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to [EMAIL
When 8250_pnp discovers COM ports, we only get the correct ttyS names
by accident -- we rely on serial8250_isa_init_ports(), which discovers
the COM ports earlier using the addresses in SERIAL_PORT_DFNS.
These two patches remove the dependency on SERIAL_PORT_DFNS by
explicitly requesting the
Add an interface for registering a new UART with a specific ttyS name.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work5/include/linux/serial_8250.h
===
--- work5.orig/include/linux/serial_8250.h 2008-01-15 16:31
-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work5/drivers/serial/8250_pnp.c
===
--- work5.orig/drivers/serial/8250_pnp.c2008-01-16 09:29:33.0
-0700
+++ work5/drivers/serial/8250_pnp.c 2008-01-16 09:51:09.0 -0700
On Tuesday 15 January 2008 12:51:35 am Jaroslav Kysela wrote:
On Mon, 14 Jan 2008, Bjorn Helgaas wrote:
On Saturday 12 January 2008 11:13:35 pm Rene Herman wrote:
... And, now that I have your attention, while it's
not important to the issue anymore with the tests removed
On Tuesday 15 January 2008 05:05:10 pm Randy Dunlap wrote:
From: Randy Dunlap [EMAIL PROTECTED]
Eliminate all build warnings. OK, these build warnings are from
a build on x86_64. When I build on ia64, I don't see warnings.
...
Signed-off-by: Randy Dunlap [EMAIL PROTECTED]
Acked-by: Bjorn
On Wednesday 16 January 2008 11:44:37 am H. Peter Anvin wrote:
Bjorn Helgaas wrote:
x86 users expect COM1-COM4 ports at the conventional ioport addresses
to be named ttyS0-ttyS3. For PNP devices, the BIOS determines the
order we discover them, so we might discover COM2 before COM1.
We
On Wednesday 16 January 2008 11:39:34 am Russell King wrote:
On Wed, Jan 16, 2008 at 10:05:41AM -0700, Bjorn Helgaas wrote:
When 8250_pnp discovers COM ports, we only get the correct ttyS names
by accident -- we rely on serial8250_isa_init_ports(), which discovers
the COM ports earlier
On Wednesday 16 January 2008 01:14:38 pm Russell King wrote:
On Wed, Jan 16, 2008 at 12:59:27PM -0700, Bjorn Helgaas wrote:
On Wednesday 16 January 2008 11:39:34 am Russell King wrote:
On Wed, Jan 16, 2008 at 10:05:41AM -0700, Bjorn Helgaas wrote:
When 8250_pnp discovers COM ports, we
Where are we with this problem?
(http://bugzilla.kernel.org/show_bug.cgi?id=9514)
I think (correct me if I'm misremembering), we started reserving more
motherboard resources, and then we started seeing conflicts between
some of those resources and something it87 needs.
We can't fix this by
On Monday 17 December 2007 02:09:40 pm [EMAIL PROTECTED] wrote:
Convert quirk printks to dev_printk().
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
---
arch/x86/kernel/quirks.c | 42 ++
arch/x86/pci/fixup.c | 22 +++---
2
print_fn_descriptor_symbol() prints the address if we don't have a symbol,
so no need to print both.
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Please
print_fn_descriptor_symbol() prints the address if we don't have a symbol,
so no need to print both.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work6/drivers/pnp/quirks.c
===
--- work6.orig/drivers/pnp/quirks.c 2008
print_fn_descriptor_symbol() prints the address if we don't have a symbol,
so no need to print both.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work6/drivers/pci/quirks.c
===
--- work6.orig/drivers/pci/quirks.c 2008
pci_mmcfg_late_insert_resources+0x0/0x50() returned 1 after 0 msecs
initcall pci_mmcfg_late_insert_resources+0x0/0x50() returned with error code 1
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work6/init/main.c
===
--- work6.orig/init
the pnp_dev-protocol tests but this
would need an ack from for example Bjorn Helgaas who might have an idea
about how generically useful this is designed to be. The no brain thing to
do would be just as per attached.
I agree with you that we can just delete the dev-protocol tests
completely. So I'd
On Wednesday 20 February 2008 10:47:21 pm Rene Herman wrote:
On 20-02-08 17:59, Bjorn Helgaas wrote:
I agree with you that we can just delete the dev-protocol tests
completely. So I'd rather see something like this (built but untested):
PNP: remove dev-protocol NULL checks
Every PNP
Every PNP device should have a valid protocol pointer. If it doesn't,
something's wrong and we should oops so we can find and fix the problem.
[This fixes a Coverity warning, but does not need to be in 2.6.25.
I'd rather have it in -mm for a while and put it in 2.6.26.]
Signed-off-by: Bjorn
Thomas Lehmann [EMAIL PROTECTED] verified that this
entry works.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work6/drivers/serial/8250_pnp.c
===
--- work6.orig/drivers/serial/8250_pnp.c2008-02-20 16:55:04.0
On Sat, Jun 02, 2012 at 11:30:23AM +0800, Jiang Liu wrote:
... address range 0xfed98000-0xfed9 has been reserved by motherboard
device(PNP0C02). I guess that BIOS has assigned address 0xfed98000 to
:00:04.0 for thermal management functionality. The BAR0 of
:00:04.0 may be locked
On Mon, Jul 2, 2012 at 2:49 PM, Kamil Grzebien cip...@gmail.com wrote:
On Mon, Jul 2, 2012 at 6:31 AM, Stanislaw Gruszka sgrus...@redhat.com wrote:
On Sun, Jul 01, 2012 at 07:01:58PM +0100, Kamil Grzebien wrote:
I haven't tried your patch yet, but wanted to share with one thing.
Currently I
because it is locked down by BIOS to chipset, readback should be 0xfed98004.
and pci_size will return 32k for 0xfed98000.
A device with a read-only BAR doesn't conform to the PCI spec. We
can't determine how much space the device consumes.
It's just an accident that BIOS put it at an address
:03 -- PNP reports AT-style speaker
0064-0064 : 00:04 -- PNP reports 8042 controller status register
0070-0073 : 00:06
0070-0071 : rtc
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: w/Documentation/kernel-parameters.txt
On Wednesday 07 November 2007 06:22:48 am Maciej W. Rozycki wrote:
On Mon, 29 Oct 2007, Bjorn Helgaas wrote:
-001f : dma1-- built-in resource includes 2
controllers
-000f : 00:02 -- PNP reports only one DMA controller
[...]
0060-006f
On Mon, Jul 9, 2012 at 4:05 AM, Jiang Liu jiang@huawei.com wrote:
Hi Bjorn and Yinghai,
What's the policy to export a symbol by EXPORT_SYMBOL()
or EXPORT_SYMBOL_GPL()? I know the legal difference, but don't
know when I should mark a symbol as GPL.
From
looks like they do not bios update for S10 yet.
http://www.panasonic.com/business/toughbook/computer-support-bios.asp#CF-U1
maybe you can try to email or call their support.
Please stop suggesting a BIOS upgrade. The BIOS is totally out of our
control, and if the current BIOS works with
and
the half-written state is a potential problem.
I'm considering these changes for the 3.6 merge window, which is
approaching fast, so let me know if you see issues with either of these.
---
Bjorn Helgaas (2):
PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too
PCI
completely finished sizing the BAR.
Reference: https://lkml.org/lkml/2007/8/25/154
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/pci/probe.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 658ac97..66b3a6f
this, disable MEM decoding while updating such BARs. This uses
the same safety test as 253d2e5498, which disables both MEM and IO while
sizing BARs, namely, we don't disable decoding for host bridge devices.
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/pci/setup-res.c | 18
reassignment of the window after
FINAL quirks. Fix that.
And also replace the sparc pci_cfg_fake_ranges() with the functionally
equivalent generic version.
---
Bjorn Helgaas (3):
PCI: allow P2P bridge windows starting at PCI bus address zero
PCI: reimplement P2P bridge 1K I/O windows (Intel
:01:00.0: reg 10: [mem 0x1-0x100ff]
CC: Yinghai Lu ying...@kernel.org
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/pci/probe.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 658ac97
necessary (it probably was just cloned from x86 and was never
useful on sparc).
CC: David S. Miller da...@davemloft.net
CC: sparcli...@vger.kernel.org
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
arch/sparc/kernel/pci.c | 89 +--
1 files
., pbus_size_io(), should
pay attention to dev-io_window_1k, too, but I didn't fix that.
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/pci/probe.c | 25 ++---
drivers/pci/quirks.c | 39 +--
drivers/pci/setup-bus.c | 11
Hi Geert,
There are some PCI-related regressions here that I'd like to fix, but
I don't know where to start. For example, these:
+ drivers/pci/quirks.c: error: implicit declaration of function 'ioread32'
[-Werror=implicit-function-declaration]: = 3154:2
+ drivers/pci/quirks.c: error:
On Mon, Jul 9, 2012 at 3:43 PM, Yinghai Lu ying...@kernel.org wrote:
On Mon, Jul 9, 2012 at 1:32 PM, Bjorn Helgaas bhelg...@google.com wrote:
Note that the bridge window assignment code, e.g., pbus_size_io(), should
pay attention to dev-io_window_1k, too, but I didn't fix that.
Please check
On Mon, Jul 9, 2012 at 3:31 PM, Geert Uytterhoeven ge...@linux-m68k.org wrote:
Hi Bjorn (or Björn?),
On Mon, Jul 9, 2012 at 11:20 PM, Bjorn Helgaas bhelg...@google.com wrote:
There are some PCI-related regressions here that I'd like to fix, but
I don't know where to start. For example
On Mon, Jul 9, 2012 at 3:35 PM, Myron Stowe myron.st...@redhat.com wrote:
PCI's final quirks (pci_fixup_final) are currently invoked by
pci_apply_final_quirk() which traverses the platform's list of PCI
devices. The calling mechanism, and to some point the use of the device
list, limits the
On Mon, Jul 9, 2012 at 12:20 PM, Bjorn Helgaas bhelg...@google.com wrote:
Since 2.6.36 (253d2e5498), we've disabled MEM IO decoding while we size
BARs (except for host bridge devices). These patches tweak this in two
ways:
1) We only kept decoding disabled while sizing the low-order dword
On Mon, Jul 9, 2012 at 2:31 PM, Bjorn Helgaas bhelg...@google.com wrote:
Two fixes here:
1) Zero is a legal P2P bridge window base and BAR value and is likely to
occur when there is an offset between bus addresses and CPU addresses.
Stop disallowing it.
2) The Intel-specific 1K I/O window
On Mon, Jul 9, 2012 at 9:24 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Jul 9, 2012 at 2:31 PM, Bjorn Helgaas bhelg...@google.com wrote:
Two fixes here:
1) Zero is a legal P2P bridge window base and BAR value and is likely to
occur when there is an offset between bus addresses
On Tue, Jul 10, 2012 at 9:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu jiang@huawei.com
Introduce four configuration access functions for PCIe capabilities to
hide difference among PCIe Base Spec versions. With these functions,
we can remove callers responsible for using
On Tue, Jul 10, 2012 at 9:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu jiang@huawei.com
Use PCIe cap access functions to simplify PCI core implementation.
Signed-off-by: Jiang Liu liu...@gmail.com
---
drivers/pci/pci.c| 237
On Tue, Jul 10, 2012 at 9:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu jiang@huawei.com
Use PCIe cap access functions to simplify pcihp_slot.c
Signed-off-by: Jiang Liu liu...@gmail.com
---
drivers/pci/hotplug/pcihp_slot.c | 17 +
1 file changed, 9
On Tue, Jul 10, 2012 at 9:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu liu...@gmail.com
As suggested by Bjorn Helgaas and Don Dutile in threads
http://www.spinics.net/lists/linux-pci/msg15663.html, we could improve access
to PCIe capabilities register in to way:
1) cache content
On Tue, Jul 10, 2012 at 9:54 AM, Jiang Liu liu...@gmail.com wrote:
From: Jiang Liu jiang@huawei.com
Move pcie_cap_has_*() macros to include/linux/pci.h, so they can be shared.
Since pcie_flags was introduced, rework these macros to take a struct pci_dev
*
and use pcie_flags insead of
On Tue, Jul 10, 2012 at 9:07 PM, Jiang Liu jiang@huawei.com wrote:
On 2012-7-11 2:35, Bjorn Helgaas wrote:
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index ba91a7e..80ae022 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -469,3 +469,91 @@ void
On Wed, Jul 11, 2012 at 12:40 AM, Jiang Liu jiang@huawei.com wrote:
On 2012-7-11 11:40, Bjorn Helgaas wrote:
Good point. Return success when reading unimplemented registeres, that
may simplify code. For we still should return -EINVAL when writing
unimplemented registers, right?
Yeah, I
On Mon, Jun 25, 2012 at 2:54 PM, Nikhil P Rao nikhil@intel.com wrote:
On Sat, 2012-06-23 at 12:15 -0600, Bjorn Helgaas wrote:
On Thu, Jun 21, 2012 at 5:47 PM, Nikhil P Rao nikhil@intel.com wrote:
I ran into the disabling BAR .. error message when
trying to use a 8Gb PCIe card
On Wed, Jun 20, 2012 at 1:56 PM, Nikhil P Rao nikhil@intel.com wrote:
size parameter of _pci_assign_resource() needs to be
of type resource_size_t rather than int
Signed-off-by: Nikhil P Rao nikhil@intel.com
---
drivers/pci/setup-res.c |3 ++-
1 files changed, 2 insertions(+),
On Thu, Jul 12, 2012 at 11:27 AM, Octavian Purdila
octavian.purd...@intel.com wrote:
When the requested range is outside of the root range the logic in
__reserve_region_with_split will cause an infinite recursion which
will overflow the stack as seen in the warning bellow.
I think
On Wed, Jul 11, 2012 at 6:13 PM, Yinghai Lu ying...@kernel.org wrote:
On Wed, Jul 11, 2012 at 3:53 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Jun 25, 2012 at 2:54 PM, Nikhil P Rao nikhil@intel.com wrote:
On Sat, 2012-06-23 at 12:15 -0600, Bjorn Helgaas wrote:
On Thu, Jun 21, 2012
On Wed, Jul 11, 2012 at 8:56 PM, Jiang Liu jiang@huawei.com wrote:
On 2012-7-12 1:52, Bjorn Helgaas wrote:
Hi Bjorn,
Seems it would be better to return error code for unimplemented
registers, otherwise following code will becomes more complex. A special
error code
resource management
- Track bus number allocation (struct resource tree per domain) (Yinghai Lu)
- Make P2P bridge 1K I/O windows work with resource reassignment (Bjorn
Helgaas, Yinghai Lu)
- Disable decoding while updating 64-bit BARs (Bjorn Helgaas)
Power management
- Add PCIe
On Mon, Dec 3, 2012 at 1:02 PM, Seth Forshee seth.fors...@canonical.com wrote:
On Thu, Oct 25, 2012 at 11:35:57AM -0600, Bjorn Helgaas wrote:
On Thu, Aug 23, 2012 at 10:36 AM, Matthew Garrett m...@redhat.com wrote:
V3 just fixes all the casting issues and incorporates David's change
On Wed, Dec 5, 2012 at 1:22 PM, Matthew Garrett mj...@srcf.ucam.org wrote:
On Wed, Dec 05, 2012 at 01:09:25PM -0700, Bjorn Helgaas wrote:
That's right; nobody stepped up to fix the section mismatch. I'm
happy to fold in your fix, especially if Matthew acks it.
Yes, sorry, I've been way
On Wed, Dec 5, 2012 at 5:52 PM, Yinghai Lu ying...@kernel.org wrote:
On Wed, Dec 5, 2012 at 4:51 PM, Yinghai Lu ying...@kernel.org wrote:
On Wed, Dec 5, 2012 at 4:36 PM, H. Peter Anvin h...@zytor.com wrote:
On 12/05/2012 04:15 PM, Yinghai Lu wrote:
I don't see why that isn't the right fix.
[+cc linux-pci]
On Thu, Dec 6, 2012 at 7:23 AM, Michal Simek michal.si...@xilinx.com wrote:
Hi guys,
I have a question regarding to sharing generic OF pcie driver between
two architectures MB and ARM Zynq.
Is drivers/pci/pcie location good for it?
Make no sense to have the same driver in
On Thu, Dec 6, 2012 at 11:54 AM, Matthew Garrett mj...@srcf.ucam.org wrote:
On Thu, Dec 06, 2012 at 10:26:01AM -0800, H. Peter Anvin wrote:
NAK on this bit:
+ if (boot_params.hdr.version 0x0209)
+ return 0;
This field is kernel-bootloader documentation. If a
On Thu, Dec 6, 2012 at 11:25 PM, Myron Stowe myron.st...@redhat.com wrote:
From: Yinghai Lu ying...@kernel.org
It causes confusion.
I completely agree that acpiphp causes confusion :)
We may only need acpi hp for pci host bridge.
Split host bridge hot-add support to pci_root_hp, and keep
On Tue, Dec 4, 2012 at 2:56 AM, Daniel J Blueman
dan...@numascale-asia.com wrote:
Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD Northbridges which shouldn't respond.
v2: Use PCI_DEVFN in precomputed constant limit; drop unneeded includes
v3:
On Fri, Dec 7, 2012 at 2:30 PM, Yinghai Lu ying...@kernel.org wrote:
On Fri, Dec 7, 2012 at 11:32 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Thu, Dec 6, 2012 at 11:25 PM, Myron Stowe myron.st...@redhat.com wrote:
From: Yinghai Lu ying...@kernel.org
For example, as soon as you put
On Wed, Nov 14, 2012 at 2:41 AM, Jan Glauber j...@linux.vnet.ibm.com wrote:
Add PCI support for s390, (only 64 bit mode is supported by hardware):
- PCI facility tests
- PCI instructions: pcilg, pcistg, pcistb, stpcifc, mpcifc, rpcit
- map readb/w/l/q and writeb/w/l/q to pcilg and pcistg
of different
size [-Wpointer-to-int-cast]
Introduced by commit 84c1b80e3263 (PCI: Add support for non-BAR ROMs).
I propose the following patch to fix this warning. Any comments? If
it looks OK, I'll add it this afternoon.
commit dbd3fc3345390a989a033427aa915a0dfb62149f
Author: Bjorn Helgaas
On Mon, Dec 10, 2012 at 2:25 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Dec 10, 2012 at 08:03:21PM +1100, Stephen Rothwell wrote:
Hi Bjorn,
After merging the pci tree, today's linux-next build (powerpc
ppc44x_defconfig) produced this warning:
drivers/pci/rom.c: In function
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