This patch adds proper handling of the buggy revision A2 of LXT973 phy, adding
precautions linked to ERRATA Item 4:
Revision A2 of LXT973 chip randomly returns the contents of the previous even
register when you read a odd register regularly
Signed-off-by: Christophe Leroy christophe.le...@c
This patch fixes a desynchronisation problem with CPM UART driver on
Powerpc MPC8xx. The problem happens if data is received before the device
is open by the user application.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.5-vanilla/drivers/tty/serial/cpm_uart
Setting the fifo to only 1 byte generates one interrupt every 1ms at 9600 bauds.
This is too much. This patch reduces the threshold to speeds below 2400 bauds
like in the 8250 UART driver.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.5-vanilla/drivers/tty/serial/cpm_uart
maxidl register was set to fifo size. There is no reason to set this
register to same value as fifo size. Setting it now to 0x10 by default
as in the UCC UART driver.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.5-vanilla/drivers/tty/serial/cpm_uart/cpm_uart_core.c
UART.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.5-vanilla/drivers/tty/serial/cpm_uart/cpm_uart_core.c
2012-07-21 22:58:29.0 +0200
+++ linux-3.5/drivers/tty/serial/cpm_uart/cpm_uart_core.c 2012-08-09
17:38:37.0 +0200
@@ -501,6 +501,7
This patch adds proper handling of the buggy revision A2 of LXT973 phy, adding
precautions linked to ERRATA Item 4:
Revision A2 of LXT973 chip randomly returns the contents of the previous even
register when you read a odd register regularly
Signed-off-by: Christophe Leroy christophe.le...@c
irq_eoi() is already called by generic_handle_irq() so
it shall not be called a again
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: linux/arch/powerpc/platforms/8xx/m8xx_setup.c
===
--- linux/arch/powerpc/platforms
irq_eoi() is already called by generic_handle_irq() so
it shall not be called a again
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: linux/arch/powerpc/platforms/8xx/m8xx_setup.c
===
--- linux/arch/powerpc/platforms
The bit_per_word can be set in the OF Device tree, so no need to force it as
with
the platform_data when using OF Platform
Signed-off-by: Patrick Vasseur patrick.vass...@c-s.fr
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.8.4/drivers/gpio/gpio-max7301.c
linux
Le 22/03/2013 09:38, Linus Walleij a écrit :
On Tue, Mar 5, 2013 at 4:26 PM, Christophe Leroy
christophe.le...@c-s.fr wrote:
This patch allows the use of the MAX730x Driver on systems using
the Open Firmware platform format.
The bit_per_word can be set in the OF Device tree, so no need
Le 22/03/2013 09:38, Linus Walleij a écrit :
On Tue, Mar 5, 2013 at 4:26 PM, Christophe Leroy
christophe.le...@c-s.fr wrote:
This patch allows the use of the MAX730x Driver on systems using
the Open Firmware platform format.
The bit_per_word can be set in the OF Device tree, so no need
This patch allows the use of the MAX730x Driver on systems using
the Open Firmware platform format.
The bit_per_word can be set in the OF Device tree, so no need to force it as
with
the platform_data.
Signed-off-by: Patrick Vasseur patrick.vass...@c-s.fr
Signed-off-by: Christophe Leroy
This patch adds support for Analog Devices AD7923 ADC in the IIO Subsystem.
Signed-off-by: Patrick Vasseur patrick.vass...@c-s.fr
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -urN linux-next-e347c98/drivers/iio/adc/Kconfig
linux-next-e347c98.new/drivers/iio/adc/Kconfig
--- linux
This patch adds support for Analog Devices AD7923 ADC in the IIO Subsystem.
Signed-off-by: Patrick Vasseur patrick.vass...@c-s.fr
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -urN linux-next-e347c98/drivers/iio/adc/Kconfig
linux-next-e347c98.new/drivers/iio/adc/Kconfig
--- linux
the WDIOC_SETTIMEOUT ioctl.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.7/drivers/watchdog/mpc8xxx_wdt.c
linux/drivers/watchdog/mpc8xxx_wdt.c
--- linux-3.7.7/drivers/watchdog/mpc8xxx_wdt.c 2013-02-11 18:05:09.0
+0100
+++ linux/drivers/watchdog/mpc8xxx_wdt.c2013
timeout.
The driver also implements the WDIOC_SETTIMEOUT ioctl.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c
linux/drivers/watchdog/mpc8xxx_wdt.c
--- linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c 2013-02-17 19:53:32.0
+0100
new comers in Kernel Development, so thanks for your help.
Christophe
Le 08/01/2013 11:27, Lars-Peter Clausen a écrit :
On 01/08/2013 09:42 AM, Christophe Leroy wrote:
This patch adds support for Analog Devices AD7923 ADC in the IIO Subsystem.
Signed-off-by: Patrick Vasseur patrick.vass...@c
-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/scripts/setlocalversion linux/scripts/setlocalversion
--- linux-3.7.9/scripts/setlocalversion 2013-02-17 19:53:32.0 +0100
+++ linux/scripts/setlocalversion 2012-11-03 03:15:32.0 +0100
@@ -9,6 +9,8 @@
#
#
+unset
;
reg = 0x960 0x10;
interrupts = 255 255 255 255 1 2 6 9 10 11 14 15 23 24 26 31;
interrupt-parent = CPM_PIC;
gpio-controller;
};
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/arch/powerpc/include/asm/cpm1
-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/scripts/setlocalversion linux/scripts/setlocalversion
--- linux-3.7.9/scripts/setlocalversion 2013-02-17 19:53:32.0 +0100
+++ linux/scripts/setlocalversion 2013-02-22 03:37:31.0 +0100
@@ -108,7 +108,7
This patch allows the use of the MAX730x Driver on systems using
the Open Firmware platform format
Signed-off-by: Patrick Vasseur patrick.vass...@c-s.fr
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/drivers/gpio/gpio-max7301.c
linux/drivers/gpio/gpio-max7301.c
register.
Implication: Managed applications may not obtain the correct register contents
when a particular register is monitored for device status.
Workaround: None.
Status: This erratum has been previously fixed (in rev A3)
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -u
Hello,
The two following patches do:
1) Allow the use of NS LM70 with a 4 wire SPI bus too, since the component
allows both configuration
2) Adds support for NS LM71 and LM74
Regards
Christophe
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to
Removing the 3wire limitation on LM70 as the component also allows
operation on 4wire SPI bus
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -u linux-3.5-vanilla/drivers/hwmon/lm70.c linux-3.5/drivers/hwmon/lm70.c
--- linux-3.5-vanilla/drivers/hwmon/lm70.c 2012-07-21 22:58
Adding support for LM74 and LM71 chips
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -u linux-3.5-vanilla/drivers/hwmon/Kconfig linux-3.5/drivers/hwmon/Kconfig
--- linux-3.5-vanilla/drivers/hwmon/Kconfig 2012-07-21 22:58:29.0
+0200
+++ linux-3.5/drivers/hwmon/Kconfig
Adding support for LM74 and LM71 chips
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -u linux-3.5-vanilla/drivers/hwmon/Kconfig linux-3.5/drivers/hwmon/Kconfig
--- linux-3.5-vanilla/drivers/hwmon/Kconfig 2012-07-21 22:58:29.0
+0200
+++ linux-3.5/drivers/hwmon/Kconfig
bauds.
This fix limits to one byte the waiting period.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.5-vanilla/drivers/tty/serial/cpm_uart/cpm_uart_core.c
2012-07-21 22:58:29.0 +0200
+++ linux-3.5/drivers/tty/serial/cpm_uart/cpm_uart_core.c 2012-08-09
17
Hello,
I'm not sure who to address this Patch to.
It fixes a desynchronisation problem with CPM UART driver on Powerpc MPC8xx.
The problem happens if data is received before the device is open by the user
application.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.5
of the previous even register.
Implication: Managed applications may not obtain the correct register contents
when a particular
register is monitored for device status.
Workaround: None.
Status: This erratum has been previously fixed (in rev A3)
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Hello,
This Patch adds support for the LM74 chip from National Semiconductor (NS)
in the lm70 driver
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -u linux-3.5-vanilla/drivers/hwmon/Kconfig linux-3.5/drivers/hwmon/Kconfig
--- linux-3.5-vanilla/drivers/hwmon/Kconfig 2012-07
This patch adds support for Analog Devices AD7923 ADC in the IIO Subsystem.
Signed-off-by: Patrick Vasseur patrick.vass...@c-s.fr
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -uN linux-3.7.1/drivers/staging/iio/adc/Kconfig
linux/drivers/staging/iio/adc/Kconfig
--- linux-3.7.1
-frequency = 1000;
reg = 7;
spi-cs-high;
spi-bits = 16;
};
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.8.13/drivers/spi/spi.c 2013-05-11 22:57:46.0 +0200
+++ linux/drivers/spi/spi.c 2013-08-06 18:19
Le 23/08/2013 19:47, Linus Walleij a écrit :
On Tue, Aug 20, 2013 at 8:29 AM, Christophe Leroy
christophe.le...@c-s.fr wrote:
This patch reverts commit 047b93a35961f7a6561e6f5dcb040738f822b892 which breaks
MAX7301 GPIO driver because that commit was dependant on a rejected patch
.
The new message tries to be more generic in order to make the user understand
that the Oops is due to something wrong with an instruction, not necessarily
due to an FPU instruction.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11-rc6/arch/powerpc/kernel/traps.c
linux
This patch reverts commit 047b93a35961f7a6561e6f5dcb040738f822b892 which breaks
MAX7301 GPIO driver because that commit was dependant on a rejected patch that
was implementing selection of SPI speed from the Device Tree.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.11-rc6
cpm_uart serial driver uses GPIO for control signals. In order to be used
properly, GPIOs have to be reserved. Comment in gpiolib.c considers illegal
the use of GPIOs without requesting them. In addition, the direction of the
GPIO has to be set properly.
Signed-off-by: Christophe Leroy
on the 8xx.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11.org/arch/powerpc/mm/pgtable.c
linux-3.11/arch/powerpc/mm/pgtable.c
--- linux-3.11.org/arch/powerpc/mm/pgtable.c2013-09-02 22:46:10.0
+0200
+++ linux-3.11/arch/powerpc/mm/pgtable.c2013-09-09 11
Activating CONFIG_PIN_TLB is supposed to pin the IMMR and the first three
8Mbytes pages. But the setting of the MD_CTR was missing so as the index is
decremented every DTLB update, the pinning of the third 8Mbytes page was
overwriting the DTLB entry for IMMR.
Signed-off-by: Christophe Leroy
on the 8xx.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11.org/arch/powerpc/mm/pgtable.c
linux-3.11/arch/powerpc/mm/pgtable.c
--- linux-3.11.org/arch/powerpc/mm/pgtable.c2013-09-02 22:46:10.0
+0200
+++ linux-3.11/arch/powerpc/mm/pgtable.c2013-09-09 11
This is a reorganisation of the setup of the TLB at kernel startup, in order
to handle the CONFIG_PIN_TLB case in accordance with chapter 8.10.3 of MPC866
and MPC885 reference manuals.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11.org/arch/powerpc/kernel/head_8xx.S
This patch adds support for iio_consumer to Analog Devices AD7923 ADC driver.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Verified-by: Patrick Vasseur patrick.vass...@c-s.fr
diff -urN a/drivers/iio/adc/ad7923.c b/drivers/iio/adc/ad7923.c
--- a/drivers/iio/adc/ad7923.c 1970-01-01 01
written
being entry 31, next entries would possibly get overwritten after.
We are now starting from entry 31 and decrementing.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11.org/arch/powerpc/kernel/head_8xx.S
linux-3.11/arch/powerpc/kernel/head_8xx.S
--- linux-3.11.org
The patch adds WAN support for Infineon PEF2256 E1 Chipset.
Signed-off-by: Jerome Chantelauze jerome.chantela...@c-s.fr
Acked-by: Christophe Leroy christophe.le...@c-s.fr
diff -urN a/drivers/net/wan/pef2256.c b/drivers/net/wan/pef2256.c
--- a/drivers/net/wan/pef2256.c 1970-01-01 01:00
The patch adds WAN support for Lantiq FALC56 - PEF2256 E1 Chipset.
Signed-off-by: Jerome Chantelauze jerome.chantelauze@c-s.fr
Acked-by: Christophe Leroy christophe.le...@c-s.fr
diff -urN a/drivers/net/wan/pef2256.c b/drivers/net/wan/pef2256.c
--- a/drivers/net/wan/pef2256.c 1970-01-01 01:00
Commit beb2dc0a7a84be003ce54e98b95d65cc66e6e536 breaks the MPC8xx which seems
to not support using mfspr SPRN_TBRx instead of mftb/mftbu despite
what is written in the reference manual
This patchs revert to the use of mftb/mftbu when CONFIG_8xx is selected
Signed-off-by: Christophe Leroy
: self tests passed, processed 225944 bytes in 3289576 nsec
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/arch/powerpc/configs/adder875_defconfig
b/arch/powerpc/configs.new/adder875_defconfig
--- a/arch/powerpc/configs/adder875_defconfig 2013-11-22 18:20:10.342968268
+0100
Many components still have 16 bits registers and several even have
8 bits registers. This patch adds structures and functions to deal with
those registers.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -urN a/include/linux/debugfs.h b/include/linux/debugfs.h
--- a/include/linux
Today in the perfevents subsystem it looks like DTLB/ITLB misses are
implemented as HW counter only.
On some processors, like PowerPC 8xx, there is no counter for that.
However DTLB/ITLB misses are handled as exceptions via software, so we
have an opportunity to implement a SW counter for that.
kernels
(for instance when activating CONFIG_LOCKDEP_SUPPORT) without having
to activate CONFIG_PIN_TLB.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel
Convert mpc8xxx_wdt.c to the new watchdog API.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
--- a/drivers/watchdog/mpc8xxx_wdt.c2013-05-11 22:57:46.0 +0200
+++ b/drivers/watchdog/mpc8xxx_wdt.c
MPC8xx watchdog is enabled at startup by HW.
If the bootloader disables it, it cannot be reenabled.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
--- a/drivers/watchdog/mpc8xxx_wdt.c2013-05-11 22:57
-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11.org/arch/powerpc/kernel/head_8xx.S
linux-3.11/arch/powerpc/kernel/head_8xx.S
--- linux-3.11.org/arch/powerpc/mm/init_32.c2013-09-02 22:46:10.0
+0200
+++ linux-3.11/arch/powerpc/mm/init_32.c2013-09-09 11:28
: self tests passed, processed 225944 bytes in 3289576 nsec
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: a/lib/Kconfig
===
--- a/lib/Kconfig (révision 5325)
+++ b/lib/Kconfig (copie de travail)
@@ -102,6
Convert mpc8xxx_wdt.c to the new watchdog API.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
--- a/drivers/watchdog/mpc8xxx_wdt.c2013-05-11 22:57:46.0 +0200
+++ b/drivers/watchdog/mpc8xxx_wdt.c
Convert mpc8xxx_wdt.c to the new watchdog API.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
--- a/drivers/watchdog/mpc8xxx_wdt.c2013-05-11 22:57:46.0 +0200
+++ b/drivers/watchdog/mpc8xxx_wdt.c
This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture.
Unlike PPC64, PPC32 doesn't provide the PACA register. Therefore the
implementation is similar to the one done in the IA64 architecture.
It is based on additional information added to the Task Info structure.
Signed-off-by: Christophe
fixes the issue by comparing the t-new bits_per_word and
t-speed_hz with the previous one in order to determine if one of them changed.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.8.13/drivers/spi/spi-fsl-spi.c 2013-05-11 22:57:46.0
+0200
+++ linux/drivers/spi
The patch adds WAN support for Infineon FALC56 - PEF2256 E1 Chipset.
Signed-off-by: Jerome Chantelauze jerome.chantelauze@c-s.fr
Acked-by: Christophe Leroy christophe.le...@c-s.fr
diff -urN a/drivers/net/wan/pef2256.c b/drivers/net/wan/pef2256.c
--- a/drivers/net/wan/pef2256.c 1970-01-01 01
was
not pinned.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.11.org/arch/powerpc/kernel/head_8xx.S
linux-3.11/arch/powerpc/kernel/head_8xx.S
--- linux-3.11.org/arch/powerpc/kernel/head_8xx.S 2013-09-02
22:46:10.0 +0200
+++ linux-3.11/arch/powerpc/kernel
Pinging this watch as we got no feedback since 22 Nov, although we have taken
into account reviews from v1 and v2.
The patch adds WAN support for Lantiq FALC56 - PEF2256 E1 Chipset.
Signed-off-by: Jerome Chantelauze jerome.chantelauze@c-s.fr
Acked-by: Christophe Leroy christophe.le...@c-s.fr
to the kernel through register r7.
This is done regardless of whether CONFIG_PIN_TLB is active or not. It allows to
load big kernels (for instance when activating CONFIG_LOCKDEP_SUPPORT) without
having to activate CONFIG_PIN_TLB.
Not-yet-signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Le 06/12/2013 20:09, Scott Wood a écrit :
On Wed, 2013-11-27 at 12:04 +0100, Christophe Leroy wrote:
Today, the only way to load kernels whose size is greater than 8Mbytes is to
activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
limited to 8Mbytes. This patch sets up
CONFIG_PIN_TLB
is active or not. It allows to load big kernels (for instance when activating
CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
--- a/arch/powerpc/Kconfig
the userspace timeout.
This patch also adds the WDIOC_SETTIMEOUT ioctl to the driver.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.8.13/drivers/watchdog/mpc8xxx_wdt.c 2013-05-11 22:57:46.0
+0200
+++ linux/drivers/watchdog/mpc8xxx_wdt.c2013-08-08 02:12:15.0
This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture.
Unlike PPC64, PPC32 doesn't use the PACA convention. Therefore the
implementation is taken from the IA64 architecture.
It is based on additional information added to the Task Info structure.
Signed-off-by: Christophe Leroy
. The
hash was reset at each 64k block.
This patch adds SPLICE_F_MORE to the flags when more data is pending.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: b/fs/splice.c
===
--- a/fs/splice.c (revision 5615)
+++ b
. The
hash was reset at each 64k block.
This patch adds SPLICE_F_MORE to the flags when more data is pending.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: b/fs/splice.c
===
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -1171,7
operations, not the combined
authentication/encryption ones.
Note that it has been tested on MPC885, but not on MPC82xx
I would be happy to receive comments and suggestions in order to improve this
first try.
Not-yet-signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: b/drivers/crypto
Exception InstructionAccess does not exist on MPC8xx. No need to branch there
from somewhere else.
Handling can be done directly in InstructionTLBError Exception.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 17 +++--
1 files
-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 104 --
1 files changed, 36 insertions(+), 68 deletions(-)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 1329c5a..3af6db1 100644
--- a/arch
Value 0x00f0 is used to force bits in TLB level 2 entry. This value is linked
to the page size and will vary when we change the page size. Lets define a const
for it in order to have it at only one place.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S
Lets save one cycle by aligning swapper_pg_dir on 16 bits boundary.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 13 +
1 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc
This patch hiddes that SPR address needed for CPU6 ERRATA handling in the macro.
Then we don't have to worry about this address directly in the code.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 29 -
1 files changed
DataAccess exception is never generated by MPC8xx so do the job directly where
it is used to avoid an unnecessary branching.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 23 ++-
1 files changed, 10 insertions(+), 13 deletions
No need to re-set this bit at each TLB miss. Let's set it in the PTE.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/include/asm/pgtable-ppc32.h | 21 +
arch/powerpc/include/asm/pte-8xx.h |7 +--
arch/powerpc/kernel/head_8xx.S
This patch activates the handling of 16k pages on the MPC8xx.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/include/asm/mmu-8xx.h |2 ++
arch/powerpc/kernel/head_8xx.S |4
3 files changed, 7 insertions
There is not need to restore r10, r11 and cr registers at this end of ITLBmiss
handler as they are saved again to the same place in ITLBError handler we are
jumping to.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |8 +---
1 files changed, 5
When a PMD entry is valid, _PMD_PRESENT is set. Therefore, forcing that bit
during TLB loading is useless.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, dirty handling is not
handled here anymore. So we fix the comment.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git
By XORing the upper part of the instruction code, we get a value that can
directly be verified with the second test and we can remove the first test.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |6 ++
1 files changed, 2 insertions(+), 4
For PAGE size related operations, use PAGE size consts in order to be able to
use different page size in the futur.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 29 ++---
1 files changed, 18 insertions(+), 11 deletions
In DTLBError handler there is not need to restore r10, r11 and cr registers
after fixing DAR as they are saved again to the same place just after.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |4 ++--
1 files changed, 2 insertions(+), 2
Use M_TW instead of M_TWB for storing Level 1 table address as M_TWB requires
4k aligned tables, which is only the case with 4k pages.
Consequently, we have to calculate the level 1 table index by ourselves.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel
r10 and r3 are only used inside FixupDAR function. So lets save them inside
that function only.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 27 +--
1 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch
MD_TWC can only be used properly with 4k pages.
So lets calculate level 2 table index by ourselves.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 30 +-
1 files changed, 13 insertions(+), 17 deletions(-)
diff --git
Branching takes two cycles on MPC8xx. Lets duplicate the two instructions
and avoid the branching.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, r10 is not used anymore
after FixupDAR. There is therefore no need to set it up with the value of DAR.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |7 +++
1 files changed, 3 insertions
Since coming 469d62be9263b92f2c3329540cbb1c076111f4f3, SPRG2 is used as a
scratch register just like SPRG0 and SPRG1. So Declare it as such and fix
the comment which is not valid anymore since that commit.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/include/asm
This patchset:
* provides several MMU TLB handling optimisation on MPC8xx.
* adds support of 16k pages on MPC8xx.
All changes have been successfully tested on a custom board equipped with MPC885
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Tested-by: Christophe Leroy christophe.le...@c
Le 14/08/2014 13:03, Sergei Shtylyov a écrit :
Hello.
On 8/14/2014 10:31 AM, leroy christophe wrote:
I have an hardware with two ethernet interfaces, and with the two
PHYs inside
the same component INTEL LXT973 which has only one interrupt.
I also have another hardware with two ethernet
. The
hash was reset at each 64k block.
This patch adds SPLICE_F_MORE to the flags when more data is pending.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
Index: b/fs/splice.c
===
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -1171,7
handling to mac-fec and mac-scc.
Tested with bridge function on MPC885 with FEC.
Reported-by: Germain Montoies germain.monto...@c-s.fr
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
drivers/net/ethernet/freescale/fs_enet/mac-fec.c | 3 +++
drivers/net/ethernet/freescale/fs_enet/mac-scc.c
was implementing a 16 bit alignment of
the
PGDIR. It is not worth potentially wasting up to 64k of memory just for
removing one
instruction (ori).
2) I managed to preserve r11 while calculating the level 2 address, therefore
no more need to save r11 into CR.
Signed-off-by: Christophe Leroy
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, r10 is not used anymore
after FixupDAR. There is therefore no need to set it up with the value of DAR.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |7 +++
1 files changed, 3 insertions
Branching takes two cycles on MPC8xx. Lets duplicate the two instructions
and avoid the branching.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel
By XORing the upper part of the instruction code, we get a value that can
directly be verified with the second test and we can remove the first test.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |6 ++
1 files changed, 2 insertions(+), 4
This patch hiddes that SPR address needed for CPU6 ERRATA handling in the macro.
Then we don't have to worry about this address directly in the code.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 29 -
1 files changed
Use M_TW instead of M_TWB for storing Level 1 table address as M_TWB requires
4k aligned tables, which is only the case with 4k pages.
Consequently, we have to calculate the level 1 table index by ourselves.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel
There is not need to restore r10, r11 and cr registers at this end of ITLBmiss
handler as they are saved again to the same place in ITLBError handler we are
jumping to.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |8 +---
1 files changed, 5
When a PMD entry is valid, _PMD_PRESENT is set. Therefore, forcing that bit
during TLB loading is useless.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel
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