[PATCH v4 2/2] crypto: engine: permit to enqueue ashash_request
The current crypto engine allow only ablkcipher_request to be enqueued.
Thus denying any use of it for hardware that also handle hash algo.
This patch modify the API for allowing to enqueue ciphers and hash.
Since omap-aes/omap-des are the only users, this patch also convert them
to the new cryptoengine API.
Signed-off-by: Corentin Labbe
---
crypto/crypto_engine.c| 186 --
drivers/crypto/omap-aes.c | 8 +-
drivers/crypto/omap-des.c | 8 +-
include/crypto/engine.h | 49
4 files changed, 189 insertions(+), 62 deletions(-)
diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c
index 795b6f9..bfb92ac 100644
--- a/crypto/crypto_engine.c
+++ b/crypto/crypto_engine.c
@@ -15,13 +15,11 @@
#include
#include
#include
+#include
#include "internal.h"
#define CRYPTO_ENGINE_MAX_QLEN 10
-void crypto_finalize_request(struct crypto_engine *engine,
-struct ablkcipher_request *req, int err);
-
/**
* crypto_pump_requests - dequeue one request from engine queue to process
* @engine: the hardware engine
@@ -35,10 +33,11 @@ static void crypto_pump_requests(struct crypto_engine
*engine,
bool in_kthread)
{
struct crypto_async_request *async_req, *backlog;
- struct ablkcipher_request *req;
+ struct ahash_request *hreq;
+ struct ablkcipher_request *breq;
unsigned long flags;
bool was_busy = false;
- int ret;
+ int ret, rtype;
spin_lock_irqsave(&engine->queue_lock, flags);
@@ -83,9 +82,7 @@ static void crypto_pump_requests(struct crypto_engine *engine,
if (!async_req)
goto out;
- req = ablkcipher_request_cast(async_req);
-
- engine->cur_req = req;
+ engine->cur_req = async_req;
if (backlog)
backlog->complete(backlog, -EINPROGRESS);
@@ -96,6 +93,7 @@ static void crypto_pump_requests(struct crypto_engine *engine,
spin_unlock_irqrestore(&engine->queue_lock, flags);
+ rtype = crypto_tfm_alg_type(engine->cur_req->tfm);
/* Until here we get the request need to be encrypted successfully */
if (!was_busy && engine->prepare_crypt_hardware) {
ret = engine->prepare_crypt_hardware(engine);
@@ -105,24 +103,55 @@ static void crypto_pump_requests(struct crypto_engine
*engine,
}
}
- if (engine->prepare_request) {
- ret = engine->prepare_request(engine, engine->cur_req);
+ switch (rtype) {
+ case CRYPTO_ALG_TYPE_AHASH:
+ hreq = ahash_request_cast(engine->cur_req);
+ if (engine->prepare_hash_request) {
+ ret = engine->prepare_hash_request(engine, hreq);
+ if (ret) {
+ pr_err("failed to prepare request: %d\n", ret);
+ goto req_err;
+ }
+ engine->cur_req_prepared = true;
+ }
+ ret = engine->hash_one_request(engine, hreq);
if (ret) {
- pr_err("failed to prepare request: %d\n", ret);
+ pr_err("failed to hash one request from queue\n");
goto req_err;
}
- engine->cur_req_prepared = true;
- }
-
- ret = engine->crypt_one_request(engine, engine->cur_req);
- if (ret) {
- pr_err("failed to crypt one request from queue\n");
- goto req_err;
+ return;
+ case CRYPTO_ALG_TYPE_ABLKCIPHER:
+ breq = ablkcipher_request_cast(engine->cur_req);
+ if (engine->prepare_cipher_request) {
+ ret = engine->prepare_cipher_request(engine, breq);
+ if (ret) {
+ pr_err("failed to prepare request: %d\n", ret);
+ goto req_err;
+ }
+ engine->cur_req_prepared = true;
+ }
+ ret = engine->cipher_one_request(engine, breq);
+ if (ret) {
+ pr_err("failed to cipher one request from queue\n");
+ goto req_err;
+ }
+ return;
+ default:
+ pr_err("failed to prepare request of unknown type\n");
+ return;
}
- return;
req_err:
- crypto_finalize_request(engine, engine->cur_req, ret);
+ switch (rtype) {
+ case CRYPTO_ALG_TYPE_AHASH:
+ hreq = ahash_request_cast(engine->cur_req);
+ crypto_finalize_hash_request(engine, hreq, ret);
+ break;
+ case CRYP
[PATCH v4 1/2] crypto: move crypto engine to its own header
This patch move the whole crypto engine API to its own header
crypto/engine.h.
Signed-off-by: Corentin Labbe
---
crypto/crypto_engine.c| 1 +
drivers/crypto/omap-aes.c | 1 +
drivers/crypto/omap-des.c | 1 +
include/crypto/algapi.h | 70
include/crypto/engine.h | 90 +++
5 files changed, 93 insertions(+), 70 deletions(-)
create mode 100644 include/crypto/engine.h
diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c
index a55c82d..795b6f9 100644
--- a/crypto/crypto_engine.c
+++ b/crypto/crypto_engine.c
@@ -14,6 +14,7 @@
#include
#include
+#include
#include "internal.h"
#define CRYPTO_ENGINE_MAX_QLEN 10
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 4ab53a6..993e08e 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -36,6 +36,7 @@
#include
#include
#include
+#include
#define DST_MAXBURST 4
#define DMA_MIN(DST_MAXBURST * sizeof(u32))
diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
index 5691434..dc36e1c 100644
--- a/drivers/crypto/omap-des.c
+++ b/drivers/crypto/omap-des.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#define DST_MAXBURST 2
diff --git a/include/crypto/algapi.h b/include/crypto/algapi.h
index 8637cdf..404e955 100644
--- a/include/crypto/algapi.h
+++ b/include/crypto/algapi.h
@@ -15,7 +15,6 @@
#include
#include
#include
-#include
#include
struct crypto_aead;
@@ -129,75 +128,6 @@ struct ablkcipher_walk {
unsigned intblocksize;
};
-#define ENGINE_NAME_LEN30
-/*
- * struct crypto_engine - crypto hardware engine
- * @name: the engine name
- * @idling: the engine is entering idle state
- * @busy: request pump is busy
- * @running: the engine is on working
- * @cur_req_prepared: current request is prepared
- * @list: link with the global crypto engine list
- * @queue_lock: spinlock to syncronise access to request queue
- * @queue: the crypto queue of the engine
- * @rt: whether this queue is set to run as a realtime task
- * @prepare_crypt_hardware: a request will soon arrive from the queue
- * so the subsystem requests the driver to prepare the hardware
- * by issuing this call
- * @unprepare_crypt_hardware: there are currently no more requests on the
- * queue so the subsystem notifies the driver that it may relax the
- * hardware by issuing this call
- * @prepare_request: do some prepare if need before handle the current request
- * @unprepare_request: undo any work done by prepare_message()
- * @crypt_one_request: do encryption for current request
- * @kworker: thread struct for request pump
- * @kworker_task: pointer to task for request pump kworker thread
- * @pump_requests: work struct for scheduling work to the request pump
- * @priv_data: the engine private data
- * @cur_req: the current request which is on processing
- */
-struct crypto_engine {
- charname[ENGINE_NAME_LEN];
- boolidling;
- boolbusy;
- boolrunning;
- boolcur_req_prepared;
-
- struct list_headlist;
- spinlock_t queue_lock;
- struct crypto_queue queue;
-
- boolrt;
-
- int (*prepare_crypt_hardware)(struct crypto_engine *engine);
- int (*unprepare_crypt_hardware)(struct crypto_engine *engine);
-
- int (*prepare_request)(struct crypto_engine *engine,
- struct ablkcipher_request *req);
- int (*unprepare_request)(struct crypto_engine *engine,
-struct ablkcipher_request *req);
- int (*crypt_one_request)(struct crypto_engine *engine,
-struct ablkcipher_request *req);
-
- struct kthread_worker kworker;
- struct task_struct *kworker_task;
- struct kthread_work pump_requests;
-
- void*priv_data;
- struct ablkcipher_request *cur_req;
-};
-
-int crypto_transfer_request(struct crypto_engine *engine,
- struct ablkcipher_request *req, bool need_pump);
-int crypto_transfer_request_to_engine(struct crypto_engine *engine,
- struct ablkcipher_request *req);
-void crypto_finalize_request(struct crypto_engine *engine,
-struct ablkcipher_request *req, int err);
-int crypto_engine_start(struct crypto_engine *engine);
-int crypto_engine_stop(struct crypto_engine *engine);
-struct crypto_engine *crypto_engine_alloc_init(struct device *dev, bool rt);
-int crypto_engine_exit(struct crypto_engine *engine);
-
extern const struct crypto_type crypto_ablkcipher_type;
extern const struct crypto_type crypto_blkcipher_type;
[PATCH v4 0/2] crypto: engine: permit to enqueue ashash_request
Hello I wanted to use the crypto engine for my Allwinner crypto driver but something prevented me to use it: it cannot enqueue hash requests. This patch convert crypto engine to permit enqueuing of ahash_requests. It also convert the only driver using crypto engine. The modifications against omap was only compile tested but the crypto engine with hash support was tested on two different offtree driver (sun4i-ss and sun8i-ce) Regards Changes since v1: - rebased on cryptodev for handling omap-des Changes since v2: - Fusionned both patch - Renamed crypt_one_request to do_one_request - Test the type of request before processing it Changes sunce v3 - Add functions for each type (ablkcipher/ahash) LABBE Corentin (2): crypto: move crypto engine to its own header crypto: engine: permit to enqueue ashash_request crypto/crypto_engine.c| 187 -- drivers/crypto/omap-aes.c | 9 ++- drivers/crypto/omap-des.c | 9 ++- include/crypto/algapi.h | 70 - include/crypto/engine.h | 107 ++ 5 files changed, 266 insertions(+), 116 deletions(-) create mode 100644 include/crypto/engine.h -- 2.7.3
Re: [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC.
Hello
> +/* Read data from the RNG unit */
> +static int cavium_rng_read(struct hwrng *rng, void *dat, size_t max, bool
> wait)
> +{
> + struct cavium_rng *p = container_of(rng, struct cavium_rng, ops);
> + unsigned int size = max;
> +
> + while (size >= 8) {
> + *((u64 *)dat) = readq(p->result);
> + size -= 8;
> + dat += 8;
> + }
I think you could use readsq()
This will increase throughput
Regards
LABBE Corentin
Re: [PATCH] MAINTAINERS: add linux-su...@googlegroups.com as list for sunxi arch
On 24/08/2016 20:23, Maxime Ripard wrote: > Hi, > > On Thu, Aug 18, 2016 at 02:14:17PM +0200, LABBE Corentin wrote: >> All discutions about sunxi architecture is done >> on linux-su...@googlegroups.com. >> This patch add it as list on drivers for this arch. >> >> Signed-off-by: LABBE Corentin >> --- >> MAINTAINERS | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index a306795..6254eb1 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -980,6 +980,7 @@ ARM/Allwinner sunXi SoC support >> M: Maxime Ripard >> M: Chen-Yu Tsai >> L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) >> +L: linux-su...@googlegroups.com > > I don't want a mailing list hosted on google groups to be added to > MAINTAINERS. Why ? Because I see already: L: xiyoulinuxkernelgr...@googlegroups.com (subscribers-only) L: open-is...@googlegroups.com L: kasan-...@googlegroups.com L: linux-...@googlegroups.com L: rtc-li...@googlegroups.com > > We can ask for one on kernel.org though if people feel like it's > relevant. Nobody cared for a few years, so I guess it would be a no, > but if others feel like it... > I am not against one on kernel.org Regards
Re: [PATCH 2/3] crypto: engine - find request type with cra_type
On Tue, Aug 15, 2017 at 07:51:14AM +, Fabien DESSENNE wrote: > Hi Corentin, > > Since I have just sent a patch to add the support of "aead_request" to crypto > engine, I am wondering if your proposed change (checking cra_type instead of > crypto_tfm_alg_type) and mine are compatible. > It looks like they are (assuming we export crypto_aead_type): can you confirm? > BR > > Fabien. > Hello My change is incompatible with yours since I remove a switch(crypto_tfm_alg_type) that you use. Anyway you will need my change:) because you use ablkcipher which is obsolete and you need to convert to skcipher. regards Corentin Labbe
Re: [PATCH 2/3] ARM: sun8i: sunxi-h3-h5: add phy-is-integrated property to internal PHY
On Fri, Aug 11, 2017 at 08:03:29AM -0700, Florian Fainelli wrote: > On August 11, 2017 6:25:26 AM PDT, Corentin Labbe > wrote: > >On Fri, Aug 11, 2017 at 04:22:11PM +0800, Chen-Yu Tsai wrote: > >> On Fri, Aug 11, 2017 at 4:19 PM, Corentin Labbe > >> wrote: > >> > On Fri, Aug 11, 2017 at 04:11:13PM +0800, Chen-Yu Tsai wrote: > >> >> On Fri, Aug 11, 2017 at 4:05 PM, Corentin Labbe > >> >> wrote: > >> >> > On Fri, Aug 11, 2017 at 10:42:51AM +0800, Chen-Yu Tsai wrote: > >> >> >> Hi, > >> >> >> > >> >> >> On Thu, Aug 10, 2017 at 4:51 PM, Corentin Labbe > >> >> >> wrote: > >> >> >> > This patch add the new phy-is-integrated property to the > >internal PHY > >> >> >> > node. > >> >> >> > > >> >> >> > Signed-off-by: Corentin Labbe > >> >> >> > --- > >> >> >> > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 + > >> >> >> > 1 file changed, 1 insertion(+) > >> >> >> > > >> >> >> > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi > >b/arch/arm/boot/dts/sunxi-h3-h5.dtsi > >> >> >> > index 4b599b5d26f6..54fc24e4c569 100644 > >> >> >> > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi > >> >> >> > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi > >> >> >> > @@ -425,6 +425,7 @@ > >> >> >> > reg = <1>; > >> >> >> > clocks = <&ccu > >CLK_BUS_EPHY>; > >> >> >> > resets = <&ccu > >RST_BUS_EPHY>; > >> >> >> > + phy-is-integrated; > >> >> >> > >> >> >> You also need to "delete" this property at the board level for > >> >> >> any board that has the external PHY at address <1>. Otherwise > >> >> >> they will stop working. This is due to the internal and > >external > >> >> >> PHYs having the same path and node name in the device tree, so > >> >> >> they are effectively the same node. > >> >> >> > >> >> >> ChenYu > >> >> >> > >> >> > > >> >> > They have not the same name, ext_rgmii_phy vs int_mii_phy. > >> >> > >> >> That is just the label. The label plays no part in device tree > >merging. The path > >> >> > >> >> /soc/ethernet@1c3/mdio/ethernet-phy@1 > >> >> > >> >> is the same. You can look under > >> >> > >> >> /proc/device-tree/soc/ethernet@1c3/mdio > >> >> > >> >> on the OrangePI Plus 2E or any other H3 board that uses an > >> >> external PHY at address 1. > >> >> > >> >> ChenYu > >> > > >> > Since we get the phy node by phy-handle and not by path, I think > >all should be good. > >> > >> You are not getting me. The fact that the two seemingly separate > >> nodes are merged together means, whatever properties you put in > >> the internal PHY node, also affect the external PHY node. Once > >> compiled, they are the SAME node. > > > >Hello Rob, florian, mark > > > >Adding a delete property on all external ethernet-phy@1 is a bit > >overkill, and I dont like the idea that nodes are merged. > > This is not exactly up to you that's just how DTC works. > > >What do you think about other possible solutions: > >- Using integrated-phy@1 for the integrated PHY node name > > That might be okay although you are using now a seemingly non-standard unit > name. > > >- Using a fake address like 31 (see patch below) > > You could also drop the address part in the unit name although we'd probably > get a DTC warning for that. > > I suspect both of your solutions and what I mentioned above will be producing > DTC warnings to some extent... Rob what do you think? > I think I found an easier solution, putting phy-is-integrated on board DT nodes only. I will send an updated serie. Regards
[PATCH] powerpc: powernv: Fix build error on const discarding
When building a random powerpc kernel I hit this build error:
CC arch/powerpc/platforms/powernv/opal-imc.o
arch/powerpc/platforms/powernv/opal-imc.c: In function «
disable_nest_pmu_counters »:
arch/powerpc/platforms/powernv/opal-imc.c:130:13: error : assignment discards «
const » qualifier from pointer target type [-Werror=discarded-qualifiers]
l_cpumask = cpumask_of_node(nid);
^
This patch simply add const to l_cpumask to fix this issue.
Signed-off-by: Corentin Labbe
---
arch/powerpc/platforms/powernv/opal-imc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/opal-imc.c
b/arch/powerpc/platforms/powernv/opal-imc.c
index b903bf5e6006..21f6531fae20 100644
--- a/arch/powerpc/platforms/powernv/opal-imc.c
+++ b/arch/powerpc/platforms/powernv/opal-imc.c
@@ -123,7 +123,7 @@ static int imc_pmu_create(struct device_node *parent, int
pmu_index, int domain)
static void disable_nest_pmu_counters(void)
{
int nid, cpu;
- struct cpumask *l_cpumask;
+ const struct cpumask *l_cpumask;
get_online_cpus();
for_each_online_node(nid) {
--
2.13.0
[PATCH v2 5/6] ARM: sun8i: orangepi-one: Set phy-is-integrated to the internal phy node
This patch add the new phy-is-integrated property to the internal PHY node.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 6880268e8b87..22c471473909 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -105,6 +105,10 @@
status = "okay";
};
+&int_mii_phy {
+ phy-is-integrated;
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
--
2.13.0
[PATCH v2 1/6] ARM: sun8i: orangepipc: Set phy-is-integrated to the internal phy node
This patch add the new phy-is-integrated property to the internal PHY
node.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index f5f0f15a2088..68a618b5f18c 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -131,6 +131,10 @@
status = "okay";
};
+&int_mii_phy {
+ phy-is-integrated;
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
--
2.13.0
[PATCH v2 0/6] net: stmmac: Detect PHY location with phy-is-integrated
Hello The current way to find if the phy is internal is to compare DT phy-mode and emac_variant/internal_phy. But it will negate a possible future SoC where an external PHY use the same phy mode than the integrated one. This patchs series adds a new way to find if the PHY is integrated, via the phy-is-integrated DT property. Since it exists both integrated and external ethernet-phy@1, they are merged in the final DTB and so share all properties. For avoiding this, the phy-is-integrated is added only to board DT. The first five patchs should go via the sunxi tree. the last one should go via the net tree. Note that this serie will need backporting the patch "Documentation: net: phy: Add phy-is-integrated binding" which is in net-next Thanks Regards Changes since v1: - Dropped phy-is-integrated documentation patch since another same patch was already merged - Moved phy-is-integrated from SoC dtsi to final board DT. Corentin Labbe (6): ARM: sun8i: orangepipc: Set phy-is-integrated to the internal phy node ARM: sun8i: beelink-x2: Set phy-is-integrated to the internal phy node ARM: sun8i: nanopi-neo: Set phy-is-integrated to the internal phy node ARM: sun8i: orangepi-2: Set phy-is-integrated to the internal phy node ARM: sun8i: orangepi-one: Set phy-is-integrated to the internal phy node net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 4 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 4 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 4 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts| 4 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 6 files changed, 28 insertions(+), 8 deletions(-) -- 2.13.0
[PATCH v2 6/6] net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patch adds a new way to find if the PHY is internal, via
the phy-is-integrated property.
Since the internal_phy variable does not need anymore to contain the xMII mode
used by the internal PHY, it is still used for knowing the presence of an
internal PHY, so it is modified to a boolean soc_has_internal_phy.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index fffd6d5fc907..672553b652bd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -41,14 +41,14 @@
* This value is used for disabling properly EMAC
* and used as a good starting value in case of the
* boot process(uboot) leave some stuff.
- * @internal_phy: Does the MAC embed an internal PHY
+ * @soc_has_internal_phy: Does the MAC embed an internal PHY
* @support_mii: Does the MAC handle MII
* @support_rmii: Does the MAC handle RMII
* @support_rgmii: Does the MAC handle RGMII
*/
struct emac_variant {
u32 default_syscon_value;
- int internal_phy;
+ bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -75,7 +75,7 @@ struct sunxi_priv_data {
static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
- .internal_phy = PHY_INTERFACE_MODE_MII,
+ .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +83,20 @@ static const struct emac_variant emac_variant_h3 = {
static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
- .internal_phy = PHY_INTERFACE_MODE_MII,
+ .soc_has_internal_phy = true,
.support_mii = true
};
static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
- .internal_phy = 0,
+ .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
};
static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
- .internal_phy = 0,
+ .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -648,7 +648,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
"Current syscon value is not the default %x (expect
%x)\n",
val, reg);
- if (gmac->variant->internal_phy) {
+ if (gmac->variant->soc_has_internal_phy) {
if (!gmac->use_internal_phy) {
/* switch to external PHY interface */
reg &= ~H3_EPHY_SELECT;
@@ -932,7 +932,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
}
plat_dat->interface = of_get_phy_mode(dev->of_node);
- if (plat_dat->interface == gmac->variant->internal_phy) {
+ if (of_property_read_bool(plat_dat->phy_node, "phy-is-integrated")) {
dev_info(&pdev->dev, "Will use internal PHY\n");
gmac->use_internal_phy = true;
gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
--
2.13.0
[PATCH v2 4/6] ARM: sun8i: orangepi-2: Set phy-is-integrated to the internal phy node
This patch add the new phy-is-integrated property to the internal PHY node.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 17cdeae19c6f..0801c808c5e5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -131,6 +131,10 @@
status = "okay";
};
+&int_mii_phy {
+ phy-is-integrated;
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
--
2.13.0
[PATCH v2 3/6] ARM: sun8i: nanopi-neo: Set phy-is-integrated to the internal phy node
This patch add the new phy-is-integrated property to the internal PHY node.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 78f6c24952dd..e77b51c98374 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -53,3 +53,7 @@
allwinner,leds-active-low;
status = "okay";
};
+
+&int_mii_phy {
+ phy-is-integrated;
+};
--
2.13.0
[PATCH v2 2/6] ARM: sun8i: beelink-x2: Set phy-is-integrated to the internal phy node
This patch add the new phy-is-integrated property to the internal PHY node.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 546837ccd8af..d0517240d5e3 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -121,6 +121,10 @@
status = "okay";
};
+&int_mii_phy {
+ phy-is-integrated;
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
--
2.13.0
Re: [PATCH v2 0/6] net: stmmac: Detect PHY location with phy-is-integrated
On Thu, Aug 17, 2017 at 09:51:43AM +0200, Corentin Labbe wrote: > Hello > > The current way to find if the phy is internal is to compare DT phy-mode > and emac_variant/internal_phy. > But it will negate a possible future SoC where an external PHY use the > same phy mode than the integrated one. > > This patchs series adds a new way to find if the PHY is integrated, via > the phy-is-integrated DT property. > > Since it exists both integrated and external ethernet-phy@1, they are merged > in > the final DTB and so share all properties. > For avoiding this, the phy-is-integrated is added only to board DT. > > The first five patchs should go via the sunxi tree. > the last one should go via the net tree. > Note that this serie will need backporting the patch > "Documentation: net: phy: Add phy-is-integrated binding" which is in net-next > > Thanks > Regards > > Changes since v1: > - Dropped phy-is-integrated documentation patch since another same patch was > already merged > - Moved phy-is-integrated from SoC dtsi to final board DT. > > Corentin Labbe (6): > ARM: sun8i: orangepipc: Set phy-is-integrated to the internal phy node > ARM: sun8i: beelink-x2: Set phy-is-integrated to the internal phy node > ARM: sun8i: nanopi-neo: Set phy-is-integrated to the internal phy node > ARM: sun8i: orangepi-2: Set phy-is-integrated to the internal phy node > ARM: sun8i: orangepi-one: Set phy-is-integrated to the internal phy > node > net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated > > arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 4 > arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 4 > arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4 > arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 4 > arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts| 4 > drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 > 6 files changed, 28 insertions(+), 8 deletions(-) > > -- > 2.13.0 > Hello Self NACK, the comment from Rob on previous series is pertinent. I will send a v3 which use a mdio-mux for solving all problems. Regards
Re: [PATCH v2 1/2] kernel/module.c: Invert add_usage_link and del_usage_link functions
On Mon, Jun 19, 2017 at 06:26:23PM +0200, Jessica Yu wrote: > +++ Corentin Labbe [06/06/17 14:17 +0200]: > >This patch just swap del_usage_link() before add_usage_link(). > > > >Signed-off-by: Corentin Labbe > > Could you combine this with the 2nd patch? By itself this patch > doesn't tell us much. Additionally, could you explain in the changelog > (of the 2nd patch) why they needed to be swapped (i.e., so > del_usage_links() can be called from add_usage_links()). > > Thanks! > > Jessica > I think that its against the rule of atomic/simple patch. Perhaps, the first patch miss some "why I do it" Anyway I will send a new version as you requested Regards
[PATCH] crypto: sun4i-ss: support the Security System PRNG
The Security System have a PRNG, this patch add support for it via
crypto_rng.
Signed-off-by: Corentin Labbe
---
drivers/crypto/Kconfig | 8 +
drivers/crypto/sunxi-ss/Makefile| 1 +
drivers/crypto/sunxi-ss/sun4i-ss-core.c | 30 ++
drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 56 +
drivers/crypto/sunxi-ss/sun4i-ss.h | 9 ++
5 files changed, 104 insertions(+)
create mode 100644 drivers/crypto/sunxi-ss/sun4i-ss-prng.c
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index ab82536d64e2..bde0b102eb70 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -618,6 +618,14 @@ config CRYPTO_DEV_SUN4I_SS
To compile this driver as a module, choose M here: the module
will be called sun4i-ss.
+config CRYPTO_DEV_SUN4I_SS_PRNG
+ bool "Support for Allwinner Security System PRNG"
+ depends on CRYPTO_DEV_SUN4I_SS
+ select CRYPTO_RNG
+ help
+ Select this option if you to provides kernel-side support for
+ the Pseudo-Random Number Generator found in the Security System.
+
config CRYPTO_DEV_ROCKCHIP
tristate "Rockchip's Cryptographic Engine driver"
depends on OF && ARCH_ROCKCHIP
diff --git a/drivers/crypto/sunxi-ss/Makefile b/drivers/crypto/sunxi-ss/Makefile
index 8f4c7a273141..ccb893219079 100644
--- a/drivers/crypto/sunxi-ss/Makefile
+++ b/drivers/crypto/sunxi-ss/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sun4i-ss.o
sun4i-ss-y += sun4i-ss-core.o sun4i-ss-hash.o sun4i-ss-cipher.o
+sun4i-ss-$(CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG) += sun4i-ss-prng.o
diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c
b/drivers/crypto/sunxi-ss/sun4i-ss-core.c
index 02ad8256e900..d6bb2991c000 100644
--- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c
+++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c
@@ -213,6 +213,23 @@ static struct sun4i_ss_alg_template ss_algs[] = {
}
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun4i_ss_rng",
+ .cra_priority = 300,
+ .cra_ctxsize= 0,
+ .cra_module = THIS_MODULE,
+ },
+ .generate = sun4i_ss_prng_generate,
+ .seed = sun4i_ss_prng_seed,
+ .seedsize = SS_SEED_LEN,
+ }
+},
+#endif
};
static int sun4i_ss_probe(struct platform_device *pdev)
@@ -355,6 +372,13 @@ static int sun4i_ss_probe(struct platform_device *pdev)
goto error_alg;
}
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ err = crypto_register_rng(&ss_algs[i].alg.rng);
+ if (err) {
+ dev_err(ss->dev, "Fail to register %s\n",
+ ss_algs[i].alg.rng.base.cra_name);
+ }
+ break;
}
}
platform_set_drvdata(pdev, ss);
@@ -369,6 +393,9 @@ static int sun4i_ss_probe(struct platform_device *pdev)
case CRYPTO_ALG_TYPE_AHASH:
crypto_unregister_ahash(&ss_algs[i].alg.hash);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ crypto_unregister_rng(&ss_algs[i].alg.rng);
+ break;
}
}
if (ss->reset)
@@ -393,6 +420,9 @@ static int sun4i_ss_remove(struct platform_device *pdev)
case CRYPTO_ALG_TYPE_AHASH:
crypto_unregister_ahash(&ss_algs[i].alg.hash);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ crypto_unregister_rng(&ss_algs[i].alg.rng);
+ break;
}
}
diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c
b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c
new file mode 100644
index ..3941587def6b
--- /dev/null
+++ b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c
@@ -0,0 +1,56 @@
+#include "sun4i-ss.h"
+
+int sun4i_ss_prng_seed(struct crypto_rng *tfm, const u8 *seed,
+ unsigned int slen)
+{
+ struct sun4i_ss_alg_template *algt;
+ struct rng_alg *alg = crypto_rng_alg(tfm);
+
+ algt = container_of(alg, struct sun4i_ss_alg_template, alg.rng);
+ memcpy(algt->ss->seed, seed, slen);
+
+ return 0;
+}
+
+int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src,
+ unsigned int slen, u8 *dst, unsigned int dlen)
+{
+ struct sun4i_ss_alg_tem
Re: [PATCH] crypto: sun4i-ss: support the Security System PRNG
On Tue, Jun 20, 2017 at 11:59:47AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Tue, Jun 20, 2017 at 10:58:19AM +0200, Corentin Labbe wrote:
> > The Security System have a PRNG, this patch add support for it via
> > crypto_rng.
>
> This might be a dumb question, but is the CRYPTO_RNG code really
> supposed to be used with PRNG?
>
Yes, see recently added drivers/crypto/exynos-rng.c
[...]
> > --- a/drivers/crypto/sunxi-ss/sun4i-ss.h
> > +++ b/drivers/crypto/sunxi-ss/sun4i-ss.h
> > @@ -32,6 +32,7 @@
> > #include
> > #include
> > #include
> > +#include
> >
> > #define SS_CTL0x00
> > #define SS_KEY0 0x04
> > @@ -127,6 +128,9 @@
> > #define SS_RXFIFO_EMP_INT_ENABLE (1 << 2)
> > #define SS_TXFIFO_AVA_INT_ENABLE (1 << 0)
> >
> > +#define SS_SEED_LEN (192 / 8)
> > +#define SS_DATA_LEN (160 / 8)
> > +
> > struct sun4i_ss_ctx {
> > void __iomem *base;
> > int irq;
> > @@ -136,6 +140,7 @@ struct sun4i_ss_ctx {
> > struct device *dev;
> > struct resource *res;
> > spinlock_t slock; /* control the use of the device */
> > + u32 seed[SS_SEED_LEN / 4];
>
> Shouldn't you define SS_SEED_LEN in bits, and then use either
> BITS_PER_BYTE and BITS_PER_LONG so that it's obvious what you're doing
> ?
>
> And you could also make that variable defined based on the option,
> otherwise you'll always allocate that array, even if you're not using
> it.
I will do that
Thanks
[PATCH] usb: xhci: ASMedia ASM1042A chipset need shorts TX quirk
When plugging an USB webcam I see the following message: [106385.615559] xhci_hcd :04:00.0: WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk? [106390.583860] handle_tx_event: 913 callbacks suppressed With this patch applied, I get no more printing of this message. Signed-off-by: Corentin Labbe --- drivers/usb/host/xhci-pci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index fcf1f3f63e7a..1bcf971141c0 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -201,6 +201,9 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && pdev->device == 0x1042) xhci->quirks |= XHCI_BROKEN_STREAMS; + if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && + pdev->device == 0x1142) + xhci->quirks |= XHCI_TRUST_TX_LENGTH; if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241) xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7; -- 2.13.0
Re: linux-next: build failure after merge of the sunxi tree
On Wed, Nov 01, 2017 at 07:43:45AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> After merging the sunxi tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dtb: ERROR (phandle_references):
> Reference to non-existent node or label "reg_gmac_3v3"
>
> ERROR: Input tree has errors, aborting (use -f to force output)
>
> Caused by commit
>
> 547a66779cbd ("ARM: dts: sunxi: Restore EMAC changes (boards)")
>
> I have used the sunxi tree from next-20171018 for today.
>
Sorry that's my fault.
I will send the fix soon.
Regards
[PATCH 0/1] ARM: dts: sunxi: sun8i-h3-nanopi-m1-plus: fix build failure
Hello The following patch fix the build failure due to "ARM: dts: sunxi: Restore EMAC changes (boards)". A made a mistake when rebasing and a part of sun8i-h3-nanopi-m1-plus emac was added without the needed regulator. Regards Corentin Labbe (1): ARM: dts: sunxi: sun8i-h3-nanopi-m1-plus: Add missing regulator arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 11 +++ 1 file changed, 11 insertions(+) -- 2.13.6
[PATCH 1/1] ARM: dts: sunxi: sun8i-h3-nanopi-m1-plus: Add missing regulator
This patch add the missing regulator for sun8i-h3-nanopi-m1-plus.
Fixes: ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index cfb96da3cfef..0a8b79cf5954 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -51,6 +51,16 @@
ethernet1 = &sdio_wifi;
};
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ startup-delay-us = <10>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
--
2.13.6
Re: [PATCH] clk: sunxi: fix build warning
On Tue, Oct 24, 2017 at 01:36:28AM -0700, Stephen Boyd wrote: > On 10/20, Maxime Ripard wrote: > > Hi Stephen, Mike, > > > > On Thu, Oct 19, 2017 at 09:09:48PM +0200, Corentin Labbe wrote: > > > This patch fix the following build warning: > > > drivers/clk/sunxi/clk-factors.c:279:14: warning: variable 'name' set but > > > not used [-Wunused-but-set-variable] > > > > > > Signed-off-by: Corentin Labbe > > > > Acked-by: Maxime Ripard > > > > Can you apply that patch directly? This is the only fix that we're > > supposed to have for 4.14. > > > > Fixes tag? And this is a new warning from the v4.14 merge window? > I suppose it only removes code so that's a plus side for merging > into fixes. > Will do it. Thanks Regards Corentin Labbe
[PATCH v2] clk: sunxi: fix build warning
This patch fix the following build warning:
drivers/clk/sunxi/clk-factors.c:279:14: warning: variable 'name' set but not
used [-Wunused-but-set-variable]
Fixes: 4cbeaebb8af1 ("clk: sunxi: factors: Add unregister function")
Acked-by: Maxime Ripard
Signed-off-by: Corentin Labbe
---
Changes since v1:
- added Ack and fixes tags
drivers/clk/sunxi/clk-factors.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index dfe5e3e32d28..856fef65433b 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -276,13 +276,11 @@ void sunxi_factors_unregister(struct device_node *node,
struct clk *clk)
{
struct clk_hw *hw = __clk_get_hw(clk);
struct clk_factors *factors;
- const char *name;
if (!hw)
return;
factors = to_clk_factors(hw);
- name = clk_hw_get_name(hw);
of_clk_del_provider(node);
/* TODO: The composite clock stuff will leak a bit here. */
--
2.13.6
[PATCH v9 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY
Hello The current way to find if the PHY is internal is to compare DT phy-mode and emac_variant/internal_phy. But it will negate a possible future SoC where an external PHY use the same phy mode than the integrated one. This patchs series adds a new way to handle this problem via a mdio-mux. The first try was to create a new MDIO mux "mdio-mux-syscon". mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception that the register is used via syscon/regmap. But this solution does not work for two reason: - changing the MDIO selection need the reset of MAC which cannot be done by the mdio-mux-syscon driver - There were driver loading order problem: - mdio-mux-syscon needing that stmmac register the parent MDIO - stmmac needing that child MDIO was registered just after registering parent MDIO So we cannot use any external MDIO-mux. The final solution was to represent the mdio-mux in MAC node and let the MAC handle all things. Since DT bits was reverted in 4.13, this patch series include the revert of the revert. I have let patch splited for easy review. (for seeing what's new) But the final serie could have some patch squashed if someone want. Like squashing patch and 1 and 2 (documentation) The first 7 patch should go via the sunxi tree, the last three via the net tree. Regards Changes since v8: - added reference to mdio-mux.txt in documentation - removed compatible mdio-mux - added mdio-parent-bus Changes since v7: - moved mdio-mux ouf of mdio as asked by Andrew Lunn - reordered patchs order Changes since v6: - renamed external mdio to "external_mdio" - added compatible to mdio-mux and internal-mdio - removed usage of phy-is-integrated - renamed do_not_scan to compatible_muxes (patch 10) - patch 8 9 of v6 are squashed Changes since v5: - reordered patch 1 and 2 - mdio-mux node is now a mdio's child - added patch 11 for removing unnecessary scan of mdio-mux Changes since v4: - Update documentation for new bindings - Added 4 patchs for bring back reverted stuff of 4.13 - dwmac-sun8i now handle mdio-mux - MDIO use now compatible = "snps,dwmac-mdio"; Changes since v3: - Added a patch for handling fixed-link - Updated documentation Changes since v2: - Add a MDIO mux for creating distinction between integrated and external MDIO. - phy-is-integrated is not set in dtsi. Changes since v1: - Dropped phy-is-integrated documentation patch since another same patch was already merged - Moved phy-is-integrated from SoC dtsi to final board DT. Acked-by: Florian Fainelli Corentin Labbe (10): dt-bindings: net: Restore sun8i dwmac binding dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY arm: dts: sunxi: h3/h5: Restore EMAC changes arm: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac arm: dts: sunxi: Restore EMAC changes (boards) arm64: dts: allwinner: Restore EMAC changes arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio net: stmmac: snps,dwmac-mdio MDIOs are automatically registered net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs net: stmmac: sun8i: Restore the compatibles .../devicetree/bindings/net/dwmac-sun8i.txt| 205 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts| 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts| 8 + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts| 5 + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 ++ arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 48 +++ .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 + .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 + .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 ++ .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 + .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 + drivers/net/ethernet/stmicro/stmmac/Kconfig| 1 + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 361 + .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 - 23 files changed, 742 insertions(+), 134 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt -- 2.13.6
[PATCH v9 03/10] arm: dts: sunxi: h3/h5: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC
changes")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c1bd09dab3da..d762098fc589 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -408,6 +408,32 @@
clocks = <&osc24M>;
};
+ emac: ethernet@1c3 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c3 0x1>;
+ interrupts = ;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ compatible =
"ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+ };
+
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
--
2.13.6
[PATCH v9 04/10] arm: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 32 +++-
1 file changed, 27 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..0e97df490aba 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,36 @@
#size-cells = <0>;
status = "disabled";
- mdio: mdio {
+ mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
- int_mii_phy: ethernet-phy@1 {
- compatible =
"ethernet-phy-ieee802.3-c22";
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&mdio0>;
+ /* Only one MDIO is usable at the time */
+ internal_mdio: mdio@1 {
+ compatible =
"allwinner,sun8i-h3-mdio-internal";
reg = <1>;
- clocks = <&ccu CLK_BUS_EPHY>;
- resets = <&ccu RST_BUS_EPHY>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ int_mii_phy: ethernet-phy@1 {
+ compatible =
"ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+
+ external_mdio: mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
};
--
2.13.6
[PATCH v9 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY
This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.
Signed-off-by: Corentin Labbe
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 145 +++--
1 file changed, 133 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..2600ce9ad3cc 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
Please see stmmac.txt for the other unchanged properties.
Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
- reg: address and length of the register for the device.
- interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
- clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
- resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
- phy-mode: See ethernet.txt
- phy-handle: See ethernet.txt
- #address-cells: shall be 1
@@ -39,23 +39,42 @@ Optional properties for the following compatibles:
- allwinner,leds-active-low: EPHY LEDs are active low
Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: with compatible "snps,dwmac-mdio"
Required properties of the mdio node:
- #address-cells: shall be 1
- #size-cells: shall be 0
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
of the mdio node. See phy.txt for the generic PHY bindings.
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the emac node have a mdio-mux child
+node called "mdio-mux":
+ - "allwinner,sun8i-h3-emac"
+ - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+ - compatible = "allwinner,sun8i-h3-mdio-mux"
+ - mdio-parent-bus: a phandle to EMAC mdio
+ - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+ - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+ - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
- "allwinner,sun8i-h3-emac",
- "allwinner,sun8i-v3s-emac":
+
+Additional information regarding generic multiplexer properties can be found
+at Documentation/devicetree/bindings/net/mdio-mux.txt
+
+Required properties of the integrated phy node:
- clocks: a phandle to the reference clock for the EPHY
- resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
-Example:
-
+Example with integrated PHY:
emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <&syscon>;
@@ -72,13 +91,115 @@ emac: ethernet@1c0b000 {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+ mdio0: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&mdio0>;
+
+ int_mdio: mdio@1 {
+ compatible = "allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ phy-is-integrated;
+ };
+ };
+ ext_mdio: mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+
[PATCH v9 10/10] net: stmmac: sun8i: Restore the compatibles
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index b3eb344bb158..e5ff734d4f9b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -1072,6 +1072,14 @@ return ret;
}
static const struct of_device_id sun8i_dwmac_match[] = {
+ { .compatible = "allwinner,sun8i-h3-emac",
+ .data = &emac_variant_h3 },
+ { .compatible = "allwinner,sun8i-v3s-emac",
+ .data = &emac_variant_v3s },
+ { .compatible = "allwinner,sun8i-a83t-emac",
+ .data = &emac_variant_a83t },
+ { .compatible = "allwinner,sun50i-a64-emac",
+ .data = &emac_variant_a64 },
{ }
};
MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
--
2.13.6
[PATCH v9 09/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.
This patch implement this MDIO switch via a custom MDIO-mux.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++
2 files changed, 224 insertions(+), 130 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+ select MDIO_BUS_MUX
---help---
Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..b3eb344bb158 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -41,14 +42,14 @@
* This value is used for disabling properly EMAC
* and used as a good starting value in case of the
* boot process(uboot) leave some stuff.
- * @internal_phy: Does the MAC embed an internal PHY
+ * @soc_has_internal_phy: Does the MAC embed an internal PHY
* @support_mii: Does the MAC handle MII
* @support_rmii: Does the MAC handle RMII
* @support_rgmii: Does the MAC handle RGMII
*/
struct emac_variant {
u32 default_syscon_value;
- int internal_phy;
+ bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -61,7 +62,8 @@ struct emac_variant {
* @rst_ephy: reference to the optional EPHY reset for the internal PHY
* @variant: reference to the current board variant
* @regmap:regmap for using the syscon
- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
+ * @internal_phy_powered: Does the internal PHY is enabled
+ * @mux_handle:Internal pointer used by mdio-mux lib
*/
struct sunxi_priv_data {
struct clk *tx_clk;
@@ -70,12 +72,13 @@ struct sunxi_priv_data {
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap *regmap;
- bool use_internal_phy;
+ bool internal_phy_powered;
+ void *mux_handle;
};
static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
- .internal_phy = PHY_INTERFACE_MODE_MII,
+ .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = {
static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
- .internal_phy = PHY_INTERFACE_MODE_MII,
+ .soc_has_internal_phy = true,
.support_mii = true
};
static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
- .internal_phy = 0,
+ .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
};
static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
- .internal_phy = 0,
+ .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = {
#define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active
high */
#define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */
#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1
+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2
/* H3/A64 specific bits */
#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
}
+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
+static int get_ephy_nodes(struct stmmac_priv *priv)
+{
+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+ struct device_node *mdio_mux, *iphynode;
+ struct device_node *mdio_internal;
+ int ret;
+
+ mdio_mux = of_get_child_by_name(priv->device->of_node, &quo
[PATCH v9 08/10] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 8a280b48e3a9..9e616da0745d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
- { .compatible = "allwinner,sun8i-a83t-emac" },
- { .compatible = "allwinner,sun8i-h3-emac" },
- { .compatible = "allwinner,sun8i-v3s-emac" },
- { .compatible = "allwinner,sun50i-a64-emac" },
{},
};
--
2.13.6
[PATCH v9 06/10] arm64: dts: allwinner: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
Signed-off-by: Corentin Labbe
---
.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16
.../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20
.../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
.../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
.../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +
8 files changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -69,6 +70,14 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
/* TODO: Camera, touchscreen, etc. */
};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -71,6 +72,15 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ext_rmii_phy1>;
+ status = "okay";
+
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
"allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -76,6 +77,21 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode =
[PATCH v9 07/10] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
mdio: mdio {
+ compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
--
2.13.6
[PATCH v9 05/10] arm: dts: sunxi: Restore EMAC changes (boards)
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC
changes")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts| 8
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 ++
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16
10 files changed, 121 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
aliases {
serial0 = &uart0;
+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet0 = &emac;
ethernet1 = &xr819;
};
@@ -102,6 +104,13 @@
status = "okay";
};
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -111,6 +112,24 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = &uart0;
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+
[PATCH v9 01/10] dt-bindings: net: Restore sun8i dwmac binding
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac
binding")
Signed-off-by: Corentin Labbe
Acked-by: Rob Herring
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+ "allwinner,sun8i-a83t-emac"
+ "allwinner,sun8i-h3-emac"
+ "allwinner,sun8i-v3s-emac"
+ "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+ - allwinner,sun8i-h3-system-controller
+ - allwinner,sun8i-v3s-system-controller
+ - allwinner,sun50i-a64-system-controller
+ - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+ - "allwinner,sun8i-h3-emac",
+ - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+ - "allwinner,sun8i-h3-emac",
+ - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c0b000 0x104>;
+ interrupts = ;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+};
--
2.13.6
Re: [PATCH v7 10/10] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes
On Tue, Oct 24, 2017 at 01:46:54PM -0500, Rob Herring wrote: > On Wed, Oct 18, 2017 at 01:44:58PM +0200, Corentin Labbe wrote: > > Each child node of an MDIO node is scanned as a PHY when calling > > of_mdiobus_register() givint the following result: > > [ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has > > invalid PHY address > > [ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0 > > [ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1 > > [...] > > [ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30 > > [ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31 > > > > Since mdio-mux nodes are not PHY, this patch a way to to not scan > > them. > > This can be dropped now, right? Yes and it is dropped in my two last serie. Forgot to said it in changelog
[PATCH 3/4] usb: xhci: Fix build warning
This patch fix the following build warning:
drivers/usb/host/xhci-ring.c:1895:19: warning: variable 'urb_priv' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci-ring.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 521d19e82494..942eeb351a3a 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1890,12 +1890,10 @@ int xhci_is_vendor_info_code(struct xhci_hcd *xhci,
unsigned int trb_comp_code)
static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
struct xhci_ring *ep_ring, int *status)
{
- struct urb_priv *urb_priv;
struct urb *urb = NULL;
/* Clean up the endpoint's TD list */
urb = td->urb;
- urb_priv = urb->hcpriv;
/* if a bounce buffer was used to align this td then unmap it */
xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
--
2.13.6
[PATCH 4/4] usb: xhci: Fix build warning
This patch fix the following build warnings:
drivers/usb/host/xhci-ring.c:2011:20: warning: variable 'ep_ring' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci-ring.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 942eeb351a3a..27d657ec5ed5 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -2004,7 +2004,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct
xhci_td *td,
struct xhci_virt_ep *ep, int *status)
{
struct xhci_virt_device *xdev;
- struct xhci_ring *ep_ring;
unsigned int slot_id;
int ep_index;
struct xhci_ep_ctx *ep_ctx;
@@ -2016,7 +2015,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct
xhci_td *td,
slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
xdev = xhci->devs[slot_id];
ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
- ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
requested = td->urb->transfer_buffer_length;
--
2.13.6
[PATCH 1/4] usb: xhci: Fix build warning
This patch fix the following build warnings:
drivers/usb/host/xhci.c:3378:6: warning: variable 'last_freed_endpoint' set but
not used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ee077a21dfda..b12b2bdd7b47 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -3375,7 +3375,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
unsigned int slot_id;
struct xhci_virt_device *virt_dev;
struct xhci_command *reset_device_cmd;
- int last_freed_endpoint;
struct xhci_slot_ctx *slot_ctx;
int old_active_eps = 0;
@@ -3490,7 +3489,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
}
/* Everything but endpoint 0 is disabled, so free the rings. */
- last_freed_endpoint = 1;
for (i = 1; i < 31; i++) {
struct xhci_virt_ep *ep = &virt_dev->eps[i];
@@ -3505,7 +3503,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
if (ep->ring) {
xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
xhci_free_endpoint_ring(xhci, virt_dev, i);
- last_freed_endpoint = i;
}
if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
xhci_drop_ep_from_interval_table(xhci,
--
2.13.6
[PATCH 2/4] usb: xhci: Fix build warning
This patch fix the following build warning:
drivers/usb/host/xhci.c:2853:23: warning: variable 'ep' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index b12b2bdd7b47..eae86bd7eac8 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -2850,12 +2850,10 @@ void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
unsigned int ep_index,
unsigned int stream_id, struct xhci_td *td)
{
struct xhci_dequeue_state deq_state;
- struct xhci_virt_ep *ep;
struct usb_device *udev = td->urb->dev;
xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
"Cleaning up stalled endpoint ring");
- ep = &xhci->devs[udev->slot_id]->eps[ep_index];
/* We need to move the HW's dequeue pointer past this TD,
* or it will attempt to resend it on the next doorbell ring.
*/
--
2.13.6
[PATCH v2 3/4] usb: xhci: remove unused variable urb_priv
From: Corentin Labbe
This patch fix the following build warning:
drivers/usb/host/xhci-ring.c:1895:19: warning: variable 'urb_priv' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci-ring.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 521d19e..942eeb3 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1890,12 +1890,10 @@ int xhci_is_vendor_info_code(struct xhci_hcd *xhci,
unsigned int trb_comp_code)
static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
struct xhci_ring *ep_ring, int *status)
{
- struct urb_priv *urb_priv;
struct urb *urb = NULL;
/* Clean up the endpoint's TD list */
urb = td->urb;
- urb_priv = urb->hcpriv;
/* if a bounce buffer was used to align this td then unmap it */
xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
--
2.7.4
[PATCH v2 2/4] usb: xhci: remove unused variable ep
From: Corentin Labbe
This patch fix the following build warning:
drivers/usb/host/xhci.c:2853:23: warning: variable 'ep' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index b12b2bd..eae86bd 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -2850,12 +2850,10 @@ void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
unsigned int ep_index,
unsigned int stream_id, struct xhci_td *td)
{
struct xhci_dequeue_state deq_state;
- struct xhci_virt_ep *ep;
struct usb_device *udev = td->urb->dev;
xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
"Cleaning up stalled endpoint ring");
- ep = &xhci->devs[udev->slot_id]->eps[ep_index];
/* We need to move the HW's dequeue pointer past this TD,
* or it will attempt to resend it on the next doorbell ring.
*/
--
2.7.4
[PATCH v2 0/4] usb: xhci: fix build warnings
Hello This patchset fix some build warnings on usb/xhci. Regards Changes since v1: - Changed subject of patch Corentin Labbe (4): usb: xhci: remove unused variable last_freed_endpoint usb: xhci: remove unused variable ep usb: xhci: remove unused variable urb_priv usb: xhci: remove unused variable ep_ring drivers/usb/host/xhci-ring.c | 4 drivers/usb/host/xhci.c | 5 - 2 files changed, 9 deletions(-) -- 2.7.4
[PATCH v2 4/4] usb: xhci: remove unused variable ep_ring
From: Corentin Labbe
This patch fix the following build warnings:
drivers/usb/host/xhci-ring.c:2011:20: warning: variable 'ep_ring' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci-ring.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 942eeb3..27d657e 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -2004,7 +2004,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct
xhci_td *td,
struct xhci_virt_ep *ep, int *status)
{
struct xhci_virt_device *xdev;
- struct xhci_ring *ep_ring;
unsigned int slot_id;
int ep_index;
struct xhci_ep_ctx *ep_ctx;
@@ -2016,7 +2015,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct
xhci_td *td,
slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
xdev = xhci->devs[slot_id];
ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
- ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
requested = td->urb->transfer_buffer_length;
--
2.7.4
[PATCH v2 1/4] usb: xhci: remove unused variable last_freed_endpoint
From: Corentin Labbe
This patch fix the following build warnings:
drivers/usb/host/xhci.c:3378:6: warning: variable 'last_freed_endpoint' set but
not used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ee077a2..b12b2bd 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -3375,7 +3375,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
unsigned int slot_id;
struct xhci_virt_device *virt_dev;
struct xhci_command *reset_device_cmd;
- int last_freed_endpoint;
struct xhci_slot_ctx *slot_ctx;
int old_active_eps = 0;
@@ -3490,7 +3489,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
}
/* Everything but endpoint 0 is disabled, so free the rings. */
- last_freed_endpoint = 1;
for (i = 1; i < 31; i++) {
struct xhci_virt_ep *ep = &virt_dev->eps[i];
@@ -3505,7 +3503,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
if (ep->ring) {
xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
xhci_free_endpoint_ring(xhci, virt_dev, i);
- last_freed_endpoint = i;
}
if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
xhci_drop_ep_from_interval_table(xhci,
--
2.7.4
[PATCH 2/4] usb: xhci: remove unused variable ep
This patch fix the following build warning:
drivers/usb/host/xhci.c:2853:23: warning: variable 'ep' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index b12b2bd..eae86bd 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -2850,12 +2850,10 @@ void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
unsigned int ep_index,
unsigned int stream_id, struct xhci_td *td)
{
struct xhci_dequeue_state deq_state;
- struct xhci_virt_ep *ep;
struct usb_device *udev = td->urb->dev;
xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
"Cleaning up stalled endpoint ring");
- ep = &xhci->devs[udev->slot_id]->eps[ep_index];
/* We need to move the HW's dequeue pointer past this TD,
* or it will attempt to resend it on the next doorbell ring.
*/
--
2.7.4
[PATCH 4/4] usb: xhci: remove unused variable ep_ring
This patch fix the following build warnings:
drivers/usb/host/xhci-ring.c:2011:20: warning: variable 'ep_ring' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci-ring.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 942eeb3..27d657e 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -2004,7 +2004,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct
xhci_td *td,
struct xhci_virt_ep *ep, int *status)
{
struct xhci_virt_device *xdev;
- struct xhci_ring *ep_ring;
unsigned int slot_id;
int ep_index;
struct xhci_ep_ctx *ep_ctx;
@@ -2016,7 +2015,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct
xhci_td *td,
slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
xdev = xhci->devs[slot_id];
ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
- ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
requested = td->urb->transfer_buffer_length;
--
2.7.4
[PATCH 3/4] usb: xhci: remove unused variable urb_priv
This patch fix the following build warning:
drivers/usb/host/xhci-ring.c:1895:19: warning: variable 'urb_priv' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci-ring.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 521d19e..942eeb3 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1890,12 +1890,10 @@ int xhci_is_vendor_info_code(struct xhci_hcd *xhci,
unsigned int trb_comp_code)
static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
struct xhci_ring *ep_ring, int *status)
{
- struct urb_priv *urb_priv;
struct urb *urb = NULL;
/* Clean up the endpoint's TD list */
urb = td->urb;
- urb_priv = urb->hcpriv;
/* if a bounce buffer was used to align this td then unmap it */
xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
--
2.7.4
[PATCH 1/4] usb: xhci: remove unused variable last_freed_endpoint
This patch fix the following build warnings:
drivers/usb/host/xhci.c:3378:6: warning: variable 'last_freed_endpoint' set but
not used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/usb/host/xhci.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ee077a2..b12b2bd 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -3375,7 +3375,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
unsigned int slot_id;
struct xhci_virt_device *virt_dev;
struct xhci_command *reset_device_cmd;
- int last_freed_endpoint;
struct xhci_slot_ctx *slot_ctx;
int old_active_eps = 0;
@@ -3490,7 +3489,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
}
/* Everything but endpoint 0 is disabled, so free the rings. */
- last_freed_endpoint = 1;
for (i = 1; i < 31; i++) {
struct xhci_virt_ep *ep = &virt_dev->eps[i];
@@ -3505,7 +3503,6 @@ static int xhci_discover_or_reset_device(struct usb_hcd
*hcd,
if (ep->ring) {
xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
xhci_free_endpoint_ring(xhci, virt_dev, i);
- last_freed_endpoint = i;
}
if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
xhci_drop_ep_from_interval_table(xhci,
--
2.7.4
Re: [linux-sunxi] [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several boards
On Fri, Nov 10, 2017 at 05:26:54PM +0800, Icenowy Zheng wrote: > On several A64 boards the Ethernet PHY is powered by the DC1SW regulator > on the AXP803 PMIC. > > Add phy-handle property to these boards' emac node. > > Signed-off-by: Icenowy Zheng Acked-by: Corentin LABBE Tested-by: Corentin LABBE Tested-on: sun50i-a64-pine64 Tested-on: sun50i-a64-bananapi-m64 Thanks Regards > --- > arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + > arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 + > arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 + > 3 files changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > index 45bdbfb96126..4a8d3f83a36e 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > @@ -75,6 +75,7 @@ > pinctrl-0 = <&rgmii_pins>; > phy-mode = "rgmii"; > phy-handle = <&ext_rgmii_phy>; > + phy-supply = <®_dc1sw>; > status = "okay"; > }; > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts > b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts > index 806442d3e846..604cdaedac38 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts > @@ -77,6 +77,7 @@ > pinctrl-0 = <&rmii_pins>; > phy-mode = "rmii"; > phy-handle = <&ext_rmii_phy1>; > + phy-supply = <®_dc1sw>; > status = "okay"; > > }; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts > b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts > index 0eb2acedf8c3..a053a6ac5267 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts > @@ -82,6 +82,7 @@ > pinctrl-0 = <&rgmii_pins>; > phy-mode = "rgmii"; > phy-handle = <&ext_rgmii_phy>; > + phy-supply = <®_dc1sw>; > status = "okay"; > }; > > -- > 2.14.2
UBSAN: Undefined behaviour in mm/sparse.c:81:17
Hello At least since next-20171102 I hit the following boot crash: [0.00] Booting Linux on physical CPU 0x00 [0x410fd034] [0.00] Linux version 4.14.0-rc7-next-20171103+ (compile@Red) (gcc version 6.4.0 (Gentoo 6.4.0 p1.0)) #227 SMP PREEMPT Sun Nov 5 10:12:13 CET 2017 [0.00] Machine model: BananaPi-M64 [0.00] earlycon: uart0 at MMIO32 0x01c28000 (options '') [0.00] bootconsole [uart0] enabled [0.00] [0.00] UBSAN: Undefined behaviour in /linux-next/mm/sparse.c:81:17 [0.00] load of null pointer of type 'struct mem_section *' [0.00] CPU: 0 PID: 0 Comm: swapper Not tainted 4.14.0-rc7-next-20171103+ #227 [0.00] Hardware name: BananaPi-M64 (DT) [0.00] Call trace: [0.00] dump_backtrace+0x0/0x1c0 [0.00] show_stack+0x14/0x20 [0.00] dump_stack+0xb0/0xdc [0.00] ubsan_epilogue+0x14/0x50 [0.00] __ubsan_handle_type_mismatch+0xa0/0x178 [0.00] memory_present+0x84/0x154 [0.00] bootmem_init+0xa4/0x1e8 [0.00] setup_arch+0x200/0x65c [0.00] start_kernel+0x60/0x488 [0.00] [0.00] Unable to handle kernel NULL pointer dereference at virtual address [0.00] Mem abort info: [0.00] ESR = 0x9605 [0.00] Exception class = DABT (current EL), IL = 32 bits [0.00] SET = 0, FnV = 0 [0.00] EA = 0, S1PTW = 0 [0.00] Data abort info: [0.00] ISV = 0, ISS = 0x0005 [0.00] CM = 0, WnR = 0 [0.00] [] user address but active_mm is swapper [0.00] Internal error: Oops: 9605 [#1] PREEMPT SMP [0.00] Modules linked in: [0.00] CPU: 0 PID: 0 Comm: swapper Not tainted 4.14.0-rc7-next-20171103+ #227 [0.00] Hardware name: BananaPi-M64 (DT) [0.00] task: ff8009211d80 task.stack: ff800920 [0.00] pstate: 8085 (Nzcv daIf -PAN -UAO) [0.00] pc : memory_present+0x84/0x154 [0.00] lr : memory_present+0x84/0x154 [0.00] sp : ff8009203e10 [0.00] x29: ff8009203e10 x28: 4118 [0.00] x27: x26: ff800932bcc8 [0.00] x25: 0004 x24: [0.00] x23: ff8009885000 x22: ff8009885000 [0.00] x21: 0004 x20: ff800932bad0 [0.00] x19: x18: ff80097e2218 [0.00] x17: x16: 0003 [0.00] x15: ff80097e2230 x14: 3d3d3d3d3d3d3d3d [0.00] x13: 3d3d3d3d3d3d3d3d x12: 3d3d3d3d3d3d3d3d [0.00] x11: 3d3d3d3d3d3d3d3d x10: 3d3d3d3d3d3d3d3d [0.00] x9 : 3d3d3d3d3d3d3d3d x8 : 3d3d3d3d3d3d3d3d [0.00] x7 : ff800920a920 x6 : ff800927e880 [0.00] x5 : ff8008617700 x4 : [0.00] x3 : x2 : [0.00] x1 : ff8009211d80 x0 : [0.00] Process swapper (pid: 0, stack limit = 0xff800920) [0.00] Call trace: [0.00] memory_present+0x84/0x154 [0.00] bootmem_init+0xa4/0x1e8 [0.00] setup_arch+0x200/0x65c [0.00] start_kernel+0x60/0x488 [0.00] Code: 5481 aa1a03e0 d281 97d5454a (f8736b60) [0.00] random: get_random_bytes called from print_oops_end_marker+0x4c/0x68 with crng_init=0 [0.00] ---[ end trace ]--- [0.00] Kernel panic - not syncing: Attempted to kill the idle task! [0.00] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! I use the following .config: # Automatically generated file; DO NOT EDIT. # Linux/arm64 4.14.0-rc7 Kernel Configuration # CONFIG_ARM64=y CONFIG_64BIT=y CONFIG_ARCH_PHYS_ADDR_T_64BIT=y CONFIG_MMU=y CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=24 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_NO_IOPORT_MAP=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ZONE_DMA=y CONFIG_HAVE_GENERIC_GUP=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_SMP=y CONFIG_SWIOTLB=y CONFIG_IOMMU_HELPER=y CONFIG_KERNEL_MODE_NEON=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=3 CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_EXTABLE_SORT=y CONFIG_THREAD_IN
Re: UBSAN: Undefined behaviour in mm/sparse.c:81:17
On Sun, Nov 05, 2017 at 01:57:33PM +0100, Corentin Labbe wrote: > Hello > > At least since next-20171102 I hit the following boot crash: > [0.00] Booting Linux on physical CPU 0x00 [0x410fd034] > [0.00] Linux version 4.14.0-rc7-next-20171103+ (compile@Red) (gcc > version 6.4.0 (Gentoo 6.4.0 p1.0)) #227 SMP PREEMPT Sun Nov 5 10:12:13 CET > 2017 > [0.00] Machine model: BananaPi-M64 > [0.00] earlycon: uart0 at MMIO32 0x01c28000 (options '') > [0.00] bootconsole [uart0] enabled > [0.00] > > [0.00] UBSAN: Undefined behaviour in /linux-next/mm/sparse.c:81:17 > [0.00] load of null pointer of type 'struct mem_section *' > [0.00] CPU: 0 PID: 0 Comm: swapper Not tainted > 4.14.0-rc7-next-20171103+ #227 > [0.00] Hardware name: BananaPi-M64 (DT) > [0.00] Call trace: > [0.00] dump_backtrace+0x0/0x1c0 > [0.00] show_stack+0x14/0x20 > [0.00] dump_stack+0xb0/0xdc > [0.00] ubsan_epilogue+0x14/0x50 > [0.00] __ubsan_handle_type_mismatch+0xa0/0x178 > [0.00] memory_present+0x84/0x154 > [0.00] bootmem_init+0xa4/0x1e8 > [0.00] setup_arch+0x200/0x65c > [0.00] start_kernel+0x60/0x488 > [0.00] > > [0.00] Unable to handle kernel NULL pointer dereference at virtual > address > [0.00] Mem abort info: > [0.00] ESR = 0x9605 > [0.00] Exception class = DABT (current EL), IL = 32 bits > [0.00] SET = 0, FnV = 0 > [0.00] EA = 0, S1PTW = 0 > [0.00] Data abort info: > [0.00] ISV = 0, ISS = 0x0005 > [0.00] CM = 0, WnR = 0 > [0.00] [] user address but active_mm is swapper > [0.00] Internal error: Oops: 9605 [#1] PREEMPT SMP > [0.00] Modules linked in: > [0.00] CPU: 0 PID: 0 Comm: swapper Not tainted > 4.14.0-rc7-next-20171103+ #227 > [0.00] Hardware name: BananaPi-M64 (DT) > [0.00] task: ff8009211d80 task.stack: ff800920 > [0.00] pstate: 8085 (Nzcv daIf -PAN -UAO) > [0.00] pc : memory_present+0x84/0x154 > [0.00] lr : memory_present+0x84/0x154 > [0.00] sp : ff8009203e10 > [0.00] x29: ff8009203e10 x28: 4118 > [0.00] x27: x26: ff800932bcc8 > [0.00] x25: 0004 x24: > [0.00] x23: ff8009885000 x22: ff8009885000 > [0.00] x21: 0004 x20: ff800932bad0 > [0.00] x19: x18: ff80097e2218 > [0.00] x17: x16: 0003 > [0.00] x15: ff80097e2230 x14: 3d3d3d3d3d3d3d3d > [0.00] x13: 3d3d3d3d3d3d3d3d x12: 3d3d3d3d3d3d3d3d > [0.00] x11: 3d3d3d3d3d3d3d3d x10: 3d3d3d3d3d3d3d3d > [0.00] x9 : 3d3d3d3d3d3d3d3d x8 : 3d3d3d3d3d3d3d3d > [0.00] x7 : ff800920a920 x6 : ff800927e880 > [0.00] x5 : ff8008617700 x4 : > [0.00] x3 : x2 : > [0.00] x1 : ff8009211d80 x0 : > [0.00] Process swapper (pid: 0, stack limit = 0xff800920) > [0.00] Call trace: > [0.00] memory_present+0x84/0x154 > [0.00] bootmem_init+0xa4/0x1e8 > [0.00] setup_arch+0x200/0x65c > [0.00] start_kernel+0x60/0x488 > [0.00] Code: 5481 aa1a03e0 d281 97d5454a (f8736b60) > [0.00] random: get_random_bytes called from > print_oops_end_marker+0x4c/0x68 with crng_init=0 > [0.00] ---[ end trace ]--- > [0.00] Kernel panic - not syncing: Attempted to kill the idle task! > [0.00] ---[ end Kernel panic - not syncing: Attempted to kill the > idle task! > > I use the following .config: > # Automatically generated file; DO NOT EDIT. > # Linux/arm64 4.14.0-rc7 Kernel Configuration > # > CONFIG_ARM64=y > CONFIG_64BIT=y > CONFIG_ARCH_PHYS_ADDR_T_64BIT=y > CONFIG_MMU=y > CONFIG_ARM64_PAGE_SHIFT=12 > CONFIG_ARM64_CONT_SHIFT=4 > CONFIG_ARCH_MMAP_RND_BITS_MIN=18 > CONFIG_ARCH_MMAP_RND_BITS_MAX=24 > CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 > CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 > CONFIG_NO_IOPORT_MAP=y > CONFIG_STACKTRACE_SUPPORT=y > CONFIG_ILLEGAL_POINTER_VALUE=0xdead > CONFIG_LOCKDEP_SUPPORT=y > CONFIG_TRACE_IRQFLAGS_SUPPORT=y > CONFIG_RWSEM_XCHGADD_ALGORITHM=y >
[PATCH v7 06/10] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..895816f4d741 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,35 @@
#size-cells = <0>;
status = "disabled";
- mdio: mdio {
+ mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
- int_mii_phy: ethernet-phy@1 {
- compatible =
"ethernet-phy-ieee802.3-c22";
- reg = <1>;
- clocks = <&ccu CLK_BUS_EPHY>;
- resets = <&ccu RST_BUS_EPHY>;
+ compatible = "snps,dwmac-mdio";
+
+ mdio-mux {
+ compatible = "mdio-mux",
"allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /* Only one MDIO is usable at the time
*/
+ internal_mdio: mdio@1 {
+ compatible =
"allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ int_mii_phy: ethernet-phy@1 {
+ compatible =
"ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&ccu
CLK_BUS_EPHY>;
+ resets = <&ccu
RST_BUS_EPHY>;
+ };
+ };
+
+ external_mdio: mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
};
--
2.13.6
[PATCH v7 01/10] dt-bindings: net: Restore sun8i dwmac binding
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac
binding")
Signed-off-by: Corentin Labbe
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+ "allwinner,sun8i-a83t-emac"
+ "allwinner,sun8i-h3-emac"
+ "allwinner,sun8i-v3s-emac"
+ "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+ - allwinner,sun8i-h3-system-controller
+ - allwinner,sun8i-v3s-system-controller
+ - allwinner,sun50i-a64-system-controller
+ - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+ - "allwinner,sun8i-h3-emac",
+ - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+ - "allwinner,sun8i-h3-emac",
+ - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c0b000 0x104>;
+ interrupts = ;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+};
--
2.13.6
[PATCH v7 10/10] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes
Each child node of an MDIO node is scanned as a PHY when calling
of_mdiobus_register() givint the following result:
[ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has
invalid PHY address
[ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0
[ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1
[...]
[ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30
[ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31
Since mdio-mux nodes are not PHY, this patch a way to to not scan
them.
Signed-off-by: Corentin Labbe
---
drivers/of/of_mdio.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
index d94dd8b77abd..90f3ac87c98f 100644
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -190,6 +190,10 @@ int of_mdiobus_register(struct mii_bus *mdio, struct
device_node *np)
struct device_node *child;
bool scanphys = false;
int addr, rc;
+ static const struct of_device_id compatible_muxes[] = {
+ { .compatible = "mdio-mux" },
+ {}
+ };
/* Do not continue if the node is disabled */
if (!of_device_is_available(np))
@@ -212,6 +216,9 @@ int of_mdiobus_register(struct mii_bus *mdio, struct
device_node *np)
/* Loop over the child nodes and register a phy_device for each phy */
for_each_available_child_of_node(np, child) {
+ if (of_match_node(compatible_muxes, child))
+ continue;
+
addr = of_mdio_parse_addr(&mdio->dev, child);
if (addr < 0) {
scanphys = true;
@@ -229,6 +236,9 @@ int of_mdiobus_register(struct mii_bus *mdio, struct
device_node *np)
/* auto scan for PHYs with empty reg property */
for_each_available_child_of_node(np, child) {
+ if (of_match_node(compatible_muxes, child))
+ continue;
+
/* Skip PHYs with reg property set */
if (of_find_property(child, "reg", NULL))
continue;
--
2.13.6
[PATCH v7 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY
This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.
Signed-off-by: Corentin Labbe
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 139 +++--
1 file changed, 127 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..0ae7d2096375 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
Please see stmmac.txt for the other unchanged properties.
Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
- reg: address and length of the register for the device.
- interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
- clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
- resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
- phy-mode: See ethernet.txt
- phy-handle: See ethernet.txt
- #address-cells: shall be 1
@@ -39,23 +39,38 @@ Optional properties for the following compatibles:
- allwinner,leds-active-low: EPHY LEDs are active low
Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: with compatible "snps,dwmac-mdio"
Required properties of the mdio node:
- #address-cells: shall be 1
- #size-cells: shall be 0
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
of the mdio node. See phy.txt for the generic PHY bindings.
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the mdio node have a mdio-mux child
+node called "mdio-mux":
+ - "allwinner,sun8i-h3-emac"
+ - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+ - compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux"
+ - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+ - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+ - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
- "allwinner,sun8i-h3-emac",
- "allwinner,sun8i-v3s-emac":
+
+Required properties of the integrated phy node:
- clocks: a phandle to the reference clock for the EPHY
- resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
-Example:
-
+Example with integrated PHY:
emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <&syscon>;
@@ -72,13 +87,113 @@ emac: ethernet@1c0b000 {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+ mdio0: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ mdio-mux {
+ compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ int_mdio: mdio@1 {
+ compatible = "allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ phy-is-integrated;
+ };
+ };
+ ext_mdio: mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
[PATCH v7 09/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.
This patch implement this MDIO switch via a custom MDIO-mux.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++
2 files changed, 224 insertions(+), 130 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+ select MDIO_BUS_MUX
---help---
Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index fffd6d5fc907..7741235093b9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -41,14 +42,14 @@
* This value is used for disabling properly EMAC
* and used as a good starting value in case of the
* boot process(uboot) leave some stuff.
- * @internal_phy: Does the MAC embed an internal PHY
+ * @soc_has_internal_phy: Does the MAC embed an internal PHY
* @support_mii: Does the MAC handle MII
* @support_rmii: Does the MAC handle RMII
* @support_rgmii: Does the MAC handle RGMII
*/
struct emac_variant {
u32 default_syscon_value;
- int internal_phy;
+ bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -61,7 +62,8 @@ struct emac_variant {
* @rst_ephy: reference to the optional EPHY reset for the internal PHY
* @variant: reference to the current board variant
* @regmap:regmap for using the syscon
- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
+ * @internal_phy_powered: Does the internal PHY is enabled
+ * @mux_handle:Internal pointer used by mdio-mux lib
*/
struct sunxi_priv_data {
struct clk *tx_clk;
@@ -70,12 +72,13 @@ struct sunxi_priv_data {
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap *regmap;
- bool use_internal_phy;
+ bool internal_phy_powered;
+ void *mux_handle;
};
static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
- .internal_phy = PHY_INTERFACE_MODE_MII,
+ .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = {
static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
- .internal_phy = PHY_INTERFACE_MODE_MII,
+ .soc_has_internal_phy = true,
.support_mii = true
};
static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
- .internal_phy = 0,
+ .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
};
static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
- .internal_phy = 0,
+ .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = {
#define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active
high */
#define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */
#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1
+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2
/* H3/A64 specific bits */
#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
}
+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
+static int get_ephy_nodes(struct stmmac_priv *priv)
+{
+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+ struct device_node *mdio_mux, *iphynode;
+ struct device_node *mdio_internal;
+ int ret;
+
+ mdio_mux = of_get_child_by_name(priv->plat->mdio_node, &quo
[PATCH v7 08/10] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 8a280b48e3a9..9e616da0745d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
- { .compatible = "allwinner,sun8i-a83t-emac" },
- { .compatible = "allwinner,sun8i-h3-emac" },
- { .compatible = "allwinner,sun8i-v3s-emac" },
- { .compatible = "allwinner,sun50i-a64-emac" },
{},
};
--
2.13.6
[PATCH v7 07/10] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
mdio: mdio {
+ compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
--
2.13.6
[PATCH v7 04/10] net: stmmac: sun8i: Restore the compatibles
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..fffd6d5fc907 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
}
static const struct of_device_id sun8i_dwmac_match[] = {
+ { .compatible = "allwinner,sun8i-h3-emac",
+ .data = &emac_variant_h3 },
+ { .compatible = "allwinner,sun8i-v3s-emac",
+ .data = &emac_variant_v3s },
+ { .compatible = "allwinner,sun8i-a83t-emac",
+ .data = &emac_variant_a83t },
+ { .compatible = "allwinner,sun50i-a64-emac",
+ .data = &emac_variant_a64 },
{ }
};
MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
--
2.13.6
[PATCH v7 03/10] arm64: dts: allwinner: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
Signed-off-by: Corentin Labbe
---
.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16
.../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20
.../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
.../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
.../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +
8 files changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -69,6 +70,14 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
/* TODO: Camera, touchscreen, etc. */
};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -71,6 +72,15 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ext_rmii_phy1>;
+ status = "okay";
+
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
"allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -76,6 +77,21 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode =
[PATCH v7 02/10] arm: dts: sunxi: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm DT about dwmac-sun8i
This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 ++
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +++
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +++
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts| 8 +++
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 ++
arch/arm/boot/dts/sunxi-h3-h5.dtsi| 26 +++
11 files changed, 147 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
aliases {
serial0 = &uart0;
+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet0 = &emac;
ethernet1 = &xr819;
};
@@ -102,6 +104,13 @@
status = "okay";
};
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -111,6 +112,24 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = &uart0;
/* ethernet0 is the H
[PATCH v7 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY
Hello The current way to find if the PHY is internal is to compare DT phy-mode and emac_variant/internal_phy. But it will negate a possible future SoC where an external PHY use the same phy mode than the integrated one. This patchs series adds a new way to handle this problem via a mdio-mux. The first try was to create a new MDIO mux "mdio-mux-syscon". mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception that the register is used via syscon/regmap. But this solution does not work for two reason: - changing the MDIO selection need the reset of MAC which cannot be done by the mdio-mux-syscon driver - There were driver loading order problem: - mdio-mux-syscon needing that stmmac register the parent MDIO - stmmac needing that child MDIO was registered just after registering parent MDIO So we cannot use any external MDIO-mux. The final solution was to represent the mdio-mux in MAC node and let the MAC handle all things. Since DT bits was reverted in 4.13, this patch series include the revert of the revert. So - the first four patchs bring back DT/stmmac stuff that was in 4.13 (and reverted) - fifth patch document how DT MDIO mux is implemented - patch 6 and 7 modify DT - patch 8, 9 Modify stmmac according to the new bindings I have let patch splited for easy review. (for seeing what's new) But the final serie could have some patch squashed if someone want. Like squashing patch and 2 and 5 (documentation) Regards Changes since v6: - renamed external mdio to "external_mdio" - added compatible to mdio-mux and internal-mdio - removed usage of phy-is-integrated - renamed do_not_scan to compatible_muxes (patch 10) - patch 8 9 of v6 are squashed Changes since v5: - reordered patch 1 and 2 - mdio-mux node is now a mdio's child - added patch 11 for removing unnecessary scan of mdio-mux Changes since v4: - Update documentation for new bindings - Added 4 patchs for bring back reverted stuff of 4.13 - dwmac-sun8i now handle mdio-mux - MDIO use now compatible = "snps,dwmac-mdio"; Changes since v3: - Added a patch for handling fixed-link - Updated documentation Changes since v2: - Add a MDIO mux for creating distinction between integrated and external MDIO. - phy-is-integrated is not set in dtsi. Changes since v1: - Dropped phy-is-integrated documentation patch since another same patch was already merged - Moved phy-is-integrated from SoC dtsi to final board DT. Corentin Labbe (10): dt-bindings: net: Restore sun8i dwmac binding arm: dts: sunxi: Restore EMAC changes arm64: dts: allwinner: Restore EMAC changes net: stmmac: sun8i: Restore the compatibles dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio net: stmmac: snps,dwmac-mdio MDIOs are automatically registered net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes .../devicetree/bindings/net/dwmac-sun8i.txt| 199 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts| 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts| 8 + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts| 5 + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 ++ arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 47 +++ .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 + .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 + .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 ++ .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 + .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 + drivers/net/ethernet/stmicro/stmmac/Kconfig| 1 + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 361 + .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 - drivers/of/of_mdio.c | 10 + 24 files changed, 745 insertions(+), 134 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt -- 2.13.6
Re: [PATCH v7 02/10] arm: dts: sunxi: Restore EMAC changes
On Wed, Oct 18, 2017 at 06:44:50PM +0200, Andrew Lunn wrote:
> On Wed, Oct 18, 2017 at 01:44:50PM +0200, Corentin Labbe wrote:
> > The original dwmac-sun8i DT bindings have some issue on how to handle
> > integrated PHY and was reverted in last RC of 4.13.
> > But now we have a solution so we need to get back that was reverted.
> >
> > This patch restore arm DT about dwmac-sun8i
> > This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
> >
> > Signed-off-by: Corentin Labbe
> > ---
> > arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9
> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +
> > arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +
> > arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 ++
> > arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +++
> > arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +++
> > arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +
> > arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts| 8 +++
> > arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++
> > arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 ++
> > arch/arm/boot/dts/sunxi-h3-h5.dtsi| 26
> > +++
> > 11 files changed, 147 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > index b1502df7b509..6713d0f2b3f4 100644
> > --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > @@ -56,6 +56,8 @@
> >
> > aliases {
> > serial0 = &uart0;
> > + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> > + ethernet0 = &emac;
> > ethernet1 = &xr819;
> > };
> >
> > @@ -102,6 +104,13 @@
> > status = "okay";
> > };
> >
> > +&emac {
> > + phy-handle = <&int_mii_phy>;
> > + phy-mode = "mii";
> > + allwinner,leds-active-low;
> > + status = "okay";
> > +};
> > +
> > &mmc0 {
> > pinctrl-names = "default";
> > pinctrl-0 = <&mmc0_pins_a>;
> > diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > index e1dba9ffa94b..f2292deaa590 100644
> > --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > @@ -52,6 +52,7 @@
> > compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
> >
> > aliases {
> > + ethernet0 = &emac;
> > serial0 = &uart0;
> > serial1 = &uart1;
> > };
> > @@ -111,6 +112,24 @@
> > status = "okay";
> > };
> >
> > +&emac {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emac_rgmii_pins>;
> > + phy-supply = <®_gmac_3v3>;
> > + phy-handle = <&ext_rgmii_phy>;
> > + phy-mode = "rgmii";
> > +
> > + allwinner,leds-active-low;
> > + status = "okay";
> > +};
> > +
>
>
> > +&external_mdio {
> > + ext_rgmii_phy: ethernet-phy@1 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <0>;
> > + };
> > +};
> > +
>
> Hi Corentin
>
> I'm wondering about the order of the patches. Does the external_mdio
> node actually exist at this point? Or only later when other patches
> are applied?
>
You are right order of patch are wrong, I need to cut this one in two.
"Revert²" sunxi-h3-h5.dtsi
apply mdiomux
"Revert²" all board nodes
Regards
Corentin Labbe
Re: [PATCH v4 2/2] crypto: stm32 - Support for STM32 CRYP crypto module
Hello
I have some minor comment below
On Thu, Oct 19, 2017 at 11:03:59AM +0200, Fabien Dessenne wrote:
> This module registers block cipher algorithms that make use of the
> STMicroelectronics STM32 crypto "CRYP1" hardware.
> The following algorithms are supported:
> - aes: ecb, cbc, ctr
> - des: ecb, cbc
> - tdes: ecb, cbc
>
> Signed-off-by: Fabien Dessennie
> ---
> drivers/crypto/stm32/Kconfig |9 +
> drivers/crypto/stm32/Makefile |3 +-
> drivers/crypto/stm32/stm32-cryp.c | 1188
> +
> 3 files changed, 1199 insertions(+), 1 deletion(-)
> create mode 100644 drivers/crypto/stm32/stm32-cryp.c
>
> diff --git a/drivers/crypto/stm32/Kconfig b/drivers/crypto/stm32/Kconfig
> index 602332e..61ef00b 100644
> --- a/drivers/crypto/stm32/Kconfig
> +++ b/drivers/crypto/stm32/Kconfig
[...]
> +/* Bit [0] encrypt / decrypt */
> +#define FLG_ENCRYPT BIT(0)
> +/* Bit [8..1] algo & operation mode */
> +#define FLG_AES BIT(1)
> +#define FLG_DES BIT(2)
> +#define FLG_TDESBIT(3)
> +#define FLG_ECB BIT(4)
> +#define FLG_CBC BIT(5)
> +#define FLG_CTR BIT(6)
> +/* Mode mask = bits [15..0] */
> +#define FLG_MODE_MASK GENMASK(15, 0)
> +
> +/* Registers */
> +#define CRYP_CR 0x
> +#define CRYP_SR 0x0004
> +#define CRYP_DIN0x0008
> +#define CRYP_DOUT 0x000C
> +#define CRYP_DMACR 0x0010
> +#define CRYP_IMSCR 0x0014
> +#define CRYP_RISR 0x0018
> +#define CRYP_MISR 0x001C
> +#define CRYP_K0LR 0x0020
> +#define CRYP_K0RR 0x0024
> +#define CRYP_K1LR 0x0028
> +#define CRYP_K1RR 0x002C
> +#define CRYP_K2LR 0x0030
> +#define CRYP_K2RR 0x0034
> +#define CRYP_K3LR 0x0038
> +#define CRYP_K3RR 0x003C
> +#define CRYP_IV0LR 0x0040
> +#define CRYP_IV0RR 0x0044
> +#define CRYP_IV1LR 0x0048
> +#define CRYP_IV1RR 0x004C
> +
> +/* Registers values */
> +#define CR_DEC_NOT_ENC 0x0004
> +#define CR_TDES_ECB 0x
> +#define CR_TDES_CBC 0x0008
> +#define CR_DES_ECB 0x0010
> +#define CR_DES_CBC 0x0018
> +#define CR_AES_ECB 0x0020
> +#define CR_AES_CBC 0x0028
> +#define CR_AES_CTR 0x0030
> +#define CR_AES_KP 0x0038
> +#define CR_AES_UNKNOWN 0x
> +#define CR_ALGO_MASK0x00080038
> +#define CR_DATA32 0x
> +#define CR_DATA16 0x0040
> +#define CR_DATA80x0080
> +#define CR_DATA10x00C0
> +#define CR_KEY128 0x
> +#define CR_KEY192 0x0100
> +#define CR_KEY256 0x0200
> +#define CR_FFLUSH 0x4000
> +#define CR_CRYPEN 0x8000
Why not using BIT(x) ?
Why not using also directly FLG_XX since CR_XX are arbitray values ? like using
instead CR_AES_CBC = FLG_AES | FLG_CBC
[...]
> +static inline void stm32_cryp_wait_enable(struct stm32_cryp *cryp)
> +{
> + while (stm32_cryp_read(cryp, CRYP_CR) & CR_CRYPEN)
> + cpu_relax();
> +}
This function is not used, so you could remove it
> +
> +static inline void stm32_cryp_wait_busy(struct stm32_cryp *cryp)
> +{
> + while (stm32_cryp_read(cryp, CRYP_SR) & SR_BUSY)
> + cpu_relax();
> +}
No timeout ?
> +
> +static inline void stm32_cryp_wait_output(struct stm32_cryp *cryp)
> +{
> + while (!(stm32_cryp_read(cryp, CRYP_SR) & SR_OFNE))
> + cpu_relax();
> +}
This function is not used, so you could remove it
[...]
> +static int stm32_cryp_check_aligned(struct scatterlist *sg, size_t total,
> + size_t align)
> +{
> + int len = 0;
> +
> + if (!total)
> + return 0;
> +
> + if (!IS_ALIGNED(total, align))
> + return -EINVAL;
> +
> + while (sg) {
> + if (!IS_ALIGNED(sg->offset, sizeof(u32)))
> + return -1;
-1 is not a good return value, prefer any -E
> +
> + if (!IS_ALIGNED(sg->length, align))
> + return -1;
> +
> + len += sg->length;
> + sg = sg_next(sg);
> + }
> +
> + if (len != total)
> + return -1;
[...]
> +static int stm32_cryp_copy_sgs(struct stm32_cryp *cryp)
> +{
> + void *buf_in, *buf_out;
> + int pages, total_in, total_out;
> +
> + if (!stm32_cryp_check_io_aligned(cryp)) {
> + cryp->sgs_copied = 0;
> + return 0;
> + }
> +
> + total_in = ALIGN(cryp->total_in, cryp->hw_blocksize);
>
[PATCH] clk: sunxi: fix build warning
This patch fix the following build warning:
drivers/clk/sunxi/clk-factors.c:279:14: warning: variable 'name' set but not
used [-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/clk/sunxi/clk-factors.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index dfe5e3e32d28..856fef65433b 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -276,13 +276,11 @@ void sunxi_factors_unregister(struct device_node *node,
struct clk *clk)
{
struct clk_hw *hw = __clk_get_hw(clk);
struct clk_factors *factors;
- const char *name;
if (!hw)
return;
factors = to_clk_factors(hw);
- name = clk_hw_get_name(hw);
of_clk_del_provider(node);
/* TODO: The composite clock stuff will leak a bit here. */
--
2.13.6
Re: [PATCH v9 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY
On Fri, Oct 27, 2017 at 09:37:10AM -0500, Rob Herring wrote:
> On Tue, Oct 24, 2017 at 07:57:06PM +0200, Corentin Labbe wrote:
> > This patch add documentation about the MDIO switch used on sun8i-h3-emac
> > for integrated PHY.
> >
> > Signed-off-by: Corentin Labbe
> > ---
> > .../devicetree/bindings/net/dwmac-sun8i.txt| 145
> > +++--
> > 1 file changed, 133 insertions(+), 12 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > index 725f3b187886..2600ce9ad3cc 100644
> > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > @@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
> > Please see stmmac.txt for the other unchanged properties.
> >
> > Required properties:
> > -- compatible: should be one of the following string:
> > +- compatible: must be one of the following string:
> > "allwinner,sun8i-a83t-emac"
> > "allwinner,sun8i-h3-emac"
> > "allwinner,sun8i-v3s-emac"
> > "allwinner,sun50i-a64-emac"
> > - reg: address and length of the register for the device.
> > - interrupts: interrupt for the device
> > -- interrupt-names: should be "macirq"
> > +- interrupt-names: must be "macirq"
> > - clocks: A phandle to the reference clock for this device
> > -- clock-names: should be "stmmaceth"
> > +- clock-names: must be "stmmaceth"
> > - resets: A phandle to the reset control for this device
> > -- reset-names: should be "stmmaceth"
> > +- reset-names: must be "stmmaceth"
> > - phy-mode: See ethernet.txt
> > - phy-handle: See ethernet.txt
> > - #address-cells: shall be 1
> > @@ -39,23 +39,42 @@ Optional properties for the following compatibles:
> > - allwinner,leds-active-low: EPHY LEDs are active low
> >
> > Required child node of emac:
> > -- mdio bus node: should be named mdio
> > +- mdio bus node: with compatible "snps,dwmac-mdio"
>
> It should still be named mdio.
>
> >
> > Required properties of the mdio node:
> > - #address-cells: shall be 1
> > - #size-cells: shall be 0
> >
> > -The device node referenced by "phy" or "phy-handle" should be a child node
> > +The device node referenced by "phy" or "phy-handle" must be a child node
> > of the mdio node. See phy.txt for the generic PHY bindings.
> >
> > -Required properties of the phy node with the following compatibles:
> > +The following compatibles require that the emac node have a mdio-mux child
> > +node called "mdio-mux":
> > + - "allwinner,sun8i-h3-emac"
> > + - "allwinner,sun8i-v3s-emac":
> > +Required properties for the mdio-mux node:
> > + - compatible = "allwinner,sun8i-h3-mdio-mux"
> > + - mdio-parent-bus: a phandle to EMAC mdio
> > + - one child mdio for the integrated mdio with the compatible
> > +"allwinner,sun8i-h3-mdio-internal"
> > + - one child mdio for the external mdio if present (V3s have none)
> > +Required properties for the mdio-mux children node:
> > + - reg: 1 for internal MDIO bus, 2 for external MDIO bus
> > +
> > +The following compatibles require a PHY node representing the integrated
> > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:
> >- "allwinner,sun8i-h3-emac",
> >- "allwinner,sun8i-v3s-emac":
> > +
> > +Additional information regarding generic multiplexer properties can be
> > found
> > +at Documentation/devicetree/bindings/net/mdio-mux.txt
> > +
> > +Required properties of the integrated phy node:
> > - clocks: a phandle to the reference clock for the EPHY
> > - resets: a phandle to the reset control for the EPHY
> > +- Must be a child of the integrated mdio
> >
> > -Example:
> > -
> > +Example with integrated PHY:
> > emac: ethernet@1c0b000 {
> > compatible = "allwinner,sun8i-h3-emac";
> > syscon = <&syscon>;
> > @@ -72,13 +91,115 @@ emac: ethernet@1c0b000 {
> > phy-handle = <&int_mii_phy>;
> > phy-mode = "mii";
> > allwinner,leds-active-low;
> > +
> > + mdio0: mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "snps,dwmac-mdio";
> > + };
> > +
> > + mdio-mux {
> > + compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
>
> Drop mdio-mux.
>
> With those fixed,
>
> Acked-by: Rob Herring
Will change what you ask.
Thanks
Regards
Re: [PATCH v9 06/10] arm64: dts: allwinner: Restore EMAC changes
On Fri, Oct 27, 2017 at 05:11:14PM +0200, Maxime Ripard wrote:
> On Tue, Oct 24, 2017 at 07:57:10PM +0200, Corentin Labbe wrote:
> > The original dwmac-sun8i DT bindings have some issue on how to handle
> > integrated PHY and was reverted in last RC of 4.13.
> > But now we have a solution so we need to get back that was reverted.
> >
> > This patch restore arm64 DT about dwmac-sun8i
> > This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC
> > changes")
> >
> > Signed-off-by: Corentin Labbe
> > ---
> > .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16
> > .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
> > arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +
> > .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16
> > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20
> >
> > .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
> > .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
> > .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +
> > 8 files changed, 135 insertions(+)
>
> Can you split the changes between the A64 and the H5? It's going to be
> difficult to merge otherwise.
>
> (You also forgot to add Florian's Acked-by on your whole serie).
>
Will do
Thanks
Regards
[PATCH v10 8/8] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
mdio: mdio {
+ compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
--
2.13.6
[PATCH v10 0/8] net: stmmac: dwmac-sun8i: Handle integrated PHY
Hello The current way to find if the PHY is internal is to compare DT phy-mode and emac_variant/internal_phy. But it will negate a possible future SoC where an external PHY use the same phy mode than the integrated one. This patchs series adds a new way to handle this problem via a mdio-mux. The first try was to create a new MDIO mux "mdio-mux-syscon". mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception that the register is used via syscon/regmap. But this solution does not work for two reason: - changing the MDIO selection need the reset of MAC which cannot be done by the mdio-mux-syscon driver - There were driver loading order problem: - mdio-mux-syscon needing that stmmac register the parent MDIO - stmmac needing that child MDIO was registered just after registering parent MDIO So we cannot use any external MDIO-mux. The final solution was to represent the mdio-mux in MAC node and let the MAC handle all things. Since DT bits was reverted in 4.13, this patch series include the revert of the revert. I have let patch splited for easy review. (for seeing what's new) But the final serie could have some patch squashed if someone want. Like squashing patch and 1 and 2 (documentation) All patchs should go via the sunxi tree Regards Changes since v9: - added a line before mdio-parent-bus - removed mdio-mux compatible from doc - fix arm prefix uppercase - splitted changes between A64 and H5 - removed already merge patchs for net Changes since v8: - added reference to mdio-mux.txt in documentation - removed compatible mdio-mux - added mdio-parent-bus Changes since v7: - moved mdio-mux ouf of mdio as asked by Andrew Lunn - reordered patchs order Changes since v6: - renamed external mdio to "external_mdio" - added compatible to mdio-mux and internal-mdio - removed usage of phy-is-integrated - renamed do_not_scan to compatible_muxes (patch 10) - patch 8 9 of v6 are squashed Changes since v5: - reordered patch 1 and 2 - mdio-mux node is now a mdio's child - added patch 11 for removing unnecessary scan of mdio-mux Changes since v4: - Update documentation for new bindings - Added 4 patchs for bring back reverted stuff of 4.13 - dwmac-sun8i now handle mdio-mux - MDIO use now compatible = "snps,dwmac-mdio"; Changes since v3: - Added a patch for handling fixed-link - Updated documentation Changes since v2: - Add a MDIO mux for creating distinction between integrated and external MDIO. - phy-is-integrated is not set in dtsi. Changes since v1: - Dropped phy-is-integrated documentation patch since another same patch was already merged - Moved phy-is-integrated from SoC dtsi to final board DT. Corentin Labbe (8): dt-bindings: net: Restore sun8i dwmac binding dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY arm: dts: sunxi: h3/h5: Restore EMAC changes ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac ARM: dts: sunxi: Restore EMAC changes (boards) arm64: dts: allwinner: A64: Restore EMAC changes arm64: dts: allwinner: H5: Restore EMAC changes arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio .../devicetree/bindings/net/dwmac-sun8i.txt| 207 + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts| 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts| 8 + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts| 5 + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++ arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 49 + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 ++ .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 ++ .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++ .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 ++ .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 ++ .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 ++ 20 files changed, 513 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt -- 2.13.6
[PATCH v10 4/8] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
Reviewed-by: Andrew Lunn
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..408df33e947b 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -425,11 +425,34 @@
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
- int_mii_phy: ethernet-phy@1 {
- compatible =
"ethernet-phy-ieee802.3-c22";
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio-parent-bus = <&mdio>;
+ /* Only one MDIO is usable at the time */
+ internal_mdio: mdio@1 {
+ compatible =
"allwinner,sun8i-h3-mdio-internal";
reg = <1>;
- clocks = <&ccu CLK_BUS_EPHY>;
- resets = <&ccu RST_BUS_EPHY>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ int_mii_phy: ethernet-phy@1 {
+ compatible =
"ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+
+ external_mdio: mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
};
--
2.13.6
[PATCH v10 5/8] ARM: dts: sunxi: Restore EMAC changes (boards)
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC
changes")
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts| 8
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 ++
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16
10 files changed, 121 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
aliases {
serial0 = &uart0;
+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet0 = &emac;
ethernet1 = &xr819;
};
@@ -102,6 +104,13 @@
status = "okay";
};
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -111,6 +112,24 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = &uart0;
/* ethernet0 is the H3 emac, defined in
[PATCH v10 7/8] arm64: dts: allwinner: H5: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm64 DT about dwmac-sun8i for H5
This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC
changes")
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
---
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
.../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +
.../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +
3 files changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 1c2387bd5df6..6eb8092d8e57 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -50,6 +50,7 @@
compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -108,6 +109,22 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 4f77c8470f6c..a0ca925175aa 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -59,6 +59,7 @@
};
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -136,6 +137,22 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 6be06873e5af..b47790650144 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -54,6 +54,7 @@
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -143,6 +144,22 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
--
2.13.6
[PATCH v10 6/8] arm64: dts: allwinner: A64: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm64 DT about dwmac-sun8i for A64
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
---
.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16
.../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20
5 files changed, 84 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -69,6 +70,14 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
/* TODO: Camera, touchscreen, etc. */
};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -71,6 +72,15 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ext_rmii_phy1>;
+ status = "okay";
+
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
"allwinner,sun50i-a64";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -76,6 +77,21 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-
[PATCH v10 3/8] arm: dts: sunxi: h3/h5: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC
changes")
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c1bd09dab3da..d762098fc589 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -408,6 +408,32 @@
clocks = <&osc24M>;
};
+ emac: ethernet@1c3 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c3 0x1>;
+ interrupts = ;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ compatible =
"ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+ };
+
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
--
2.13.6
[PATCH v10 2/8] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY
This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.
Signed-off-by: Corentin Labbe
Acked-by: Florian Fainelli
Reviewed-by: Andrew Lunn
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 147 +++--
1 file changed, 135 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..3d6d5fa0c4d5 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
Please see stmmac.txt for the other unchanged properties.
Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
- reg: address and length of the register for the device.
- interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
- clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
- resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
- phy-mode: See ethernet.txt
- phy-handle: See ethernet.txt
- #address-cells: shall be 1
@@ -39,23 +39,42 @@ Optional properties for the following compatibles:
- allwinner,leds-active-low: EPHY LEDs are active low
Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
Required properties of the mdio node:
- #address-cells: shall be 1
- #size-cells: shall be 0
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
of the mdio node. See phy.txt for the generic PHY bindings.
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the emac node have a mdio-mux child
+node called "mdio-mux":
+ - "allwinner,sun8i-h3-emac"
+ - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+ - compatible = "allwinner,sun8i-h3-mdio-mux"
+ - mdio-parent-bus: a phandle to EMAC mdio
+ - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+ - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+ - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
- "allwinner,sun8i-h3-emac",
- "allwinner,sun8i-v3s-emac":
+
+Additional information regarding generic multiplexer properties can be found
+at Documentation/devicetree/bindings/net/mdio-mux.txt
+
+Required properties of the integrated phy node:
- clocks: a phandle to the reference clock for the EPHY
- resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
-Example:
-
+Example with integrated PHY:
emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <&syscon>;
@@ -72,13 +91,117 @@ emac: ethernet@1c0b000 {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio-parent-bus = <&mdio>;
+
+ int_mdio: mdio@1 {
+ compatible = "allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ phy-is-integrated;
+ };
+ };
+ ext_mdio: mdio@2 {
+
[PATCH v10 1/8] dt-bindings: net: Restore sun8i dwmac binding
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac
binding")
Signed-off-by: Corentin Labbe
Acked-by: Rob Herring
Acked-by: Florian Fainelli
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+ "allwinner,sun8i-a83t-emac"
+ "allwinner,sun8i-h3-emac"
+ "allwinner,sun8i-v3s-emac"
+ "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+ - allwinner,sun8i-h3-system-controller
+ - allwinner,sun8i-v3s-system-controller
+ - allwinner,sun50i-a64-system-controller
+ - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+ - "allwinner,sun8i-h3-emac",
+ - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+ - "allwinner,sun8i-h3-emac",
+ - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c0b000 0x104>;
+ interrupts = ;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ int_mii_phy: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+};
--
2.13.6
Re: [PATCH 8/8] crypto: testmgr: Use the xxx_zero_message_hash from headers
Le 12/10/2015 21:24, kbuild test robot a écrit :
> Hi LABBE,
>
> [auto build test ERROR on crypto/master -- if it's inappropriate base, please
> suggest rules for selecting the more suitable base]
>
> url:
> https://github.com/0day-ci/linux/commits/LABBE-Corentin/crypto-hash-add-zero-length-message-hash-for-shax-and-md5/20151013-005943
> config: arm-mmp (attached as .config)
> reproduce:
> wget
> https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
> -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> make.cross ARCH=arm
>
> All errors (new ones prefixed by >>):
>
>In file included from crypto/testmgr.c:48:0:
>>> crypto/testmgr.h:370:13: error: 'md5_zero_message_hash' undeclared here
>>> (not in a function)
> .digest = md5_zero_message_hash,
> ^
>>> crypto/testmgr.h:715:13: error: 'sha1_zero_message_hash' undeclared here
>>> (not in a function)
> .digest = sha1_zero_message_hash,
> ^
>>> crypto/testmgr.h:715:3: error: initializer element is not constant
> .digest = sha1_zero_message_hash,
> ^
>crypto/testmgr.h:715:3: error: (near initialization for
> 'sha1_tv_template[0].digest')
>>> crypto/testmgr.h:906:13: error: 'sha224_zero_message_hash' undeclared here
>>> (not in a function)
> .digest = sha224_zero_message_hash,
> ^
>crypto/testmgr.h:906:3: error: initializer element is not constant
> .digest = sha224_zero_message_hash,
> ^
>crypto/testmgr.h:906:3: error: (near initialization for
> 'sha224_tv_template[0].digest')
>>> crypto/testmgr.h:1077:13: error: 'sha256_zero_message_hash' undeclared here
>>> (not in a function)
> .digest = sha256_zero_message_hash,
> ^
>crypto/testmgr.h:1077:3: error: initializer element is not constant
> .digest = sha256_zero_message_hash,
> ^
>crypto/testmgr.h:1077:3: error: (near initialization for
> 'sha256_tv_template[0].digest')
>
> vim +/md5_zero_message_hash +370 crypto/testmgr.h
>
>364 * MD5 test vectors from RFC1321
>365 */
>366#define MD5_TEST_VECTORS7
>367
>368static struct hash_testvec md5_tv_template[] = {
>369{
> > 370.digest = md5_zero_message_hash,
>371}, {
>372.plaintext = "a",
>373.psize = 1,
>
> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
>
Oups I forgot to add sha and md5 header, I will resend tomorow.
Regards
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Re: [PATCH v2 7/9] net: stmmac: dwmac-sun8i: fix OF child-node lookup
On Mon, Aug 27, 2018 at 10:21:51AM +0200, Johan Hovold wrote:
> Use the new of_get_compatible_child() helper to lookup the mdio-internal
> child node instead of using of_find_compatible_node(), which searches
> the entire tree from a given start node and thus can return an unrelated
> (i.e. non-child) node.
>
> This also addresses a potential use-after-free (e.g. after probe
> deferral) as the tree-wide helper drops a reference to its first
> argument (i.e. the mdio-mux node). Fortunately, this was inadvertently
> balanced by a failure to drop the mdio-mux reference after lookup.
>
> While at it, also fix the related mdio-internal- and phy-node reference
> leaks.
>
> Fixes: 634db83b8265 ("net: stmmac: dwmac-sun8i: Handle integrated/external
> MDIOs")
> Cc: Corentin Labbe
> Cc: Andrew Lunn
> Cc: Giuseppe Cavallaro
> Cc: Alexandre Torgue
> Cc: Jose Abreu
> Cc: David S. Miller
> Signed-off-by: Johan Hovold
You should have CCed sunxi maintainers
Maxime Ripard (maintainer:ARM/Allwinner sunXi SoC
support)
Chen-Yu Tsai (maintainer:ARM/Allwinner sunXi SoC support)
Since I am just back from holidays, I will test this patch this week.
Regards
[PATCH] memory: jz4780-nemc: build depend on OF
jz4780-nemc use of_ functions, so it needs to depend on OF This fix the following build failure on x86 drivers/memory/jz4780-nemc.c: In function ‘jz4780_nemc_num_banks’: drivers/memory/jz4780-nemc.c:72:10: error: implicit declaration of function ‘of_read_number’ [-Werror=implicit-function-declaration] Signed-off-by: Corentin Labbe --- drivers/memory/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index a642552..faa1a23 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -124,6 +124,7 @@ config JZ4780_NEMC default y depends on MACH_JZ4780 || COMPILE_TEST depends on HAS_IOMEM + depends on OF help This driver is for the NAND/External Memory Controller (NEMC) in the Ingenic JZ4780. This controller is used to handle external -- 2.7.4
[PATCH 0/3] ata: ahci_platform: minor fixes
Hello This patchset fixes some minor problem found when working on supporting allwinner R40 AHCI. Regards Corentin Labbe (3): ata: ahci_platform: correct parameter documentation for ahci_platform_shutdown ata: ahci_platform: convert kzallloc to kcalloc ata: ahci_platform: convert kcalloc to devm_kcalloc drivers/ata/libahci_platform.c | 12 1 file changed, 4 insertions(+), 8 deletions(-) -- 2.16.4
[PATCH 3/3] ata: ahci_platform: convert kcalloc to devm_kcalloc
Like phys, target_pwrs could be allocated with devm_ function
Signed-off-by: Corentin Labbe
---
drivers/ata/libahci_platform.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index be9f54423a9b..fe8939e161ea 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -271,8 +271,6 @@ static void ahci_platform_put_resources(struct device *dev,
void *res)
for (c = 0; c < hpriv->nports; c++)
if (hpriv->target_pwrs && hpriv->target_pwrs[c])
regulator_put(hpriv->target_pwrs[c]);
-
- kfree(hpriv->target_pwrs);
}
static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
@@ -408,7 +406,7 @@ struct ahci_host_priv *ahci_platform_get_resources(struct
platform_device *pdev)
rc = -ENOMEM;
goto err_out;
}
- hpriv->target_pwrs = kcalloc(hpriv->nports,
sizeof(*hpriv->target_pwrs), GFP_KERNEL);
+ hpriv->target_pwrs = devm_kcalloc(dev, hpriv->nports,
sizeof(*hpriv->target_pwrs), GFP_KERNEL);
if (!hpriv->target_pwrs) {
rc = -ENOMEM;
goto err_out;
--
2.16.4
[PATCH 1/3] ata: ahci_platform: correct parameter documentation for ahci_platform_shutdown
The documentation about parameter for ahci_platform_shutdown has a typo. This fix the following build warning: drivers/ata/libahci_platform.c:693: warning: Function parameter or member 'pdev' not described in 'ahci_platform_shutdown' drivers/ata/libahci_platform.c:693: warning: Excess function parameter 'dev' description in 'ahci_platform_shutdow Signed-off-by: Corentin Labbe --- drivers/ata/libahci_platform.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index feee2e11fb33..70052c046559 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -607,7 +607,7 @@ static void ahci_host_stop(struct ata_host *host) /** * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports - * @dev: platform device pointer for the host + * @pdev: platform device pointer for the host * * This function is called during system shutdown and performs the minimal * deconfiguration required to ensure that an ahci_platform host cannot -- 2.16.4
[PATCH 2/3] ata: ahci_platform: convert kzallloc to kcalloc
It's better to kcalloc instead of kzalloc(n * sizeof())
Signed-off-by: Corentin Labbe
---
drivers/ata/libahci_platform.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index 70052c046559..be9f54423a9b 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -351,7 +351,7 @@ struct ahci_host_priv *ahci_platform_get_resources(struct
platform_device *pdev)
struct ahci_host_priv *hpriv;
struct clk *clk;
struct device_node *child;
- int i, sz, enabled_ports = 0, rc = -ENOMEM, child_nodes;
+ int i, enabled_ports = 0, rc = -ENOMEM, child_nodes;
u32 mask_port_map = 0;
if (!devres_open_group(dev, NULL, GFP_KERNEL))
@@ -403,14 +403,12 @@ struct ahci_host_priv *ahci_platform_get_resources(struct
platform_device *pdev)
if (!child_nodes)
hpriv->nports = 1;
- sz = hpriv->nports * sizeof(*hpriv->phys);
- hpriv->phys = devm_kzalloc(dev, sz, GFP_KERNEL);
+ hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys),
GFP_KERNEL);
if (!hpriv->phys) {
rc = -ENOMEM;
goto err_out;
}
- sz = hpriv->nports * sizeof(*hpriv->target_pwrs);
- hpriv->target_pwrs = kzalloc(sz, GFP_KERNEL);
+ hpriv->target_pwrs = kcalloc(hpriv->nports,
sizeof(*hpriv->target_pwrs), GFP_KERNEL);
if (!hpriv->target_pwrs) {
rc = -ENOMEM;
goto err_out;
--
2.16.4
[PATCH] x86: kvm: Remove unused KVM_DEBUG_FS
KVM_DEBUG_FS is unused since commit cfd8983f03c7 ("x86, locking/spinlocks:
Remove ticket (spin)lock implementation")
Simply remove it.
Signed-off-by: Corentin Labbe
---
arch/x86/Kconfig | 9 -
1 file changed, 9 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 3061c2735510..f908e13f9231 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -788,15 +788,6 @@ config KVM_GUEST
underlying device model, the host provides the guest with
timing infrastructure such as time of day, and system time
-config KVM_DEBUG_FS
- bool "Enable debug information for KVM Guests in debugfs"
- depends on KVM_GUEST && DEBUG_FS
- default n
- ---help---
- This option enables collection of various statistics for KVM guest.
- Statistics are displayed in debugfs filesystem. Enabling this option
- may incur significant overhead.
-
config PARAVIRT_TIME_ACCOUNTING
bool "Paravirtual steal time accounting"
depends on PARAVIRT
--
2.13.6
[PATCH] sparc64: fix typo in CONFIG_CRYPTO_DES_SPARC64 => CONFIG_CRYPTO_CAMELLIA_SPARC64
This patch fixes the typo CONFIG_CRYPTO_DES_SPARC64 =>
CONFIG_CRYPTO_CAMELLIA_SPARC64
Fixes: 81658ad0d923 ("sparc64: Add CAMELLIA driver making use of the new
camellia opcodes.")
Signed-off-by: Corentin Labbe
---
arch/sparc/crypto/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile
index 818d3aa5172e..d257186c27d1 100644
--- a/arch/sparc/crypto/Makefile
+++ b/arch/sparc/crypto/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_CRYPTO_MD5_SPARC64) += md5-sparc64.o
obj-$(CONFIG_CRYPTO_AES_SPARC64) += aes-sparc64.o
obj-$(CONFIG_CRYPTO_DES_SPARC64) += des-sparc64.o
-obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o
+obj-$(CONFIG_CRYPTO_CAMELLIA_SPARC64) += camellia-sparc64.o
obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
--
2.13.6
[PATCH] staging: rtlwifi: remove unused RTLHALMAC_ST and RTLPHYDM_ST
Since nothing builds/depends on RTLHALMAC_ST and RTLPHYDM_ST, we could remove them. Furthermore, they are totally undocumented Signed-off-by: Corentin Labbe --- drivers/staging/rtlwifi/Kconfig | 10 -- 1 file changed, 10 deletions(-) diff --git a/drivers/staging/rtlwifi/Kconfig b/drivers/staging/rtlwifi/Kconfig index 12cf4675b5fd..7b4276f5c41f 100644 --- a/drivers/staging/rtlwifi/Kconfig +++ b/drivers/staging/rtlwifi/Kconfig @@ -6,16 +6,6 @@ config R8822BE This is the staging driver for Realtek RTL8822BE 802.11ac PCIe wireless network adapters. -config RTLHALMAC_ST - tristate - depends on R8822BE - default m - -config RTLPHYDM_ST - tristate - depends on R8822BE - default m - config RTLWIFI_DEBUG_ST bool depends on R8822BE -- 2.13.6
[PATCH] staging: fbtft: remove unused FB_TFT_SSD1325 kconfig
Since nothing builds/depends on FB_TFT_SSD1325, we could remove it. Signed-off-by: Corentin Labbe --- drivers/staging/fbtft/Kconfig | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig index dba676761d72..84b2e7ebc024 100644 --- a/drivers/staging/fbtft/Kconfig +++ b/drivers/staging/fbtft/Kconfig @@ -135,12 +135,6 @@ config FB_TFT_SSD1306 help Framebuffer support for SSD1306 -config FB_TFT_SSD1325 -tristate "FB driver for the SSD1325 OLED Controller" -depends on FB_TFT -help - Framebuffer support for SSD1305 - config FB_TFT_SSD1331 tristate "FB driver for the SSD1331 LCD Controller" depends on FB_TFT -- 2.13.6
[PATCH] staging: media: remove unused VIDEO_ATOMISP_OV8858 kconfig
Nothing in kernel use VIDEO_ATOMISP_OV8858 since commit 3a81c7660f80 ("media:
staging: atomisp: Remove IMX sensor support")
Lets remove this kconfig option.
Signed-off-by: Corentin Labbe
---
drivers/staging/media/atomisp/i2c/Kconfig | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/staging/media/atomisp/i2c/Kconfig
b/drivers/staging/media/atomisp/i2c/Kconfig
index db054d3c7ed6..f7f7177b9b37 100644
--- a/drivers/staging/media/atomisp/i2c/Kconfig
+++ b/drivers/staging/media/atomisp/i2c/Kconfig
@@ -28,18 +28,6 @@ config VIDEO_ATOMISP_GC2235
It currently only works with the atomisp driver.
-config VIDEO_ATOMISP_OV8858
- tristate "Omnivision ov8858 sensor support"
- depends on ACPI
- depends on I2C && VIDEO_V4L2 && VIDEO_ATOMISP
- ---help---
-This is a Video4Linux2 sensor-level driver for the Omnivision
-ov8858 RAW sensor.
-
-OV8858 is a 8M raw sensor.
-
-It currently only works with the atomisp driver.
-
config VIDEO_ATOMISP_MSRLIST_HELPER
tristate "Helper library to load, parse and apply large register lists."
depends on I2C
--
2.13.6
[PATCH] Documentation: decnet: remove reference to CONFIG_DECNET_ROUTE_FWMARK
CONFIG_DECNET_ROUTE_FWMARK was removed in commit 47dcf0cb1005 ("[NET]: Rethink
mark field in struct flowi")
Since nothing replace it (and nothing need to replace it), simply remove
it from documentation.
Signed-off-by: Corentin Labbe
---
Documentation/networking/decnet.txt | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/networking/decnet.txt
b/Documentation/networking/decnet.txt
index e12a4900cf72..d192f8b9948b 100644
--- a/Documentation/networking/decnet.txt
+++ b/Documentation/networking/decnet.txt
@@ -22,8 +22,6 @@ you'll need the following options as well...
CONFIG_DECNET_ROUTER (to be able to add/delete routes)
CONFIG_NETFILTER (will be required for the DECnet routing daemon)
-CONFIG_DECNET_ROUTE_FWMARK is optional
-
Don't turn on SIOCGIFCONF support for DECnet unless you are really sure
that you need it, in general you won't and it can cause ifconfig to
malfunction.
--
2.13.6
[PATCH] x86: remove unused IOMMU_STRESS kconfig
Last use of IOMMU_STRESS was removed in commit 29b68415e335 ("x86: amd_iommu:
move to drivers/iommu/")
6 years after, we could remove it.
Signed-off-by: Corentin Labbe
---
arch/x86/Kconfig.debug | 8
1 file changed, 8 deletions(-)
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 672441c008c7..192e4d2f9efc 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -169,14 +169,6 @@ config IOMMU_DEBUG
options. See Documentation/x86/x86_64/boot-options.txt for more
details.
-config IOMMU_STRESS
- bool "Enable IOMMU stress-test mode"
- ---help---
- This option disables various optimizations in IOMMU related
- code to do real stress testing of the IOMMU code. This option
- will cause a performance drop and should only be enabled for
- testing.
-
config IOMMU_LEAK
bool "IOMMU leak tracing"
depends on IOMMU_DEBUG && DMA_API_DEBUG
--
2.13.6
Re: [PATCH 0/5] net-next: ethernet: add sun8i-emac driver
On Fri, May 12, 2017 at 06:09:17AM -0700, Mahesh Nanavalla wrote: > Hi All, > > I am new to Ethernet Driver. > > I am working on NanoPI Neo Based on SUN8i-H3 SOC ... > > can any body helpout to up the Ethernet on The NanoPi Neo. > Ouch, you answer to a very old email (1 year!). The best way to check for support of your board is linux-sunxi.org Anyway, I will update this week my github branch dwmac-sun8i branch with a DT patch for your board. If it works, contact me directly. Regards Corentin Labbe
[PATCH 2/2] net-next: stmmac: remove struct mac_link
With the usage of adjust_link(), the struct mac_link is now useless.
This patch remove it.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/common.h | 7 ---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 3 ---
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c | 3 ---
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c| 3 ---
4 files changed, 16 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 451c231006fe..63350b70e10f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -551,12 +551,6 @@ struct stmmac_hwtimestamp {
extern const struct stmmac_hwtimestamp stmmac_ptp;
extern const struct stmmac_mode_ops dwmac4_ring_mode_ops;
-struct mac_link {
- int port;
- int duplex;
- int speed;
-};
-
struct mii_regs {
unsigned int addr; /* MII Address */
unsigned int data; /* MII Data */
@@ -587,7 +581,6 @@ struct mac_device_info {
const struct stmmac_mode_ops *mode;
const struct stmmac_hwtimestamp *ptp;
struct mii_regs mii;/* MII register Addresses */
- struct mac_link link;
void __iomem *pcsr; /* vpointer to device CSRs */
int multicast_filter_bins;
int unicast_filter_entries;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 5f3aace46c41..52092ec5f4af 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -585,9 +585,6 @@ struct mac_device_info *dwmac1000_setup(void __iomem
*ioaddr, int mcbins,
mac->mac = &dwmac1000_ops;
mac->dma = &dwmac1000_dma_ops;
- mac->link.port = GMAC_CONTROL_PS;
- mac->link.duplex = GMAC_CONTROL_DM;
- mac->link.speed = GMAC_CONTROL_FES;
mac->mii.addr = GMAC_MII_ADDR;
mac->mii.data = GMAC_MII_DATA;
mac->mii.addr_shift = 11;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
index ba3d46e65e1a..faddbf3c2916 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
@@ -221,9 +221,6 @@ struct mac_device_info *dwmac100_setup(void __iomem
*ioaddr, int *synopsys_id)
mac->mac = &dwmac100_ops;
mac->dma = &dwmac100_dma_ops;
- mac->link.port = MAC_CONTROL_PS;
- mac->link.duplex = MAC_CONTROL_F;
- mac->link.speed = 0;
mac->mii.addr = MAC_MII_ADDR;
mac->mii.data = MAC_MII_DATA;
mac->mii.addr_shift = 11;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 133b6bcd7b61..baf32c91122d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -801,9 +801,6 @@ struct mac_device_info *dwmac4_setup(void __iomem *ioaddr,
int mcbins,
if (mac->multicast_filter_bins)
mac->mcast_bits_log2 = ilog2(mac->multicast_filter_bins);
- mac->link.port = GMAC_CONFIG_PS;
- mac->link.duplex = GMAC_CONFIG_DM;
- mac->link.speed = GMAC_CONFIG_FES;
mac->mii.addr = GMAC_MDIO_ADDR;
mac->mii.data = GMAC_MDIO_DATA;
mac->mii.addr_shift = 21;
--
2.13.0
[PATCH 1/2] net-next: stmmac: add adjust_link function
My dwmac-sun8i serie will add some if (has_sun8i) to
stmmac_adjust_link()
Since the current stmmac_adjust_link() alreaady have lots of if
(has_gmac/gmac4),
It is now better to create an adjust_link() function for each dwmac.
So this patch add an adjust_link() function pointer, and move code out
of stmmac_adjust_link to it.
Removing in the process stmmac_mac_flow_ctrl/stmmac_hw_fix_mac_speed
since there not used anymore.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/common.h | 3 +
.../net/ethernet/stmicro/stmmac/dwmac1000_core.c | 54 ++
.../net/ethernet/stmicro/stmmac/dwmac100_core.c| 46
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 54 ++
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 83 +-
5 files changed, 158 insertions(+), 82 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h
b/drivers/net/ethernet/stmicro/stmmac/common.h
index b7ce3fbb5375..451c231006fe 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -469,11 +469,14 @@ struct stmmac_dma_ops {
};
struct mac_device_info;
+struct stmmac_priv;
/* Helpers to program the MAC core */
struct stmmac_ops {
/* MAC core initialization */
void (*core_init)(struct mac_device_info *hw, int mtu);
+ /* adjust link */
+ int (*adjust_link)(struct stmmac_priv *priv);
/* Enable the MAC RX/TX */
void (*set_mac)(void __iomem *ioaddr, bool enable);
/* Enable and verify that the IPC module is supported */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index f3d9305e5f70..5f3aace46c41 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include "stmmac.h"
#include "stmmac_pcs.h"
#include "dwmac1000.h"
@@ -75,6 +76,58 @@ static void dwmac1000_core_init(struct mac_device_info *hw,
int mtu)
#endif
}
+static int dwmac1000_adjust_link(struct stmmac_priv *priv)
+{
+ struct net_device *ndev = priv->dev;
+ struct phy_device *phydev = ndev->phydev;
+ int new_state = 0;
+ u32 tx_cnt = priv->plat->tx_queues_to_use;
+ u32 ctrl;
+
+ ctrl = readl(priv->ioaddr + GMAC_CONTROL);
+
+ if (phydev->duplex != priv->oldduplex) {
+ new_state = 1;
+ if (!(phydev->duplex))
+ ctrl &= ~GMAC_CONTROL_DM;
+ else
+ ctrl |= GMAC_CONTROL_DM;
+ priv->oldduplex = phydev->duplex;
+ }
+
+ if (phydev->pause)
+ priv->hw->mac->flow_ctrl(priv->hw, phydev->duplex,
priv->flow_ctrl,
+priv->pause, tx_cnt);
+
+ if (phydev->speed != priv->speed) {
+ new_state = 1;
+ switch (phydev->speed) {
+ case 1000:
+ ctrl &= ~GMAC_CONTROL_PS;
+ break;
+ case 100:
+ ctrl |= GMAC_CONTROL_PS;
+ ctrl |= GMAC_CONTROL_FES;
+ break;
+ case 10:
+ ctrl |= GMAC_CONTROL_PS;
+ ctrl |= ~GMAC_CONTROL_FES;
+ break;
+ default:
+ netif_warn(priv, link, priv->dev,
+ "broken speed: %d\n", phydev->speed);
+ phydev->speed = SPEED_UNKNOWN;
+ break;
+ }
+ if (phydev->speed != SPEED_UNKNOWN &&
likely(priv->plat->fix_mac_speed))
+ priv->plat->fix_mac_speed(priv->plat->bsp_priv,
phydev->speed);
+ priv->speed = phydev->speed;
+ }
+
+ writel(ctrl, priv->ioaddr + GMAC_CONTROL);
+ return new_state;
+}
+
static int dwmac1000_rx_ipc_enable(struct mac_device_info *hw)
{
void __iomem *ioaddr = hw->pcsr;
@@ -490,6 +543,7 @@ static void dwmac1000_debug(void __iomem *ioaddr, struct
stmmac_extra_stats *x,
static const struct stmmac_ops dwmac1000_ops = {
.core_init = dwmac1000_core_init,
+ .adjust_link = dwmac1000_adjust_link,
.set_mac = stmmac_set_mac,
.rx_ipc = dwmac1000_rx_ipc_enable,
.dump_regs = dwmac1000_dump_regs,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
index 1b3609105484..ba3d46e65e1a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
@@ -27,6 +27,7 @@
#include
#include
#include
Re: [PATCH 1/6] Documentation: crypto: document crypto engine API
On Wed, Jan 10, 2018 at 02:13:13PM +, Fabien DESSENNE wrote:
> Hi Corentin,
>
>
> Thank you for this new version which I have testes successfully with the
> stm32 hash & cryp drivers.
>
> As a general comment on this patchset, I would say that it does not
> cover all async requests: typically I need (for the pending stm32 cryp
> driver uprade) to use CryptoEngine to process AEAD requests which is not
> covered here.
>
> Could you please consider adding the 'transfer' and 'finalize' EXPORTed
> functions for aead requests? (the implementation is quite trivial)
>
> Have also a look at struct acomp_req (acompress.h) and struct
> kpp_request (kpp.h) which also use "struct crypto_async_request base"
>
>
> BR
>
> Fabien
>
Hello
Thanks for your review and test (could I add your tested-by ?).
I didn't add aead (and kpp/acompress), since I do not have any way to test it.
Since you have a way to test aead, I will add it to the next release.
Regards
>
> On 03/01/18 21:11, Corentin Labbe wrote:
> > Signed-off-by: Corentin Labbe
> > ---
> > Documentation/crypto/crypto_engine.rst | 46
> > ++
> > 1 file changed, 46 insertions(+)
> > create mode 100644 Documentation/crypto/crypto_engine.rst
> >
> > diff --git a/Documentation/crypto/crypto_engine.rst
> > b/Documentation/crypto/crypto_engine.rst
> > new file mode 100644
> > index ..b0ed37f9fb0c
> > --- /dev/null
> > +++ b/Documentation/crypto/crypto_engine.rst
> > @@ -0,0 +1,46 @@
> > +=
> > +CRYPTO ENGINE
> > +=
> > +
> > +Overview
> > +
> > +The crypto engine API (CE), is a crypto queue manager.
> > +
> > +Requirement
> > +---
> > +You have to put at start of your tfm_ctx the struct crypto_engine_reqctx
> > +struct your_tfm_ctx {
> > +struct crypto_engine_reqctx enginectx;
> > +...
> > +};
> > +Why: Since CE manage only crypto_async_request, it cannot know the
> > underlying
> > +request_type and so have access only on the TFM.
> > +So using container_of for accessing __ctx is impossible.
> > +Furthermore, the crypto engine cannot know the "struct your_tfm_ctx",
> > +so it must assume that crypto_engine_reqctx is at start of it.
> > +
> > +Order of operations
> > +---
> > +You have to obtain a struct crypto_engine via crypto_engine_alloc_init().
> > +And start it via crypto_engine_start().
> > +
> > +Before transferring any request, you have to fill the enginectx.
> > +- prepare_request: (taking a function pointer) If you need to do some
> > processing before doing the request
> > +- unprepare_request: (taking a function pointer) Undoing what's done in
> > prepare_request
> > +- do_one_request: (taking a function pointer) Do encryption for current
> > request
> > +
> > +Note: that those three functions get the crypto_async_request associated
> > with the received request.
> > +So your need to get the original request via container_of(areq, struct
> > yourrequesttype_request, base);
> > +
> > +When your driver receive a crypto_request, you have to transfer it to
> > +the cryptoengine via one of:
> > +- crypto_transfer_cipher_request_to_engine()
> > +- crypto_transfer_skcipher_request_to_engine()
> > +- crypto_transfer_akcipher_request_to_engine()
> > +- crypto_transfer_hash_request_to_engine()
> > +
> > +At the end of the request process, a call to one of the following function
> > is needed:
> > +- crypto_finalize_cipher_request
> > +- crypto_finalize_skcipher_request
> > +- crypto_finalize_akcipher_request
> > +- crypto_finalize_hash_request
Re: [PATCH 3/7] crypto: ccree: add ablkcipher support
On Thu, Jan 11, 2018 at 09:17:10AM +, Gilad Ben-Yossef wrote:
> Add CryptoCell ablkcipher support
>
Hello
I have some minor comments:
ablkcipher is deprecated, so you need to use skcipher instead.
> Signed-off-by: Gilad Ben-Yossef
> ---
> drivers/crypto/ccree/Makefile|2 +-
> drivers/crypto/ccree/cc_buffer_mgr.c | 125
> drivers/crypto/ccree/cc_buffer_mgr.h | 10 +
> drivers/crypto/ccree/cc_cipher.c | 1167
> ++
> drivers/crypto/ccree/cc_cipher.h | 74 +++
> drivers/crypto/ccree/cc_driver.c | 11 +
> drivers/crypto/ccree/cc_driver.h |2 +
> 7 files changed, 1390 insertions(+), 1 deletion(-)
> create mode 100644 drivers/crypto/ccree/cc_cipher.c
> create mode 100644 drivers/crypto/ccree/cc_cipher.h
>
[...]
> +
> +struct tdes_keys {
> + u8 key1[DES_KEY_SIZE];
> + u8 key2[DES_KEY_SIZE];
> + u8 key3[DES_KEY_SIZE];
> +};
> +
> +static const u8 zero_buff[] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
> + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
> + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
> + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
> +
This constant is used nowhere.
> +/* The function verifies that tdes keys are not weak.*/
> +static int cc_verify_3des_keys(const u8 *key, unsigned int keylen)
> +{
> + struct tdes_keys *tdes_key = (struct tdes_keys *)key;
> +
> + /* verify key1 != key2 and key3 != key2*/
> + if ((memcmp((u8 *)tdes_key->key1, (u8 *)tdes_key->key2,
> + sizeof(tdes_key->key1)) == 0) ||
> + (memcmp((u8 *)tdes_key->key3, (u8 *)tdes_key->key2,
> + sizeof(tdes_key->key3)) == 0)) {
> + return -ENOEXEC;
> + }
> +
> + return 0;
> +}
All driver testing 3des key also use des_ekey()
[...]
> +static void cc_cipher_complete(struct device *dev, void *cc_req, int err)
> +{
> + struct ablkcipher_request *areq = (struct ablkcipher_request *)cc_req;
> + struct scatterlist *dst = areq->dst;
> + struct scatterlist *src = areq->src;
> + struct blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(areq);
> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(areq);
> + unsigned int ivsize = crypto_ablkcipher_ivsize(tfm);
> + struct ablkcipher_request *req = (struct ablkcipher_request *)areq;
> +
> + cc_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
> + kfree(req_ctx->iv);
kzfree for all stuff with IV/key
[...]
> +
> +#ifdef CRYPTO_TFM_REQ_HW_KEY
> +
> +static inline bool cc_is_hw_key(struct crypto_tfm *tfm)
> +{
> + return (crypto_tfm_get_flags(tfm) & CRYPTO_TFM_REQ_HW_KEY);
> +}
> +
> +#else
> +
> +struct arm_hw_key_info {
> + int hw_key1;
> + int hw_key2;
> +};
> +
> +static inline bool cc_is_hw_key(struct crypto_tfm *tfm)
> +{
> + return false;
> +}
> +
> +#endif /* CRYPTO_TFM_REQ_HW_KEY */
I see nowhere any use/documentation of CRYPTO_TFM_REQ_HW_KEY, so a cleaning
could be done
Regards
[PATCH 0/2] crypto: Implement generic crypto statistics
te: 0 bytes: 0 lzo-scomp Compress Compress: 2 bytes: 229 Decompress: 4 bytes: 367 lzo-generic Compress Compress: 0 bytes: 0 Decompress: 0 bytes: 0 crc32c-generic Hash: 176 bytes: 31652 zlib-deflate-scomp Compress Compress: 2 bytes: 261 Decompress: 4 bytes: 345 deflate-scomp Compress Compress: 2 bytes: 261 Decompress: 4 bytes: 320 deflate-generic Compress Compress: 0 bytes: 0 Decompress: 0 bytes: 0 poly1305-generic Hash: 66 bytes: 9294 chacha20-genericCipher Encrypt: 16 bytes: 8853 Decrypt: 16 bytes: 8853 ecb(arc4)-generic Cipher Encrypt: 42 bytes: 540 Decrypt: 42 bytes: 540 arc4-genericcipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 aes-generic cipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 des3_ede-genericcipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 des-generic cipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 sha384-generic Hash: 48 bytes: 10072 sha512-generic Hash: 48 bytes: 10072 sha224-generic Hash: 40 bytes: 9056 sha256-generic Hash: 40 bytes: 9056 sha1-generic Hash: 48 bytes: 9728 md5-generic Hash: 56 bytes: 1436 md4-generic Hash: 56 bytes: 1436 digest_null-generic Hash: 0 bytes: 0 compress_null-generic Compress Compress: 0 bytes: 0 Decompress: 0 bytes: 0 ecb-cipher_null Cipher Encrypt: 130 bytes: 2828 Decrypt: 24 bytes: 732 cipher_null-generic cipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 rsa-generic Akcipher Encrypt: 7 bytes: 232 Decrypt: 6 bytes: 1152 Sign: 0 Verify: 13 dh-generic KPP Setsecret: 2 Generate public key: 2 Compute_shared_secret: 2 ctr-des3_ede-asmCipher Encrypt: 20 bytes: 9950 Decrypt: 20 bytes: 9950 cbc-des3_ede-asmCipher Encrypt: 46 bytes: 9568 Decrypt: 16 bytes: 5728 ecb-des3_ede-asmCipher Encrypt: 28 bytes: 5104 Decrypt: 28 bytes: 5104 des3_ede-asmcipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 aes-asm cipher Encrypt: 0 bytes: 0 Decrypt: 0 bytes: 0 Futur possible additions: - Add a "number of needed fallback" statistics. - maximum request size Regards Changes since RFC: - Use cryptouser(netlink) instead of /sys - Use atomic_t instead of unsigned long - moved stat code into dedicated inline function - spelling fixes Corentin Labbe (2): crypto: Implement a generic crypto statistics crypto: tools: Add cryptostat userspace crypto/Kconfig | 11 ++ crypto/ablkcipher.c | 9 ++ crypto/acompress.c | 9 ++ crypto/aead.c | 10 ++ crypto/ahash.c | 8 ++ crypto/akcipher.c | 13 ++ crypto/algapi.c | 6 + crypto/blkcipher.c | 9 ++ crypto/crypto_user.c| 28 crypto/kpp.c| 7 + crypto/rng.c| 8 ++ crypto/scompress.c | 9 ++ crypto/shash.c | 5 + crypto/skcipher.c | 9 ++ include/crypto/acompress.h | 22 include/crypto/aead.h | 10 ++ include/crypto/akcipher.h | 42 ++ include/crypto/hash.h | 10 ++ include/crypto/kpp.h| 28 include/crypto/rng.h| 17 +++ include/crypto/skcipher.h | 22 include/linux/crypto.h | 56 include/uapi/linux/cryptouser.h | 34 + tools/crypto/getstat.c | 279 24 files changed, 661 insertions(+) create mode 100644 tools/crypto/getstat.c -- 2.13.6
[PATCH 2/2] crypto: tools: Add cryptostat userspace
Signed-off-by: Corentin Labbe
---
tools/crypto/getstat.c | 283 +
1 file changed, 283 insertions(+)
create mode 100644 tools/crypto/getstat.c
diff --git a/tools/crypto/getstat.c b/tools/crypto/getstat.c
new file mode 100644
index ..e73f2a73e0f6
--- /dev/null
+++ b/tools/crypto/getstat.c
@@ -0,0 +1,283 @@
+/* Heavily copied from libkcapi 2015 - 2017, Stephan Mueller
*/
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define CR_RTA(x) ((struct rtattr *)(((char *)(x)) +
NLMSG_ALIGN(sizeof(struct crypto_user_alg
+
+static int get_stat(const char *drivername)
+{
+ struct {
+ struct nlmsghdr n;
+ struct crypto_user_alg cru;
+ } req;
+ struct sockaddr_nl nl;
+ int sd = 0, ret;
+ socklen_t addr_len;
+ struct iovec iov;
+ struct msghdr msg;
+ char buf[4096];
+ struct nlmsghdr *res_n = (struct nlmsghdr *)buf;
+ struct crypto_user_alg *cru_res = NULL;
+ int res_len = 0;
+ struct rtattr *tb[CRYPTOCFGA_MAX + 1];
+ struct rtattr *rta;
+
+ memset(&req, 0, sizeof(req));
+ memset(&buf, 0, sizeof(buf));
+ memset(&msg, 0, sizeof(msg));
+
+ req.n.nlmsg_len = NLMSG_LENGTH(sizeof(req.cru));
+ req.n.nlmsg_flags = NLM_F_REQUEST;
+ req.n.nlmsg_type = CRYPTO_MSG_GETALG;
+ req.n.nlmsg_seq = time(NULL);
+
+ strncpy(req.cru.cru_driver_name, drivername, strlen(drivername));
+
+ sd = socket(AF_NETLINK, SOCK_RAW, NETLINK_CRYPTO);
+ if (sd < 0) {
+ fprintf(stderr, "Netlink error: cannot open netlink socket");
+ return -errno;
+ }
+ memset(&nl, 0, sizeof(nl));
+ nl.nl_family = AF_NETLINK;
+ if (bind(sd, (struct sockaddr *)&nl, sizeof(nl)) < 0) {
+ ret = -errno;
+ fprintf(stderr, "Netlink error: cannot bind netlink socket");
+ goto out;
+ }
+
+ /* sanity check that netlink socket was successfully opened */
+ addr_len = sizeof(nl);
+ if (getsockname(sd, (struct sockaddr *)&nl, &addr_len) < 0) {
+ ret = -errno;
+ printf("Netlink error: cannot getsockname");
+ goto out;
+ }
+ if (addr_len != sizeof(nl)) {
+ ret = -errno;
+ printf("Netlink error: wrong address length %d", addr_len);
+ goto out;
+ }
+ if (nl.nl_family != AF_NETLINK) {
+ ret = -errno;
+ printf("Netlink error: wrong address family %d",
+ nl.nl_family);
+ goto out;
+ }
+
+ memset(&nl, 0, sizeof(nl));
+ nl.nl_family = AF_NETLINK;
+ iov.iov_base = (void *)&req.n;
+ iov.iov_len = req.n.nlmsg_len;
+ msg.msg_name = &nl;
+ msg.msg_namelen = sizeof(nl);
+ msg.msg_iov = &iov;
+ msg.msg_iovlen = 1;
+ if (sendmsg(sd, &msg, 0) < 0) {
+ ret = -errno;
+ printf("Netlink error: sendmsg failed");
+ goto out;
+ }
+ memset(buf, 0, sizeof(buf));
+ iov.iov_base = buf;
+ while (1) {
+ iov.iov_len = sizeof(buf);
+ ret = recvmsg(sd, &msg, 0);
+ if (ret < 0) {
+ if (errno == EINTR || errno == EAGAIN)
+ continue;
+ ret = -errno;
+ printf("Netlink error: netlink receive error");
+ goto out;
+ }
+ if (ret == 0) {
+ ret = -errno;
+ printf("Netlink error: no data");
+ goto out;
+ }
+ if (ret > sizeof(buf)) {
+ ret = -errno;
+ printf("Netlink error: received too much data");
+ goto out;
+ }
+ break;
+ }
+
+ ret = -EFAULT;
+ res_len = res_n->nlmsg_len;
+ if (res_n->nlmsg_type == NLMSG_ERROR) {
+ /*
+* return -EAGAIN -- this error will occur if we received a
+* driver name, but used it for a generic name. Allow caller
+* to invoke function again where driver name is looked up
+*/
+ ret = -EAGAIN;
+ goto out;
+ }
+
+ if (res_n->nlmsg_type == CRYPTO_MSG_GETALG) {
+ cru_res = NLMSG_DATA(res_n);
+ res_len -= NLMSG_SPACE(sizeof(*cru_res));
+ }
+ if (res_len < 0) {
+ printf("Netlink error: nlmsg len %d\n", res_len);
+ goto out;
+
[PATCH 1/2] crypto: Implement a generic crypto statistics
This patch implement a generic way to get statistics about all crypto
usages.
Signed-off-by: Corentin Labbe
---
crypto/Kconfig | 11
crypto/ablkcipher.c | 9 +++
crypto/acompress.c | 9 +++
crypto/aead.c | 10
crypto/ahash.c | 8 ++
crypto/akcipher.c | 13 ++
crypto/algapi.c | 6 +
crypto/blkcipher.c | 9 +++
crypto/crypto_user.c| 28 +
crypto/kpp.c| 7 ++
crypto/rng.c| 8 ++
crypto/scompress.c | 9 +++
crypto/shash.c | 5
crypto/skcipher.c | 9 +++
include/crypto/acompress.h | 22
include/crypto/aead.h | 22
include/crypto/akcipher.h | 42 +++
include/crypto/hash.h | 21
include/crypto/kpp.h| 28 +
include/crypto/rng.h| 17 +
include/crypto/skcipher.h | 22
include/linux/crypto.h | 56 +
include/uapi/linux/cryptouser.h | 34 +
23 files changed, 405 insertions(+)
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 971d558494c3..3b88fba14b59 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -1780,6 +1780,17 @@ config CRYPTO_USER_API_AEAD
This option enables the user-spaces interface for AEAD
cipher algorithms.
+config CRYPTO_STATS
+ bool "Crypto usage statistics for User-space"
+ help
+ This option enables the gathering of crypto stats.
+ This will collect:
+ - encrypt/decrypt size and numbers of symmeric operations
+ - compress/decompress size and numbers of compress operations
+ - size and numbers of hash operations
+ - encrypt/decrypt/sign/verify numbers for asymmetric operations
+ - generate/seed numbers for rng operations
+
config CRYPTO_HASH_INFO
bool
diff --git a/crypto/ablkcipher.c b/crypto/ablkcipher.c
index d880a4897159..f6d20e4ca977 100644
--- a/crypto/ablkcipher.c
+++ b/crypto/ablkcipher.c
@@ -369,6 +369,7 @@ static int crypto_init_ablkcipher_ops(struct crypto_tfm
*tfm, u32 type,
static int crypto_ablkcipher_report(struct sk_buff *skb, struct crypto_alg
*alg)
{
struct crypto_report_blkcipher rblkcipher;
+ u64 v;
strncpy(rblkcipher.type, "ablkcipher", sizeof(rblkcipher.type));
strncpy(rblkcipher.geniv, alg->cra_ablkcipher.geniv ?: "",
@@ -378,6 +379,14 @@ static int crypto_ablkcipher_report(struct sk_buff *skb,
struct crypto_alg *alg)
rblkcipher.min_keysize = alg->cra_ablkcipher.min_keysize;
rblkcipher.max_keysize = alg->cra_ablkcipher.max_keysize;
rblkcipher.ivsize = alg->cra_ablkcipher.ivsize;
+ v = atomic_read(&alg->encrypt_cnt);
+ rblkcipher.stat_encrypt_cnt = v;
+ v = atomic_read(&alg->encrypt_tlen);
+ rblkcipher.stat_encrypt_tlen = v;
+ v = atomic_read(&alg->decrypt_cnt);
+ rblkcipher.stat_decrypt_cnt = v;
+ v = atomic_read(&alg->decrypt_tlen);
+ rblkcipher.stat_decrypt_tlen = v;
if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,
sizeof(struct crypto_report_blkcipher), &rblkcipher))
diff --git a/crypto/acompress.c b/crypto/acompress.c
index 1544b7c057fb..524c8a3e3f80 100644
--- a/crypto/acompress.c
+++ b/crypto/acompress.c
@@ -32,8 +32,17 @@ static const struct crypto_type crypto_acomp_type;
static int crypto_acomp_report(struct sk_buff *skb, struct crypto_alg *alg)
{
struct crypto_report_acomp racomp;
+ u64 v;
strncpy(racomp.type, "acomp", sizeof(racomp.type));
+ v = atomic_read(&alg->compress_cnt);
+ racomp.stat_compress_cnt = v;
+ v = atomic_read(&alg->compress_tlen);
+ racomp.stat_compress_tlen = v;
+ v = atomic_read(&alg->decompress_cnt);
+ racomp.stat_decompress_cnt = v;
+ v = atomic_read(&alg->decompress_tlen);
+ racomp.stat_decompress_tlen = v;
if (nla_put(skb, CRYPTOCFGA_REPORT_ACOMP,
sizeof(struct crypto_report_acomp), &racomp))
diff --git a/crypto/aead.c b/crypto/aead.c
index fe00cbd7243d..de13bd345d8b 100644
--- a/crypto/aead.c
+++ b/crypto/aead.c
@@ -109,6 +109,7 @@ static int crypto_aead_report(struct sk_buff *skb, struct
crypto_alg *alg)
{
struct crypto_report_aead raead;
struct aead_alg *aead = container_of(alg, struct aead_alg, base);
+ u64 v;
strncpy(raead.type, "aead", sizeof(raead.type));
strncpy(raead.geniv, "", sizeof(raead.geniv));
@@ -116,6 +117,15 @@ static int crypto_aead_report(s
