On Fri, Jul 28, 2017 at 05:01:19PM +0200, Corentin Labbe wrote:
> On Fri, Jul 28, 2017 at 09:52:57PM +0800, Herbert Xu wrote:
> > On Fri, Jul 14, 2017 at 01:15:36PM +0200, Corentin Labbe wrote:
> > > On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> > > >
On Thu, Aug 03, 2017 at 07:06:33PM +0800, Chen-Yu Tsai wrote:
> On Thu, Aug 3, 2017 at 1:38 AM, Florian Fainelli wrote:
> > On 08/01/2017 11:21 PM, David Wu wrote:
> >> To make internal phy work, need to configure the phy_clock,
> >> phy cru_reset and related registers.
> >>
On Thu, Aug 03, 2017 at 07:06:33PM +0800, Chen-Yu Tsai wrote:
> On Thu, Aug 3, 2017 at 1:38 AM, Florian Fainelli wrote:
> > On 08/01/2017 11:21 PM, David Wu wrote:
> >> To make internal phy work, need to configure the phy_clock,
> >> phy cru_reset and related registers.
> >>
> >> Signed-off-by:
Since sun8i regroup lots of SoCs, it is helpful to list them in the help
section of Kconfig.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/mach-sunxi/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/K
Since sun8i regroup lots of SoCs, it is helpful to list them in the help
section of Kconfig.
Signed-off-by: Corentin Labbe
---
arch/arm/mach-sunxi/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 58153cdf025b
+module_phy_driver(rockchip_phy_driver);
> +
> +static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {
> + { 0x1234d400, 0xfff0 },
Same comment for phy_id, use a define
Regards
Corentin Labbe
+module_phy_driver(rockchip_phy_driver);
> +
> +static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {
> + { 0x1234d400, 0xfff0 },
Same comment for phy_id, use a define
Regards
Corentin Labbe
On Mon, Jul 31, 2017 at 08:19:40PM +0800, Chen-Yu Tsai wrote:
> On Sat, Jul 29, 2017 at 2:48 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
> >> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
On Mon, Jul 31, 2017 at 08:19:40PM +0800, Chen-Yu Tsai wrote:
> On Sat, Jul 29, 2017 at 2:48 PM, Corentin Labbe
> wrote:
> > On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
> >> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
> >> > On Fri, Jul 28,
On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
> > On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> >>>> I've probably asked this before: Does the internal PHY use a different
> >&
On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
> > On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> >>>> I've probably asked this before: Does the internal PHY use a different
> >&
On Fri, Jul 28, 2017 at 09:52:57PM +0800, Herbert Xu wrote:
> On Fri, Jul 14, 2017 at 01:15:36PM +0200, Corentin Labbe wrote:
> > On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> > > On Mon, Jun 19, 2017 at 09:55:24AM +0200, Corentin Labbe wrote:
> > > &g
On Fri, Jul 28, 2017 at 09:52:57PM +0800, Herbert Xu wrote:
> On Fri, Jul 14, 2017 at 01:15:36PM +0200, Corentin Labbe wrote:
> > On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> > > On Mon, Jun 19, 2017 at 09:55:24AM +0200, Corentin Labbe wrote:
> > > &g
On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> > > I've probably asked this before: Does the internal PHY use a different
> > > PHY ID in registers 2 and 3?
> > >
> >
> > yes
> >
> > reg2: 0x0044
> > reg3: 0X1500
Copy/paste error, its 1400
>
> So this is not about loading the
On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> > > I've probably asked this before: Does the internal PHY use a different
> > > PHY ID in registers 2 and 3?
> > >
> >
> > yes
> >
> > reg2: 0x0044
> > reg3: 0X1500
Copy/paste error, its 1400
>
> So this is not about loading the
On Fri, Jul 28, 2017 at 03:55:44PM +0200, Andrew Lunn wrote:
> On Fri, Jul 28, 2017 at 11:28:15AM +0200, Corentin Labbe wrote:
> > Hello
> >
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it
On Fri, Jul 28, 2017 at 03:55:44PM +0200, Andrew Lunn wrote:
> On Fri, Jul 28, 2017 at 11:28:15AM +0200, Corentin Labbe wrote:
> > Hello
> >
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it
On Fri, Jul 28, 2017 at 05:49:55PM +0800, Chen-Yu Tsai wrote:
> On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> >
On Fri, Jul 28, 2017 at 05:49:55PM +0800, Chen-Yu Tsai wrote:
> On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> wrote:
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it will negate a possible futu
compatible.
Corentin Labbe (3):
dt-bindings: net: add compatible for internal sun8i-h3/sun8i-v3s PHYs
ARM: sunxi: h3/h5: Add sun8i-h3-ephy compatible
net-next: stmmac: dwmac-sun8i: choose internal PHY via compatible
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
arch/arm/boot
compatible.
Corentin Labbe (3):
dt-bindings: net: add compatible for internal sun8i-h3/sun8i-v3s PHYs
ARM: sunxi: h3/h5: Add sun8i-h3-ephy compatible
net-next: stmmac: dwmac-sun8i: choose internal PHY via compatible
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
arch/arm/boot
This patch adds the sun8i-h3-ephy compatible to the internal PHY.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts
The internal PHYs for H3 ans V3S now need to have their own compatible.
This patch rename them in the binding documentation.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
1 file changed, 2 insertions(+), 2 del
This patch adds the sun8i-h3-ephy compatible to the internal PHY.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index
The internal PHYs for H3 ans V3S now need to have their own compatible.
This patch rename them in the binding documentation.
Signed-off-by: Corentin Labbe
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
the phy_mode of the internal PHY does need to be know, the
variant internal_phy member is converted to a boolean.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 ++--
1 file changed, 10 insertions(+), 6 del
the phy_mode of the internal PHY does need to be know, the
variant internal_phy member is converted to a boolean.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/net
When booting a qemu virtual machine I got in dmesg the following message
alone: "work still pending".
Without prefix, it is hard to know which subsystem got work pending.
This patch add a "floppy:" prefix to this message.
Signed-off-by: Corentin Labbe <clabbe.montj...@
When booting a qemu virtual machine I got in dmesg the following message
alone: "work still pending".
Without prefix, it is hard to know which subsystem got work pending.
This patch add a "floppy:" prefix to this message.
Signed-off-by: Corentin Labbe
---
drivers/block/flo
an have a new phy-mode value, e.g: "internal-rmii"
> which describes that, either way would probably be fine, but the former
> scales better
>
Hello
We have the same problem on Allwinner SoCs for dwmac-sun8i, we need to set a
syscon for chossing between internal/external PHY.
Having this phy-is-internal would be very helpfull. (adding internal-xmii will
add too many flags in our case)
Thanks
Regards
Corentin Labbe
e, e.g: "internal-rmii"
> which describes that, either way would probably be fine, but the former
> scales better
>
Hello
We have the same problem on Allwinner SoCs for dwmac-sun8i, we need to set a
syscon for chossing between internal/external PHY.
Having this phy-is-internal would be very helpfull. (adding internal-xmii will
add too many flags in our case)
Thanks
Regards
Corentin Labbe
On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> On Mon, Jun 19, 2017 at 09:55:24AM +0200, Corentin Labbe wrote:
> >
> > Since there are two different user of "crypto engine + ablkcipher", it will
> > be not easy to convert them in one serie. (I could
On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> On Mon, Jun 19, 2017 at 09:55:24AM +0200, Corentin Labbe wrote:
> >
> > Since there are two different user of "crypto engine + ablkcipher", it will
> > be not easy to convert them in one serie. (I could
mode")
Fixes: 1c2fa5f84683 ("net: stmmac: support future possible different internal
phy mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
mode")
Fixes: 1c2fa5f84683 ("net: stmmac: support future possible different internal
phy mode")
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/
The datasheet said that emac register size is 0x1 not 0x100
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
The datasheet said that emac register size is 0x1 not 0x100
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner
On Thu, Jul 06, 2017 at 08:52:05PM +0200, Maxime Ripard wrote:
> On Thu, Jul 06, 2017 at 10:53:34AM +0200, Corentin Labbe wrote:
> > The datasheet said that emac register size is 0x1000 not 0x104
> >
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
>
On Thu, Jul 06, 2017 at 08:52:05PM +0200, Maxime Ripard wrote:
> On Thu, Jul 06, 2017 at 10:53:34AM +0200, Corentin Labbe wrote:
> > The datasheet said that emac register size is 0x1000 not 0x104
> >
> > Signed-off-by: Corentin Labbe
> > ---
> > arch/arm/boot/d
The datasheet said that emac register size is 0x1000 not 0x104
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi
The datasheet said that emac register size is 0x1000 not 0x104
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 716e7d668dec
On Sun, Jul 02, 2017 at 02:31:59PM +0200, Corentin Labbe wrote:
> Since internal phy-mode is reserved for non-xMII protocol we cannot use
> it with dwmac-sun8i
> This reverts commit 1c2fa5f84683 ("net: stmmac: support future possible
> different internal phy mode")
>
On Sun, Jul 02, 2017 at 02:31:59PM +0200, Corentin Labbe wrote:
> Since internal phy-mode is reserved for non-xMII protocol we cannot use
> it with dwmac-sun8i
> This reverts commit 1c2fa5f84683 ("net: stmmac: support future possible
> different internal phy mode")
>
The Security System has a PRNG, this patch adds support for it via
crypto_rng.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
Change since v4
- Fixed some spelling issue in Kconfig and patch description
Changes since v3 (note: the v3 miss changes and version tag sorry)
- Re
The Security System has a PRNG, this patch adds support for it via
crypto_rng.
Signed-off-by: Corentin Labbe
---
Change since v4
- Fixed some spelling issue in Kconfig and patch description
Changes since v3 (note: the v3 miss changes and version tag sorry)
- Replaced all len values with bits
On Mon, Jun 26, 2017 at 02:36:43PM +0200, Frans Klaver wrote:
> Hi,
>
> On Mon, Jun 26, 2017 at 2:20 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > The Security System have a PRNG, this patch add support for it via
> > crypto_rng.
>
> s,have,has,
On Mon, Jun 26, 2017 at 02:36:43PM +0200, Frans Klaver wrote:
> Hi,
>
> On Mon, Jun 26, 2017 at 2:20 PM, Corentin Labbe
> wrote:
> > The Security System have a PRNG, this patch add support for it via
> > crypto_rng.
>
> s,have,has,
> s,add,adds,
>
&
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 4ac57180eab2 ("arm: sun8i: orangepi-one: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-o
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 5a79b4f2a5e7 ("arm: sun8i: orangepi-2: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dt
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 4ac57180eab2 ("arm: sun8i: orangepi-one: use internal
phy-mode")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
1 file changed, 1
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 5a79b4f2a5e7 ("arm: sun8i: orangepi-2: use internal
phy-mode")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 +-
1 file changed, 1 inser
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 3432a86e641c ("arm: sun8i: orangepipc: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dt
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 3432a86e641c ("arm: sun8i: orangepipc: use internal
phy-mode")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 2 +-
1 file changed, 1 inser
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 1c2fa5f84683 ("net: stmmac: support future possible
different internal phy mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/etherne
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 6066de6848d4 ("arm: sun8i: orangepi-zero: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h2-plus-orang
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 1c2fa5f84683 ("net: stmmac: support future possible
different internal phy mode")
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-su
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 6066de6848d4 ("arm: sun8i: orangepi-zero: use internal
phy-mode")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 +-
1 file
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit bdcc005beac9 ("arm: sun8i: nanopi-neo: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dt
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit bdcc005beac9 ("arm: sun8i: nanopi-neo: use internal
phy-mode")
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 2 +-
1 file changed, 1 inser
l phy-mode
is reserved for non-xMII protocol we cannot use it with dwmac-sun8i
I will send an additionnal patch for documenting more phy-mode = "internal"
Corentin Labbe (6):
arm: sun8i: nanopi-neo: revert use internal phy-mode
arm: sun8i: orangepi-2: revert "use internal phy-mod
l phy-mode
is reserved for non-xMII protocol we cannot use it with dwmac-sun8i
I will send an additionnal patch for documenting more phy-mode = "internal"
Corentin Labbe (6):
arm: sun8i: nanopi-neo: revert use internal phy-mode
arm: sun8i: orangepi-2: revert "use internal phy-mod
On Sat, Jul 01, 2017 at 02:42:14PM -0700, Florian Fainelli wrote:
> On 30/06/2017 23:53, Corentin Labbe wrote:
> > On Tue, Jun 27, 2017 at 10:37:34AM -0700, Florian Fainelli wrote:
> >> On 06/27/2017 10:29 AM, Maxime Ripard wrote:
> >>> On Tue, Jun 27, 2017 at 02
On Sat, Jul 01, 2017 at 02:42:14PM -0700, Florian Fainelli wrote:
> On 30/06/2017 23:53, Corentin Labbe wrote:
> > On Tue, Jun 27, 2017 at 10:37:34AM -0700, Florian Fainelli wrote:
> >> On 06/27/2017 10:29 AM, Maxime Ripard wrote:
> >>> On Tue, Jun 27, 2017 at 02
On Tue, Jun 27, 2017 at 10:37:34AM -0700, Florian Fainelli wrote:
> On 06/27/2017 10:29 AM, Maxime Ripard wrote:
> > On Tue, Jun 27, 2017 at 02:37:48PM +0200, Corentin Labbe wrote:
> >> On Tue, Jun 27, 2017 at 11:33:56AM +0100, Andre Przywara wrote:
> >>> Hi,
> >
On Tue, Jun 27, 2017 at 10:37:34AM -0700, Florian Fainelli wrote:
> On 06/27/2017 10:29 AM, Maxime Ripard wrote:
> > On Tue, Jun 27, 2017 at 02:37:48PM +0200, Corentin Labbe wrote:
> >> On Tue, Jun 27, 2017 at 11:33:56AM +0100, Andre Przywara wrote:
> >>> Hi,
> >
On Thu, Jun 29, 2017 at 11:26:40AM +0300, Fathi Boudra wrote:
> On 4 April 2017 at 16:32, Corentin Labbe <clabbe.montj...@gmail.com> wrote:
> > This patch add a generic testsuite for testing ethernet network device
> > driver.
> >
> > Signed-off-by: Corentin
On Thu, Jun 29, 2017 at 11:26:40AM +0300, Fathi Boudra wrote:
> On 4 April 2017 at 16:32, Corentin Labbe wrote:
> > This patch add a generic testsuite for testing ethernet network device
> > driver.
> >
> > Signed-off-by: Corentin Labbe
> > ---
> >
> &
On Thu, Jun 29, 2017 at 12:23:49PM -0400, David Miller wrote:
> From: Corentin Labbe <clabbe.montj...@gmail.com>
> Date: Tue, 27 Jun 2017 11:28:01 +0200
>
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_
On Thu, Jun 29, 2017 at 12:23:49PM -0400, David Miller wrote:
> From: Corentin Labbe
> Date: Tue, 27 Jun 2017 11:28:01 +0200
>
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it will negate
On Tue, Jun 27, 2017 at 07:29:37PM +0200, Maxime Ripard wrote:
> On Tue, Jun 27, 2017 at 02:37:48PM +0200, Corentin Labbe wrote:
> > On Tue, Jun 27, 2017 at 11:33:56AM +0100, Andre Przywara wrote:
> > > Hi,
> > >
> > > On 27/06/17 11:23, Icenowy Zheng wrote:
&g
On Tue, Jun 27, 2017 at 07:29:37PM +0200, Maxime Ripard wrote:
> On Tue, Jun 27, 2017 at 02:37:48PM +0200, Corentin Labbe wrote:
> > On Tue, Jun 27, 2017 at 11:33:56AM +0100, Andre Przywara wrote:
> > > Hi,
> > >
> > > On 27/06/17 11:23, Icenowy Zheng wrote:
&g
On 27/06/17 10:41, Maxime Ripard wrote:
> >>> On Tue, Jun 27, 2017 at 10:02:45AM +0100, Andre Przywara wrote:
> >>>> Hi,
> >>>>
> >>>> (CC:ing some people from that Rockchip dmwac series)
> >>>>
> >>>> On 27/06
Ripard wrote:
> >>> On Tue, Jun 27, 2017 at 10:02:45AM +0100, Andre Przywara wrote:
> >>>> Hi,
> >>>>
> >>>> (CC:ing some people from that Rockchip dmwac series)
> >>>>
> >>>> On 27/06/17 09:21, Corentin Labbe wr
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/ar
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/ar
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/ar
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-ze
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
b/ar
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
b/arch/arm/boot/dts/sun8i
Since the PHY used is internal, simply set phy-mode as internal.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi
same mode than the internal one.
Reported-by: André Przywara <andre.przyw...@arm.com>
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/driver
same mode than the internal one.
Reported-by: André Przywara
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethern
On Tue, Jun 27, 2017 at 04:11:21PM +0800, Chen-Yu Tsai wrote:
> On Tue, Jun 27, 2017 at 4:05 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > On Mon, Jun 26, 2017 at 01:18:23AM +0100, André Przywara wrote:
> >> On 31/05/17 08:18, Corentin Labbe wrote:
> &
On Tue, Jun 27, 2017 at 04:11:21PM +0800, Chen-Yu Tsai wrote:
> On Tue, Jun 27, 2017 at 4:05 PM, Corentin Labbe
> wrote:
> > On Mon, Jun 26, 2017 at 01:18:23AM +0100, André Przywara wrote:
> >> On 31/05/17 08:18, Corentin Labbe wrote:
> >> > The dwmac-sun8i is
On Mon, Jun 26, 2017 at 01:18:23AM +0100, André Przywara wrote:
> On 31/05/17 08:18, Corentin Labbe wrote:
> > The dwmac-sun8i is a heavy hacked version of stmmac hardware by
> > allwinner.
> > In fact the only common part is the descriptor management and the first
> >
On Mon, Jun 26, 2017 at 01:18:23AM +0100, André Przywara wrote:
> On 31/05/17 08:18, Corentin Labbe wrote:
> > The dwmac-sun8i is a heavy hacked version of stmmac hardware by
> > allwinner.
> > In fact the only common part is the descriptor management and the first
> >
The Security System have a PRNG, this patch add support for it via
crypto_rng.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
Changes since v3 (note: the v3 miss changes and version tag sorry)
- Replaced all len values with bits / BITS_PER_LONG or BITS_PER_BYTE
Changes si
The Security System have a PRNG, this patch add support for it via
crypto_rng.
Signed-off-by: Corentin Labbe
---
Changes since v3 (note: the v3 miss changes and version tag sorry)
- Replaced all len values with bits / BITS_PER_LONG or BITS_PER_BYTE
Changes since v2
- converted to crypto_rng
On Tue, Jun 20, 2017 at 11:59:47AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Tue, Jun 20, 2017 at 10:58:19AM +0200, Corentin Labbe wrote:
> > The Security System have a PRNG, this patch add support for it via
> > crypto_rng.
>
> This might be a dumb question, but is
On Tue, Jun 20, 2017 at 11:59:47AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Tue, Jun 20, 2017 at 10:58:19AM +0200, Corentin Labbe wrote:
> > The Security System have a PRNG, this patch add support for it via
> > crypto_rng.
>
> This might be a dumb question, but is
The Security System have a PRNG, this patch add support for it via
crypto_rng.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/crypto/Kconfig | 8 +
drivers/crypto/sunxi-ss/Makefile| 1 +
drivers/crypto/sunxi-ss/sun4i-ss-core.
The Security System have a PRNG, this patch add support for it via
crypto_rng.
Signed-off-by: Corentin Labbe
---
drivers/crypto/Kconfig | 8 +
drivers/crypto/sunxi-ss/Makefile| 1 +
drivers/crypto/sunxi-ss/sun4i-ss-core.c | 30 ++
drivers/crypto
On Mon, Jun 19, 2017 at 06:26:23PM +0200, Jessica Yu wrote:
> +++ Corentin Labbe [06/06/17 14:17 +0200]:
> >This patch just swap del_usage_link() before add_usage_link().
> >
> >Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
>
> Could you combine t
On Mon, Jun 19, 2017 at 06:26:23PM +0200, Jessica Yu wrote:
> +++ Corentin Labbe [06/06/17 14:17 +0200]:
> >This patch just swap del_usage_link() before add_usage_link().
> >
> >Signed-off-by: Corentin Labbe
>
> Could you combine this with the 2nd patch? By itself t
On Mon, Jun 19, 2017 at 01:27:08PM +0800, Herbert Xu wrote:
> On Tue, Jun 06, 2017 at 03:44:17PM +0200, Corentin Labbe wrote:
> > The crypto engine could actually only enqueue hash and ablkcipher request.
> > This patch permit it to enqueue skcipher requets by adding all necessar
On Mon, Jun 19, 2017 at 01:27:08PM +0800, Herbert Xu wrote:
> On Tue, Jun 06, 2017 at 03:44:17PM +0200, Corentin Labbe wrote:
> > The crypto engine could actually only enqueue hash and ablkcipher request.
> > This patch permit it to enqueue skcipher requets by adding all necessar
On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
> On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> > This patch enable the dwmac-sun8i on the Allwinner a83t
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