the SDHCI card clock using a standard device tree mechanism
so that the PHY can get access to it and query the card clock frequency.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v2:
- Adjust commit message wording (Ro
Previous changes in this series allowed exposing the card clock from the
rk3399 SDHCI device and allowed consuming the card clock in the rk3399
eMMC PHY. Hook things up in the main rk3399 dtsi file.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2: None
arch/arm6
On rk3399 we'd like to be able to properly set corecfg registers in the
Arasan SDHCI component. Specify the syscon to enable that.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
1 file changed, 1 ins
the PHY a good chance to query our clock.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2: None
drivers/mmc/host/sdhci-of-arasan.c | 125 -
1 file changed, 122 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-ar
r
SoCs. Note that a specific compatible string for rk3399 is already in
use and so we add that to the table to match rk3399.
[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2:
- Reorder include
ms if picked without that change.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2: None
drivers/mmc/host/sdhci-of-arasan.c | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-arasan.c
b/drivers/mmc/ho
HCI (Shawn)
Douglas Anderson (11):
phy: rockchip-emmc: Increase lock time allowance
mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes
Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg
regs
mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3
[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v2:
- Clean up description of rk3399 PHY (Shawn)
- Add Rob Herring's Ack.
.../devicetree/bindings/
to at least
50 MHz before, though this reliance wasn't documented anywhere.
This change will be even more useful in future changes where we actually
need to be able to wait for a DLL lock at slower clock speeds.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2:
- In
There's no reason to store the return value of rockchip_emmc_phy_power()
in a variable nor to check it. Just return it.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2:
- Move code cleanup before set phyctrl_frqsel based on card clock (Shawn)
drivers/phy/phy-ro
om/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v2:
- List out clocks and clock names (Rob)
Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 9 +
1 file changed, 9 insertions(+)
diff --git a/Docume
mmc: configure default output tap delay
phy: rockchip-emmc: reindent the register definitions
Douglas Anderson (11):
phy: rockchip-emmc: Increase lock time allowance
mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes
Documentation: mmc: sdhci-of-arasan: Add soc-ctl-sys
the PHY a good chance to query our clock.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Reviewed-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add dependency on COMMON_CLK (actually in v2.1) (Guenter Roeck)
- Add colle
ms if picked without that change.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Reviewed-by: Shawn Lin <shawn@rock-chips.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add collected tags
Changes in v2: None
drivers/mmc/host/sdhci-of-arasan.
to at least
50 MHz before, though this reliance wasn't documented anywhere.
This change will be even more useful in future changes where we actually
need to be able to wait for a DLL lock at slower clock speeds.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay A
om/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
Acked-by: Rob Herring <r...@kernel.org>
Reviewed-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add collected t
Previous changes in this series allowed exposing the card clock from the
rk3399 SDHCI device and allowed consuming the card clock in the rk3399
eMMC PHY. Hook things up in the main rk3399 dtsi file.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebn
..@chromium.org>
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add Brian's PHY patches into my series
Changes in v2: None
drivers/phy/phy-rockchip-emm
r
SoCs. Note that a specific compatible string for rk3399 is already in
use and so we add that to the table to match rk3399.
[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Reviewed-by: Heiko Stuebner <he.
series, since
performance is still good but signal integrity problems are less
prevelant at 150 MHz.
[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
Ch
[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Rob Herring <r...@kernel.org>
Reviewed-by: Heiko Stuebner <he...@sntech.de>
Reviewed-by: Shawn Lin <shawn@rock-chips.com>
---
There's no reason to store the return value of rockchip_emmc_phy_power()
in a variable nor to check it. Just return it.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
Reviewed-by: Shawn Lin <shawn@rock-chips.com>
org>
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add Brian's PHY patches into my series
Changes in v2:
- Drop 170 MHz comment (only applicable to a su
On rk3399 we'd like to be able to properly set corecfg registers in the
Arasan SDHCI component. Specify the syscon to enable that.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add collected tags
Changes
From: Brian Norris <briannor...@chromium.org>
Some of the spacing was wrong (spaces instead of tabs), and due to
longer entries added later, the columns weren't aligned. Let's get
everything consistent.
Signed-off-by: Brian Norris <briannor...@chromium.org>
Signed-off-by: Douglas And
the SDHCI card clock using a standard device tree mechanism
so that the PHY can get access to it and query the card clock frequency.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Rob Herring <r...@kernel.org>
Reviewed-by: Heiko Stuebner <he...@sntech.de>
wn Lin <shawn@rock-chips.com>
Signed-off-by: Brian Norris <briannor...@chromium.org>
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
- Add Brian's
Two times out of 2000 reboots I ran into the error message
"rockchip_emmc_phy_power: dllrdy timeout". Presumably there is some
corner case where the DLL just takes a little longer to timeout. Let's
give it even more time to handle these corner cases.
Signed-off-by: Douglas Ander
without this
one.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
drivers/mmc/host/sdhci-of-arasan.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-arasan.c
b/drivers/mmc/host/sdhci-of-arasan.c
index 678f
as appropriate.
Douglas Anderson (3):
mmc: sdhci-of-arasan: Revert: Always power the PHY off/on when clock
changes
phy: rockchip-emmc: Be tolerant to card clock of 0 in power on
phy: rockchip-emmc: Wait even longer for the DLL to lock
drivers/mmc/host/sdhci-of-arasan.c | 21 +++
drivers/phy
: this patch should help with suspend/resume where the system will
try to turn the PHY back on when the clock is 0.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
drivers/phy/phy-rockchip-emmc.c | 59 ++---
1 file changed, 37 insertions(+), 22 del
is way too much. We'll try to be dynamic
and use 10%
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Note that this patch is atop Boris's recent PWM regulator fixes. If
desired it wouldn't be too hard to write it atop the old code, though
quite honestly anyone using a PWM reg
("usb: dwc2: host:
Properly set even/odd frame").
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Add Heiko's Tested-by.
- Add Stefan's Tested-by.
her things that were scheduled to happen.
No known test cases are improved by this patch except that the scheduler
code doesn't yell about MISSES constantly anymore.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren &
USB audio + some
keyboards) crackles less.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Removed incorrect limit on number of channels (Heiko Stuebner).
- F
USB webcam + USB audio +
keyboards) has less audio crackling than before.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Add Heiko's Tested-by.
- Add Stefan's Te
params.
- If we can remove the 65535 limit, we can transfer more!
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: John Youn <johny...@synopsys.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v6: None
Changes in v5: None
Changes in v4:
- Add John's A
ve got an overall
win here.
Note that when playing USB audio and using a USB webcam and having
several USB keyboards plugged in, the crackling on the USB audio device
is noticably reduced with this patch.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <
In preparation for future changes to the scheduler let's add some
tracing that makes it easy for us to see what's happening. By default
this tracing will be off.
By changing "core.h" you can easily trace to ftrace, the console, or
nowhere.
Signed-off-by: Douglas Anderson <diand...
needs delay change.
- Totally rewrote uframe scheduler again after writing test code.
- uframe scheduler atop delayed bandwidth release patches.
Douglas Anderson (22):
usb: dwc2: rockchip: Make the max_transfer_size automatic
usb: dwc2: host: Get aligned DMA in a more supported way
usb: d
and often
see keys dropped or repeated.
After this change the above setup works properly. This patch is based
on a previous patch proposed by Yunzhi Li ("usb: dwc2: hcd: fix periodic
transfer schedule sequence")
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Signed-off
e sure that whenever we free qh we also make sure we remove a
reference from its channel.
The bug fixed here doesn't appear to be new--I believe I just got lucky
and happened to see it while stress testing.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Reviewed-by: Kever Yang <
o allocate the
extra 48 / 60 bytes of FIFO that we're currently wasting.
NOTE: no known bugs are fixed by this patch, but it seems like a simple
fix and ought to fix someone.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Reviewed-by: Kever Yang <kever.y...@rock-chips.com>
Tes
of removing the 65535 max transfer size
limit.
NOTE: The actual code to allocate the aligned buffers is ripped almost
completely from the tegra EHCI driver. At some point in the future we
may want to add this functionality to the USB core to share more code
everywhere.
Signed-off-by: Douglas Anderson
ask me where I got a full speed USB hub or whether the
massive amount of dust that accumulated on it while it was in my junk
box affected its funtionality. Just smile and nod.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v6:
- There's not really a TT for the root hub
next_active_frame" makes it more obvious that this field is
constantly changing.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Add Heiko's Tested-by.
- A
() since it calls that.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Add Heiko's Tested-by.
- Add Stefan's Tested-by.
Changes in v5: None
Changes in v4
gt; Microsoft Wireless Keyboard 2000 in port 1.
-> Das Keyboard in port 2.
-> Jabra Speaker in port 3
-> Logitech, Inc. Webcam C600 in port 4
-> Microsoft Sidewinder X6 Keyboard in port 5
...and I'm playing music on the USB speaker and capturing video from the
webcam.
Sign
ehavior and just add the
proper delay.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Add Heiko's Tested-by.
- Add Stefan's Tested-by.
Changes in v5: None
Cha
. That means last in
first out. Doh.
Go through and just always add to the tail.
Doing this makes things much happier when I've got:
* 7-port USB 2.0 Single-TT hub
* - Microsoft 2.4 GHz Transceiver v7.0 dongle
* - Jabra speakerphone playing music
Signed-off-by: Douglas Anderson <diand...@chromium.
6.604.041
6.604.166
...
6.607.541
6.607.667
6.607.792
6.607.917
...
6.611.417
6.611.543
6.611.668
6.611.793
After:
6.215.159
6.215.284
6.215.408
6.215.533
6.215.658
...
6.470.658
6.470.783
6.470.907
...
6.726.032
6.726.157
6.725.281
6.725.406
ing it works), so maybe a
future patch (or a future version of this patch?) could remove that
parameter.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Fix
In dwc2_hcd_qh_deactivate() we will put some things on the
periodic_sched_ready list. These things won't be taken off the ready
list until the next SOF, which might be a little late. Let's put them
on right away.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko St
e
near zero.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
---
Changes in v6:
- Add Heiko's Tested-by.
- Add Stefan's Tested-by.
Changes in v5: None
Changes in v4:
- Add schedu
This no-op change splits code out of dwc2_schedule_periodic() into a
dwc2_do_reserve() function. This makes it a little easier to follow the
logic.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <he...@sntech.de>
Tested-by: Stefan Wahren <stefan.
ened
to do a FW update.
Note that in ARM64 presumably PSCI will be universal and fixes like this
will end up in ATF. Hopefully we are nearing the end of this style of
errata workaround.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Signed-off-by: Huang Tao <huang...@rock-chips.com>
Sig
e
near zero.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Add scheduler logging for missed SOFs new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/core.h | 3 ++-
drivers/usb/dwc2/hcd.c | 2 +-
drivers/usb/dwc2/hcd_intr.c | 12 +++
() since it calls that.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Reorder things in hcd_queue.c new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/hcd_queue.c | 600 +--
1 file changed, 300 inse
This no-op change splits code out of dwc2_schedule_periodic() into a
dwc2_do_reserve() function. This makes it a little easier to follow the
logic.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Split code out to make dwc2_do_reserve() new for v4.
Changes
e sure that whenever we free qh we also make sure we remove a
reference from its channel.
The bug fixed here doesn't appear to be new--I believe I just got lucky
and happened to see it while stress testing.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Avoid use
gt; Microsoft Wireless Keyboard 2000 in port 1.
-> Das Keyboard in port 2.
-> Jabra Speaker in port 3
-> Logitech, Inc. Webcam C600 in port 4
-> Microsoft Sidewinder X6 Keyboard in port 5
...and I'm playing music on the USB speaker and capturing video from the
webca
next_active_frame" makes it more obvious that this field is
constantly changing.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Rename some fields in struct dwc2_qh new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/hcd.h | 20
params.
- If we can remove the 65535 limit, we can transfer more!
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: John Youn <johny...@synopsys.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v4:
- Add John's Acks from <https://patchwork.kerne
ehavior and just add the
proper delay.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Moved periodic bandwidth release delay patch earlier again.
Changes in v3:
- Moved periodic bandwidth release delay patch later in the series.
Changes in v2:
- Periodic bandwidt
ve got an overall
win here.
Note that when playing USB audio and using a USB webcam and having
several USB keyboards plugged in, the crackling on the USB audio device
is noticably reduced with this patch.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <
seems like a simple
fix and ought to fix someone.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Set host_rx_fifo_size to 528 for rk3066 new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 d
of removing the 65535 max transfer size
limit.
NOTE: The actual code to allocate the aligned buffers is ripped almost
completely from the tegra EHCI driver. At some point in the future we
may want to add this functionality to the USB core to share more code
everywhere.
Signed-off-by: Douglas Anderson
and often
see keys dropped or repeated.
After this change the above setup works properly. This patch is based
on a previous patch proposed by Yunzhi Li ("usb: dwc2: hcd: fix periodic
transfer schedule sequence")
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Signed-off
have been filled before where it no longer is.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Set host_perio_tx_fifo_size to 304 for rk3066 new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/platform.c | 2 +-
1 file changed, 1 insertion
In preparation for future changes to the scheduler let's add some
tracing that makes it easy for us to see what's happening. By default
this tracing will be off.
By changing "core.h" you can easily trace to ftrace, the console, or
nowhere.
Signed-off-by: Douglas Anderson <diand...
. That means last in
first out. Doh.
Go through and just always add to the tail.
Doing this makes things much happier when I've got:
* 7-port USB 2.0 Single-TT hub
* - Microsoft 2.4 GHz Transceiver v7.0 dongle
* - Jabra speakerphone playing music
Signed-off-by: Douglas Anderson <diand...@chromium.
("usb: dwc2: host:
Properly set even/odd frame").
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Add dwc2_hcd_get_future_frame_number() call new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/core.h | 4
drivers/usb/
ing it works), so maybe a
future patch (or a future version of this patch?) could remove that
parameter.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Manage frame nums better in scheduler new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2
USB webcam + USB audio +
keyboards) has less audio crackling than before.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Properly set even/odd frame new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/core.c | 92 +++
In dwc2_hcd_qh_deactivate() we will put some things on the
periodic_sched_ready list. These things won't be taken off the ready
list until the next SOF, which might be a little late. Let's put them
on right away.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes
USB audio + some
keyboards) crackles less.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- Figured out what the microframe scheduler was supposed to do.
- Microframe rewrite is totally different from v3, hopefully more right.
- Microframe rewrite is later in the seri
y rewrote uframe scheduler again after writing test code.
- uframe scheduler atop delayed bandwidth release patches.
Douglas Anderson (21):
usb: dwc2: rockchip: Make the max_transfer_size automatic
usb: dwc2: host: Get aligned DMA in a more supported way
usb: dwc2: host: Set host_rx_fifo_s
her things that were scheduled to happen.
No known test cases are improved by this patch except that the scheduler
code doesn't yell about MISSES constantly anymore.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- If using uframe scheduler, end splits better new for v4
. That means last in
first out. Doh.
Go through and just always add to the tail.
Doing this makes things much happier when I've got:
* 7-port USB 2.0 Single-TT hub
* - Microsoft 2.4 GHz Transceiver v7.0 dongle
* - Jabra speakerphone playing music
Signed-off-by: Douglas Anderson <diand...@chromium.
gt; Microsoft Wireless Keyboard 2000 in port 1.
-> Das Keyboard in port 2.
-> Jabra Speaker in port 3
-> Logitech, Inc. Webcam C600 in port 4
-> Microsoft Sidewinder X6 Keyboard in port 5
...and I'm playing music on the USB speaker and capturing video from the
webca
and often
see keys dropped or repeated.
After this change the above setup works properly. This patch is based
on a previous patch proposed by Yunzhi Li ("usb: dwc2: hcd: fix periodic
transfer schedule sequence")
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Signed-off
e sure that whenever we free qh we also make sure we remove a
reference from its channel.
The bug fixed here doesn't appear to be new--I believe I just got lucky
and happened to see it while stress testing.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
C
params.
- If we can remove the 65535 limit, we can transfer more!
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Acked-by: John Youn <johny...@synopsys.com>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v5: None
Changes in v4:
- Add John's Acks from <h
next_active_frame" makes it more obvious that this field is
constantly changing.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Rename some fields in struct dwc2_qh new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/hcd.h
her things that were scheduled to happen.
No known test cases are improved by this patch except that the scheduler
code doesn't yell about MISSES constantly anymore.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- If using uframe scheduler, end s
USB audio + some
keyboards) crackles less.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5:
- Moved defines outside of ifdef to avoid gadget-only compile error.
Changes in v4:
- Figured out what the microframe scheduler was supposed to do.
- Microframe rewrite is totall
() since it calls that.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Reorder things in hcd_queue.c new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/hcd_queue.c | 600 +--
1 file c
This no-op change splits code out of dwc2_schedule_periodic() into a
dwc2_do_reserve() function. This makes it a little easier to follow the
logic.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Split code out to make dwc2_do_reserve() new
USB webcam + USB audio +
keyboards) has less audio crackling than before.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Properly set even/odd frame new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/core.c | 92 ++
ehavior and just add the
proper delay.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Moved periodic bandwidth release delay patch earlier again.
Changes in v3:
- Moved periodic bandwidth release delay patch later in the series.
Changes in v2:
-
ve got an overall
win here.
Note that when playing USB audio and using a USB webcam and having
several USB keyboards plugged in, the crackling on the USB audio device
is noticably reduced with this patch.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Tested-by: Heiko Stuebner <
e
near zero.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Add scheduler logging for missed SOFs new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/core.h | 3 ++-
drivers/usb/dwc2/hcd.c | 2 +-
driver
ing it works), so maybe a
future patch (or a future version of this patch?) could remove that
parameter.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Manage frame nums better in scheduler new for v4.
Changes in v3: None
Changes in v2: None
("usb: dwc2: host:
Properly set even/odd frame").
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Add dwc2_hcd_get_future_frame_number() call new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/core.h | 4
driver
In dwc2_hcd_qh_deactivate() we will put some things on the
periodic_sched_ready list. These things won't be taken off the ready
list until the next SOF, which might be a little late. Let's put them
on right away.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5
In preparation for future changes to the scheduler let's add some
tracing that makes it easy for us to see what's happening. By default
this tracing will be off.
By changing "core.h" you can easily trace to ftrace, the console, or
nowhere.
Signed-off-by: Douglas Anderson <diand...
of removing the 65535 max transfer size
limit.
NOTE: The actual code to allocate the aligned buffers is ripped almost
completely from the tegra EHCI driver. At some point in the future we
may want to add this functionality to the USB core to share more code
everywhere.
Signed-off-by: Douglas Anderson
seems like a simple
fix and ought to fix someone.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Set host_rx_fifo_size to 528 for rk3066 new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/platform.c | 2 +-
1 file changed, 1
ma is not aligned (Julius Werner).
- Periodic bandwidth release delay new for V2
- Commit message now says that URB giveback change needs delay change.
- Totally rewrote uframe scheduler again after writing test code.
- uframe scheduler atop delayed bandwidth release patches.
Douglas Anderson (21):
u
have been filled before where it no longer is.
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v5: None
Changes in v4:
- Set host_perio_tx_fifo_size to 304 for rk3066 new for v4.
Changes in v3: None
Changes in v2: None
drivers/usb/dwc2/platform.c | 2 +-
1 file chan
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