[PATCH v12 1/4] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <

[PATCH v12 2/4] reset: mediatek: Add MT2701 reset driver

iatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- drivers/clk/mediatek/clk-mt2701-hif.c | 8 ++-- driver

[PATCH v12 1/4] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin --- drivers/clk/mediatek/Kconfig | 43 ++ drivers/clk/mediatek

[PATCH v12 2/4] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo

[PATCH v12 3/4] arm: dts: mt2701: Add clock controller device nodes

jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 42 ++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 18596a2..c9a8dbf 100644 -

[PATCH v12 3/4] arm: dts: mt2701: Add clock controller device nodes

From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo --- arch/arm/boot

[PATCH v12 4/4] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file chan

[PATCH v12 4/4] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file changed, 8 insertions(+), 10

[PATCH v12 0/4] Add clock support for Mediatek MT2701

strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real clock for UARTs James Liao (1): arm: dts: mt2701: Add clock controller device nodes Shunli Wang (2): clk: mediatek: Add MT2701 clock support reset: mediatek: Add MT2701 reset driver arch

[PATCH v12 0/4] Add clock support for Mediatek MT2701

strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real clock for UARTs James Liao (1): arm: dts: mt2701: Add clock controller device nodes Shunli Wang (2): clk: mediatek: Add MT2701 clock support reset: mediatek: Add MT2701 reset driver arch

[PATCH v11 6/9] reset: mediatek: Add MT2701 reset controller dt-binding file

o <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- include/dt-bindings/reset/mt2701-resets.h | 83 +++ 1 file changed, 83 inser

[PATCH v11 2/9] clk: mediatek: Refine the makefile to support multiple clock drivers

com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Reviewed-by: Matthias Brugger <matthias@gmail.com> --- drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 21 + drivers/clk/mediatek/Makef

[PATCH v11 6/9] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked

[PATCH v11 2/9] clk: mediatek: Refine the makefile to support multiple clock drivers

From: James Liao Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger --- drivers

[PATCH v11 3/9] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao <jamesjj.l...@mediatek.com> This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: E

[PATCH v11 3/9] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked-by: Rob Herring --- .../bindings/arm

[PATCH v11 5/9] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <

[PATCH v11 5/9] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin --- drivers/clk/mediatek/Kconfig | 43 ++ drivers/clk/mediatek

[PATCH v11 9/9] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file chan

[PATCH v11 8/9] arm: dts: mt2701: Add clock controller device nodes

jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 42 ++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 18596a2..c9a8dbf 100644 -

[PATCH v11 9/9] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file changed, 8 insertions(+), 10

[PATCH v11 8/9] arm: dts: mt2701: Add clock controller device nodes

From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo --- arch/arm/boot

[PATCH v11 1/9] clk: mediatek: remove __init from clk registration functions

From: James Liao <jamesjj.l...@mediatek.com> Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- drivers/clk/mediatek/clk-gate.c |

[PATCH v11 4/9] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off

[PATCH v11 1/9] clk: mediatek: remove __init from clk registration functions

From: James Liao Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao Signed-off-by: Erin Lo --- drivers/clk/mediatek/clk-gate.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 12 ++-- drivers/clk/mediatek/clk-pll.c | 2

[PATCH v11 4/9] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger --- include/dt-bindings/clock/mt2701

[PATCH v11 0/9] Add clock support for Mediatek MT2701

-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real

[PATCH v11 7/9] reset: mediatek: Add MT2701 reset driver

iatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- drivers/clk/mediatek/clk-mt2701-hif.c | 2 ++ drivers/clk/mediate

[PATCH v11 0/9] Add clock support for Mediatek MT2701

-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real

[PATCH v11 7/9] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo

[PATCH v10 7/9] reset: mediatek: Add MT2701 reset driver

iatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- drivers/clk/mediatek/clk-mt2701-hif.c | 2 ++ drivers/clk/mediate

[PATCH v10 6/9] reset: mediatek: Add MT2701 reset controller dt-binding file

o <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- include/dt-bindings/reset/mt2701-resets.h | 83 +++ 1 file changed, 83 inser

[PATCH v10 9/9] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Change-Id: Icd44282b859a344b86eccdf4840e9ffb7cee7ec5 Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/bo

[PATCH v10 5/9] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <

[PATCH v10 9/9] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Change-Id: Icd44282b859a344b86eccdf4840e9ffb7cee7ec5 Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701.dtsi | 18

[PATCH v10 5/9] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin --- drivers/clk/mediatek/Kconfig | 50 ++ drivers/clk/mediatek

[PATCH v10 7/9] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo

[PATCH v10 6/9] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked

[PATCH v10 8/9] arm: dts: mt2701: Add clock controller device nodes

jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 42 ++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 18596a2..c9a8dbf 100644 -

[PATCH v10 8/9] arm: dts: mt2701: Add clock controller device nodes

From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo --- arch/arm/boot

[PATCH v10 3/9] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao <jamesjj.l...@mediatek.com> This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: E

[PATCH v10 1/9] clk: mediatek: remove __init from clk registration functions

From: James Liao <jamesjj.l...@mediatek.com> Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- drivers/clk/mediatek/clk-gate.c |

[PATCH v10 1/9] clk: mediatek: remove __init from clk registration functions

From: James Liao Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao Signed-off-by: Erin Lo --- drivers/clk/mediatek/clk-gate.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 12 ++-- drivers/clk/mediatek/clk-pll.c | 2

[PATCH v10 3/9] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked-by: Rob Herring --- .../bindings/arm

[PATCH v10 2/9] clk: mediatek: Refine the makefile to support multiple clock drivers

com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Reviewed-by: Matthias Brugger <matthias@gmail.com> --- drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 23 +++ drivers/clk/mediatek/Makef

[PATCH v10 4/9] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off

[PATCH v10 0/9] Add clock support for Mediatek MT2701

to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real clock for UARTs James Liao (4): clk: mediatek: remove __init from clk

[PATCH v10 2/9] clk: mediatek: Refine the makefile to support multiple clock drivers

From: James Liao Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger --- drivers

[PATCH v10 4/9] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger --- include/dt-bindings/clock/mt2701

[PATCH v10 0/9] Add clock support for Mediatek MT2701

to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real clock for UARTs James Liao (4): clk: mediatek: remove __init from clk

[PATCH v9 02/10] clk: mediatek: remove __init from clk registration functions

From: James Liao <jamesjj.l...@mediatek.com> Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- drivers/clk/mediatek/clk-gate.c |

[PATCH v9 02/10] clk: mediatek: remove __init from clk registration functions

From: James Liao Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao Signed-off-by: Erin Lo --- drivers/clk/mediatek/clk-gate.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 12 ++-- drivers/clk/mediatek/clk-pll.c | 2

[PATCH v9 05/10] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off

[PATCH v9 05/10] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger --- include/dt-bindings/clock/mt2701

[PATCH v9 10/10] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file chan

[PATCH v9 07/10] reset: mediatek: Add MT2701 reset controller dt-binding file

o <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- include/dt-bindings/reset/mt2701-resets.h | 83 +++ 1 file changed, 83 inser

[PATCH v9 10/10] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file changed, 8 insertions(+), 10

[PATCH v9 07/10] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked

[PATCH v9 09/10] arm: dts: mt2701: Add clock controller device nodes

jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 42 ++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 18596a2..c9a8dbf 100644 -

[PATCH v9 09/10] arm: dts: mt2701: Add clock controller device nodes

From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo --- arch/arm/boot

[PATCH v9 06/10] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <

[PATCH v9 06/10] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin --- drivers/clk/mediatek/Kconfig | 50 ++ drivers/clk/mediatek

[PATCH v9 08/10] reset: mediatek: Add MT2701 reset driver

iatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Acked-by: Philipp Zabel <p.za...@pengutronix.de> --- drivers/clk/mediatek/clk-mt2701-hif.c | 2 ++ drivers/clk/mediate

[PATCH v9 08/10] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo

[PATCH v9 01/10] clk: fix initial state of critical clock's parents

From: James Liao <jamesjj.l...@mediatek.com> This patch fixed wrong state of parent clocks if they are registered after critical clocks. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Erin Lo <erin...@mediatek.com> --- drivers/clk/clk.c | 9 -

[PATCH v9 01/10] clk: fix initial state of critical clock's parents

From: James Liao This patch fixed wrong state of parent clocks if they are registered after critical clocks. Signed-off-by: James Liao Signed-off-by: Erin Lo --- drivers/clk/clk.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk.c b/drivers/clk

[PATCH v9 03/10] clk: mediatek: Refine the makefile to support multiple clock drivers

com> Signed-off-by: Erin Lo <erin...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> Reviewed-by: Matthias Brugger <matthias@gmail.com> --- drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 23 +++ drivers/clk/mediatek/Makef

[PATCH v9 03/10] clk: mediatek: Refine the makefile to support multiple clock drivers

From: James Liao Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger --- drivers

[PATCH v9 00/10] Add clock support for Mediatek MT2701

-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real

[PATCH v9 00/10] Add clock support for Mediatek MT2701

-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ Erin Lo (1): arm: dts: mt2701: Use real

[PATCH v9 04/10] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao <jamesjj.l...@mediatek.com> This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Signed-off-by: E

[PATCH v9 04/10] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked-by: Rob Herring --- .../bindings/arm

[PATCH v8 01/10] clk: fix initial state of critical clock's parents

From: James Liao This patch fixed wrong state of parent clocks if they are registered after critical clocks. Signed-off-by: James Liao --- drivers/clk/clk.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git

[PATCH v8 07/10] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang Signed-off-by: James Liao

[PATCH v8 01/10] clk: fix initial state of critical clock's parents

From: James Liao This patch fixed wrong state of parent clocks if they are registered after critical clocks. Signed-off-by: James Liao --- drivers/clk/clk.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index ce39add..bf80e39

[PATCH v8 07/10] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin Acked-by: Philipp Zabel ---

[PATCH v8 03/10] clk: mediatek: Refine the makefile to support multiple clock drivers

From: James Liao Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by:

[PATCH v8 03/10] clk: mediatek: Refine the makefile to support multiple clock drivers

From: James Liao Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin Reviewed-by: Matthias Brugger --- drivers/clk/Kconfig |

[PATCH v8 06/10] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin

[PATCH v8 06/10] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin --- drivers/clk/mediatek/Kconfig | 50 ++ drivers/clk/mediatek/Makefile |7

[PATCH v8 05/10] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin

[PATCH v8 08/10] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang

[PATCH v8 09/10] arm: dts: mt2701: Add clock controller device nodes

From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao

[PATCH v8 04/10] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao Tested-by: John Crispin

[PATCH v8 10/10] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file chan

[PATCH v8 05/10] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin Reviewed-by: Matthias Brugger --- include/dt-bindings/clock/mt2701-clk.h | 486

[PATCH v8 08/10] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin

[PATCH v8 09/10] arm: dts: mt2701: Add clock controller device nodes

From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao --- arch/arm/boot/dts/mt2701.dtsi | 42

[PATCH v8 04/10] dt-bindings: ARM: Mediatek: Document bindings for MT2701

From: James Liao This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao Tested-by: John Crispin Acked-by: Rob Herring ---

[PATCH v8 10/10] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701.dtsi | 18 -- 1 file changed, 8 insertions(+), 10

[PATCH v8 02/10] clk: mediatek: remove __init from clk registration functions

From: James Liao Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao --- drivers/clk/mediatek/clk-gate.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 12 ++--

[PATCH v8 02/10] clk: mediatek: remove __init from clk registration functions

From: James Liao Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao --- drivers/clk/mediatek/clk-gate.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 12 ++-- drivers/clk/mediatek/clk-pll.c | 2 +- 3 files changed, 8

[PATCH v8 0/10] Add clock support for Mediatek MT2701

with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ [2] http://www.spinics.net/lists/dri-devel/msg106726.html Erin

[PATCH v8 0/10] Add clock support for Mediatek MT2701

with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. [1] https://patchwork.kernel.org/patch/8147901/ [2] http://www.spinics.net/lists/dri-devel/msg106726.html Erin

[PATCH] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo <erin...@mediatek.com> --- This patch dependents on "Add clock support for Mediatek MT2701&

[PATCH] arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by: Erin Lo --- This patch dependents on "Add clock support for Mediatek MT2701"[1]. If we have clock s

[PATCH v3 2/2] ARM: dts: mediatek: add MT2701 basic support

This adds basic chip support for Mediatek 2701. Signed-off-by: Erin Lo --- arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/mt2701-evb.dts | 29 arch/arm/boot/dts/mt2701.dtsi | 146 ++ arch/arm/mach-mediatek/mediatek.c | 1 + 4

[PATCH v3 1/2] Document: DT: Add bindings for mediatek MT2701 SoC Platform

This adds a DT binding documentation for the MT2701 SoC from Mediatek. Signed-off-by: Erin Lo --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 .../devicetree/bindings/arm/mediatek/mediatek,sysirq.txt | 1 + Documentation/devicetree/bindings/serial/mtk-uart.txt

[PATCH v3 0/2] Add basic support for Mediatek MT2701 SoC

art.txt) 3. Correct the mt2701-timer from mt6589-timer since the mistake in previous version (mediatek,mtk-timer.txt) Erin Lo (2): Document: DT: Add bindings for mediatek MT2701 SoC Platform ARM: dts: mediatek: add MT2701 basic support Documentation/devicetree/bindings/arm/mediatek.txt | 4 + ..

[PATCH v3 2/2] ARM: dts: mediatek: add MT2701 basic support

This adds basic chip support for Mediatek 2701. Signed-off-by: Erin Lo <erin...@mediatek.com> --- arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/mt2701-evb.dts | 29 arch/arm/boot/dts/mt2701.dtsi | 146 ++ arch/arm/mach-me

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