Add documentation for optional pinctrl sleep state that can be used by
STM32 LPTimer encoder/counter.
Signed-off-by: Fabrice Gasnier
---
.../devicetree/bindings/iio/counter/stm32-lptimer-cnt.txt | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
a/Documentation
On 3/10/19 11:09 AM, Jonathan Cameron wrote:
> On Wed, 6 Mar 2019 09:55:17 +0100
> Fabrice Gasnier wrote:
>
>> When SPI clock isn't accurate, 'spi_master_freq' is filled in with
>> expected frequency. Use computed value instead:
>> - e.g. source clock
On 3/16/19 3:10 PM, Jonathan Cameron wrote:
> On Fri, 15 Mar 2019 19:01:47 +0100
> Fabrice Gasnier wrote:
>
>> On 3/10/19 11:21 AM, Jonathan Cameron wrote:
>>> On Wed, 6 Mar 2019 09:55:23 +0100
>>> Fabrice Gasnier wrote:
>>>
>&
) with injected conversions.
Conversions can be launched by software (JSWSTART), trigger or
synchronously with filter 0 (e.g. JSYNC). Continuous conversion mode isn't
available for injected.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c
e instead to be more accurate:
- e.g. source clock / (CKOUTDIV + 1)
Enforce checks on the divider: ckoutdiv range can be from 1-255 to provide
divider of 2-256.
Signed-off-by: Fabrice Gasnier
---
Changes in v2:
- rework the way to determine ckoutdiv bitfield: deal with divider directly
to e
tageY_en
$ echo tim6_trgo > trigger/current_trigger
$ echo 1 > buffer/enable
This uses injected conversion as it uses a hardware trigger (without scan)
5 - Using a hardware trigger (with 2+ channel):
Same as in 4/ above, but enable two or more channels in scan_elements.
This uses injected conver
Optionally enable IIO hw consumer, when provided (e.g. for DFSDM_IIO type).
This is precursor patch to introduce buffer modes.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/iio/adc
rface.
Fabrice Gasnier (8):
iio: adc: stm32-dfsdm: make spi_master_freq more accurate
iio: adc: stm32-dfsdm: continuous mode depends on current mode
iio: adc: stm32-dfsdm: move dma enable from start_conv() to
start_dma()
iio: adc: stm32-dfsdm: move dma slave config to start routine
iio
Claim direct mode to ensure no buffer mode is in use for:
- single conversion
- sample rate setting (must be set when filter isn't enabled).
- oversampling ratio (must be set when filter isn't enabled).
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-
Move DMA slave configuration to start routine: depending on regular or
injected mode is in use, DMA needs to read resp. RDATAR or JDATAR.
This is precursor patch to introduce injected mode (used for scan).
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 31
This is precursor patch to ease support of triggered buffer mode.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 54 +++
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c
b/drivers/iio/adc/
ease support of triggered buffer mode.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 77 +++
1 file changed, 38 insertions(+), 39 deletions(-)
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c
b/drivers/iio/adc/stm32-dfsdm-adc.c
index
= <22>;
full-ohms = <222>;
};
First, go to iio:deviceX for the "voltage-divider", do one read:
$ cd /sys/bus/iio/devices/iio:deviceX
$ cat in_voltage0_raw
Then, unbind the consumer driver. It triggers above deadlock warning.
$ cd /sys/bus/platform/drivers/iio-rescale/
On 1/30/19 5:38 PM, Fabrice Gasnier wrote:
> Add documentation for STMicroelectronics STM32 Factory-programmed
> read only memory area.
Hello Rob, DT Maintainers,
Gentlemen reminder for new DT bindings review.
Best Regards,
Fabrice
>
> Signed-off-by: Fabrice Gasnier
> ---
&g
On 3/24/19 4:47 PM, Jonathan Cameron wrote:
> On Fri, 22 Mar 2019 14:54:06 +0100
> Fabrice Gasnier wrote:
>
>> This fixes a possible circular locking dependency detected warning seen
>> with:
>> - CONFIG_PROVE_LOCKING=y
>> - consumer/provider IIO devices (ex: &
io-channels = <&adc 0>;
output-ohms = <22>;
full-ohms = <222>;
};
First, go to iio:deviceX for the "voltage-divider", do one read:
$ cd /sys/bus/iio/devices/iio:deviceX
$ cat in_voltage0_raw
Then, unbind the consumer driver. It triggers abo
useful for audio that requests fixed rates (such as: 8, 16 or 32 kHz).
BTW, introduce new routine to re-factor sample frequency setting, and
move frequency accuracy message from warning to debug level.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 56
Add PM and runtime PM support to STM32 DFSDM drivers:
- stm32-dfsdm-core: manage clocks.
- stm32-dfsdm-adc: restore channels configuration upon resume. Also stop
restart everything in case of buffer mode.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 75
Claim direct mode to ensure no buffer mode is in use for:
- single conversion
- sample rate setting (must be set when filter isn't enabled).
- oversampling ratio (must be set when filter isn't enabled).
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-
support for triggered buffer mode (with scan mode and
hardware triggers)
Fabrice Gasnier (8):
iio: adc: stm32-dfsdm: make spi_master_freq more accurate
iio: adc: stm32-dfsdm: continuous mode depends on current mode
iio: adc: stm32-dfsdm: move dma enable from start_conv() to
start_dma
This is precursor patch to ease support of triggered buffer mode.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 54 +++
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c
b/drivers/iio/adc/
) with injected conversions.
Conversions can be launched by software (JSWSTART), trigger or
synchronously with filter 0 (e.g. JSYNC). Continuous conversion mode isn't
available for injected.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c
channels).
DFSDM can use hardware triggers (e.g. STM32 timer/lptimer), add
INDIO_HARDWARE_TRIGGERED to supported modes.
Only support DMA-based buffer modes. In case no DMA is available, only
support INDIO_DIRECT_MODE.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 218
Optionally enable IIO hw consumer, when provided (e.g. for DFSDM_IIO type).
This is precursor patch to introduce buffer modes.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/iio/adc
Move DMA slave configuration to start routine: depending on regular or
injected mode is in use, DMA needs to read resp. RDATAR or JDATAR.
This is precursor patch to introduce injected mode (used for scan).
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 31
ider when
ckout isn't accurate).
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-core.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/adc/stm32-dfsdm-core.c
b/drivers/iio/adc/stm32-dfsdm-core.c
index bf089f5..65b7556 100644
--- a/d
ease support of triggered buffer mode.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-dfsdm-adc.c | 77 +++
1 file changed, 38 insertions(+), 39 deletions(-)
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c
b/drivers/iio/adc/stm32-dfsdm-adc.c
index
On 09/24/2018 01:53 PM, Thierry Reding wrote:
> On Fri, Sep 21, 2018 at 04:02:47PM +0200, Fabrice Gasnier wrote:
>> This reverts commit 7e5d1fd75c3dde9fc10c4472b9368089d1b81d00 as it causes
>> regression with multiple pwm chip. It creates a new entry in
>> '/sys/class/p
On 09/24/2018 04:23 PM, Thierry Reding wrote:
> On Mon, Sep 24, 2018 at 03:59:03PM +0200, Fabrice Gasnier wrote:
>> On 09/24/2018 01:53 PM, Thierry Reding wrote:
>>> On Fri, Sep 21, 2018 at 04:02:47PM +0200, Fabrice Gasnier wrote:
>>>> This reverts commit 7e5d1fd75c
On 09/24/2018 05:50 PM, Fabrice Gasnier wrote:
> On 09/24/2018 04:23 PM, Thierry Reding wrote:
>> On Mon, Sep 24, 2018 at 03:59:03PM +0200, Fabrice Gasnier wrote:
>>> On 09/24/2018 01:53 PM, Thierry Reding wrote:
>>>> On Fri, Sep 21, 2018 at 04:02:47PM +0200, Fab
ite error: File exists
[1] https://lkml.org/lkml/2018/9/25/713
[2] https://lkml.org/lkml/2018/9/25/447
---
Changes in v2:
- update revert commit message
- new patch 2/2 to propose uevent notification (change) on pwmchip
Fabrice Gasnier (2):
Revert "pwm: Set class for exported channels
ttps://lkml.org/lkml/2018/9/25/713
[2] https://lkml.org/lkml/2018/9/25/447
Signed-off-by: Fabrice Gasnier
Tested-by: Gottfried Haider
---
drivers/pwm/sysfs.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c
index 7c71cdb..4726d43 100644
--- a/dri
sysfs"), see [1].
basic testing:
$ udevadm monitor --environment &
$ echo 0 > /sys/class/pwm/pwmchip0/export
KERNEL[197.321736] change /devices/.../pwm/pwmchip0 (pwm)
ACTION=change
DEVPATH=/devices/.../pwm/pwmchip0
EXPORT=pwm0
SEQNUM=2045
SUBSYSTEM=pwm
[1] https://lkml.org/lkml/2018/9/25/7
On 09/29/2018 02:19 AM, Gottfried Haider wrote:
> Hello Thierry & Fabrice,
>
>>> Still, it is possible to send uevent (KOBJ_CHANGE) on pwmchipN device,
>>> to notify of a change, e.g. pwmX channel being exported/unexported.
>
> I tested this patch, and I am happy to report that it works with the
This enables drivers for STM32 timer, low power timer and analog hardware
that can be used on STM32MP1 SoC:
- Timer & LP Timer MFD core, PWM, trigger & encoder drivers
- IIO ADC/DAC/DFSDM
- vrefbuf regu driver (voltage reference buffer).
Signed-off-by: Fabrice Gasnier
---
arch/arm
This series adds dmas description to stm32mp157c device tree file.
But dmas are kept disabled by default on all boards. They are only
necessary for PWM capture. So, spare them for other usage by default.
Fabrice Gasnier (3):
ARM: dts: stm32: Add dmas to timer on stm32mp157c
ARM: dts: stm32
Spare dmas when using timers on stm32mp157c-ev1.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c-ev1.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 372bc2e..89bb35d 100644
--- a
Spare dmas when using timer6 on stm32mp157c-ed1.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index f77bea4..c3ecb1e 100644
--- a
Add DMAs to enable PWM input capture using STM32 timers on stm32mp157c.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 58 ++
1 file changed, 58 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts
pwmchip4
$ cd /sys/class/pwm/pwmchip0/
$ echo 0 > export
$ ls /sys/class/pwm
pwm0 pwmchip0 pwmchip4
$ cd /sys/class/pwm/pwmchip4/
$ echo 0 > export
sysfs: cannot create duplicate filename '/class/pwm/pwm0'
...Exception stack follows...
Signed-off-by: Fabrice Gasnier
---
drivers/
-wide to avoid shortage on DMA request
lines as there's significant amount of timer instances that can
request up to 7 channels.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Rob Herring
Reviewed-by: Benjamin Gaignard
---
.../devicetree/bindings/mfd/stm32-timers.txt
port, beautify DMAs probe
Fabrice Gasnier (6):
dt-bindings: mfd: stm32-timers: add support for dmas
mfd: stm32-timers: add support for dmas
pwm: stm32: add capture support
pwm: stm32: improve capture by tuning counter prescaler
pwm: stm32: use input prescaler to improve period capture
ARM
Using input prescaler, capture unit will trigger DMA once every
configurable /2, /4 or /8 events (rising edge). This helps improve
period (only) capture accuracy at high rates.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v2:
- Adopt DMA
Enable pwm3 input capture on stm32f429i-eval, by using DMA.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32429i-eval.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v3:
- update stm32_timers_dma_burst_read() call: don't pass ddata structure,
use MFD parent device structure instead since MFD core update.
Changes in v2:
- DMA handling has been mo
argin).
- Do a 2nd capture, with scaled capture window.
This increases accuracy, especially at high rates.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v2:
- Adopt DMA read from MFD core.
---
drivers/pwm/pwm-stm32.c
for instance (but not limited to).
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
---
Changes in v3:
- Basically Lee's comments:
- rather create a struct stm32_timers_dma, and place a reference to it
in existing ddata (instead of adding priv struct).
- rather use a struct d
On 02/24/2018 02:03 PM, Jonathan Cameron wrote:
> On Fri, 23 Feb 2018 13:50:59 +0100
> Fabrice Gasnier wrote:
>
>> Misc fixes & style improvements:
>> - checkpatch warns about line over 80 characters.
>> - remove extra spaces and a blank line (e.g. checkpatch
On 04/16/2018 02:22 PM, Lee Jones wrote:
> On Fri, 30 Mar 2018, Fabrice Gasnier wrote:
>
>> STM32 Timers can support up to 7 DMA requests:
>> - 4 channels, update, compare and trigger.
>> Optionally request part, or all DMAs from stm32-timers MFD core.
>>
>>
On 04/16/2018 04:47 PM, Lee Jones wrote:
> On Mon, 16 Apr 2018, Fabrice Gasnier wrote:
>
>> On 04/16/2018 02:22 PM, Lee Jones wrote:
>>> On Fri, 30 Mar 2018, Fabrice Gasnier wrote:
>>>
>>>> STM32 Timers can support up to 7 DMA requests:
>
-wide to avoid shortage on DMA request
lines as there's significant amount of timer instances that can
request up to 7 channels.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Rob Herring
Reviewed-by: Benjamin Gaignard
---
.../devicetree/bindings/mfd/stm32-timers.txt
Enable pwm3 input capture on stm32f429i-eval, by using DMA.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32429i-eval.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
Using input prescaler, capture unit will trigger DMA once every
configurable /2, /4 or /8 events (rising edge). This helps improve
period (only) capture accuracy at high rates.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v2:
- Adopt DMA
for instance (but not limited to).
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
---
Changes in v4:
- Lee's comments: Add kerneldoc header, better format comments.
Changes in v3:
- Basically Lee's comments:
- rather create a struct stm32_timers_dma, and place a reference
argin).
- Do a 2nd capture, with scaled capture window.
This increases accuracy, especially at high rates.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v2:
- Adopt DMA read from MFD core.
---
drivers/pwm/pwm-stm32.c
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v3:
- update stm32_timers_dma_burst_read() call: don't pass ddata structure,
use MFD parent device structure instead since MFD core update.
Changes in v2:
- DMA handling has been mo
stract DMA handling from child driver: move it to MFD core
- Rework pwm capture routines to adopt this change
- Comment on optional dma support, beautify DMAs probe
Fabrice Gasnier (6):
dt-bindings: mfd: stm32-timers: add support for dmas
mfd: stm32-timers: add support for dmas
pwm: stm32: ad
On 04/17/2018 09:12 AM, Lee Jones wrote:
> On Mon, 16 Apr 2018, Fabrice Gasnier wrote:
>
>> STM32 Timers can support up to 7 DMA requests:
>> - 4 channels, update, compare and trigger.
>> Optionally request part, or all DMAs from stm32-timers MFD core.
>>
>>
On 04/17/2018 12:10 PM, Lee Jones wrote:
> On Tue, 17 Apr 2018, Fabrice Gasnier wrote:
>
>> On 04/17/2018 09:12 AM, Lee Jones wrote:
>>> On Mon, 16 Apr 2018, Fabrice Gasnier wrote:
>>>
>>>> STM32 Timers can support up to 7 DMA requests:
>
Enable pwm3 input capture on stm32f429i-eval, by using DMA.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32429i-eval.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
exported routine prototype now use generic device struct, more
various comments (see patch 2 changelog).
Resend v2:
- Add collected Acks
Changes in v2:
- Abstract DMA handling from child driver: move it to MFD core
- Rework pwm capture routines to adopt this change
- Comment on optional dma support
Using input prescaler, capture unit will trigger DMA once every
configurable /2, /4 or /8 events (rising edge). This helps improve
period (only) capture accuracy at high rates.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v2:
- Adopt DMA
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v3:
- update stm32_timers_dma_burst_read() call: don't pass ddata structure,
use MFD parent device structure instead since MFD core update.
Changes in v2:
- DMA handling has been mo
argin).
- Do a 2nd capture, with scaled capture window.
This increases accuracy, especially at high rates.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
Acked-by: Thierry Reding
---
Changes in v2:
- Adopt DMA read from MFD core.
---
drivers/pwm/pwm-stm32.c
for instance (but not limited to).
Signed-off-by: Fabrice Gasnier
Reviewed-by: Benjamin Gaignard
---
Changes in v5:
- fix warning on dma_mapping_error() that doesn't return an error code.
- move stm32_timers_dma struct to header file as discussed with Lee.
This allows to remove alloc for
-wide to avoid shortage on DMA request
lines as there's significant amount of timer instances that can
request up to 7 channels.
Signed-off-by: Fabrice Gasnier
Reviewed-by: Rob Herring
Reviewed-by: Benjamin Gaignard
---
.../devicetree/bindings/mfd/stm32-timers.txt
stm32mp157c evaluation board has following PWM pins available on GPIO
expansion connector:
- TIM2_CH4 (PA3)
- TIM8_CH4 (PI2)
- TIM12_CH1 (PH6)
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff
Add PWM and trigger support to stm32mp157c.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 283 +
1 file changed, 283 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc
This series adds support for STM32 timers to stm32mp157c. These
timers can act PWM, trigger and/or encoder.
Populate stm32mp157c SOC and ed1/ev1 boards.
Fabrice Gasnier (4):
ARM: dts: stm32: add timers support to stm32mp157c
ARM: dts: stm32: add PWM pins used on stm32mp157c-ev1 board
ARM
Enable timer 6 on stm32mp157c-ed1 that can serve as trigger for
ADC for instance.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
stm32mp157c evaluation board has TIM2_CH4, TIM8_CH4 and TIM12_CH1
available on GPIO expansion connector.
Add PWM and associated triggers (for ADC/DAC) on these timers.
Keep them disabled so these pins can be used as GPIOs by default.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts
Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dt
stm32mp157c has vrefbuf regulator that can provide analog reference
voltage from 1500mV to 2500mV.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts
stm32mp157c has an ADC block with two physical ADCs.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc
Add support for STM32MP1 Analog to Digital Converter variant.
It's quite similar to STM32H7 ADC and re-use most of existing driver.
Fabrice Gasnier (3):
dt-bindings: iio: stm32-adc: add support for STM32MP1.
iio: adc: stm32-adc: add support for STM32MP1
ARM: dts: stm32: Add ADC suppo
Document support for STM32MP1 ADC. It's quite similar to STM32H7 ADC.
Introduce "st,stm32mp1-adc" compatible to handle variants of this
hardware such as vregready flag, interrupts, clock rate.
Signed-off-by: Fabrice Gasnier
---
Documentation/devicetree/bindings/iio/adc/st,st
Add support for STM32MP1 ADC. It's quite similar to STM32H7 ADC.
Introduce new compatible to handle variants of this hardware such as
vregready flag, trigger list, interrupts, clock rate.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-adc-core.c
Add support for DAC (Digital to Analog Converter) to STM32MP157C.
STM32MP157C DAC has two output channels.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b
Configure STM32F4 ADC to use dma by default.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32f429.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 11d2715..e85db07 100644
--- a/arch/arm/boot/dts
STM32 ADC can use dma. Add dt documentation for optional dma support.
Signed-off-by: Fabrice Gasnier
---
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
b
Define extended attribute so that user may choose rising, falling or both
edges for external trigger sources.
Default to rising edge in case it isn't set.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-adc.c | 51 -
1 file change
Define and enable pwm1 and pwm3, timers1 & 3 trigger outputs on
stm32f469-eval board.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32429i-eval.dts | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/
by default.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/Kconfig | 2 +
drivers/iio/adc/stm32-adc.c | 349 +++-
2 files changed, 348 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 9c8b558..3334
STM32 ADC has external timer trigger sources. Use stm32 timer triggers
API (e.g. is_stm32_timer_trigger()) with local ADC lookup table to
validate a trigger can be used.
This also provides correct trigger selection value (e.g. extsel).
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/Kconfig
Add optional DMA support to STM32 ADC.
Use dma cyclic mode with at least two periods.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/Kconfig | 2 +
drivers/iio/adc/stm32-adc-core.c | 1 +
drivers/iio/adc/stm32-adc-core.h | 2 +
drivers/iio/adc/stm32-adc.c | 209
/iio/devices/iio\:device0
echo tim1_ch1 > trigger/current_trigger
OR: echo tim3_trgo > trigger/current_trigger
echo 1 > scan_elements/in_voltage8_en
echo 1 > buffer/enable
Fabrice Gasnier (7):
iio: adc: stm32: add support for triggered buffer mode
iio: adc: stm32: Enable use of stm32
Add missing of_platform_depopulate() upon driver removal.
Signed-off-by: Fabrice Gasnier
---
drivers/mfd/stm32-timers.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
index 41bd901..192cbb6 100644
--- a/drivers/mfd/stm32
On 02/01/2017 05:35 PM, Rob Herring wrote:
On Mon, Jan 30, 2017 at 02:57:41PM +0100, Fabrice Gasnier wrote:
Add dt documentation for st,stm32-exti-trigger.
EXTi gpio signal can be routed internally as trigger source for various
s/gpio/GPIO/
IPs (e.g. for ADC or DAC conversions).
Please
On 01/22/2017 01:58 PM, Jonathan Cameron wrote:
On 19/01/17 13:34, Fabrice Gasnier wrote:
Define extended attribute so that user may choose rising, falling or both
edges for external trigger sources.
Default to rising edge in case it isn't set.
Signed-off-by: Fabrice Gasnier
Crea
On 01/22/2017 02:14 PM, Jonathan Cameron wrote:
On 19/01/17 13:34, Fabrice Gasnier wrote:
Add optional DMA support to STM32 ADC.
Use dma cyclic mode with at least two periods.
Signed-off-by: Fabrice Gasnier
What is the point going forward in supporting non dma buffered reads at all?
Is there
On 01/22/2017 01:55 PM, Jonathan Cameron wrote:
On 19/01/17 13:34, Fabrice Gasnier wrote:
STM32 ADC has external timer trigger sources. Use stm32 timer triggers
API (e.g. is_stm32_timer_trigger()) with local ADC lookup table to
validate a trigger can be used.
This also provides correct trigger
Configure STM32F4 ADC to use dma by default.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32f429.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 8bf650d..ab42b58 100644
--- a/arch/arm/boot/dts
by default.
Signed-off-by: Fabrice Gasnier
---
Changes in v2:
based on Jonathan's comments:
- remove all STM32F4_SQx[SHIFT/MASK], put the numbers directly in sq
description array.
- make data buffer part of stm32_adc structure (remove preenable and
postdisable routines)
- add comment on read
Define extended attribute so that user may choose rising, falling or both
edges for external trigger sources.
Default to rising edge in case it isn't set.
Signed-off-by: Fabrice Gasnier
---
Changes in v2:
- Rename and document new trigger_polarity custom attribute
---
Documentation/ABI/te
Define and enable pwm1 and pwm3, timers1 & 3 trigger outputs on
on stm32f429i-eval board.
Signed-off-by: Fabrice Gasnier
---
Changes in v2:
- Fix typo
- Sort phandles
---
arch/arm/boot/dts/stm32429i-eval.dts | 28
1 file changed, 28 insertions(+)
diff --git a/
STM32 ADC can use dma. Add dt documentation for optional dma support.
Signed-off-by: Fabrice Gasnier
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/st
ion and use hwfifo_set_watermark()
- Fix typo: using stm32f429i-eval
Fabrice Gasnier (7):
iio: adc: stm32: add support for triggered buffer mode
iio: adc: stm32: Enable use of stm32 timer triggers
iio: adc: stm32: add trigger polarity extended attribute
Documentation: dt: iio: stm32-adc: opti
watermark. Coherent memory is used for dma (max buffer size is
fixed to PAGE_SIZE).
Signed-off-by: Fabrice Gasnier
---
Changes in v2:
- Use iio_trigger_poll_chained() avoids to bounce back into irq context.
Remove irq_work.
- Rework dma buffer allocation and use. Allocation moved to probe time
STM32 ADC has external timer trigger sources. Use stm32 timer triggers
API (e.g. is_stm32_timer_trigger()) with local ADC lookup table to
validate a trigger can be used.
This also provides correct trigger selection value (e.g. extsel).
Signed-off-by: Fabrice Gasnier
---
Changes in v2:
- Add
On 01/20/2017 11:19 AM, Alexandre Torgue wrote:
Hi Fabrice
On 01/19/2017 02:34 PM, Fabrice Gasnier wrote:
Define and enable pwm1 and pwm3, timers1 & 3 trigger outputs on
stm32f469-eval board.
Signed-off-by: Fabrice Gasnier
---
Typo issue in commit header (stm32f469 --> stm32f4
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