For the Armada 375 SoC which comes with an xhci controller. Currently
the quirk is the same that the Armada 380/385 one, but by introducing
a new compatible string it will allow to make the driver evolve
seamless.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
.../bindings/phy/armada-375-usb-phy-cluster.txt
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file
This patch add the selection of the config symbol to build the USB3
support for Armada 38x.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu
For the Armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe related to the MBus windows
configuration. This patch adds the support of this quirk.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/Kconfig
The Marvell Armada 38x SoCs contains one EHCI host. This commit adds
the Device Tree description of this interface at the SoC level, and
also enables the USB2 port on the Armada 385 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-385
The Marvell Armada 38x SoCs contains two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada 385 DB platform and one
USB3 port on the Armada 385 RD platform.
Signed-off-by: Gregory CLEMENT gregory.clem
functions. Then if the clocks
are not supported we still can use the same calls, and there is no
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/xhci-plat.c | 57 +---
1 file changed, 54 insertions(+), 3 deletions
.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/xhci.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d280e9213d08..054017f66246 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
This commit allows to use the PHY provided through the device tree. It
will be useful for the Armada 375 SoCs. if no PHY is provided then the
behavior of the driver is unchanged.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/ehci-orion.c | 25
I
removed all the workaround related to the very earlier version of the
SoC, indeed there were very few boards with this version of the SoC.
This series is also available in
the branch USB-375-38x-3.15-rc1-V3
https://github.com/MISL-EBU-System-SW/mainline-public.git
Thanks,
Gregory CLEMENT (20
+
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/ehci-orion.c | 49 +++
1 file changed, 31 insertions(+), 18 deletions(-)
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index 30d35e5e503a
On 03/04/2014 10:16, Daniel Lezcano wrote:
On 03/28/2014 12:13 PM, Gregory CLEMENT wrote:
Add the wfi, cpu idle and cpu deep idle power states support for the
Armada XP SoCs.
All the latencies and the power consumption values used at the
armada_370_xp_idle_driver structure are preliminary
Hi Paul,
On 06/04/2014 11:37, Paul Bolle wrote:
On Sat, 2014-04-05 at 20:04 +0100, Arnd Bergmann wrote:
Gregory CLEMENT (1):
ARM: mvebu: add initial support for the Armada 375 SOCs
[...]
Thomas Petazzoni (7):
[...]
ARM: mvebu: add initial support for the Armada 380/385
Hi Thomas,
On 18/03/2014 22:04, Gregory CLEMENT wrote:
On 18/03/2014 21:55, Thomas Gleixner wrote:
On Tue, 18 Mar 2014, Gregory CLEMENT wrote:
On 07/03/2014 18:17, Thomas Gleixner wrote:
It might be the readback of the routing register. I don't have the
datasheet of this.
Sorry
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Makefile | 2
The Marvell Armada 375 SoC contains one EHCI host. This commit adds
the Device Tree description of this interface at the SoC level.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 18 ++
1 file changed, 18 insertions
In order to enable the USB3 host controller on the Armada 375 DB
platform, we need to create a ranges at the soc node level to describe
the special static window for USB3.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375-db.dts | 10 --
1
This patch add the selection of the config symbol to build the USB3
support for Armada 375.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu
Extend the compatible string list with armada-375-xhci. It is used to
describe xhci controller which is in the Armada 375 SoC.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1
one ranges to describe the special
window to be created but it must be done at the board level in the
dts.
- The usb3-controller node has two entries in the reg property, the
first for XHCI, the second for the internal registers
Signed-off-by: Gregory CLEMENT gregory.clem...@free
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
.../devicetree/bindings/arm/armada-375-usb-cluster.txt
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada
The Marvell Armada 38x SoCs contain one EHCI host. This commit adds
the Device Tree description of this interface at the SoC level, and
also enables the USB2 port on the Armada 385 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-385
For the Armada 375 SoC which comes with an xhci controller. Currently
the quirk is the same that the Armada 380/385 one, but by introducing
a new compatible string it will allow to make the driver evolve
seamless.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file
This patch add the selection of the config symbol to build the USB3
support for Armada 38x.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file
functions. Then if the clocks
are not supported we still can use the same calls, and there is no
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/xhci-plat.c | 52 ++--
1 file changed, 50 insertions(+), 2 deletions
The Marvell Armada 38x SoCs contain two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada 385 DB platform and one
USB3 port on the Armada 385 RD platforms.
Signed-off-by: Gregory CLEMENT gregory.clem
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host
Extend the compatible string list with armada-380-xhci. It is used to
describe xhci controller which is in the Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1
For the Armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe related to the MBus windows
configuration. This patch adds the support of this quirk.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/Kconfig
with Armada 375 binding.
This patches 1 to 4 and 10 to 11 should go through the xhci subsystem.
The rest of the series is more platform specific and should go through
the mvebu tree, except the patch 9 that should be taken directly by
the arm-soc maintainer.
Thanks,
Gregory CLEMENT (18):
usb: host
On 25/04/2014 16:15, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Fri, 25 Apr 2014 16:07:00 +0200, Gregory CLEMENT wrote:
Some platform (such as the Armada 38x ones) can gate the clock of
their USB controller. This patch add the support for the clock, by
enabling them during probe
On 25/04/2014 16:44, Gregory CLEMENT wrote:
On 25/04/2014 16:15, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Fri, 25 Apr 2014 16:07:00 +0200, Gregory CLEMENT wrote:
Some platform (such as the Armada 38x ones) can gate the clock of
their USB controller. This patch add the support
Hi Felipe,
On 20/04/2014 05:20, Felipe Balbi wrote:
On Fri, Apr 18, 2014 at 12:22:37PM +0200, Gregory CLEMENT wrote:
For the armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe, especially in relation with
the MBus windows initialization
For the armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe, especially in relation with
the MBus windows initialization. This patch adds this support.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/Kconfig
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file
This patch add the selection of the config symbol to build the USB3
support for Armada 38x.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file
The Marvell Armada 38x SoCs contain two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada 385 DB platform and one
USB3 port on the Armada 385 RD platforms.
Signed-off-by: Gregory CLEMENT gregory.clem
.
The rest of the series is more platform specific and should go through
the mvebu tree, except the last patch that should be taken directly by
the arm-soc maintainer.
The support for Armada 375 is coming soon.
Thanks,
Gregory
Gregory CLEMENT (8):
usb: host: xhci-plat: Allow to register glue code
Extend the compatible string list with xhci-armada-380. It is used to
describe xhci controller which is in the Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1
The usb3-utmi registers allow to configure the internal USB PHY of the
Armada 380/385 SoCs. A small initialization is needed to be able to use
the USB3 ports.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Makefile | 2 +-
arch/arm/mach-mvebu/usb
string can then be associated to an instance of this
structure. In the non device tree case a default structure is used.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/xhci-plat.c | 72 +---
drivers/usb/host/xhci.h
Hi Sebastian,
[...]
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory Clement gregory.clem...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without any
+ * warranty
Hi Sebastian,
On 18/04/2014 13:23, Sebastian Hesselbarth wrote:
On 04/18/2014 12:22 PM, Gregory CLEMENT wrote:
The Marvell Armada 38x SoCs contain two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada
Hi Sebastian,
On 18/04/2014 13:19, Sebastian Hesselbarth wrote:
On 04/18/2014 12:22 PM, Gregory CLEMENT wrote:
The usb3-utmi registers allow to configure the internal USB PHY of the
Armada 380/385 SoCs. A small initialization is needed to be able to use
the USB3 ports.
Signed-off
mediatek_board_dt_compat[] = {
+ mediatek,mt6589,
+ NULL,
+};
+
+DT_MACHINE_START(MEDIATEK_DT, Mediatek Cortex-A7 (Device Tree))
+ .init_machine = mediatek_dt_init,
+ .dt_compat = mediatek_board_dt_compat,
+MACHINE_END
--
Gregory Clement, Free Electrons
Kernel, drivers
?
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord
= mediatek,mtk6589-timer;
+ reg = 0x10008000 0x80;
+ interrupts = GIC_SPI 113 IRQ_TYPE_LEVEL_LOW;
+ clocks = system_clk, rtc-clk;
+ clock-names = sysclk, rtcclk;
+ };
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded
, mediatek,mtk6589-timer, mtk_timer_init);
+
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message
On 10/04/2014 08:29, Matthias Brugger wrote:
2014-04-09 22:26 GMT+02:00 Gregory CLEMENT
gregory.clem...@free-electrons.com:
Hi Matthias,
On 09/04/2014 19:45, Matthias Brugger wrote:
This adds a generic devicetree board file and a dtsi for boards
based on the MT6589 SoCs from Mediatek
PJ4B needs extra instructions for suspend and resume, so instead of
using the armv7 version, this commit introduces specific versions for
PJ4B.
Cc: Russell King li...@arm.linux.org.uk
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mm/proc-v7.S | 28
The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 37 +
1 file changed, 37 insertions
on the work of Nadav Haklai.
Signed-off-by: Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
---
drivers/cpuidle/Kconfig.arm | 5 ++
drivers/cpuidle/Makefile| 1 +
drivers
In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
---
arch/arm/mach-mvebu/pmsu.c | 18
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem
or the virtual address.
This patch add a check of the MMU bit to choose the accurate address,
then the calling function doesn't have to pass this information.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c| 6 +++---
arch/arm/mach-mvebu
) to be used by
the exposed functions (ll_add_cpu_to_smp_group and
ll_enable_coherency)
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c| 8 ++--
arch/arm/mach-mvebu/coherency_ll.S | 92 +-
arch/arm/mach-mvebu
set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always uses the SMP group 0. So
we can remove this parameter.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c | 4 ++--
arch/arm/mach-mvebu
When going to deep idle we need to disable the SoC snooping (aka
hardware coherency support). Playing with the coherency fabric
requires to use assembly code to be sure that the compiler doesn't
reorder the instructions nor do wrong optimization.
Signed-off-by: Gregory CLEMENT gregory.clem
The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 132
, and rename the config symbol
according the pattern used by other arm cpu: ARM_soc name_CPUIDLE
* Moved the build rule under the new ARM SoC section in the Makefile
* Rebased on Linus Torvalds master branch of Thursday September 12
Gregory CLEMENT (11):
ARM: PJ4B: Add cpu_suspend/cpu_resume hooks
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/mach
.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Hi,
This fix should be merged in 3.16 and maybe sent as a fix for 3.15
too.
The initial patch (ARM: mvebu: Fix missing binding documentation for
Armada 38x) was re-written after the review about the use of the
wildcards here:
http
Hi Jason,
This fix should be merged in 3.16 and maybe sent as a fix for 3.15
too.
[...]
Applied to mvebu/dt with Andrew's Ack.
I think it should go mvebu/fixes as this patch modifies the binding,
sooner is better.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers
For the Armada 380 and Armada 385 SoCs, the common bindings for those
2 SoCs, was forgotten. This patch add the documentation for the
marvell,aramda38x property.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Hi,
This fix should be merged in 3.16. For 3.15 I am not sure
Hi Rob,
On 19/06/2014 16:54, Rob Herring wrote:
On Thu, Jun 19, 2014 at 9:07 AM, Gregory CLEMENT
gregory.clem...@free-electrons.com wrote:
For the Armada 380 and Armada 385 SoCs, the common bindings for those
2 SoCs, was forgotten. This patch add the documentation for the
marvell,aramda38x
For the Armada 380 and Armada 385 SoCs, the common bindings for those
2 SoCs, was forgotten. This patch add the documentation for the
marvell,aramda38x property.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
--
Hi,
This fix should be merged in 3.16. For 3.15 I am not sure
On 21/06/2014 01:57, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:33:06PM -0500, Rob Herring wrote:
On Fri, Jun 20, 2014 at 1:52 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Thu, Jun 19, 2014 at 06:40:43PM +0200, Gregory CLEMENT wrote:
For the Armada 380 and Armada 385 SoCs, the common
hardware.
Thanks,
Gregory CLEMENT (4):
ARM: smp_scu: Used defined value instead of literal constant
ARM: smp_scu: Add the enable speculative linefills operation
ARM: smp_scu: Add the enable standby operation
ARM: imx6q: Use the new function scu_standby_enable()
Nadav Haklai (1):
ARM: mvebu
request.
Some SoC (such as the Armada 375/38x) can benefit of this feature. As
this is something related to the Cortex A9 and not specific to a SoC,
we can expose it in a common place.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/include/asm/smp_scu.h | 3
Enabling the SCU standby is now done in smp_scu.c. We don't need
anymore to manipulate the SCU register outside of this file.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-imx/platsmp.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git
scu_spec_linefills_enable instead of
implementing SCU specific feature at board level]
Signed-off-by: Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/board-v7.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu
on when any processor leaves WFI mode,
or if there is a new request on the ACP.
This feature is currently used by imx6 SoC. This patch add this
operation inside smp_scu in order to centralized all the access to SCU
in the same place.
Signed-off-by: Gregory CLEMENT gregory.clem...@free
The first bit of the SCU control register is actually the enable
it. So let's name it instead of using literal constant.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/kernel/smp_scu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git
On 27/06/2014 00:43, Gregory CLEMENT wrote:
The first bit of the SCU control register is actually the enable
it. So let's name it instead of using literal constant.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/kernel/smp_scu.c | 10 ++
1 file
On 27/06/2014 00:56, Rob Herring wrote:
On Thu, Jun 26, 2014 at 5:43 PM, Gregory CLEMENT
gregory.clem...@free-electrons.com wrote:
Hello,
Following the feedback I go on the patch ARM: mvebu: Enable SCU
Speculative linefills to L2 for Armada 375/38x :
http://thread.gmane.org
unconditionally if that is fine for all SCU users, or through a flags
argument?
OK using a flag argument makes sens indeed. About setting it unconditionally,
I would prefer not taking the risk to break the other platforms.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real
;
void __iomem *base;
- const char *default_parent = NULL;
+ const char *default_parent = tclk;
int n;
base = of_iomap(np, 0);
--
1.8.5.3
--
Gregory Clement, Free Electrons
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On 07/02/2014 16:00, Emilio López wrote:
El 07/02/14 11:49, Gregory CLEMENT escribió:
On 07/02/2014 15:43, Ezequiel Garcia wrote:
On Fri, Feb 07, 2014 at 09:24:30AM -0500, Jason Cooper wrote:
On Fri, Feb 07, 2014 at 10:06:08AM -0300, Emilio López wrote:
[snip a great explanation]
Guys, can
On 07/02/2014 17:16, Emilio López wrote:
Hi Gregory,
El 07/02/14 12:12, Gregory CLEMENT escribió:
On 07/02/2014 16:00, Emilio López wrote:
El 07/02/14 11:49, Gregory CLEMENT escribió:
On 07/02/2014 15:43, Ezequiel Garcia wrote:
On Fri, Feb 07, 2014 at 09:24:30AM -0500, Jason Cooper wrote
for A0 version
- add a check for this new board in the mvebu_dt_init function
- let the compatible string marvell,mv78230-a0-i2c in this dts
I would prefer the option 1 but I fear that Arnd would prefer the 2 other
options.
Gregory
thx,
Jason.
--
Gregory Clement, Free Electrons
feature and managed to switch
to a new kernel using kexec.
Thanks,
Gregory
Gregory CLEMENT (4):
ARM: mvebu: Clean-up the Armada XP support
ARM: mvebu: Move SCU power up in a function
ARM: mvebu: Fix secondary startup for Cortex A9 SoC
ARM: mvebu: Implement CPU hotplug support for Armada 38x
During the secondary startup the SCU was assumed to be in normal
mode. It is not always the case, and especially after a kexec. This
commit adds the needed sequence to put the SCU in normal mode.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/headsmp-a9
This will allow reusing the same function in the secondary_startup
for the Cortex A9 SoC.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu_ll.S | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach
tree.
In a few releases, when the old device tree will be obsolete, we will be
able to remove the smp field and then the armada-370-xp.h header.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/armada-370-xp.h | 6 --
arch/arm/mach-mvebu/board-v7.c
in the
-smp_secondary_init() hook.
This commit has been tested using CPU hotplug through sysfs
(/sys/devices/system/cpu/cpuX/online) and using kexec.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/platsmp-a9.c | 53
Hi Thomas,
On 24/10/2014 14:05, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Thu, 23 Oct 2014 20:14:28 +0200, Gregory CLEMENT wrote:
+ENTRY(power_up_scu)
+mrc p15, 4, r1, c15, c0 @ get SCU base address
+orr r1, r1, #0x8@ SCU CPU Power Status Register
Hi Thomas,
On 24/10/2014 14:19, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Fri, 24 Oct 2014 14:11:17 +0200, Gregory CLEMENT wrote:
Since this function is not static, I think it might be a good idea to
use a prefix that makes it more specific to the platform in order to
not pollute
From: Andrew Lunn and...@lunn.ch
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn and...@lunn.ch
---
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5
-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/phy/Kconfig | 6 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 145
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
):
Phy: DT binding documentation for Marvell MVEBU SATA phy.
Gregory CLEMENT (5):
phy: Use PTR_ERR_OR_ZERO to fix warning raised by coccinelle
Phy: DT binding documentation for the Armada 375 USB cluster binding
phy: add support for USB cluster on the Armada 375 SoC
ARM: mvebu: add Device Tree
it was reduced at around
50ppm (around 4s per day).
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clk/mvebu/armada-370.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index bef198a83863
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