For dealing with the code we use the SAR1 and not the SAR0. The code
was correct, and now the comments too.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clk/mvebu/armada-375.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk
in an new optional function related to each
SoC: is_sscg_enabled(). If this function is not present then no
correction is done on the clock frequency.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clk/mvebu/common.c | 74
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit
adds the description of this generator to the Device Tree describing
this SoC.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-370.dtsi | 4
1 file changed, 4 insertions
the mvebu tree.
The last one is just to fix a typo I found while I was reading the clk
code.
Thanks,
Gregory CLEMENT (4):
clk: mvebu: Fix clk frequency value if SSCG is enabled
clk: mvebu: armada-370: Fix timer drift caused by the SSCG deviation
ARM: mvebu: add SSCG to Armada 370 Device Tree
Hi Sebastian,
On 29/08/2014 14:48, Sebastian Hesselbarth wrote:
On 08/29/2014 01:43 PM, Gregory CLEMENT wrote:
When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1% but when
the clock is used for a timer it leads
Hi Thomas,
On 29/08/2014 15:08, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Fri, 29 Aug 2014 13:43:38 +0200, Gregory CLEMENT wrote:
+bool a370_is_sscg_enabled(void __iomem *sar)
Minor nit: static is missing here.
OK I will fix it in the next version
Thanks,
Gregory
Hi Leigh,
On 01/09/2014 00:25, Leigh Brown wrote:
Hi Gregory,
On 2014-08-29 12:43, Gregory CLEMENT wrote:
When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1% but when
the clock is used for a timer it leads
Hi Sebastian,
[...]
NR_IRQS:16 nr_irqs:16 16
L2C: device tree omits to specify unified cache
Jason, Thomas, Gregory,
we should add a cache-unified to the l2cc nodes for all SoCs.
Right,
I take care of it.
Thanks,
Gregory
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tree.
In a few releases, when the old device tree will be obsolete, we will be
able to remove the smp field and then the armada-370-xp.h header.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/armada-370-xp.h | 6 --
arch/arm/mach-mvebu/board-v7.c
in the
-smp_secondary_init() hook.
This commit has been tested using CPU hotplug through sysfs
(/sys/devices/system/cpu/cpuX/online) and using kexec.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/platsmp-a9.c | 53
to the function power_up_scu function to keep it
private and not pollute the global namespace.
Gregory CLEMENT (4):
ARM: mvebu: Clean-up the Armada XP support
ARM: mvebu: Move SCU power up in a function
ARM: mvebu: Fix the secondary startup for Cortex A9 SoC
ARM: mvebu: Implement the CPU
This will allow reusing the same function in the secondary_startup
for the Cortex A9 SoC.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu_ll.S | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach
During the secondary startup the SCU was assumed to be in normal
mode. It is not always the case, and especially after a kexec. This
commit adds the needed sequence to put the SCU in normal mode.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/headsmp-a9
it was reduced at around
50ppm (around 4s per day).
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clk/mvebu/armada-370.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index bef198a83863
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit
adds the description of this generator to the Device Tree describing
this SoC.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-370.dtsi | 4
1 file changed, 4 insertions
clear that the formula in datasheet is
erroneous
- added a fix_sscg_deviation() callback in order to be able to deal
with the Dove case which is different from the other mvebu SoCs
Gregory CLEMENT (4):
clk: mvebu: Fix clk frequency value if SSCG is enabled
clk: mvebu: armada-370: Fix
in an new optional function related to each
SoC: is_sscg_enabled(). The fix is done with the other new optional
function related to each SoC: fix_sscg_deviation. If one these
functions are not present then no correction is done on the clock
frequency.
Signed-off-by: Gregory CLEMENT gregory.clem...@free
For dealing with the code we use the SAR1 and not the SAR0. The code
was correct, and now the comments too.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clk/mvebu/armada-375.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk
Hi Jason,
On 22/11/2014 03:08, Jason Cooper wrote:
On Thu, Nov 13, 2014 at 12:47:48PM +0100, Gregory CLEMENT wrote:
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT
/majordomo-info.html
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Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/phy/Kconfig | 6 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 145 +++
include
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6
Andrew Lunn
- Move the DT binding documentation of the Armada 375 USB cluster into
the phy-mvebu.txt file.
- Made the armada375_usb_phy_xlate more robust if there is a phy_put
and then a phy_get.
Andrew Lunn (1):
Phy: DT binding documentation for Marvell MVEBU SATA phy.
Gregory CLEMENT (5
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
From: Andrew Lunn and...@lunn.ch
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn and...@lunn.ch
---
*usb_cluster_phy. Then you can invoke
platform_get_drvdata here to get *usb_cluster_phy.
While fixing this also add yourself as Maintainer of this file.
I am taking into account your comment and I am going to send a new version soon.
Thanks,
Gregory
Thanks
Kishon
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Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6
-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/phy/Kconfig | 6 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 158 +++
include
Add MAINTAINERS add entry for the Armada 375 USB cluster PHY driver.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ea4d0058fd1b..ea35fa243502 100644
--- a/MAINTAINERS
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
(1):
Phy: DT binding documentation for Marvell MVEBU SATA phy.
Gregory CLEMENT (6):
phy: Use PTR_ERR_OR_ZERO to fix warning raised by coccinelle
Phy: DT binding documentation for the Armada 375 USB cluster binding
phy: add support for USB cluster on the Armada 375 SoC
ARM: mvebu: add
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Andrew Lunn and...@lunn.ch
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn and...@lunn.ch
---
Hi Jason,
On 30/10/2014 12:39, Gregory CLEMENT wrote:
Hi,
This patch set is the second version of the series adding the hot plug
and also kexec support for the Armada 38x Socs.
If nobody object we could push them in linux-next.
The first patch was done in order to have the same code
it in. I'll look around for examples.
You can have a look on what we did for Armada XP:
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-xp.dtsi
arch/arm/boot/dts/armada-xp-gp.dts
I created a skeleton64.dtsi for this case
Gregory
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More
a
device node to get the regulator instead using the device object.
The first patch is not related to the second one, but it is little
improvement.
Gregory
Gregory CLEMENT (2):
regulator: core: Add a sanity check on the regulator_ enable/disable
functions
regulator: core: Add the device
associated to a child node which is not a device, it is the
case of the SATA ports of an ahci controller for instance.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/regulator/core.c | 114 +
drivers/regulator/devres.c
These two functions use the pointer passed in parameter without any
check. By adding a NULL pointer check, it allows using those functions
from a driver in a more generic way. It is useful especially for the
disable case if the regulator is optional.
Signed-off-by: Gregory CLEMENT gregory.clem
to the regulator_get family,
https://lkml.org/lkml/2014/12/26/155
I refactored the PHY support in the same time, so I would like to have
a feedback from the Berlin platform to ensure that no regressions was
introduced.
Thanks,
Grégory
Gregory CLEMENT (3):
ata: libahci: Clean-up the ahci_platform_en
family
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/ata/ahci.h | 2 +-
drivers/ata/ahci_imx.c | 14 +--
drivers/ata/libahci_platform.c | 206 -
include/linux/ahci_platform.h | 2 +
4 files changed
The phy_ functions handle the NULL pointer case, so there is no need
to skip them if there is a NULL pointer. Moreover, after the error
label there is already no check on the pointer. This patch removes the
unnecessary tests and brings some consistency.
Signed-off-by: Gregory CLEMENT gregory.clem
It is now possible to use a regulator property for each port of the
AHCI controller.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation
Hi Jason,
On 01/11/2014 23:46, Jason Cooper wrote:
Gregory,
On Fri, Oct 24, 2014 at 05:24:08PM +0200, Gregory CLEMENT wrote:
Hello,
this is the second version of a series I initially submitted in May:
https://lkml.org/lkml/2014/5/16/743
This series adds support for the USB cluster which
-370-xp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
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, right
before entering suspend, all interrupts are assigned to the boot CPU.
So what about /proc/irq/*/smp_affinity ?
Do this files still represent accurate information?
Thanks,
Gregory
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, timer_local_ctrl_reg;
We don't need to restore any other timer than the timer 0, but it
would worth mentioning that we save and restore only this one
by naming the variable timer0_ctrl_reg and timer0_local_ctrl_reg
Besides this and the typo:
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
--
1 file changed, 28 insertions(+), 2 deletions(-)
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
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http://free
-electrons.com: ported from 3.10 and added more
explanations(from Shimmer) in the commit log]
Signed-off-by: Guang Shen gs...@marvell.com
Signed-off-by: Shimmer Huang shimm...@marvell.com
Signed-off-by: Nadav Haklai nad...@marvell.com
Reviewed-by: Yehuda Yitschak yehu...@marvell.com
Signed-off-by: Gregory
a
real benefit as the DT should be correctly filled.
Remove this callback.
In the course of the factorization of the smp functions, this function
has been more and more reduced. As stated, the remaining part is not so
useful now, it makes sens to remove it now.
Acked-by: Gregory CLEMENT
Hi Hans,
On 16/01/2015 09:17, Hans de Goede wrote:
Hi,
On 15-01-15 15:09, Gregory CLEMENT wrote:
Add the regulators to each SATA port.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-388-gp.dts | 126
Hi Mark and Hans,
On 16/01/2015 13:37, Mark Brown wrote:
On Fri, Jan 16, 2015 at 11:10:18AM +0100, Hans de Goede wrote:
On 16-01-15 10:27, Gregory CLEMENT wrote:
+ reg_sata0: pwr-sata0 {
+ compatible = regulator-fixed;
+ regulator-name = pwr_en_sata0;
+ enable
Hi Hans,
On 15/01/2015 09:46, Hans de Goede wrote:
Hi,
On 13-01-15 15:22, Gregory CLEMENT wrote:
The current implementation of the libahci allows using multiple PHYs
but not multiple regulators. This patch adds the support of multiple
regulators. Until now it was mandatory to have a PHY
of the regulator framework and instead
associate each regulator of a port with an unique name.
- Added the acked-by on the clean-up patch
Gregory CLEMENT (4):
ata: libahci: Clean-up the ahci_platform_en/disable_phys functions
Documentation: bindings: Add the regulator property to the sub-nodes
Add the regulators to each SATA port.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-388-gp.dts | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/boot/dts/armada-388-gp.dts
b/arch/arm/boot/dts
-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/ata/ahci.h | 2 +-
drivers/ata/ahci_imx.c | 14 +--
drivers/ata/libahci_platform.c | 230 +
include/linux/ahci_platform.h | 2 +
4 files changed, 173 insertions
The phy_ functions handle the NULL pointer case, so there is no need
to skip them if there is a NULL pointer. Moreover, after the error
label there is already no check on the pointer. This patch removes the
unnecessary tests and brings some consistency.
Signed-off-by: Gregory CLEMENT gregory.clem
It is now possible to use a regulator property for each port of the
AHCI controller.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
boards if ARCH_MULTI_V7
select ARM_ERRATA_720789
- select ARM_ERRATA_753970
select ARM_GIC
select ARMADA_38X_CLK
select HAVE_ARM_SCU
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and it didn't introduce
any regression on the board I tested.
Gregory
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Hi Mark,
On 29/12/2014 16:40, Mark Brown wrote:
On Fri, Dec 26, 2014 at 06:26:38PM +0100, Gregory CLEMENT wrote:
These two functions use the pointer passed in parameter without any
check. By adding a NULL pointer check, it allows using those functions
from a driver in a more generic way
Hi Mark,
On 06/01/2015 13:00, Mark Brown wrote:
On Tue, Jan 06, 2015 at 12:36:02PM +0100, Gregory CLEMENT wrote:
Hi Mark,
On 29/12/2014 16:40, Mark Brown wrote:
On Fri, Dec 26, 2014 at 06:26:38PM +0100, Gregory CLEMENT wrote:
No, especially in the case of regulator_enable
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Hi Hans,
On 09/01/2015 16:46, Hans de Goede wrote:
Hi,
On 09-01-15 11:39, Gregory CLEMENT wrote:
It is now possible to use a regulator property for each port of the
AHCI controller.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings
);
master-min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata-max_divisor);
+ master-num_chipselect = devdata-num_cs;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
spi-base = devm_ioremap_resource(pdev-dev, r);
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The phy_ functions handle the NULL pointer case, so there is no need
to skip them if there is a NULL pointer. Moreover, after the error
label there is already no check on the pointer. This patch removes the
unnecessary tests and brings some consistency.
Signed-off-by: Gregory CLEMENT gregory.clem
Add the regulators to each SATA port.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-388-gp.dts | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/boot/dts/armada-388-gp.dts
b/arch/arm/boot/dts
It is now possible to use a regulator property for each port of the
AHCI controller.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
.
- Added the acked-by on the clean-up patch
Gregory CLEMENT (4):
ata: libahci: Clean-up the ahci_platform_en/disable_phys functions
Documentation: bindings: Add the regulator property to the sub-nodes
AHCI bindings
ata: libahci: Allow using multiple regulators
ARM: mvebu: Armada 385 GP: Add
-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/ata/ahci.h | 2 +-
drivers/ata/ahci_imx.c | 14 +--
drivers/ata/libahci_platform.c | 227 +
include/linux/ahci_platform.h | 2 +
4 files changed, 170 insertions
Add the regulators to each SATA port.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-388-gp.dts | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/boot/dts/armada-388-gp.dts
b/arch/arm/boot/dts
. To preserve the bisectability the change
in the ahci_imx driver was done in the same patch.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/ata/ahci.h | 2 +-
drivers/ata/ahci_imx.c | 14 +--
drivers/ata/libahci_platform.c | 218
patch
Gregory CLEMENT (4):
ata: libahci: Clean-up the ahci_platform_en/disable_phys functions
Documentation: bindings: Add the regulator property to the sub-nodes
AHCI bindings
ata: libahci: Allow using multiple regulators
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
It is now possible to use a regulator property for each port of the
AHCI controller.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
The phy_ functions handle the NULL pointer case, so there is no need
to skip them if there is a NULL pointer. Moreover, after the error
label there is already no check on the pointer. This patch removes the
unnecessary tests and brings some consistency.
Signed-off-by: Gregory CLEMENT gregory.clem
(*hpriv-phys);
...
sz = (nports ? nports : 1) * sizeof(*hpriv-target_pwrs);
I will do it.
Thanks again for your review,
Gregory
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at machine level, how could you also doing it at device level?
Thanks,
Gregory
Regards,
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Hi Joe,
On 08/03/2015 20:15, Joe Perches wrote:
commit c6a95dbee793 (MAINTAINERS: add the RTC driver for the Armada38x)
typoed the pattern, fix it.
Indeed it was a typo that I though I had fixed, but maybe I didn't actually
send the patch.
So of course:
Acked-by: Gregory CLEMENT gregory.clem
On 11/03/2015 16:01, Stas Sergeev wrote:
11.03.2015 16:14, Russell King - ARM Linux пишет:
On Wed, Mar 11, 2015 at 01:44:57PM +0100, Gregory CLEMENT wrote:
Hi Stas,
On 10/03/2015 17:54, Stas Sergeev wrote:
Hello, the patch below is needed for a successful boot on armada-xp.
I am really
this patch soon in the
mvebu/for-next branch.
Indeed I planed to do it today
I apologize for the inconvenience.
Simon
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
n_tty_data *ldata;
/* Currently a malloc failure here can panic */
-ldata = vmalloc(sizeof(*ldata));
+ldata = kmalloc(sizeof(*ldata), GFP_KERNEL);
if (!ldata)
goto err;
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development
SoCs. There is issues with the the Armada
375, and the support would be added (if possible) in a future patch.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/common.h | 5 ++--
arch/arm/mach-mvebu/pm-board.c | 13 ++
arch/arm/mach-mvebu/pm.c
up the system. The last
patch warns the user about it.
The first patch is a clean-up found while working on this series
All the patch are independents either for building or for running.
Thanks,
Gregory
Gregory CLEMENT (5):
ARM: mvebu: Use __init for the PM initialization functions
ARM
mvebu_pm_init and mvebu_armada_xp_gp_pm_init are only called during
boot, so flag them with __init and save some memory.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pm-board.c | 2 +-
arch/arm/mach-mvebu/pm.c | 2 +-
2 files changed, 2
, the wake source won't be taken into consideration.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/pm.c b/arch/arm/mach-mvebu/pm.c
index 547310230edd..94966f1e4b14 100644
On the Armada 375/38x/39x SoCs, in standby mode the SoC stay powered
and it is possible to wake-up from any interrupt sources. This patch
adds flag to the GIC irqchip driver to let linux know this.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/board-v7
On the Armada 370/XP SoCs, in standby mode the SoC stay powered and it
is possible to wake-up from any interrupt sources. This patch adds
flag to the MPIC irqchip driver to let linux know this.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/irqchip/irq-armada-370
and title]
Signed-off-by: Lior Amsalem al...@marvell.com
Reviewed-by: Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/ata/sata_mv.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/sata_mv.c b
Hi Tejun,
On 30/03/2015 19:35, Tejun Heo wrote:
Hello,
On Mon, Mar 30, 2015 at 07:32:45PM +0200, Gregory CLEMENT wrote:
From: Nadav Haklai nad...@marvell.com
With this patch, when searching for active link, first search through
the port multiplier links. And then fall to the default ap
Hi Marcin,
On 01/04/2015 10:34, Marcin Wojtas wrote:
Hi Gregory,
2015-03-30 16:04 GMT+02:00 Gregory CLEMENT
gregory.clem...@free-electrons.com:
On the Armada 375/38x/39x SoCs, in standby mode the SoC stay powered
and it is possible to wake-up from any interrupt sources. This patch
adds
in standby mode
but for the mvebu SoCs, no interrupt can wake up the system. The last
patch warns the user about it.
The first patch is a clean-up found while working on this series
All the patch are independents either for building or for running.
Thanks,
Gregory
Gregory CLEMENT (5):
ARM
;
usb-phy = usb3_phy;
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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and then push
it
to arm-soc.
Thanks,
Gregory
Brian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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the body
Hi Sebastian,
On 17/02/2015 19:52, Sebastian Hesselbarth wrote:
Fix Dove's register addresses of uart2 and uart3 nodes that seem to
be broken since ages due to a copy-and-paste error.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Gregory CLEMENT gregory.clem
Hi Sebastian,
On 17/02/2015 19:52, Sebastian Hesselbarth wrote:
We want to enforce the use of named flags in GPIO and interrupt
specifiers, include the corresponding headers to Dove's SoC dtsi.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Gregory CLEMENT
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