This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/configs/defconfig | 5 +
1
Haklai <nad...@marvell.com>
Tested-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/ata/ahci_mvebu.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
A
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Pet
>> /* Refill processing */
>> - err = mvneta_rx_refill(pp, rx_desc);
>> + err = bm_in_use ? mvneta_bm_pool_refill(pp->bm_priv,
>> bm_pool) :
>> + mvneta_rx_refill(pp, rx_desc);
>>
Since the commit 2dcf75e2793c ("net: mvneta: Associate RX queues with
each CPU") all the percpu irq are used and unmask at initialization, so
there is no point to unmask them first.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marv
the CPUs and the queues could be wrong. During this loop the
interrupt mask is also updating for each CPUs, It should not be changed
in the same time by other part of the driver.
This patch adds spinlock to create the needed critical sections.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
itten]."
That means that each time we want to manipulate these bits we had to do
it on each cpu and not only on the current cpu.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 100 --
1
the port is stopping.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 3358c9
, the other fix potential issues in the
driver.
Thanks,
Gregory
Gregory CLEMENT (6):
net: mvneta: Fix for_each_present_cpu usage
net: mvneta: Use on_each_cpu when possible
net: mvneta: Remove unused code
net: mvneta: Modify the queue related fields from each cpu
net: mvneta
ensures
that all the calls will be done all at once.
Fixes: f86428854480 ("net: mvneta: Statically assign queues to CPUs")
Reported-by: Stefan Roese <stefan.ro...@gmail.com>
Suggested-by: Jisheng Zhang <jszh...@marvell.com>
Suggested-by: Russell King <rmk+ker...@arm.linux.org.u
ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 90ff5c7e19ea..3d6e313
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-elec
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++
1 fil
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../devicetree/bindings/arm/m
as there is no dependency at all with the
rest of the series. I think that the rest of the series should go
through the arm-soc maintainer but in doubt I also added the ARM64
maintainer as suggested by get_maintainer.pl. Actually all the patches
are independents.
Thanks,
Gregory
Gregory CLEMENT (8):
arm64: add
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINT
merate]
Signed-off-by: Wilson Ding <ding...@marvell.com>
Signed-off-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/configs/defconfig | 5 +
1
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Pet
Haklai <nad...@marvell.com>
Tested-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/ata/Kconfig | 2 +-
drivers/ata/ahci_mvebu.c | 14 +-
2 files changed, 10 insertions(+), 6 deletions(-)
diff
Hi David,
On sam., janv. 30 2016, David Miller <da...@davemloft.net> wrote:
> From: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> Date: Fri, 29 Jan 2016 17:26:06 +0100
>
>> @@ -370,6 +370,8 @@ struct mvneta_port {
>> struct net_device *d
Since the commit 2dcf75e2793c ("net: mvneta: Associate RX queues with
each CPU") all the percpu irq are used and unmask at initialization, so
there is no point to unmask them first.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marv
, the other fix potential issues in the
driver.
Thanks,
Gregory
Changelog:
v1 -> v2
Fix spinlock comment. Pointed by David Miller
Gregory CLEMENT (6):
net: mvneta: Fix for_each_present_cpu usage
net: mvneta: Use on_each_cpu when possible
net: mvneta: Remove unused code
net: mvneta: Mod
ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 90ff5c7e19ea..3d6e313
ensures
that all the calls will be done all at once.
Fixes: f86428854480 ("net: mvneta: Statically assign queues to CPUs")
Reported-by: Stefan Roese <stefan.ro...@gmail.com>
Suggested-by: Jisheng Zhang <jszh...@marvell.com>
Suggested-by: Russell King <rmk+ker...@arm.linux.org.u
the CPUs and the queues could be wrong. During this loop the
interrupt mask is also updating for each CPUs, It should not be changed
in the same time by other part of the driver.
This patch adds spinlock to create the needed critical sections.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Hi Sergei,
On lun., févr. 01 2016, Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
wrote:
> Hello.
>
> On 2/1/2016 4:07 PM, Gregory CLEMENT wrote:
>
>> Since the commit 2dcf75e2793c ("net: mvneta: Associate RX queues with
>> each CPU"
itten]."
That means that each time we want to manipulate these bits we had to do
it on each cpu and not only on the current cpu.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 100 --
1
the port is stopping.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 4d40d2
Hi Jisheng,
On mer., févr. 03 2016, Jisheng Zhang <jszh...@marvell.com> wrote:
> On Tue, 2 Feb 2016 19:07:41 +0100 Gregory CLEMENT wrote:
>
>> The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
>> depending of the variant.
>>
>
00 0x1000>;
>> +};
>
> It would be good to comment as to why we can't use 256M of the memory.
Actually the comment is wrong and the size too, we do use the 512MB.
I will fix it
Thanks,
Gregory
>
> Otherwise this looks fine.
>
> Mark.
--
Gregory Clement, Fr
Hi Rob,
On mar., févr. 02 2016, Rob Herring <r...@kernel.org> wrote:
> On Tue, Feb 02, 2016 at 07:07:44PM +0100, Gregory CLEMENT wrote:
>> The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
>> introduces the Device Tree binding that documents the to
Hi Arnd,
On mer., févr. 03 2016, Arnd Bergmann <a...@arndb.de> wrote:
> On Wednesday 03 February 2016 08:55:22 Gregory CLEMENT wrote:
>> >>
>> >> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
>> >> index 21074f674bd
+ port->iotype = UPIO_MEM32;
>> + port->flags = UPF_FIXED_PORT;
>> + port->line = 0; /* single port: force line number to 0 */
>> +
>> + port->irq= irq->start;
>> + port->irqflags = 0;
>
> Please use port->irqflags = IRQF_SHARED;
> As ubuntu opens multiple consoles A3700 can't boot to it (only to
> buildroot with single console).
But this irq is not shared, this looks like a hack hidding the real
issue.
Gregory
>
> Best regards,
> Marcin
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
= TTY_MAJOR,
>> +.minor = 64,
>
> NAK
>
> TTY_MAJOR 64+ is the 8250 driver and ttyS is the 8250 driver name. You
> should be using a dynamic major (0) for all new drivers and you need to
> pick a different and unused ttyXXX format name.
I missed this one, I will remove .major and .minor and use our own
ttyXX.
Thanks,
Gregory
>
> Alan
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Mark,
On mar., févr. 02 2016, Mark Rutland <mark.rutl...@arm.com> wrote:
> On Tue, Feb 02, 2016 at 07:07:39PM +0100, Gregory CLEMENT wrote:
>> From: Wilson Ding <ding...@marvell.com>
>>
>> Armada-3700's uart is a simple serial port, which doesn't
>>
Does the the mvebu UART vary between platforms at all?
I am not sure to undersatnd your question.
If you asked about the UART used on the other mvebu SoCs then my answer
is: on all the other mvebu SoC until now third party IPs were used. This
one is the first one dedicated to an mevbu SoC and currently only used
on Armada 3700 but I don't know what are the plan for the future mvebu
SoCs.
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Florian,
thanks for your review!
On mer., janv. 27 2016, Florian Fainelli <f.faine...@gmail.com> wrote:
> On 12/01/16 11:10, Gregory CLEMENT wrote:
>> This basic implementation allows to share code between driver using
>> hardware buffer management. As the code
Hi Arnd,
On mar., févr. 02 2016, Arnd Bergmann <a...@arndb.de> wrote:
> On Tuesday 02 February 2016 19:07:39 Gregory CLEMENT wrote:
>
>> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
>> index 39721ec4f415..b291f934d51b 100644
>> --- a/drive
From: Thomas Petazzoni
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other
ted
- Removed marvell,armada3700 from the device tree binding and directly
used marvell,armada3710 for common feature: pointed by Rob
- Fix memory node with coorect size in armada-3720-db.dts: suggested
by Mark
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it by default when ARCH_MV
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
A
by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/irqchip/Kconfig | 1 -
1
merate]
Signed-off-by: Wilson Ding <ding...@marvell.com>
Signed-off-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Pet
Haklai <nad...@marvell.com>
Tested-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/ata/ahci_mvebu.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/configs/defconfig | 5 +
1
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINT
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++
1 fil
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../devicetree/bindings/arm/m
it, avoiding a kernel crash.
Fixes: 4efb2f694114 ("usb: host: xhci-plat: add struct xhci_plat_priv")
Cc: sta...@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/usb/host/xhci-plat.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletio
bool "Marvell MV78xx0"
> + depends on ARCH_MULTI_V5
> select ARCH_REQUIRE_GPIOLIB
> select CPU_FEROCEON
> select MVEBU_MBUS
> --
> 1.9.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
moved marvell,armada3700 from the device tree binding and directly
used marvell,armada3710 for common feature: pointed by Rob
- Fix memory node with coorect size in armada-3720-db.dts: suggested
by Mark
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Pet
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/configs/defconfig | 5 +
1
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINT
From: Thomas Petazzoni
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@k
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++
1 fil
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
A
Haklai <nad...@marvell.com>
Tested-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/ata/ahci_mvebu.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/
merate]
Signed-off-by: Wilson Ding <ding...@marvell.com>
Signed-off-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt
by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/irqchip/Kconfig | 1 -
1
Hi Arnd,
On mar., févr. 16 2016, Arnd Bergmann <a...@arndb.de> wrote:
> On Tuesday 16 February 2016 19:14:50 Gregory CLEMENT wrote:
>> This series introduce the support of the Armada 3700 family: it is the
>> first ARM64 SoC of the mvebu family submitted to the mainl
d, but I think what we really want to
> do here is to remove the dependency, as the new ARM64 platforms are going
> to need this driver anyway.
Actually the mvebu ARM64 platform we know about (Armada 3700, 7K and
8K), won't use the same controller. A7K/A8K will use a synopsis IP and
Armada 3700
Hi Willy,
On mer., févr. 17 2016, Willy Tarreau <w...@1wt.eu> wrote:
> Hi Gregory,
>
> On Tue, Feb 16, 2016 at 04:33:35PM +0100, Gregory CLEMENT wrote:
>> Hello,
>>
>> A few weeks ago I sent a proposal for a API set for HW Buffer
>> management,
Hi Greg and Jiri
On mar., févr. 16 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> From: Wilson Ding <ding...@marvell.com>
>
> Armada-3700's uart is a simple serial port, which doesn't
> support. Configuring the modem control lines. The uart port
Hi Tejun and Hans,
On mar., févr. 16 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> From: Lior Amsalem <al...@marvell.com>
>
> The main difference in the new Armada 3700 is that no address
> decoding needs to take place in the driver probe.
&
ig
> @@ -58,6 +58,7 @@ CONFIG_MTD_M25P80=y
> CONFIG_MTD_NAND=y
> CONFIG_MTD_NAND_PXA3xx=y
> CONFIG_MTD_SPI_NOR=y
> +CONFIG_SRAM=y
> CONFIG_EEPROM_AT24=y
> CONFIG_BLK_DEV_SD=y
> CONFIG_ATA=y
> --
> 1.8.3.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-
s used for indirect access to buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@fre
om: add suppport for the ClearFog board]
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm/boot/dts/armada-385-db-ap.dts | 20 +++-
arch/arm/boot/dts/armada-388-clearfog.dts
ency it is better if
you merge it in the same time as the 3 other ones.
Thanks,
Gregory
Gregory CLEMENT (2):
net: add a hardware buffer management helper API
net: mvneta: Use the new hwbm framework
Marcin Wojtas (6):
ARM: dts: armada-38x: add buffer manager nodes
ARM: dts: armada-38x: enable buffer
rating with
existing mvneta driver. New device tree binding documentation is added and
the one of mvneta is updated accordingly.
[gregory.clem...@free-electrons.com: removed the suspend/resume part]
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <grego
Now that the hardware buffer management framework had been introduced,
let's use it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 45 +++---
drivers/net/ethernet/m
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Buffer Manager and
PnC configuration.
[gregory.clem...@free-electrons.com: Fix size test for
mvebu_mbus_get_dram_win_info]
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
[DRAM window information reference in LKv3.10]
Signed-off-by: Evan Wang <xsw...@marvell.com>
Signed-off-by: Gregory CLE
s used for indirect access to buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@fre
number of possible pools, each port is
supposed to use single pool for all kind of packets.
Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-o
Hi David,
On jeu., janv. 14 2016, David Laight <david.lai...@aculab.com> wrote:
> From: Gregory CLEMENT
>> Sent: 12 January 2016 19:11
>> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
>> ---
>> drivers/bus/mvebu-mbus.c | 2 +
Hi Jisheng,
On mar., févr. 16 2016, Jisheng Zhang <jszh...@marvell.com> wrote:
> Dear Gregory,
> On Mon, 8 Feb 2016 18:14:17 +0100 Gregory CLEMENT wrote:
>
>> Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
>> CPUs. There are two members
Hi Jisheng,
On mar., févr. 16 2016, Jisheng Zhang <jszh...@marvell.com> wrote:
> Dear Gregory,
>
> On Mon, 8 Feb 2016 18:14:13 +0100 Gregory CLEMENT wrote:
>
>> The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
>> depending of the variant.
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Now that the hardware buffer management framework had been introduced,
let's use it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 18 +++--
drivers/net/ethernet/m
From: Marcin Wojtas
Some SRAM users may require non-bufferable access to the memory, which is
impossible, because devm_ioremap_wc() is used for setting sram->virt_base.
This commit adds optional flag 'no-memory-wc', which allow to choose remap
method, using DT property.
uot;
- Removed the patch "ARM: mvebu: enable SRAM support in
mvebu_v7_defconfig" of this series and already applied it
- Modified the order of the patches.
In order to ease the test the branch mvneta-BM-framework-v5 is
available at g...@github.com:MISL-EBU-System-SW/mainline-publ
om: add suppport for the ClearFog board]
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Russell King <rmk+ker...@arm.linux.org.uk>
---
arch/arm/boot/dts/armada-385-db-ap.dts | 20 +
rating with
existing mvneta driver. New device tree binding documentation is added and
the one of mvneta is updated accordingly.
[gregory.clem...@free-electrons.com: removed the suspend/resume part]
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <grego
number of possible pools, each port is
supposed to use single pool for all kind of packets.
Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-o
Allow Openblock AX3 using hardware buffer management with mvneta.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/bo
s used for indirect access to buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@fre
s used for indirect access to buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@fre
Buffer Manager and
PnC configuration.
[gregory.clem...@free-electrons.com: Fix size test for
mvebu_mbus_get_dram_win_info]
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
[DRAM window information reference in LKv3.10]
Signed-off-by: Evan Wang <xsw...@marvell.com>
Signed-off-by: Gregory CLE
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