Re: [PATCH] net: mvneta: Add missing hotplug notifier transition

@@ -2920,6 +2920,8 @@ static int mvneta_percpu_notifier(struct > switch (action) { > case CPU_ONLINE: > case CPU_ONLINE_FROZEN: > + case CPU_DOWN_FAILED: > + case CPU_DOWN_FAILED_FROZEN: > spin_lock(>lock); > /* Configuring the

Re: [PATCH v6 net-next 01/10] misc: sram: add optional ioremap without write combining

Hi Arnd, I forgot to add you in CC for this patch. What is your opinion about it? Gregory On lun., mars 14 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> wrote: > From: Marcin Wojtas <m...@semihalf.com> > > Some SRAM users may require non-bufferable access

[PATCH v6 net-next 02/10] ARM: dts: armada-38x: add buffer manager nodes

s used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@fre

[PATCH v6 net-next 00/10] API set for HW Buffer management

he patches. In order to ease the test the branch mvneta-BM-framework-v6 is available at g...@github.com:MISL-EBU-System-SW/mainline-public.git. Thanks, Gregory Gregory CLEMENT (3): ARM: dts: armada-xp-openblocks-ax3-4: Add BM support net: add a hardware buffer management helper API net: mvneta: U

[PATCH v6 net-next 01/10] misc: sram: add optional ioremap without write combining

From: Marcin Wojtas Some SRAM users may require non-bufferable access to the memory, which is impossible, because devm_ioremap_wc() is used for setting sram->virt_base. This commit adds optional flag 'no-memory-wc', which allow to choose remap method, using DT property.

[PATCH v6 net-next 06/10] ARM: dts: armada-xp-openblocks-ax3-4: Add BM support

Allow Openblock AX3 using hardware buffer management with mvneta. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/bo

[PATCH v6 net-next 07/10] bus: mvebu-mbus: provide api for obtaining IO and DRAM window information

Buffer Manager and PnC configuration. [gregory.clem...@free-electrons.com: Fix size test for mvebu_mbus_get_dram_win_info] Signed-off-by: Marcin Wojtas <m...@semihalf.com> [DRAM window information reference in LKv3.10] Signed-off-by: Evan Wang <xsw...@marvell.com> Signed-off-by: Gregory CLE

[PATCH v6 net-next 09/10] net: add a hardware buffer management helper API

ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- include/net/hwbm.h | 28 ++ net/Kconfig| 3 ++ net/core/Makefile | 1 + net/core/hwbm.c| 87 ++ 4 files changed, 119 insertions(+) create

[PATCH v6 net-next 03/10] ARM: dts: armada-38x: enable buffer manager support on Armada 38x boards

om: add suppport for the ClearFog board] Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Acked-by: Russell King <rmk+ker...@arm.linux.org.uk> --- arch/arm/boot/dts/armada-385-db-ap.dts | 20 +

[PATCH v6 net-next 04/10] ARM: dts: armada-xp: add buffer manager nodes

s used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@fre

[PATCH v6 net-next 10/10] net: mvneta: Use the new hwbm framework

Now that the hardware buffer management framework had been introduced, let's use it. Tested-by: Sebastian Careba <nitrosh...@yahoo.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/Kconfig | 1 + drivers/net/ethernet/marv

[PATCH v6 net-next 05/10] ARM: dts: armada-xp: enable buffer manager support on Armada XP boards

number of possible pools, each port is supposed to use single pool for all kind of packets. Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" status for 'bm' and 'bm-bppi' (internal SRAM) nodes. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-o

[PATCH v6 net-next 08/10] net: mvneta: bm: add support for hardware buffer management

rating with existing mvneta driver. New device tree binding documentation is added and the one of mvneta is updated accordingly. [gregory.clem...@free-electrons.com: removed the suspend/resume part] Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <grego

Re: linux-next: manual merge of the net-next tree with Linus' tree

xf0, 0x01) 0 0 0xd000 0x10 > MBUS_ID(0x01, 0x1d) 0 0 0xfff0 0x10 > - MBUS_ID(0x01, 0x2f) 0 0 0xf000 0x800 > - MBUS_ID(0x09, 0x09) 0 0 0xf810 0x1 > - MBUS_ID(0x09, 0x05) 0

[PATCH net v2 4/4] net: mvneta: replace magic numbers by existing macros

From: Dmitri Epshtein <d...@marvell.com> Some literal values are actually already defined by macros, so let's use them. [gregory.clem...@free-electrons.com: split intial commit in two individual changes] Signed-off-by: Dmitri Epshtein <d...@marvell.com> Signed-off-by: Gre

[PATCH net v2 0/4] Few mvneta fixes

ic numbers by existing macros Gregory CLEMENT (1): net: mvneta: Fix spinlock usage drivers/net/ethernet/marvell/mvneta.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) -- 2.5.0

[PATCH net v2 3/4] net: mvneta: fix error messages in mvneta_port_down function

From: Dmitri Epshtein <d...@marvell.com> This commit corrects error printing when shutting down the port. [gregory.clem...@free-electrons.com: split initial commit in two individual changes] Signed-off-by: Dmitri Epshtein <d...@marvell.com> Signed-off-by: Gregory CLEMENT <grego

[PATCH net v2 1/4] net: mvneta: Fix spinlock usage

ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/mvneta.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index b0ae69f84493..8dc7df2

[PATCH net v2 2/4] net: mvneta: enable change MAC address when interface is up

ld Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network unit") Cc: sta...@vger.kernel.org Signed-off-by: Dmitri Epshtein <d...@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/mvneta.c | 2

Re: [PATCH] serial: Make SERIAL_MVEBU_UART depend on ARCH_MVEBU

elect SERIAL_CORE > help > This driver is for Marvell EBU SoC's UART. If you have a machine > -- > 1.9.1 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH] bus: mvebu-mbus: use %pad to print phys_addr_t

o(phys_addr_t phyaddr, u8 > *target, u8 *attr) > } > } > > - pr_err("invalid dram address 0x%x\n", phyaddr); > + pr_err("invalid dram address %pa\n", ); > return -EINVAL; > } > EXPORT_SYMBOL_GPL(mvebu_mbus_ge

[PATCH 3/5] dmaengine: mv_xor: add support for Armada 3700 SoC

R access to DRAM by opening default window to 4GB space with specific attribute. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- Documentation/devicetree/bindings/dma/mv-xor.txt | 3 +- drivers/dma/mv_xor.c

[PATCH 4/5] dmaengine: mv_xor: Allow selecting mv_xor for mvebu only compatible SoC

Armada 3700 SoC uses the mv_xor driver but don't select anymore the PLAT_ORION symbol. This commit extends the dependency of the mv_xor driver to the more modern SoCs only compatible with ARCH_MVEBU, which allows using it with the Armada 3700 SoC. Signed-off-by: Gregory CLEMENT <gregory.c

[PATCH 5/5] arm64: dts: marvell: add XOR node for Armada 3700 SoC

From: Marcin Wojtas <m...@semihalf.com> Armada 3700 SoC comprise one dual-channel XOR engine and this patch adds its according representation. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm6

[PATCH 2/5] dmaengine: mv_xor: use SoC type instead of directly the operation mode

, and then depending to the type the engine setup will be selected. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/mv_xor.c | 40 drivers/dma/mv_xor.h | 1 + 2 files changed, 29 insertions(+), 12 deletions(-)

[PATCH 0/5] Add XOR engine support to Armada 3700 SoC (ARM64)

the different family have been added. Once the dmaengine part will be approved, I will apply the dts part in the mvebu/dt64 tree. Thanks, Gregory Gregory CLEMENT (3): dmaengine: mv_xor: make the code 64 bits compliant dmaengine: mv_xor: use SoC type instead of directly the operation mode

[PATCH 1/5] dmaengine: mv_xor: make the code 64 bits compliant

Fix two warnings which appear when building for 64 bits target. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/mv_xor.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 3922a5

Re: [PATCH v4] ARM: dts: kirkwood: Add DTS for Linksys EA4200v2/EA4500\

on a Marvell 88E6282 SoC and 88E6171 switch. >>> >>> Signed-off-by: Bert Vermeulen <b...@biot.com> >> >> Reviewed-by: Andrew Lunn <and...@lunn.ch> > > Reviewed-by: Imre Kaloz <ka...@openwrt.org> Applied on mvebu/dt with the reviewed-by flags and a fix

Re: [PATCH 1/4] arm64: dts: marvell: Clean up armada-3720-db

Hi Andreas, On ven., mars 25 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> wrote: > Hi Andreas, > > On jeu., mars 24 2016, Andreas Färber <afaer...@suse.de> wrote: > >> Hi Gregory, >> >> Am 24.03.2016 um 17:11 schrieb Gregory CLEMEN

[PATCH v2 2/5] dmaengine: mv_xor: use SoC type instead of directly the operation mode

, and then depending to the type the engine setup will be selected. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/mv_xor.c | 40 drivers/dma/mv_xor.h | 1 + 2 files changed, 29 insertions(+), 12 deletions(-)

[PATCH v2 4/5] dmaengine: mv_xor: Allow selecting mv_xor for mvebu only compatible SoC

Armada 3700 SoC uses the mv_xor driver but don't select anymore the PLAT_ORION symbol. This commit extends the dependency of the mv_xor driver to the more modern SoCs only compatible with ARCH_MVEBU, which allows using it with the Armada 3700 SoC. Signed-off-by: Gregory CLEMENT <gregory.c

[PATCH v2 3/5] dmaengine: mv_xor: add support for Armada 3700 SoC

R access to DRAM by opening default window to 4GB space with specific attribute. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/dm

[PATCH v2 0/5] Add XOR engine support to Armada 3700 SoC (ARM64)

ypo in commit log of patch 3 - Reformatting to 1 compatible string per line in Documentation/devicetree/bindings/dma/mv-xor.txt - Added Acked-by from Rob in patch 3 Gregory CLEMENT (3): dmaengine: mv_xor: make the code 64 bits compliant dmaengine: mv_xor: use SoC type instead of direc

[PATCH v2 5/5] arm64: dts: marvell: add XOR node for Armada 3700 SoC

From: Marcin Wojtas <m...@semihalf.com> Armada 3700 SoC comprise one dual-channel XOR engine and this patch adds its according representation. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm6

[PATCH v2 1/5] dmaengine: mv_xor: make the code 64 bits compliant

Fix two warnings which appear when building for 64 bits target. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/mv_xor.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 3922a5

Re: [PATCH v2 4/5] dmaengine: mv_xor: Allow selecting mv_xor for mvebu only compatible SoC

Hi Jason, On mar., avril 12 2016, Jason Cooper <ja...@lakedaemon.net> wrote: > On Tue, Apr 12, 2016 at 08:19:17PM +0200, Gregory CLEMENT wrote: >> Armada 3700 SoC uses the mv_xor driver but don't select anymore the >> PLAT_ORION symbol. This commit extends the dep

Re: [PATCH 3/4] arm64: dts: marvell: Clean up armada-7040-db

Is there any cons by using it? I agree that converting the Marvell Armada 32-bits SoCs would produce a lot of churn. But if some binding are common there is no file at all are in common, so we could use this solution for the 64 bits SoCs only. Jason, Andrew, Sebastian, do you see any problem with i

Re: [PATCH 1/4] arm64: dts: marvell: Clean up armada-3720-db

Hi Andreas, On jeu., mars 24 2016, Andreas Färber <afaer...@suse.de> wrote: > Hi Gregory, > > Am 24.03.2016 um 17:11 schrieb Gregory CLEMENT: >>> +/* >>> + * Exported on the micro USB connector CON32 >>> + * through an FTDI >>> + */ >>

Re: [PATCH 1/4] arm64: dts: marvell: Clean up armada-3720-db

ada 3700 family and a > development board") > Cc: Gregory CLEMENT <gregory.clem...@free-electrons.com> > Signed-off-by: Andreas Färber <afaer...@suse.de> > --- > arch/arm64/boot/dts/marvell/armada-3720-db.dts | 35 > +++--- > arch/arm64/

Re: [PATCH] usb: host: xhci-plat: Make enum xhci_plat_type start at a non zero value

s ? According to 4efb2f69411456d35051e9047c15157c9a5ba217 "usb: host: xhci-plat: add struct xhci_plat_priv" : This patch adds struct xhci_plat_priv to simplify the code to match platform specific variables. For now, this patch adds a member "type" in the structure Gregory > > -- > balbi -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

[PATCH net 2/3] net: mvneta: enable change MAC address when interface is up

ld Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network unit") Cc: sta...@vger.kernel.org Signed-off-by: Dmitri Epshtein <d...@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/mvneta.c | 2

[PATCH net 1/3] net: mvneta: Fix spinlock usage

ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/mvneta.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index b0ae69f84493..8dc7df2

[PATCH net 3/3] net: mvneta: fix error messages in mvneta_port_down function

From: Dmitri Epshtein <d...@marvell.com> This commit corrects error printing when shutting down the port. Also magic numbers are replaced by existing macros. Signed-off-by: Dmitri Epshtein <d...@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>

[PATCH net 0/3] Few mvneta fixes

Epshtein (2): net: mvneta: enable change MAC address when interface is up net: mvneta: fix error messages in mvneta_port_down function Gregory CLEMENT (1): net: mvneta: Fix spinlock usage drivers/net/ethernet/marvell/mvneta.c | 21 +++-- 1 file changed, 11 insertions(+), 10

Re: [PATCH v4 05/12] arm64: add mvebu architecture entry

Hi Greg and Jiri, this is a gentle ping about this patch. On jeu., févr. 18 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> wrote: > Hi Greg and Jiri > > On mar., févr. 16 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> > wrote: >

Re: [PATCH v3 net-next 0/9] API set for HW Buffer management

Hi, On sam., mars 05 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> wrote: > This is a third version of an API set for HW Buffer management that I Please ignore this version. Being able to select the HWBM support though the kernel configuration was not as trivial as I

[PATCH v4 net-next 6/9] bus: mvebu-mbus: provide api for obtaining IO and DRAM window information

Buffer Manager and PnC configuration. [gregory.clem...@free-electrons.com: Fix size test for mvebu_mbus_get_dram_win_info] Signed-off-by: Marcin Wojtas <m...@semihalf.com> [DRAM window information reference in LKv3.10] Signed-off-by: Evan Wang <xsw...@marvell.com> Signed-off-by: Gregory CLE

[PATCH v4 net-next 7/9] net: mvneta: bm: add support for hardware buffer management

rating with existing mvneta driver. New device tree binding documentation is added and the one of mvneta is updated accordingly. [gregory.clem...@free-electrons.com: removed the suspend/resume part] Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <grego

[PATCH v4 net-next 1/9] ARM: dts: armada-38x: add buffer manager nodes

s used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@fre

[PATCH v4 net-next 8/9] net: add a hardware buffer management helper API

This basic implementation allows to share code between driver using hardware buffer management. As the code is hardware agnostic, there is few helpers, most of the optimization brought by the an HW BM has to be done at driver level. Signed-off-by: Gregory CLEMENT <gregory.clem...@f

[PATCH v4 net-next 9/9] net: mvneta: Use the new hwbm framework

Now that the hardware buffer management framework had been introduced, let's use it. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/Kconfig | 1 + drivers/net/ethernet/marvell/mvneta.c| 16 ++-- drivers/net/ethernet/m

[PATCH v4 net-next 5/9] ARM: dts: armada-xp-openblocks-ax3-4: Add BM support

Allow Openblock AX3 using hardware buffer management with mvneta. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/bo

[PATCH v4 net-next 3/9] ARM: dts: armada-xp: add buffer manager nodes

s used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@fre

[PATCH v4 net-next 0/9] API set for HW Buffer management

v7_defconfig" of this series and already applied it - Modified the order of the patches. In order to ease the test the branch mvneta-BM-framework-v4 is available at g...@github.com:MISL-EBU-System-SW/mainline-public.git. Thanks, Gregory Gregory CLEMENT (3): ARM: dts: armada-xp-openblocks-ax3-4: A

[PATCH v4 net-next 2/9] ARM: dts: armada-38x: enable buffer manager support on Armada 38x boards

om: add suppport for the ClearFog board] Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm/boot/dts/armada-385-db-ap.dts | 20 +++- arch/arm/boot/dts/armada-388-clearfog.dts

[PATCH v4 net-next 4/9] ARM: dts: armada-xp: enable buffer manager support on Armada XP boards

number of possible pools, each port is supposed to use single pool for all kind of packets. Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" status for 'bm' and 'bm-bppi' (internal SRAM) nodes. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-o

Re: [PATCH v4 net-next 8/9] net: add a hardware buffer management helper API

;buf_num) { > > What is a point of this condition? How possibly after checking if > capacity of pool is not exceeded, this one would ever be true? see http://thread.gmane.org/gmane.linux.kernel/2125152/focus=2137421 this test is here to ensure that (buf_num + bm_pool->buf_nu doesn't wrap. Thanks, Gregory -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH 08/41] clk: mvebu: Remove CLK_IS_ROOT

Hi Stephen, On mar., mars 01 2016, Stephen Boyd <sb...@codeaurora.org> wrote: > This flag is a no-op now. Remove usage of the flag. > > Cc: Gregory CLEMENT <gregory.clem...@free-electrons.com> > Signed-off-by: Stephen Boyd <sb...@codeaurora.org> Acked-by: Gregory

[PATCH v3 net-next 3/9] ARM: dts: armada-xp: add buffer manager nodes

s used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@fre

[PATCH v3 net-next 1/9] ARM: dts: armada-38x: add buffer manager nodes

s used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@fre

[PATCH v3 net-next 7/9] net: mvneta: bm: add support for hardware buffer management

rating with existing mvneta driver. New device tree binding documentation is added and the one of mvneta is updated accordingly. [gregory.clem...@free-electrons.com: removed the suspend/resume part] Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <grego

[PATCH v3 net-next 4/9] ARM: dts: armada-xp: enable buffer manager support on Armada XP boards

number of possible pools, each port is supposed to use single pool for all kind of packets. Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" status for 'bm' and 'bm-bppi' (internal SRAM) nodes. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-o

[PATCH v3 net-next 2/9] ARM: dts: armada-38x: enable buffer manager support on Armada 38x boards

om: add suppport for the ClearFog board] Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm/boot/dts/armada-385-db-ap.dts | 20 +++- arch/arm/boot/dts/armada-388-clearfog.dts

[PATCH v3 net-next 8/9] net: add a hardware buffer management helper API

This basic implementation allows to share code between driver using hardware buffer management. As the code is hardware agnostic, there is few helpers, most of the optimization brought by the an HW BM has to be done at driver level. Signed-off-by: Gregory CLEMENT <gregory.clem...@f

[PATCH v3 net-next 0/9] API set for HW Buffer management

-BM-framework-v3 is available at g...@github.com:MISL-EBU-System-SW/mainline-public.git. Thanks, Gregory Gregory CLEMENT (3): ARM: dts: armada-xp-openblocks-ax3-4: Add BM support net: add a hardware buffer management helper API net: mvneta: Use the new hwbm framework Marcin Wojtas (6):

[PATCH v3 net-next 9/9] net: mvneta: Use the new hwbm framework

Now that the hardware buffer management framework had been introduced, let's use it. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/Kconfig | 1 + drivers/net/ethernet/marvell/mvneta.c| 38 +++-- drivers/net/ethernet/m

[PATCH v3 net-next 6/9] bus: mvebu-mbus: provide api for obtaining IO and DRAM window information

Buffer Manager and PnC configuration. [gregory.clem...@free-electrons.com: Fix size test for mvebu_mbus_get_dram_win_info] Signed-off-by: Marcin Wojtas <m...@semihalf.com> [DRAM window information reference in LKv3.10] Signed-off-by: Evan Wang <xsw...@marvell.com> Signed-off-by: Gregory CLE

[PATCH v3 net-next 5/9] ARM: dts: armada-xp-openblocks-ax3-4: Add BM support

Allow Openblock AX3 using hardware buffer management with mvneta. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/bo

Re: [PATCH net 1/3] net: mvneta: Fix spinlock usage

Hi Jisheng, On mer., mars 09 2016, Jisheng Zhang <jszh...@marvell.com> wrote: > Dear Gregory, > > On Tue, 8 Mar 2016 13:57:04 +0100 Gregory CLEMENT wrote: > >> In the previous patch, the spinlock was not initialized. While it didn't >> cause any trouble ye

Re: [PATCH 1/1] ARM: dts: kirkwood: add kirkwood-nsa320.dtb to Makefile

kirkwood-nsa320.dtb \ > kirkwood-nsa325.dtb \ > kirkwood-openblocks_a6.dtb \ > kirkwood-openblocks_a7.dtb \ > -- > 2.1.4 > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > ht

Re: [PATCH 1/1] ARM: dts: kirkwood: add kirkwood-ds112.dtb to Makefile

\ > kirkwood-ds111.dtb \ > + kirkwood-ds112.dtb \ > kirkwood-ds209.dtb \ > kirkwood-ds210.dtb \ > kirkwood-ds212.dtb \ > -- > 2.1.4 > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@list

Re: [PATCH] bus: mvebu-mbus: use %pad to print phys_addr_t

Hi Arnd, On mar., mars 29 2016, Arnd Bergmann <a...@arndb.de> wrote: > On Tuesday 29 March 2016 18:04:47 Gregory CLEMENT wrote: >> >> What is the status of this patch? >> >> Do you plan to send a second version with the title fixed as suggested >> by

Re: [PATCH] net: mvneta: explicitly disable BM on 64bit platform

t/ethernet/marvell/Kconfig > +++ b/drivers/net/ethernet/marvell/Kconfig > @@ -42,7 +42,7 @@ config MVMDIO > > config MVNETA_BM_ENABLE > tristate "Marvell Armada 38x/XP network interface BM support" > - depends on MVNETA > + depends on MVNETA && !64BIT > ---help--- > This driver supports auxiliary block of the network > interface units in the Marvell ARMADA XP and ARMADA 38x SoC > -- > 2.8.0.rc3 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH] ARM: mv78xx0: Remove CLK_IS_ROOT

t; } > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH] ARM: dove: Remove CLK_IS_ROOT

0); > usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1); > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH] ARM: orion5x: Remove CLK_IS_ROOT

orion5x_tclk); > + tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, orion5x_tclk); > > orion_clkdev_init(tclk); > } > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative

[PATCH net 0/2] Fix spinlock usage in HWBM

Hi, these two patches fix spinlock related issues introduced in v4.6. They have been reported by Russell King and Jean-Jacques Hiblot. Thanks to them, Gregory Gregory CLEMENT (2): net: mvneta: Fix lacking spinlock initialization net: hwbm: Fix unbalanced spinlock in error case drivers

[PATCH net 1/2] net: mvneta: Fix lacking spinlock initialization

nel.org> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/net/ethernet/marvell/mvneta_bm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/marvell/mvneta_bm.c b/drivers/net/ethernet/marvell/mvneta_bm.c index 01fccec632ec..466939f8f

[PATCH net 2/2] net: hwbm: Fix unbalanced spinlock in error case

When hwbm_pool_add exited in error the spinlock was not released. This patch fixes this issue. Fixes: 8cb2d8bf57e6 ("net: add a hardware buffer management helper API") Reported-by: Jean-Jacques Hiblot <jjhib...@traphandler.com> Cc: <sta...@vger.kernel.org> Signed-o

Re: [PATCH] net: mvneta: bm: fix dependencies again

: Arnd Bergmann <a...@arndb.de> > Fixes: 019ded3aa7c9 ("net: mvneta: bm: clarify dependencies") It looks ok for me. Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > --- > drivers/net/ethernet/marvell/Kconfig | 2 +- > 1 file chang

[PATCH v3 4/5] dmaengine: mv_xor: Allow selecting mv_xor for mvebu only compatible SoC

dependency allowing a wider test coverage. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index d96d87c56f2e..67b37ce94143 100644 --- a/d

[PATCH v3 1/5] dmaengine: mv_xor: make the code 64 bits compliant

Fix two warnings which appear when building for 64 bits target. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/mv_xor.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 3922a5

[PATCH v3 3/5] dmaengine: mv_xor: add support for Armada 3700 SoC

R access to DRAM by opening default window to 4GB space with specific attribute. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/dm

[PATCH v3 0/5] Add XOR engine support to Armada 3700 SoC (ARM64)

Add COMPILE_TEST dependency v1 ->v2: - Fix typo in commit log of patch 3 - Reformatting to 1 compatible string per line in Documentation/devicetree/bindings/dma/mv-xor.txt - Added Acked-by from Rob in patch 3 Gregory CLEMENT (3): dmaengine: mv_xor: make the code 64 bits compliant dmaengine:

[PATCH v3 2/5] dmaengine: mv_xor: use SoC type instead of directly the operation mode

, and then depending to the type the engine setup will be selected. Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- drivers/dma/mv_xor.c | 40 drivers/dma/mv_xor.h | 1 + 2 files changed, 29 insertions(+), 12 deletions(-)

[PATCH v3 5/5] arm64: dts: marvell: add XOR node for Armada 3700 SoC

From: Marcin Wojtas <m...@semihalf.com> Armada 3700 SoC comprise one dual-channel XOR engine and this patch adds its according representation. Signed-off-by: Marcin Wojtas <m...@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- arch/arm6

Re: [PATCH 06/18] ARM: mvebu: a390: add missing compatibility string and add missing bracket

Cc: <sta...@vger.kernel.org> # 4.0+ > Fixes 538da83 ("ARM: mvebu: add Device Tree files for Armada 39x SoC and > board") Change the title prefix to "ARM: dts: mvebu:". Alos usually we use armada-390 instead of a390 to match the file name. Acked-by: Gregory CLE

Re: [PATCH 04/18] ARM: mvebu: a385-db-ap: enable USB (orion-ehci) port

Hi Grzegorz, On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: > Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com> Here agina, as pointed by Andrew a commit log entry would be nice. Except this: Acked-by: Gregory CLEMENT <gregory.clem...@free-elec

Re: [PATCH 05/18] ARM: mvebu: a385-db-ap: add default partition description for NAND

Hi Grzegorz, On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: > Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com> It looks good: Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > --- > arch/arm/boot/dt

Re: [PATCH 04/18] ARM: mvebu: a385-db-ap: enable USB (orion-ehci) port

Hi, On mer., juil. 27 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> wrote: > Hi Grzegorz, > > On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: > >> Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com> > > >

Re: [PATCH 01/18] ARM: mvebu: enable MTD command line partition table in mvebu_v7_defconfig

Hi Grzegorz, On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: > Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com> As pointed by Andrew a commit log entry would be nice. Except this: Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com&

Re: [PATCH 02/18] ARM: mvebu: enable UBI and UBIFS in mvebu_v7_defconfig

Grzegorz Jaszczyk <j...@semihalf.com> Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > --- > arch/arm/configs/mvebu_v7_defconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/configs/mvebu_v7_defconfig > b/

Re: [PATCH 05/18] ARM: mvebu: a385-db-ap: add default partition description for NAND

Hi, On mer., juil. 27 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com> wrote: > Hi Grzegorz, > > On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: > >> Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com> > It lo

Re: [PATCH 09/18] ARM: mvebu: a39x: enable the thermal sensor in Armada-39x SoCs

Hi Grzegorz, On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: Add a commit log here and change the prefix to "ARM: dts: mvebu: armada-39x:" Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > Signed-off

Re: [PATCH 08/18] ARM: mvebu: a39x: Enable PMU, CA9 MPcore SoC Controller and Coherency fabric

da-380-coherency-fabric"; > + reg = <0x21010 0x1c>; > + }; > + > pmsu@22000 { > compatible = "marvell,armada-390-pmsu", >"marvell,armada-380-pmsu"; > -- > 1.8.3.1 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH 08/18] ARM: mvebu: a39x: enable PMU, CA9 MPcore SoC Controller and Coherency fabric

gt; Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com> > Reviewed-by: Lior Amsalem <al...@marvell.com> Rename prefix to "ARM: dts: mvebu: armada-39x:" then Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > --- > arch/arm/boo

Re: [PATCH 07/18] ARM: mvebu: a39x: update the SDHCI node on Armada 39x

to "ARM: dts: mvebu: armada-39x". With this: Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > --- > arch/arm/boot/dts/armada-39x.dtsi | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/arm

Re: [PATCH 17/18] ARM: mvebu: a390-db: add support for the Armada 390 DB board

status = "okay"; > + And the same for the following PCIe ports. > + pcie@1,0 { > + status = "okay"; > + }; > + > + pcie@2,0 { > + status = "okay

Re: [PATCH 10/18] ARM: mvebu: a39x: enable watchdog for all Armada-39x SoCs

Hi Grzegorz, On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote: Add a commit log here and change the prefix to "ARM: dts: mvebu: armada-39x:" Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> Thanks, Gregory > Signed-off

Re: [PATCH 18/18] ARM: mvebu: a395-gp: add support for the Armada 395 GP Board

/* > + * The two PCIe units are accessible through > + * mini PCIe slot on the board. > + */ and here for each slot > + pcie@2,0 { > + /* Port 1, Lane 0 */ > +

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