Ok. I will compile and test it now.
Thanks.
On 14/12/2017 12:22, Lorenzo Pieralisi wrote:
> On Thu, Dec 14, 2017 at 12:16:38PM +0000, Gustavo Pimentel wrote:
>> Hi Niklas and Lorenzo,
>>
>> I'm going to work on PCI software development now as told by Joao and I will
Hi Niklas and Lorenzo,
I'm going to work on PCI software development now as told by João and I will
test your code now.
I was retrieving the patches through the patchwork
https://patchwork.ozlabs.org/project/linux-pci/list/?submitter=65580 and I
notice that its missing the patch 13 and 17, is
you go/not go flag. Sorry the delay...
Regards,
Gustavo
On 18/12/2017 15:57, Lorenzo Pieralisi wrote:
> Hi Gustavo,
>
> On Thu, Dec 14, 2017 at 12:38:04PM +, Gustavo Pimentel wrote:
>> Ok. I will compile and test it now.
> Have you managed to retrieve the patches and tes
accordingly to the controller specific requirements.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
drivers/pci/dwc/Kconfig | 41 +--
drivers/pci/dwc/pcie-designware-ep.c | 3 +
drivers/
Add the DesignWare EP device ID entry to pci_endpoint_test driver table.
Allow the device to be recognize and handle by the pci_endpoint_test
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
Add device tree binding documentation for the EP in PCIe DesignWare driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Reviewed-by: Rob Herring <r...@kernel.org>
---
Documentation/devicetree/bindings/pci/designware-pcie.txt | 12
1 file changed, 1
Replace "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
however it still be compatible with any previous DT that uses the old
reg-name.
Replace the PCIe base address example by a real PCIe base address in use.
Signed-off-by: Gustavo Pimentel <gustav
The PCIe controller dual mode is capable of operating in RC mode as well
as EP mode by configuration option. Till now only RC mode was supported,
with this patch is add EP support to the DesignWare driver.
Gustavo Pimentel (4):
bindings: PCI: designware: Example update
PCI: dwc: Add support
Add device tree binding documentation for the EP in PCIe DesignWare driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Reviewed-by: Rob Herring <r...@kernel.org>
---
Documentation/devicetree/bindings/pci/designware-pcie.txt | 12
1 file changed, 1
Add the DesignWare EP device ID entry to pci_endpoint_test driver table.
Allow the device to be recognize and handle by the pci_endpoint_test
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
accordingly to the controller specific requirements.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
drivers/pci/dwc/Kconfig | 41 +--
drivers/pci/dwc/pcie-designware-ep.c | 3 +
drivers/
The PCIe controller dual mode is capable of operating in RC mode as well
as EP mode by configuration option. Till now only RC mode was supported,
with this patch is add EP support to the DesignWare driver.
Gustavo Pimentel (4):
bindings: PCI: designware: Example update
PCI: dwc: Add support
Replace "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
however it still be compatible with any previous DT that uses the old
reg-name.
Replace the PCIe base address example by a real PCIe base address in use.
Signed-off-by: Gustavo Pimentel <gustav
The PCIe controller dual mode is capable of operating in RC mode as well
as EP mode by configuration option. Till now only RC mode was supported,
with this patch is add EP support to the DesignWare driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon
Add device tree binding documentation for the EP in PCIe DesignWare driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Reviewed-by: Rob Herring <r...@kernel.org>
---
Change v1->v2:
- Add a missing log description.
- Add "snps,dw-pcie" compatible
Replace magic numbers by a self-explained define to ease human
comprehension.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Jingoo Han <jingooh...@gmail.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
Change v2->v3:
Replace "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
however it still be compatible with any previous DT that uses the old
reg-name.
Replace the PCIe base address example by a real PCIe base address in use.
Signed-off-by: Gustavo Pimentel <gustav
Replace of all initial lowercase character in comments and debug messages
to uppercase to maintain coherence.
Fix messages coherence within the DesignWare driver.
Fix code style on dw_pcie_irq_domain_free() function.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Add a seconds entry on the pci_epf_test_ids structure that disables the
linkup_notifier parameter on driver for the DesignWare EP.
Allow DesignWare EPs that doesn't have linkup notification signal to work
with pcitest.
Update the binding documentation accordingly.
Signed-off-by: Gustavo
it by the equivalent operation in this case, the shift
rotation.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Jingoo Han <jingooh...@gmail.com>
Acked-by: Joao Pinto <jpi...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patc
Add a callback to define the maximum number of vectors used by the RC.
Since this is a parameter associated to each SoC IP setting, makes sense
to be configurable and easily visible to future modifications.
Set DesignWare driver vectors number maximum to 256.
Signed-off-by: Gustavo Pimentel
Add the DesignWare EP device ID entry to pci_endpoint_test driver table.
Allow the device to be recognize and handle by the pci_endpoint_test
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
Change v1->
for a right shift rotation of 1
bit.
- Replacement of all initial lowercase character in comments and debug
messages to uppercase to maintain coherence.
Gustavo Pimentel (9):
bindings: PCI: designware: Example update
PCI: dwc: Add support for EP mode
PCI: endpoint: functions/pci-epf-test: Add second
Add MSI-X support to pcitest tool.
Modify pcitest.sh script to accomodate MSI-X interrupt tests.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
include/uapi/linux/pcitest.h | 1 +
tools/pci/pcitest.c | 18 +-
tools/pci/pcitest.sh
the interrupt ID number from the command section to a
register located in a BAR.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Documentation/misc-devices/pci-endpoint-test.txt | 3 +
drivers/misc/pci_endpoint_test.c | 121 +++
drivers/pci/en
Replace "pdev->irq + index" operation by the pci_irq_vector() call,
that converts from device vector to Linux IRQ.
(suggestion made by Alan Douglas).
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/misc/pci_endpoint_test.c | 10 +-
1 file ch
Remove duplicate defines located on pcie-designware.h file already
available on /include/uapi/linux/pci-regs.h file.
Add pci_epc_set_msi() maximum 32 interrupts validation.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/dwc/pcie-designware-ep.
Change cdns_pcie_ep_raise_irq() signature, namely the interrupt_num variable
type
from u8 to u16 to accommodate the 2048 maximum MSI-X interrupts.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Alan Douglas <adoug...@cadence.com>
---
drivers/pci/cadence/
for triggering interruptions.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/dwc/pci-dra7xx.c | 2 +-
drivers/pci/dwc/pcie-artpec6.c | 2 +-
drivers/pci/dwc/pcie-designware-ep.c | 143 -
drivers/pci/dwc/pcie-desi
Add PCI_EPC_IRQ_MSIX type.
Add MSI-X callbacks signatures to ops structure.
Add sysfs interface for set/get MSI-X capability maximum number.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/endpoint/pci-ep-cfs.c | 24
drivers/pci/endpoi
Replace all initial lower case character into upper case in comments
and debug printks.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/misc/pci_endpoint_test.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/driver
Add a legacy interrupt callback handler. Currently DesignWare IP don't
allow triggering the legacy interrupt.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/dwc/pcie-designware-ep.c | 10 ++
drivers/pci/dwc/pcie-designware-plat.c | 3 +--
drive
Replace all initial lower case character into upper case in comments
and debug printks.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/endpoint/functions/pci-epf-test.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff
driver.
Add a new input parameter (msix) to pcitest tool to test MSI-X feature.
Update the pcitest.sh script to support MSI-X feature tests.
[1] -> https://lkml.org/lkml/2018/4/27/342
Gustavo Pimentel (10):
PCI: endpoint: Add MSI-X interfaces
PCI: dwc: Add MSI-X callbacks handler
Hi Alan,
Sorry for the delay on the response, I only have time to proper analyze this
now.
On 24/04/2018 10:15, Alan Douglas wrote:
> Hi,
>
> On 10 April 2018 18:15 Gustavo Pimentel wrote:
>> Changes the pcie_raise_irq function signature, namely the interrupt_num
>>
Add the DesignWare EP device ID entry to pci_endpoint_test driver table.
Allow the device to be recognize and handle by the pci_endpoint_test
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
Patch set was made against the Lorenzo's pci/dwc branch.
The PCIe controller dual mode is capable of operating in RC mode as well
as EP mode by configuration option. Till now only RC mode was supported,
with this patch is add EP support to the DesignWare driver.
Gustavo Pimentel (4):
bindings
Replace "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
however it still be compatible with any previous DT that uses the old
reg-name.
Replace the PCIe base address example by a real PCIe base address in use.
Signed-off-by: Gustavo Pimentel <gustav
Add device tree binding documentation for the EP in PCIe DesignWare driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Reviewed-by: Rob Herring <r...@kernel.org>
---
Documentation/devicetree/bindings/pci/designware-pcie.txt | 12
1 file changed, 1
accordingly to the controller specific requirements.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
drivers/pci/dwc/Kconfig | 37 +--
drivers/pci/dwc/pcie-designware-ep.c | 3 +
drivers/
on set/get and triggering MSI methods on EP DesignWare IP driver.
Add a new input parameter (msix) to pcitest tool to test MSI-X feature.
Update the pcitest.sh script to support MSI-X feature tests.
Gustavo Pimentel (7):
PCI: endpoint: Add MSI-X interfaces
PCI: dwc: Add MSI-X callbacks handler
Add MSI-X support to pcitest tool.
Add 2 new IOCTL commands:
- Allow to reconfigure driver IRQ type in runtime.
- Allow to retrieve current driver IRQ type configured.
Modify pcitest.sh script to accommodate MSI-X interrupt tests.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.
Remove duplicate defines located on pcie-designware.h file already
available on /include/uapi/linux/pci-regs.h file.
Add pci_epc_set_msi() maximum 32 interrupts validation.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just
for triggering interruptions.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
drivers/pci/dwc/pci-dra7xx.c | 2 +-
drivers/pci/dwc/pcie-artpec6.c | 2 +-
drivers/pci/dwc/pcie-design
Change cdns_pcie_ep_raise_irq() signature, namely the interrupt_num
variable type from u8 to u16 to accommodate 2048 maximum MSI-X
interrupts.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
Acked-by: Alan Douglas <adoug...@cadence.com>
---
Change v1->v2:
- Nothin
-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
drivers/pci/endpoint/pci-ep-cfs.c | 24 +++
drivers/pci/endpoint/pci-epc-core.c | 59 -
include/linux/
process, by having in a BAR:
- Interrupt type triggered (added).
- Interrupt ID number (moved from the command section).
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Allow IRQ type driver reconfiguring in runtime, follwing Kishon's
suggestion.
Docu
Add a legacy interrupt callback handler. Currently DesignWare IP don't
allow trigger legacy interrupts.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
drivers/pci/dwc/pcie-designware-ep
DesignWare IP driver.
Add a new input parameter (msix) to pcitest tool to test MSI-X feature.
Update the pcitest.sh script to support MSI-X feature tests.
Gustavo Pimentel (10):
PCI: endpoint: Add MSI-X interfaces
PCI: dwc: Add MSI-X callbacks handler
PCI: Update xxx_pcie_ep_raise_irq
Change {cdns, dra7xx, artpec6, dw, rockchip}_pcie_ep_raise_irq() and
pci_epc_raise_irq() signature, namely the interrupt_num variable type
from u8 to u16 to accommodate 2048 maximum MSI-X interrupts.
Signed-off-by: Gustavo Pimentel
Acked-by: Alan Douglas
---
Change v1->v2:
- Nothing chan
Hi Geert,
On 19/06/2018 18:19, Geert Uytterhoeven wrote:
> PCIE_DW_PLAT_HOST does not have any platform dependency, so it should
> not default to yes.
That's right, thanks.
Regards,
Gustavo
Acked-by: Gustavo Pimentel
>
> Fixes: 1d906b22076e12cf ("PCI: dwc: Add support for E
Vijay Abraham I wrote:
>>>> Hi Lorenzo,
>>>>
>>>> On Thursday 26 April 2018 10:26 PM, Lorenzo Pieralisi wrote:
>>>>> On Tue, Apr 24, 2018 at 02:44:40PM +0100, Gustavo Pimentel wrote:
>>>>>> Adds a seconds entry on the pci_epf_test_
Hi Kishon,
On 24/04/2018 12:24, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Tuesday 24 April 2018 03:06 PM, Gustavo Pimentel wrote:
>> Hi Kishon,
>>
>> On 24/04/2018 08:07, Kishon Vijay Abraham I wrote:
>>> Hi,
>>>
>>> On Monday 23 April
Hi Kishon,
On 24/04/2018 12:43, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Tuesday 24 April 2018 04:27 PM, Gustavo Pimentel wrote:
>> Hi Kishon,
>>
>> On 24/04/2018 08:19, Kishon Vijay Abraham I wrote:
>>> Hi,
>>>
>>> On Tuesday 17 April
Hi Alan,
On 30/04/2018 16:35, Alan Douglas wrote:
> Hi Gustavo,
>
> On April 27, 2018, 4:57 p.m. Gustavo Pimentel wrote:
>> Add MSI-X support and update driver documentation accordingly.
>>
>> Add new driver parameter to allow interruption type selection.
>>
&g
On 26/04/2018 17:56, Lorenzo Pieralisi wrote:
> On Tue, Apr 24, 2018 at 02:44:40PM +0100, Gustavo Pimentel wrote:
>> Adds a seconds entry on the pci_epf_test_ids structure that disables the
>
> "Add a second entry to..."
>
>> linkup_notifier paramet
Hi Lorenzo,
On 30/04/2018 15:22, Lorenzo Pieralisi wrote:
> On Fri, Apr 27, 2018 at 12:59:58PM +0100, Gustavo Pimentel wrote:
>> Add a seconds entry on the pci_epf_test_ids structure that disables the
>
> "Add a second entry..."
Fixed, sorry for letting it slip.
Hi Lorenzo and Kishon,
On 03/05/2018 07:33, Kishon Vijay Abraham I wrote:
> Hi Lorenzo,
>
> On Wednesday 02 May 2018 10:21 PM, Lorenzo Pieralisi wrote:
>> On Wed, May 02, 2018 at 11:39:00AM +0100, Gustavo Pimentel wrote:
>>> Hi Lorenzo,
>>>
>>> On
by calling mdelay() instead.
Makes sense. Thanks.
Acked-by: Gustavo Pimentel
Regards,
Gustavo
>
> Signed-off-by: Jisheng Zhang
> ---
>
> Since v1
> - use mdelay() instead of udelay() to avoid __bad_udelay()
>
> drivers/pci/controller/dwc/pcie-designware.c | 8 -
Fix compilation warnings:
- remove unused variables
- change function return from int to void, since it's not used
Signed-off-by: Gustavo Pimentel
---
tools/pci/pcitest.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c
index
Hi Alan,
On 17/07/2018 21:42, Alan Douglas wrote:
> Hi Gustavo,
>
> On 17 July 2018 11:26, Gustavo Pimentel wrote:
>> Add MSI-X support and update driver documentation accordingly.
>>
>> Add 2 new IOCTL commands:
>> - Allow to reconfigure driver IRQ type in
-by: Gustavo Pimentel
Acked-by: Kishon Vijay Abraham I
---
Change v8->v9:
- Created patch file.
Change v9->v10:
- Nothing changed, just to follow the patch set version.
Change v10->v11:
- Missed Kishon acknowledge.
Change v11->v12:
- Nothing changed, just to follow the patch set version
Cleanup PCI_ENDPOINT_TEST memspace (by moving the interrupt number away
from command section).
Add IRQ_TYPE register to identify the triggered ID interrupt required
for the READ/WRITE/COPY tests and raise IRQ test commands.
Update documentation accordingly.
Signed-off-by: Gustavo Pimentel
Add MSI-X support and update driver documentation accordingly.
Signed-off-by: Gustavo Pimentel
Acked-by: Kishon Vijay Abraham I
---
Change v2->v3:
- New patch file created base on the previous patch
"misc: pci_endpoint_test: Add MSI-X support" patch file following
Kishon's sugge
Change {cdns, dra7xx, artpec6, dw, rockchip}_pcie_ep_raise_irq() and
pci_epc_raise_irq() signature, namely the interrupt_num variable type
from u8 to u16 to accommodate 2048 maximum MSI-X interrupts.
Signed-off-by: Gustavo Pimentel
Acked-by: Alan Douglas
Acked-by: Shawn Lin
Acked-by: Jesper
Add PCIe config space capability search function.
Add sysfs set/get interface to allow the change of EP MSI-X maximum number.
Add EP MSI-X callback for triggering interruptions.
Signed-off-by: Gustavo Pimentel
Acked-by: Kishon Vijay Abraham I
---
Change v1->v2:
- Nothing changed, j
Cleanup PCI_ENDPOINT_TEST memspace (by moving the interrupt number away
from command section).
Add IRQ_TYPE register to identify the triggered ID interrupt required
for the READ/WRITE/COPY tests and raise IRQ test commands.
Update documentation accordingly.
Signed-off-by: Gustavo Pimentel
Change {cdns, dra7xx, artpec6, dw, rockchip}_pcie_ep_raise_irq() and
pci_epc_raise_irq() signature, namely the interrupt_num variable type
from u8 to u16 to accommodate 2048 maximum MSI-X interrupts.
Signed-off-by: Gustavo Pimentel
Acked-by: Alan Douglas
Acked-by: Shawn Lin
Acked-by: Jesper
Add new driver parameter to allow interruption type selection.
Signed-off-by: Gustavo Pimentel
Acked-by: Kishon Vijay Abraham I
---
Change v2->v3:
- New patch file created base on the previous patch
"misc: pci_endpoint_test: Add MSI-X support" patch file following
Kishon's sugge
Hi Jia,
On 02/09/2018 04:38, Jia-Ju Bai wrote:
> The driver may sleep with holding a spinlock and in an interupt handler.
>
> The function call paths (from bottom to top) in Linux-4.16 are:
>
> [FUNC] usleep_range
> drivers/pci/dwc/pcie-designware.c, 181:
> usleep_range in
Hi,
Just a gentle reminder.
Thanks.
On 21/06/2018 17:01, Gustavo Pimentel wrote:
> Patch series made against Lorenzo's master branch.
>
> Add MSI-X support on pcitest tool.
>
> Add new callbacks methods and handlers to trigger the MSI-X interrupts
> on the EP DesignWare IP
Hi Alan,
On 10/07/2018 11:10, Alan Douglas wrote:
> On 09 July 2018 18:43 Gustavo Pimentel wrote:
>> Add MSI-X support and update driver documentation accordingly.
>>
>> Add 2 new IOCTL commands:
>> - Allow to reconfigure driver IRQ type in runtime.
>> - All
Hi Kishon,
On 02/04/2018 06:36, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Wednesday 28 March 2018 05:08 PM, Gustavo Pimentel wrote:
>> Adds the designware EP device ID entry to pci_endpoint_test driver table
>> to allow this device to be recognize and handle by the pci_en
Hi Kishon,
On 02/04/2018 06:23, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Wednesday 28 March 2018 05:08 PM, Gustavo Pimentel wrote:
>> Changes the IP registers size to accommodate the ATU unroll space.
>>
>> Replaces "ctrlreg" reg-name by &quo
Hi Kishon,
On 02/04/2018 06:35, Kishon Vijay Abraham I wrote:
>
>
> On Wednesday 28 March 2018 05:08 PM, Gustavo Pimentel wrote:
>> Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
>
> Please add a commit message.
Ok. I'll add. Thanks for noticing it
Hi Rob,
On 09/04/2018 20:12, Rob Herring wrote:
> On Wed, Mar 28, 2018 at 12:38:33PM +0100, Gustavo Pimentel wrote:
>> Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
>> ---
>> Documentation/devicetree/bindings/pci/designware-pcie.txt | 13 +
Hi Kishon,
On 10/04/2018 06:12, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Monday 09 April 2018 03:11 PM, Gustavo Pimentel wrote:
>> The PCIe controller dual mode is capable of operating in host mode as well
>> as endpoint mode by configuration, therefore this patch aims to
Replace magic numbers by a well known define in order to make the code
human readable and also facilitate the code reusability.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
Change v2->v
Replaces lower into upper case characters in comments and debug printks.
This is an attempt to keep the messages coherent within the designware
driver.
Also fixed code style on dw_pcie_irq_domain_free function.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change
that helps the human compreension.
- Replaces a division by 2 by a simple right shift rotation of 1 bit.
- Fixes all first letter characters on comments and debug messages to
upper case to maintain coherency.
Gustavo Pimentel (10):
bindings: PCI: designware: Example update
PCI: dwc: Add support
The PCIe controller dual mode is capable of operating in host mode as well
as endpoint mode by configuration, therefore this patch aims to add
endpoint mode support to the designware driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
The PCIe controller dual mode is capable of operating in host mode as well
as endpoint mode by configuration.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Register new device id following Kishon's suggestion.
Change v2->v3:
- Nothing changed, ju
-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
Change v2->v3:
- Nothing changed, just to follow the patch set version.
drivers/pci/dwc/pcie-designware-plat.c | 6 ++
1 file changed, 6 insertions(+)
Adds the designware EP device ID entry to pci_endpoint_test driver table
to allow this device to be recognize and handle by the pci_endpoint_test
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Changed device id following Kishon's suggestion.
Adds a seconds entry on the pci_epf_test_ids structure that disables the
linkup_notifier parameter on driver.
This allows EPs that doesn't have linkup notification signal to work
with pcitest.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v2->v3:
- Add
Replaces a simple division by 2 to a right shift rotation of 1 bit.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Nothing changed, just to follow the patch set version.
Change v2->v3:
- Nothing changed, just to follow the patch set version.
dri
Replaces "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
however it still be compatible with any previous DT that uses the old
reg-name.
Replaces the PCIe base address example by a real PCIe base address in use.
Signed-off-by: Gustavo Pimentel <gustav
Add device tree binding documentation for the Endpoint in PCIe Designware
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Change v1->v2:
- Add a missing log description.
- Add "snps,dw-pcie" compatible string following Kishon's suggestion.
Change
Adds in pci_epc_set_msi function a maximum number of 32 interrupts
validation.
Removes duplicate defines located on pcie-designware.h file. Uses now
the defines available on /include/uapi/linux/pci-regs.h file.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/p
Adds a legacy interrupt callback handler. Currently Designware IP doesn't
allow triggering the legacy interrupt.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/dwc/pcie-designware-ep.c | 10 ++
drivers/pci/dwc/pcie-designware-plat.c | 3 +--
d
Adds the MSI-X support and updates driver documentation accordingly.
Changes the driver parameter in order to allow the interruption type
selection.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
Documentation/misc-devices/pci-endpoint-test.txt | 3 +
driver
Changes the cdns_pcie_ep_raise_irq function signature, namely the
interrupt_num variable type from u8 to u16 to accommodate the MSI-X maximum
interrupts of 2048.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/cadence/pcie-cadence-ep.c | 2 +-
1 file chan
Adds MSI-X support to the pcitest tool and modified the pcitest.sh script
to accomodate this new type of interruption test.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
include/uapi/linux/pcitest.h | 1 +
tools/pci/pcitest.c | 18 +-
too
on pcitest tool. Also updates the pcitest
script with the new test set applied to this new feature.
Gustavo Pimentel (10):
PCI: dwc: Add MSI-X callbacks handler
PCI: cadence: Update cdns_pcie_ep_raise_irq function signature
PCI: endpoint: Add MSI-X interfaces
PCI: dwc: MSI callbacks handler
Replaces lower into upper case characters in comments and debug printks.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/endpoint/functions/pci-epf-test.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drive
Implements the generic method for calling the get/set callbacks.
Adds the PCI_EPC_IRQ_MSIX type.
Adds the MSI-X callbacks signatures to the ops structure.
Adds sysfs interface for altering the number of MSI-X entries.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
d
Replaces lower into upper case characters in comments and debug printks.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/misc/pci_endpoint_test.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/misc/pci_endpoint_te
Adds driver's MSI-X support.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/endpoint/functions/pci-epf-test.c | 87 +--
1 file changed, 69 insertions(+), 18 deletions(-)
diff --git a/drivers/pci/endpoint/functions/pci-epf-tes
more
generic and flexible.
Implements MSI-X set/get functions for sysfs interface in order to change
the EP entries number.
Implements EP MSI-X interface for triggering interruptions.
Signed-off-by: Gustavo Pimentel <gustavo.pimen...@synopsys.com>
---
drivers/pci/dwc/pci-dra7xx.c
On 02/04/2018 06:34, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Wednesday 28 March 2018 05:08 PM, Gustavo Pimentel wrote:
>> The PCIe controller dual mode is capable of operating in host mode as well
>> as endpoint mode by configuration, therefore this patch aims to add
>
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