on next submission, so Greg does not pick them too fast.
I unfortunately don't have any Exynos devices where I could test the
code (I have a couple but no serial connections, and I have no idea if
mailine would run on them). I'll mark v3 as RFT.
--
Hector Martin (mar...@marcan.st)
Public Key
On 16/02/2021 03.40, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:17:07PM +0900, Hector Martin wrote:
* Split out s3c24xx_serial_tx_chars from s3c24xx_serial_tx_irq,
where only the latter acquires the port lock.
I miss here information why you do all this.
Added an explanation
port->dev, "stopping rx\n");
- if (s3c24xx_serial_has_interrupt_mask(port))
- s3c24xx_set_bit(port, S3C64XX_UINTM_RXD,
- S3C64XX_UINTM);
The same.
Reverted those two lines for v3.
--
Hector Martin (mar...
On 16/02/2021 03.06, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:17:05PM +0900, Hector Martin wrote:
+static void s3c64xx_serial_shutdown(struct uart_port *port)
+{
+ struct s3c24xx_uart_port *ourport = to_ourport(port);
+
+ free_irq(port->irq, ourport);
+
+ wr_r
on IO mapping modes, much like x86 has one...
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
say IRQ and FIQ are
masked/unmasked together, I don't think the rest is necessary to
understand the masking logic, and it's one less thing to keep in sync
with changes to the entry code.
Gone :)
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 16/02/2021 03.23, Tony Lindgren wrote:
* Hector Martin [210215 12:18]:
This allows the devicetree to correctly represent the available set of
timers, which varies from device to device, without the need for fake
dummy interrupts for unavailable slots.
I like the idea of using interrupt
On 16/02/2021 02.48, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:16:50PM +0900, Hector Martin wrote:
+description: |
+ Apple ARM ("Apple Silicon") platforms should contain compatible strings
+ in the following format:
+
+ - apple,j274 (board/device ID)
+ - apple,m1
add minimal error handling here.
There's no logic to clean this up in earlycon itself anyway, so there's
no point in trying to do it for the override. If another earlycon driver
ends up getting instantiated for some reason, it will override the
mapping with a normal one again.
--
Hector Mar
On 16/02/2021 01.12, gregkh wrote:
On Tue, Feb 16, 2021 at 12:57:27AM +0900, Hector Martin wrote:
On 15/02/2021 22.22, gregkh wrote:
On Mon, Feb 15, 2021 at 01:57:39PM +0100, Arnd Bergmann wrote:
(adding maintainers for the serial/irqchip/clocksource drivers and
arch/arm64 to cc)
I would
for v3?
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
P15;
You probably didn't want to drop this line, did you?
Ouch. Thanks for catching that.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
isn't necessary here,
if either handler ran we are always going to return IRQ_HANDLED.
* Rename s3c24xx_serial_rx_chars to s3c24xx_serial_rx_irq for
consistency with the above. All it does now is call two other
functions anyway.
Signed-off-by: Hector Martin
---
drivers/tty/serial
the
FIFO with data directly.
Signed-off-by: Hector Martin
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/samsung_tty.c | 228 +--
include/linux/serial_s3c.h | 16 +++
3 files changed, 236 insertions(+), 10 deletions(-)
diff --git a/drivers
This currently supports:
* SMP (via spin-tables)
* AIC IRQs
* Serial (with earlycon)
* Framebuffer
A number of properties are dynamic, and based on system firmware
decisions that vary from version to version. These are expected
to be filled in by the loader.
Signed-off-by: Hector Martin
Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
for us. Add a compatible for it, and two missing supported formats.
Signed-off-by: Hector Martin
---
.../devicetree/bindings/display/simple-framebuffer.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git
the return value, which should use IS_ERR().
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 25 +++--
1 file changed, 3 insertions(+), 22 deletions(-)
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 821cd0e4f870
as a distinct type.
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 131 ++-
1 file changed, 77 insertions(+), 54 deletions(-)
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 6b661f3ec1ae..21955be680a4 100644
Apple mobile devices originally used Samsung SoCs (starting with the
S5L8900), and their current in-house SoCs continue to use compatible
UART peripherals. We'll call this UART variant apple,s5l-uart.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/serial/samsung_uart.yaml
, it makes more
sense to do it here in the UART driver instead of introducing a
whole fdt nonposted-mmio resolver just for earlycon/fixmap.
Suggested-by: Arnd Bergmann
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 17 +
1 file changed, 17 insertions(+)
diff
timer).
This patch introduces basic UP irqchip support, without SMP/IPI support.
Signed-off-by: Hector Martin
---
MAINTAINERS | 2 +
drivers/irqchip/Kconfig | 10 +
drivers/irqchip/Makefile| 1 +
drivers/irqchip/irq-apple-aic.c | 647
; this avoids excessive branching
control flow and mirrors s3c64xx_serial_startup. tx_claimed and
rx_claimed are only used in the S3C24XX functions.
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 69
1 file changed, 53 insertions(+), 16 deletions
Apple ARM64 SoCs have a ton of vendor-specific registers we're going to
have to deal with, and those don't really belong in sysreg.h with all
the architectural registers. Make a new home for them, and add some
registers which are useful for early bring-up.
Signed-off-by: Hector Martin
This adds a Kconfig option to toggle support for Apple ARM SoCs.
At this time this targets the M1 and later "Apple Silicon" Mac SoCs.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig.platforms | 8
arch/arm64/configs/defconfig | 1 +
2 files changed, 9 insertions(+)
AIC is the Apple Interrupt Controller found on Apple ARM SoCs, such as
the M1.
Signed-off-by: Hector Martin
---
.../interrupt-controller/apple,aic.yaml | 88 +++
MAINTAINERS | 1 +
.../interrupt-controller/apple-aic.h | 15
is currently restricted to Apple ARM platforms, as an
optimization.
Signed-off-by: Hector Martin
---
drivers/of/address.c | 72 --
include/linux/of_address.h | 1 +
2 files changed, 71 insertions(+), 2 deletions(-)
diff --git a/drivers/of/address.c b/drivers
This is used on Apple ARM platforms, which require most MMIO
(except PCI devices) to be mapped as nGnRnE.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 5ea8656a2030
Signed-off-by: Hector Martin
---
arch/arm64/kernel/entry.S | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index ba5f9aa379ce..bcfd1ac72636 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel
not need FIQs,
or if newer SoCs are released without the FIQ requirement, we can
revisit the condition.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig | 11 +++
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/kernel/cpufeature.c | 14 ++
3 files changed
discriminate between IRQs and FIQs by checking
the ISR_EL1 system register.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/assembler.h | 6 +++---
arch/arm64/include/asm/daifflags.h | 4 ++--
arch/arm64/include/asm/irqflags.h | 19 +++
arch/arm64/kernel/entry.S | 6
by introducing devm_ioremap_np(),
and making devm_ioremap_resource() automatically select this variant
when the resource has the IORESOURCE_MEM_NONPOSTED flag set.
Signed-off-by: Hector Martin
---
include/asm-generic/io.h | 8 +++-
include/linux/io.h | 2 ++
include/linux/ioport.h | 1
This allows the devicetree to correctly represent the available set of
timers, which varies from device to device, without the need for fake
dummy interrupts for unavailable slots.
Also add the hyp-virt timer/PPI, which is not currently used, but worth
representing.
Signed-off-by: Hector Martin
code can pick the right one.
This also adds the hyp-virt timer/interrupt, which was previously not
expressed in the fixed 4-interrupt form.
Signed-off-by: Hector Martin
---
.../devicetree/bindings/timer/arm,arch_timer.yaml | 14 ++
1 file changed, 14 insertions(+)
diff --git
The implementor will be used to condition the FIQ support quirk.
The specific CPU types are not used at the moment, but let's add them
for documentation purposes.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/cputype.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch
These are the CPU cores in the "Apple Silicon" M1 SoC.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml
b/Documentation/devicetree/bindings/arm/cpus.
This introduces bindings for all three 2020 Apple M1 devices:
* apple,j274 - Mac mini (M1, 2020)
* apple,j293 - MacBook Pro (13-inch, M1, 2020)
* apple,j313 - MacBook Air (M1, 2020)
Signed-off-by: Hector Martin
---
.../devicetree/bindings/arm/apple.yaml| 36
This is different from the legacy AAPL prefix used on PPC, but
consensus is that we prefer `apple` for these new platforms.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree
support
* Fixed many style issues, bugs, and other nits
Note: this keeps the `apple,arm-platform` compatible, which is now used
to gate the OF nonposted-mmio logic to Apple platforms only.
Hector Martin (24):
dt-bindings: vendor-prefixes: Add apple prefix
dt-bindings: arm: apple: Add bindings for Ap
as a property instead of creating a fake
clock.
In our case it's an existing driver (with patches) that is already
integrated with the clock infrastructure, so it makes sense to use a
fixed-clock instead of just an ad-hoc property.
--
Hector Martin (mar...@marcan.st)
Public Key: https
arm64's ioremap look up the
address in a structure populated from this.
As an additional wrinkle, earlycon is almost certainly going to need a
special path to handle this very early, before OF stuff is available; it
also uses fixmap instead of ioremap, which has its own idea about what
type of mapping to use.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 10/02/2021 20.34, Tony Lindgren wrote:
* Hector Martin [210210 11:14]:
That means it'll end up like this (so that we can have more than one
fixed-clock):
clocks {
#address-cells = <1>;
#size-cells = <0>;
clk123: clock@0 {
...
reg = <0>
On 10/02/2021 19.19, Tony Lindgren wrote:
* Hector Martin 'marcan' [210208 12:05]:
On 08/02/2021 20.04, Krzysztof Kozlowski wrote:
...
+ clk24: clk24 {
Just "clock". Node names should be generic.
Really? Almost every other device device tree uses unique clock node nam
through devm_ioremap_resource()
or similar.
This sounds reasonable. For setting such a flag, I guess looking for a
property (inherited from parents) would make sense. `mmio-map-mode =
"nonposted"` or something like that?
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
e was one of those clang-format things :-).
I'll fix it and watch out for similar things.
+ for (i = 0; i < BITS_TO_LONGS(irqc->nr_hw); i++)
long is 64bit on arm64, so this loop is unlikely to do what you
want. Consider using BITS_TO_U32.
Ha, nice catch. Thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
bring-up, until things calm down a bit
and we have real users who would complain :) (not that I won't try to
avoid it).
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
or something to be
avoided.
If this is intended to be kept in sync and be fully comprehensive, I
might as well start planning out our longer term DT maintenance strategy
around that (which might involve using that tree in our bootloader).
--
Hector Martin (mar...@marcan.st)
Public Key: https
block nGnRE everywhere except in those
ranges (i.e. the nGnRnE fault takes precedence over other errors, like
the address not existing at all).
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
issuing an isb, makes me think all this FIQ stuff is
seriously deeply tied into the instruction pipeline. It's probably not
an IRQ line any more...
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
inter.
Still during s3c24xx_serial_probe() correct ops would have to be
assigned, but at least all ops are easily visible.
Roger, will do this for v2.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
code in there that
cares about the uapi-visible port type (other than setting it correctly
for those that do exist, to maintain current behavior), and just make
everything else use PORT_8250 for that?
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 09/02/2021 03.12, Krzysztof Kozlowski wrote:
Mentioned grep brings only one result:
arch/powerpc/platforms/powermac/pic.c: * cases where the APPL,interrupts
property is completely
You want to grep for 'AAPL', not 'APPL' :-)
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st
On 08/02/2021 19.34, Marc Zyngier wrote:
On 2021-02-07 09:12, Hector Martin 'marcan' wrote:
On 06/02/2021 22.15, Marc Zyngier wrote:
Do you actually need a new port type here? Looking at the driver
itself, it is mainly used to work out the IRQ model. Maybe introducing
a new irq_type field
yet, and they
went through a mailing list? It's probably time to set that up...
Either way, certainly not for Apple SoCs; I'll get rid of IRQF_SHARED
for v2.
Please send a v2 after fixing issues pointed out by kbuild.
Will do, already have those fixed in my WIP tree.
--
Hector Martin (mar
on all the other comments, I'll make the changes for v2.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
of programmable priority, the lack of convenient
masking for per-CPU interrupts is a bit of an issue...
Yeah... we'll see how that goes.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
le
system, and not having interrupts is one thing that makes it really hard
to debug...
Sounds good, I'll flip it over.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 08/02/2021 20.36, Marc Zyngier wrote:
On Mon, 08 Feb 2021 10:29:23 +,
Arnd Bergmann wrote:
On Mon, Feb 8, 2021 at 10:25 AM Marc Zyngier wrote:
On Thu, 04 Feb 2021 20:39:48 +, Hector Martin wrote:
+{
+ return readl(ic->base + reg);
Please consider using the _rela
s it's
worth describing it in the binding and dts, even if the driver never
selects it...?
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 08/02/2021 21.40, Arnd Bergmann wrote:
On Mon, Feb 8, 2021 at 1:13 PM Krzysztof Kozlowski wrote:
On Mon, Feb 08, 2021 at 08:56:53PM +0900, Hector Martin 'marcan' wrote:
On 08/02/2021 20.04, Krzysztof Kozlowski wrote:
apple
Don't make things different for this one platform (comparing
different prefixes for the
same vendor, one for PPC and one for ARM64. I've seen opinions go both
ways on this one :)
+ * Copyright 2021 Hector Martin
A lot here might be difficult to reverse-egineer or figure out by
ourself, so usually people rely on vendor sources (the open source
compliance
On 08/02/2021 19.29, Arnd Bergmann wrote:
On Mon, Feb 8, 2021 at 10:25 AM Marc Zyngier wrote:
On Thu, 04 Feb 2021 20:39:48 +, Hector Martin wrote:
+{
+ return readl(ic->base + reg);
Please consider using the _relaxed accessors, as I don't think any of
these interacts with mem
On 07/02/2021 21.25, Arnd Bergmann wrote:
On Sun, Feb 7, 2021 at 9:36 AM Hector Martin 'marcan' wrote:
On 07/02/2021 01.22, Arnd Bergmann wrote:
* In the fiq handler code, check if normal interrupts were enabled
when the fiq hit. Normally they are enabled, so just proceed to
handle
On 07/02/2021 18.12, Hector Martin 'marcan' wrote:
On 06/02/2021 22.15, Marc Zyngier wrote:
The default should be IRQ_NONE, otherwise the kernel cannot detect a
screaming spurious interrupt.
Good point, and this needs fixing in s3c64xx_serial_handle_irq too then
(which is what I based mine
choose, which does
result in a broken system on these machines. AIC should build without
ARCH_APPLE (as long as we're on ARM64), so we could reverse that.
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
r splitting them out is. But now
that they're part of the userspace API, this might not be a good idea.
Though, unsurprisingly, some googling suggests there are zero users of
these defines in userspace.
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
0, fiq_invalid_compat, 32 // FIQ 32-bit EL0
+ kernel_ventry 0, fiq, 32 // FIQ 32-bit EL0
fiq_compat here, right?
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
driver would be happy with, effectively,
recursive interrupts. This could work with a carefully controlled path
to make sure it doesn't break things, but I'm not so sure about the
current "just point FIQ and IRQ to the same place" approach here.
--
Hector Martin "marcan&quo
On 06/02/2021 22.58, Marc Zyngier wrote:
Hector Martin wrote:
+static void cpu_sync_irq_to_fiq(struct arm64_cpu_capabilities const *cap)
+{
+ u64 daif = read_sysreg(daif);
+
+ /*
+* By this point in the boot process IRQs are likely masked and FIOs
+* aren't, so we
On 06/02/2021 22.17, Marc Zyngier wrote:
+config ARCH_APPLE
+ bool "Apple Silicon SoC family"
+ select GENERIC_IRQ_CHIP
nit: This is better selected by the interrupt controller that relies
on the generic irqchip infrastructure.
Ack, changed for v2.
--
Hector Martin &qu
& (1<<34)
0x4
>>> msr(HCR_EL2, mrs(HCR_EL2) & ~(1<<34))
>>> mrs(HCR_EL2) & (1<<34)
0x4
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 05/02/2021 05.39, Hector Martin wrote:
This series brings up initial support for the Apple M1 SoC, used in the
2020 Mac Mini, MacBook Pro, and MacBook Air models.
Forgot to CC: a few folks involved in the previous related thread,
sorry! Adding them here, hope everyone got the series via
On 05/02/2021 11.27, kernel test robot wrote:
config: arc-allyesconfig (attached as .config)
This is never going to build on !ARM64 since it uses ARM64 registers, so
removing COMPILE_TEST for v2.
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 05/02/2021 08.55, kernel test robot wrote:
drivers/tty/serial/samsung_tty.c:60: warning: "NO_IRQ" redefined
60 | #define NO_IRQ -1
Turns out arm (32) defines NO_IRQ. Replaced with NOT_IN_IRQ for v2.
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 05/02/2021 08.04, Arnd Bergmann wrote:
On Thu, Feb 4, 2021 at 11:06 PM Hector Martin 'marcan' wrote:
If we split it up again, one of the two still needs to be the root,
decide whether what fired is an IRQ or FIQ, and dispatch accordingly. Or
we could have three nodes and have one root
On 05/02/2021 08.08, Arnd Bergmann wrote:
On Thu, Feb 4, 2021 at 10:44 PM Hector Martin 'marcan' wrote:
On 05/02/2021 06.29, Arnd Bergmann wrote:
On Thu, Feb 4, 2021 at 9:39 PM Hector Martin wrote:
We tend to split the dts file into one file per SoC and one for the
specific board. I guess
On 05/02/2021 06.37, Arnd Bergmann wrote:
On Thu, Feb 4, 2021 at 9:39 PM Hector Martin wrote:
+ * - This driver creates one IRQ domain for HW IRQs and the timer FIQs
+ * - FIQ hwirq numbers are assigned after true hwirqs, and are per-cpu
+ * - DT bindings use 3-cell form (like GIC):
+ * - &l
On 05/02/2021 06.29, Arnd Bergmann wrote:
On Thu, Feb 4, 2021 at 9:39 PM Hector Martin wrote:
+/ {
+ model = "Apple Mac Mini M1 2020";
+ compatible = "AAPL,j274", "AAPL,m1", "AAPL,arm-platform";
+ #address-cells = <2>
On 05/02/2021 06.16, Arnd Bergmann wrote:
On Thu, Feb 4, 2021 at 9:39 PM Hector Martin wrote:
config SERIAL_SAMSUNG
tristate "Samsung SoC serial support"
- depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
+ depends on PLAT_SAMSUNG || AR
These are the CPU cores in the "Apple Silicon" M1 SoC.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml
b/Documentation/devicetree/bindings/arm/cpus.
This introduces bindings for all three 2020 Apple M1 devices:
* AAPL,j274 - Mac mini (M1, 2020)
* AAPL,j293 - MacBook Pro (13-inch, M1, 2020)
* AAPL,j313 - MacBook Air (M1, 2020)
Signed-off-by: Hector Martin
---
.../devicetree/bindings/arm/AAPL.yaml | 36
of a platform match.
Any other ideas?
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/fixmap.h | 10 +-
arch/arm64/kernel/setup.c | 12
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm
drivers can discriminate between IRQs and FIQs by checking
the ISR_EL1 system register.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/assembler.h | 4
arch/arm64/include/asm/daifflags.h | 7 +++
arch/arm64/include/asm/irqflags.h | 17 +
arch/arm64/kernel
All currently supported Apple ARM SoCs (and possibly all future ones
too) require FIQs.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index e3e3bd2c4374..8182d78e8e23
timer).
This patch introduces basic UP irqchip support, without SMP/IPI support.
Signed-off-by: Hector Martin
---
MAINTAINERS | 1 +
drivers/irqchip/Kconfig | 10 +
drivers/irqchip/Makefile| 1 +
drivers/irqchip/irq-apple-aic.c | 316
Since the hardware IRQ controller only supports two IPIs per CPU and
Linux needs more, we implement 32 virtual IPIs using software and funnel
them through a single hardware IPI.
Signed-off-by: Hector Martin
---
drivers/irqchip/irq-apple-aic.c | 195 +++-
1 file
Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
for us. Add a compatible for it, and two missing supported formats.
Signed-off-by: Hector Martin
---
.../devicetree/bindings/display/simple-framebuffer.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git
This currently supports:
* SMP (via spin-tables)
* AIC IRQs
* Serial (with earlycon)
* Framebuffer
A number of properties are dynamic, and based on system firmware
decisions that vary from version to version. These are expected
to be filled in by the loader.
Signed-off-by: Hector Martin
DT, and that it does not let device drivers actually select the
IO mode, which might be desirable in the future anyway for some
devices.
All discussion and additional ideas welcome.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/io.h | 9 -
1 file changed, 8 insertions(+),
AIC is the Apple Interrupt Controller found on Apple ARM SoCs, such as
the M1.
Signed-off-by: Hector Martin
---
.../interrupt-controller/AAPL,aic.yaml| 88 +++
MAINTAINERS | 2 +
.../interrupt-controller/apple-aic.h | 14 +++
3
Apple M1 SoCs are distant descendants of Samsung SoCs and use similar
UART blocks.
Signed-off-by: Hector Martin
---
drivers/tty/serial/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 34a2899e69c0
which do not need FIQs,
or if newer SoCs are released without the FIQ requirement, we can
revisit the condition.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig | 10 +
arch/arm64/include/asm/cpucaps.h| 3 ++-
arch/arm64/include/asm/cpufeature.h | 6 ++
arch
These are not used at the moment, but let's add them for documentation
purposes.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/cputype.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 2084a0340d16
the
FIFO with data directly.
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 297 +++
include/linux/serial_s3c.h | 16 ++
include/uapi/linux/serial_core.h | 3 +
3 files changed, 280 insertions(+), 36 deletions(-)
diff --git a/drivers
Apple mobile devices originally used Samsung SoCs (starting with the
S5L8900), and their current in-house SoCs continue to use compatible
UART peripherals. We'll call this UART variant AAPL,s5l-uart.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/serial/samsung_uart.yaml | 4
This adds a Kconfig option to toggle support for Apple ARM SoCs.
At this time this targets the M1 and later "Apple Silicon" Mac SoCs.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig.platforms | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/Kconfig.platfo
Amusingly, this wasn't yet documented, even though this vendor prefix
has been used since time immemorial on PPC.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings
he project:
https://asahilinux.org/
Hector Martin (18):
dt-bindings: vendor-prefixes: add AAPL prefix
dt-bindings: arm: cpus: Add AAPL,firestorm & icestorm compatibles
dt-bindings: arm: AAPL: Add bindings for Apple ARM platforms
arm64: Kconfig: Introduce CONFIG_ARCH_APPLE
tty: seria
ant. Using the fasteoi flow, as in [1],
should be more efficient.
[1] https://github.com/AsahiLinux/linux/commit/d4cb18c93
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
ing we want (with user consent).
[1] https://asahilinux.org/
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
performance numbers though.
--
Hector Martin "marcan" (mar...@marcan.st)
Public Key: https://mrcn.st/pub
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