On 12/11/15 13:47, Lars-Peter Clausen wrote:
> On 11/12/2015 02:35 PM, Jon Hunter wrote:
>>
>> On 12/11/15 13:20, Lars-Peter Clausen wrote:
>>> On 11/12/2015 11:59 AM, Jon Hunter wrote:
>>>>
>>>> On 11/11/15 15:41, Grygorii Strashko wrote
On 12/11/15 14:37, Lars-Peter Clausen wrote:
> On 11/12/2015 03:02 PM, Jon Hunter wrote:
> [...]
>>>>> One easy way out might be to always call pm_get/pm_but from
>>>>> bus_lock,/bus_unlock. This way the chip is guaranteed to be powered up
>>>>>
On 12/11/15 23:20, Kevin Hilman wrote:
> Jon Hunter writes:
>
>> Some IRQ chips may be located in a power domain outside of the CPU subsystem
>> and hence will require device specific runtime power management. Ideally,
>> rather than adding more functions to the irq
-off-by: Jon Hunter
---
V3 changes:
- Removed unnecessary update to local variables in suspend/resume
V2 changes:
- Fixed return value for allocating channel
- Fixed test for return value from pm_runtime_get_sync()
drivers/dma/tegra20-apb-dma.c | 43 ++-
1
:
Pass: ( 4/ 4): tegra114-dalmore-a04, tegra124-jetson-tk1,
tegra20-trimslice, tegra30-beaver
Jon Hunter (6):
dmaengine: tegra-apb: Correct runtime-pm usage
dmaengine: tegra-apb: Use dev_get_drvdata()
dmaengine: tegra-apb: Save and restore word count
dmaengine: tegra
On probe failure or driver removal, before killing any tasklets, ensure
that the channel interrupt is freed to ensure that another channel
interrupt cannot occur and schedule the tasklet again.
Signed-off-by: Jon Hunter
---
drivers/dma/tegra20-apb-dma.c | 6 --
1 file changed, 4 insertions
Newer tegra devices have a separate word count register per channel that
contains the number of words to be transferred. This register is not
saved or restored by the suspend/resume helpers for these newer devices
and so ensure that it is.
Signed-off-by: Jon Hunter
---
drivers/dma/tegra20-apb
The tegra20-apb-dma driver currently uses the flag GFP_ATOMIC when
allocating memory for structures used in conjunction with the DMA
descriptors. It is preferred that dmaengine drivers use GFP_NOWAIT
instead and so the emergency memory pool will not be used by these
drivers.
Signed-off-by: Jon
In the tegra_dma_runtime_suspend/resume functions, the pdev structure
is not needed, and so just call dev_get_drvdata() to get the device
data structure.
Signed-off-by: Jon Hunter
---
drivers/dma/tegra20-apb-dma.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers
Currently the tegra-apb DMA driver suspend/resume helpers, save and
restore the registers for all channels regardless of whether they are
in use or not. Change this so that only channels that have been
allocated and configured are saved and restored.
Signed-off-by: Jon Hunter
---
V3 changes
From: Vince Hsu
Add of_reset_control_get_by_index() to allow the drivers to get reset
device without knowing its name.
Signed-off-by: Vince Hsu
[jonath...@nvidia.com: Updated stub function to return -ENOTSUPP instead
of -ENOSYS which should only be used for system calls.]
Signed-off-by: Jon
ned-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 99ca91f09929..5b6125ecd69a 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -729,7 +729,7 @@ s
: Adds audio clock for Tegra210 audio power-domain
Patch 15: Adds DT bindings for Tegra210 audio power-domain
Patch 16: Enable generic PM domains for tegra64
[0] http://comments.gmane.org/gmane.linux.ports.tegra/22944
Jon Hunter (15):
soc: tegra: pmc: Add missing structure members to kernel
The debugfs entry for the PMC device will not be removed if the probe of
the device fails on registering the restart handler and so fix this so
that it is removed.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git
: Jon Hunter
---
arch/arm64/Kconfig.platforms | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 9806324fa215..e0b5bd0aff0f 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -93,6 +93,8 @@ config
tegra_powergate_xxx functions that are used by the
tegra generic power domain code for consistency.
This is based upon work by Thierry Reding
and Vince Hsu .
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 504 ++--
include/dt-bindings/power/tegra-powergate.h
---
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 02c27004d4a
The power partitions L2, HEG, CELP and C1NC do not exist for T210 but were
incorrectly documented in the TRM. These will be removed from the TRM and
so also remove their definitions for T210.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 4
1 file changed, 4 deletions(-)
diff
not linked to another domain.
Signed-off-by: Jon Hunter
---
drivers/base/power/domain.c | 26 ++
include/linux/pm_domain.h | 5 +
2 files changed, 31 insertions(+)
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index e03b1ad25a90
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
the tegra210 device. Add this clock for tegra210.
Signed-off-by: Jon Hunter
---
drivers/clk/tegra/clk-id.h | 1 +
drivers/clk/tegra
Add the audio power-domain for tegra210. Note that this also removes the
existing "#power-domain-cells" which was incorrectly included by
commit e53095857166 ("arm64: tegra: Add Tegra210 support").
Signed-off-by: Jon Hunter
---
So far I have only added the audio power-do
may not mean it is valid. Fix this by computing
a bit-mask of the valid partition IDs for a device and add a macro that
will test if the partition is valid based upon this mask.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 18 +-
1 file changed, 13 insertions(+), 5
,
fix this by removing the second mapping of the PMC registers and reserve
the memory region for the PMC registers during early initialisation where
the initial mapping is created. During the probing of the PMC simply check
that the PMC registers have been mapped.
Signed-off-by: Jon Hunter
---
dr
Add power-domain binding documentation for the NVIDIA PMC driver in
order to support generic power-domains.
Signed-off-by: Jon Hunter
---
Please note that I have been debating whether I add this
"nvidia,powergate-clock-disable" property or just leave the clocks
disabled by def
tegra30_boot_secondary().
A macro has also been adding for checking the status of the powergate and
so update the tegra_powergate_is_powered() to use this macro as well.
Signed-off-by: Jon Hunter
---
arch/arm/mach-tegra/platsmp.c | 16 +++-
drivers/soc/tegra/pmc.c | 21
the APBDEV_PMC_PWRGATE_TOGGLE_0 register and ensure that
no one can incorrectly try to toggle the GPU partition via the
APBDEV_PMC_PWRGATE_TOGGLE_0 register.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/soc/tegra
Some members of the tegra_pmc structure are missing from the kernel-doc
comment for this structure. Add the missing members.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index
gra: Add Super Gen5 Logic")
Signed-off-by: Jon Hunter
---
drivers/clk/tegra/clk-tegra-super-gen4.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c
b/drivers/clk/tegra/clk-tegra-super-gen4.c
index 4559a20e3af6..474de0f0c26d
("clk: tegra: Add support for Tegra210 clocks")
Signed-off-by: Jon Hunter
---
drivers/clk/tegra/clk-tegra210.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 58514c44ea83..3bd831c2b9db 10
t be static?
drivers/clk/tegra/clk-tegra210.c:1215:15: warning: symbol
'tegra210_clk_adjust_vco_min' was not declared. Should it be static?
Fix this by declaring the above as static.
Fixes: b31eba5ff3f7 ("clk: tegra: Add support for Tegra210 clocks")
Signed-off-by: Jon Hunt
On 06/12/15 00:31, Rob Herring wrote:
> On Fri, Dec 04, 2015 at 02:57:12PM +0000, Jon Hunter wrote:
>> ---
>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git
>&
On 06/12/15 00:37, Rob Herring wrote:
> On Fri, Dec 04, 2015 at 02:57:13PM +0000, Jon Hunter wrote:
>> Add power-domain binding documentation for the NVIDIA PMC driver in
>> order to support generic power-domains.
>>
>> Signed-off-by: Jon Hunter
>>
>>
On 04/12/15 17:45, Eric Anholt wrote:
> From: Alexander Aring
>
> This patch adds function pm_genpd_exit for undo a pm_genpd_init. This
> is useful for multiple power domains while probing. If the probing fails
> after one pm_genpd_init was called we need to undo all previous
> registrations of
p_rnd_compat_bits);
> + else
> +#endif
> + rnd = (unsigned long)get_random_int() % (1 << mmap_rnd_bits);
> return rnd << PAGE_SHIFT;
> }
The above is causing a build failure on -next today.
commit 42a6c8953112a9856dd09148c3d6a2cc106b6003
Auth
Hi Ulf,
On 15/12/15 19:54, Ulf Hansson wrote:
> On 4 December 2015 at 15:57, Jon Hunter wrote:
>> Enable PM_GENERIC_DOMAINS for tegra 64-bit devices. To ensure that devices
>> dependent upon a particular power-domain are only probed when that power
>> domain has been powered
On 16/12/15 09:47, Ulf Hansson wrote:
> On 16 December 2015 at 10:40, Jon Hunter wrote:
>> Hi Ulf,
>>
>> On 15/12/15 19:54, Ulf Hansson wrote:
>>> On 4 December 2015 at 15:57, Jon Hunter wrote:
>>>> Enable PM_GENERIC_DOMAINS for tegra 64-bit devices. To
power management
control because they may not be accessible yet. Therefore, when mapping
the IRQ, don't program the type settings, just save them and then program
these saved settings when the IRQ is requested (so long as if they are not
overridden via the call to request the IRQ).
Signed-off-by
If we fail to map the address space for the GIC distributor or CPU
interface, then don't attempt to initialise the chip, just WARN and
return.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchi
terrupt to another device could be useful (unless something
already exists that I have overlooked).
Please let me know if you have any thoughts/opinions on the above.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 330 +++---
1 file changed, 253
ch be acceptable
or if not, is there a better way to handle this?
Changes from V1:
- Prevent IRQ mapping from setting the IRQ type and only program the
type when allocating the IRQ.
- Resolved some __init section conflicts found with V1 series.
Jon Hunter (8):
irqdomain: Ensure type settings
this and don't return a valid IRQ mapping if the type settings
do not match.
Signed-off-by: Jon Hunter
---
kernel/irq/irqdomain.c | 58 +-
1 file changed, 43 insertions(+), 15 deletions(-)
diff --git a/kernel/irq/irqdomain.c b/kerne
and the flag CHIP_HAS_RPM is set, then the pm_runtime_get/put
APIs for this chip will be called when an IRQ is requested/freed,
respectively.
Signed-off-by: Jon Hunter
---
include/linux/irq.h| 4
kernel/irq/internals.h | 24
kernel/irq/manage.c| 7
, make sure that we free any memory
allocated if we fail to initialise the IRQ domain.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 56 +--
1 file changed, 40 insertions(+), 16 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers
ler.
This is based upon a patch by Linus Walleij .
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 41 +++--
1 file changed, 15 insertions(+), 26 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 5d1f1d4396c2..eb
function __gic_init_root() which
will handle root controller specific initialisation and internally call
__gic_init_bases().
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic-common.c | 4 +-
drivers/irqchip/irq-gic.c| 94 +---
2 files changed, 62
On 17/12/15 10:48, Jon Hunter wrote:
> Add a driver for the Tegra-AGIC interrupt controller which is compatible
> with the ARM GIC-400 interrupt controller.
>
> The Tegra AGIC (Audio GIC) is part of the Audio Processing Engine (APE) on
> Tegra210 and can route interrupts to eit
On 17/12/15 13:16, Linus Walleij wrote:
> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote:
>
>> When mapping an IRQ, if a mapping already exists, then we simply return
>> the virual IRQ number. However, we do not check that the type settings for
>
> ^virtual
>
&
On 17/12/15 13:19, Linus Walleij wrote:
> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote:
>
> (Adding Rafael and linux-pm to To: list)
>
>> Some IRQ chips may be located in a power domain outside of the CPU
>> subsystem and hence will require device specific
On 17/12/15 13:26, Linus Walleij wrote:
> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote:
>
>> If the GIC initialisation fails, then currently we do not return an error
>> or clean-up afterwards. Although for root controllers, this failure may be
>> fatal anyway, f
On 17/12/15 11:00, Marc Zyngier wrote:
> Hi Jon,
>
> On 17/12/15 10:48, Jon Hunter wrote:
>> Dynamically assign the irqchip structure for each GIC controller
>> instance. This is necessary in order to populate the "dev" member
>> of the irqchip structure f
On 17/12/15 13:32, Linus Walleij wrote:
> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote:
>
>> Add a driver for the Tegra-AGIC interrupt controller which is compatible
>> with the ARM GIC-400 interrupt controller.
> (...)
>> +static const s
a system hang on boot. This is because the kernel will disable the
pll_mb when disabling unused clock as it appears to be unused when it is
not.
Also add the additional pll_p clock source for the EMC.
Signed-off-by: Jon Hunter
---
drivers/clk/tegra/clk-tegra210.c | 3 ++-
1 file changed, 2
.
Therefore, ensure that r0 is set to TEGRA_FLUSH_CACHE_ALL when calling
tegra_disable_clean_inv_dcache() from tegra20_sleep_core_finish() and
tegra30_sleep_core_finish().
Signed-off-by: Jon Hunter
---
Please note that I have not encountered any problems without this change
so far, but I noticed this
as a wake-up source before disabling the interrupt on entering suspend.
Signed-off-by: Jon Hunter
---
drivers/mfd/as3722.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/mfd/as3722.c b/drivers/mfd/as3722.c
index 924ea90494ae..8ee6e4008276 100644
--- a/
On 19/11/15 14:23, Jon Hunter wrote:
> The as3722 device is registered as an irqchip and the as3722-rtc interrupt
> is one of it's interrupt sources. When using the as3722-rtc as a wake-up
> device from suspend, the following is seen:
>
> PM: Syncing filesystems ... don
as a wake-up source before disabling the interrupt on entering suspend.
Signed-off-by: Jon Hunter
---
v2 changes:
- Re-enabled the interrupt in resume before disabling the wake-up.
drivers/mfd/as3722.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/mf
Hi Vinod,
Any more comments on this?
Cheers
Jon
On 13/11/15 16:39, Jon Hunter wrote:
> Some clean-up changes for the tegra-apb DMA driver.
>
> Changes for V3 noted in the applicable patches.
>
> These have been compile and boot tested for ARM and ARM64. Summary of the
> ARM
Hi Arnd,
On 09/09/15 21:22, Arnd Bergmann wrote:
> On Wednesday 09 September 2015 17:44:54 Jon Hunter wrote:
>>
>> On 09/09/15 16:56, Arnd Bergmann wrote:
>>> On Wednesday 09 September 2015 16:06:01 Jon Hunter wrote:
>>>> +
>>>> + idata = kcal
Hi Ulf,
On 09/09/15 13:42, Ulf Hansson wrote:
[snip]
>> +static int mmc_blk_ioctl_cmd(struct block_device *bdev,
>> + struct mmc_ioc_cmd __user *ic_ptr)
>> +{
>> + struct mmc_blk_ioc_data *idata;
>> + struct mmc_blk_data *md;
>> + struct mmc_card *card;
>>
On 10/09/15 18:10, Grant Grundler wrote:
> On Thu, Sep 10, 2015 at 1:24 AM, Jon Hunter wrote:
> ...
>>> - you have some implicit padding after the structure and should replace that
>>> with explictit pad bytes to extend the structure to a multiple of its
>>>
: Rebased on linux-next from v3.18. Changed
userspace pointer type for multi command to be a u64. Renamed
from combo commands to multi commands. Updated patch based upon
feedback review comments received. Updated commit message ]
Signed-off-by: Jon Hunter
---
V2 changes:
- Updated changelog per
Hi Tyler,
On 23/11/15 23:18, Tyler Baker wrote:
> Hi Jon,
>
> On 20 November 2015 at 07:11, Jon Hunter wrote:
>> The _clk_disable_pll() function will attempt to place a PLL into bypass
>> if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL
>> by
On 25/11/15 15:52, Tyler Baker wrote:
> On 25 November 2015 at 07:11, Thierry Reding wrote:
>> On Mon, Nov 23, 2015 at 03:18:59PM -0800, Tyler Baker wrote:
>>> Hi Jon,
>>>
>>> On 20 November 2015 at 07:11, Jon Hunter wrote:
>>>> The _clk_disable
On 25/11/15 17:48, Jon Hunter wrote:
>
> On 25/11/15 15:52, Tyler Baker wrote:
>> On 25 November 2015 at 07:11, Thierry Reding
>> wrote:
>>> On Mon, Nov 23, 2015 at 03:18:59PM -0800, Tyler Baker wrote:
>>>> Hi Jon,
>>>>
>>>
On 07/12/15 17:51, Rhyland Klein wrote:
> On 12/7/2015 10:51 AM, Rhyland Klein wrote:
>> On 12/4/2015 12:04 PM, Jon Hunter wrote:
>>> Sparse reports the following warnings for structures and functions that
>>> should be declared static:
>>>
>>> d
24_CPUFREQ
> tristate "Tegra124 CPUFreq support"
> - depends on ARCH_TEGRA && CPUFREQ_DT
> + depends on ARCH_TEGRA && CPUFREQ_DT && REGULATOR
> default y
> help
> This adds the CPUFreq driver support for Tegra124 SOCs.
Ac
On 08/12/15 19:07, Kevin Hilman wrote:
> Jon Hunter writes:
>
>> Add power-domain binding documentation for the NVIDIA PMC driver in
>> order to support generic power-domains.
>>
>> Signed-off-by: Jon Hunter
>>
>> ---
>>
>> Please note t
On 09/12/15 12:23, Jon Hunter wrote:
>
> On 08/12/15 19:07, Kevin Hilman wrote:
>> Jon Hunter writes:
>>
>>> Add power-domain binding documentation for the NVIDIA PMC driver in
>>> order to support generic power-domains.
>>>
>>> Signed-off-
On 09/12/15 14:47, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Wed, Dec 09, 2015 at 12:03:27PM +0000, Jon Hunter wrote:
>> On 08/12/15 21:52, Arnd Bergmann wrote:
>
>>> My first attempt was to implement a helper for this function
>>> for re
On 16/10/15 08:35, Jon Hunter wrote:
> Add support for the Tegra210 Audio DMA controller that is used for
> transferring data between system memory and the Audio sub-system.
> The driver only supports cyclic transfers because this is being solely
> used for audio.
>
> This dr
On 28/10/15 07:03, Vinod Koul wrote:
> On Fri, Oct 16, 2015 at 09:25:52AM +0100, Jon Hunter wrote:
>> @@ -1182,14 +1182,11 @@ static int tegra_dma_alloc_chan_resources(struct
>> dma_chan *dc)
>> {
>> struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
>
On 28/10/15 06:53, Vinod Koul wrote:
> On Fri, Oct 16, 2015 at 11:57:02AM +0100, Jon Hunter wrote:
>>>>> How about just calling free_irq()? That's how you'd typically handle this.
>>>>
>>>> Yes, however, the interrupt is requested by devm_re
On 20/01/16 15:30, Thomas Gleixner wrote:
> On Tue, 19 Jan 2016, Jon Hunter wrote:
>> On 18/01/16 14:47, Ulf Hansson wrote:
>>>> +/* Inline functions for support of irq chips that require runtime pm */
>>>> +static inline int chip_pm_get(struct irq_desc *desc)
&
interrupts on non-root GICs to only be dropped in priority but
never deactivated. Therefore, only set the EOImodeNS bit for the root
controller.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic.c b
Setting the affinity of an IRQ, it only applicable for the root
interrupt controller and so only populate this operator for the root
controller.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers
nitializing regulator pointer with an error value and
> checking it only against an error.
>
> This makes code consistent and efficient.
>
> Reported-by: Jon Hunter
> Signed-off-by: Viresh Kumar
Tested-by: Jon Hunter
Thanks
Jon
Hi Krzysztof,
On 23/02/16 13:56, Krzysztof Adamski wrote:
> On Tue, Feb 23, 2016 at 01:22:38PM +0000, Jon Hunter wrote:
>> Hi Mark, Krzysztof,
>>
>> It appears that commit daad134d6649 ("regulator: core: Request GPIO
>> before creating sysfs entries") breaks
e_unregister was called even though
> it was not registered yet.
>
> Signed-off-by: Krzysztof Adamski
> Reported-by: Jon Hunter
Nit ... I think that order of the above should be reversed.
> ---
> drivers/regulator/core.c | 8 +++-
> 1 file changed, 3 insertions(+), 5 deleti
On 24/02/16 08:26, Krzysztof Adamski wrote:
> On Tue, Feb 23, 2016 at 03:18:59PM +0000, Jon Hunter wrote:
>>
>> On 23/02/16 14:47, Krzysztof Adamski wrote:
>>> Signed-off-by: Krzysztof Adamski
>>> Reported-by: Jon Hunter
>>
>> Nit ... I thi
tered yet.
>
> Signed-off-by: Krzysztof Adamski
> Reported-by: Jon Hunter
> ---
> drivers/regulator/core.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
> index 6ee9ba4..055f8
e_unregister was called even though
> it was not registered yet.
>
> Signed-off-by: Krzysztof Adamski
> Reported-by: Jon Hunter
Make sure you tag the patch as V2, etc, so that Mark knows which version
to pick up.
Jon
Hi Thierry,
On 05/05/15 15:42, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Tue, May 05, 2015 at 03:28:25PM +0100, Jon Hunter wrote:
>> Hi Andrew,
>>
>> On 04/05/15 18:36, Andrew Bresticker wrote:
>>> This series adds support for xHCI
TK1 and Nyan-Big with a variety of USB2.0 and USB3.0 memory
> sticks and ethernet dongles. This has also been tested, with additional
> out-of-tree patches, on Tegra132 and Tegra210 based boards.
For the series, you can add my ...
Reviewed-by: Jon Hunter
Tested-by: Jon Hunter
I have te
freed/unmapped. Therefore, call tegra_uart_dma_channel_free()
instead of just dma_release_channel() if dmaengine_slave_config() fails.
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 51 +--
1 file changed, 28 insertions(+), 23 deletions
then unmap the DMA
buffer. Finally, remove the unnecessary call to tegra_uart_flush_buffer().
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/tty/serial/serial-tegra.c
b/drivers/tty/serial
.
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/serial-tegra.c
b/drivers/tty/serial/serial-tegra.c
index 1d5ea3964ee5..9e08d3f07509 100644
--- a/drivers/tty/serial
For all tegra devices (up to t210), there is a hardware issue that
requires software to wait for 3 UART clock periods after enabling
the TX fifo, otherwise data could be lost.
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 10 ++
1 file changed, 10 insertions(+)
diff
Various fixes for the tegra hsuart driver.
Tested on tegra124 nyan-big by opening a serial console on ttyTHS0
and performing simple z-modem transfers.
Jon Hunter (6):
serial: tegra: Correct delay after TX flush
serial: tegra: Add delay after enabling FIFO mode
serial: tegra: Use unsigned
changelog with more commentary.]
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/serial-tegra.c
b/drivers/tty/serial/serial-tegra.c
index 0d9d7ceb1dbb..a53899c47e60 100644
--- a
completed because if the DMA is in progress we do not need
to ACK yet. Changed the print from dev_info to dev_debug. Updated
changelog to add more commentary on the race condition based upon
feedback from author.]
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 13 -
1
).
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/tty/serial/serial-tegra.c
b/drivers/tty/serial/serial-tegra.c
index 17d8a08b047b..a5312e4b6393 100644
--- a/drivers/tty/serial/serial-teg
The DMA cookie for the RX channel is being used by the TX channel.
Therefore, fix driver to use the correct DMA cookie for the TX channel.
Signed-off-by: Jon Hunter
---
drivers/tty/serial/serial-tegra.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial
On 20/05/15 04:57, Alexandre Courbot wrote:
[snip]
> There may still be a leak (that is not related to your patch) in the
> RX path though:
>
> dma_buf = dma_alloc_coherent(...);
> ret = dmaengine_slave_config(...);
> if (ret < 0) {
> ...
> goto scrub;
> }
>
>
If the call to dmaengine_slave_config() fails, then the DMA buffer will
not be freed/unmapped. Fix this by moving the code that stores the
address of the buffer in the tegra_uart_port structure to before the
call to dmaengine_slave_config().
Reported-by: Alexandre Courbot
Signed-off-by: Jon
On 20/05/15 12:21, Jon Hunter wrote:
> If the call to dmaengine_slave_config() fails, then the DMA buffer will
> not be freed/unmapped. Fix this by moving the code that stores the
> address of the buffer in the tegra_uart_port structure to before the
> call to dmaengine_slave_confi
On 20/05/15 12:25, Jon Hunter wrote:
>
> On 20/05/15 12:21, Jon Hunter wrote:
>> If the call to dmaengine_slave_config() fails, then the DMA buffer will
>> not be freed/unmapped. Fix this by moving the code that stores the
>> address of the buffer in the tegra_uart_port
On 20/05/15 10:51, Jon Hunter wrote:
>
> On 20/05/15 04:57, Alexandre Courbot wrote:
>
> [snip]
>
>> There may still be a leak (that is not related to your patch) in the
>> RX path though:
>>
>> dma_buf = dma_alloc_coherent(...);
>> ret = dm
On 13/05/15 05:56, Alexandre Courbot wrote:
> On Tue, May 12, 2015 at 6:51 PM, Jon Hunter wrote:
>>
>> On 12/05/15 09:39, Alexandre Courbot wrote:
>>> On Tue, May 5, 2015 at 11:17 PM, Jon Hunter wrote:
>>>> Function tegra_uart_dma_channel_allocate() doe
Hi Valentin,
On 13/05/15 14:22, Valentin Rothberg wrote:
> Hi Andrew,
>
> your commit b1f10002b00a ("mailbox: Add NVIDIA Tegra XUSB mailbox
> driver") is in today's linux-next tree (i.e., next-20150513) and it
> adds the following lines:
>
> +config TEGRA_XUSB_MBOX
> + tristate "NVIDIA Teg
Hi Lee,
On 13/05/15 15:39, Lee Jones wrote:
> On Mon, 04 May 2015, Andrew Bresticker wrote:
>
>> Add a binding document for the XUSB host complex on NVIDIA Tegra124
>> and later SoCs. The XUSB host complex includes a mailbox for
>> communication with the XUSB micro-controller and an xHCI host-co
701 - 800 of 1935 matches
Mail list logo
