Re: 3.4.10 N_GSM tty_io WARNING and lockup

Alan Cox a...@lxorguk.ukuu.org.uk writes: I'm trying to use GSM tty line discipline. Basically echo AT+CMUX=0 /dev/ttyS0 set termios (speed etc.) int ldisc = N_GSM0710; ioctl(fd, TIOCSETD, ldisc); Baffled at this point. If you set some other ldisc instead (eg PPP) can you reproduce

3.4.10 N_GSM tty_io WARNING and lockup

Hi, I'm trying to use GSM tty line discipline. Basically echo AT+CMUX=0 /dev/ttyS0 set termios (speed etc.) int ldisc = N_GSM0710; ioctl(fd, TIOCSETD, ldisc); ... The ioctl first fails with EIO (probably due to inactive DCD line) in tty_set_ldisc(): if (test_bit(TTY_HUPPED,

Re: [PATCH v2] CNS3xxx: Fix PCIe early iotable_init().

Arnd Bergmann a...@arndb.de writes: Applied to next/fixes-non-critical. Since the problem is not new and you didn't mark the patch as 'stable', this seems to be the right place. Let us know if you need backports to stable kernels, also fo the other patch. Sure, BTW there is also that

[ARM] CNS3xxx: 3 regressions identified in v3.14-rc4+

Hello, Linux version 3.14.0-rc4+ (current tip, no extra patches), CPU is Cavium Econa CNS3420, board is Gateworks Laguna GW2388-4 (masqueraded as CNS3420VB). Issue #1 ### kernel BUG at mm/vmalloc.c:1132! PC is at vm_area_add_early+0x20/0x84 LR is

[PATCH] CNS3xxx: Fix PCIe early iotable_init().

Signed-off-by: Krzysztof Hałasa khal...@piap.pl --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -240,7 +240,7 @@ static void __init cns3420_map_io(void) { cns3xxx_map_io(); iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc

Re: [PATCH 3/5 v2] Staging: cxt1e1: Fix line length over 80 characters in hwprobe.c

Daeseok Youn daeseok.y...@gmail.com writes: clean up checkpatch.pl warnings: WARNING: Line length over 80 characters This warning should be long gone IMHO. It does more harm than good. unsigned char *ucp = (unsigned char *) hi-mfg_info.data;

Re: [PATCH 3/5 v2] Staging: cxt1e1: Fix line length over 80 characters in hwprobe.c

DaeSeok Youn daeseok.y...@gmail.com writes: - * match with board's first found interface, otherwise this is first - * found + * match with board's first found interface, otherwise this is + * fisrt found ^ I wonder

Re: [PATCH] CNS3xxx: Fix PCIe early iotable_init().

Arnd Bergmann a...@arndb.de writes: Patch looks good, but please add the changeset description from your first patch. I wonder if another approach would be better. I don't like the .pfn messing and the bugs that function introduces. -- Krzysztof Halasa Research Institute for Automation and

[PATCH v2] CNS3xxx: Fix PCIe early iotable_init().

This patch fixes the following BUG: kernel BUG at mm/vmalloc.c:1132! PC is at vm_area_add_early+0x20/0x84 LR is at add_static_vm_early+0xc/0x60 The problem is cns3xxx_pcie_init() (device_initcall) calls the early iotable_init(). Instead of merely calling the PCIe iotable_init() from

Re: [PATCH v2] CNS3xxx: Fix PCIe early iotable_init().

khal...@piap.pl (Krzysztof Hałasa) writes: This patch fixes the following BUG: kernel BUG at mm/vmalloc.c:1132! PC is at vm_area_add_early+0x20/0x84 LR is at add_static_vm_early+0xc/0x60 The problem is cns3xxx_pcie_init() (device_initcall) calls the early iotable_init(). That's obviously

[PATCH2] CNS3xxx: Fix a WARN() related to IRQ allocation.

-by: Krzysztof Hałasa khal...@piap.pl -- Krzysztof Halasa Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More

[PATCH2] CNS3xxx: Fix a WARN() related to IRQ allocation.

-by: Krzysztof Hałasa khal...@piap.pl --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -246,7 +246,6 @@ static void __init cns3420_map_io(void) MACHINE_START(CNS3420VB, Cavium Networks CNS3420 Validation Board) .atag_offset= 0x100, - .nr_irqs

Re: Regression (ARM) arch/arm/mm/init.c doesn't build without CONFIG_ARM_PATCH_PHYS_VIRT.

Russell, Santosh, the unneeded commit causing regression is still in place. Please try to compile an ARM kernel without CONFIG_ARM_PATCH_PHYS_VIRT and with CONFIG_ZONE_DMA and see for yourself, if you don't believe me. Please be aware that this commit fixes nothing, its only function is causing

Re: [PATCH REPOST] ARM: Fix regression in IXP4xx network drivers DMA masks.

masks. Now, devices will have 32-bit default DMA masks (0x) as per DMA API. Signed-off-by: Krzysztof Hałasa khal...@piap.pl diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 6d6bde3..cefb80b 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch

Re: Regression (ARM) arch/arm/mm/init.c doesn't build without CONFIG_ARM_PATCH_PHYS_VIRT.

Santosh Shilimkar santosh.shilim...@ti.com writes: I am afraid you didn't understood what the fix is if you say above. arm_dma_limit is broken without this fix for LPAE machines with memory starting 4 GB physical boundary. I wonder what CONFIG_ARM_PATCH_PHYS_VIRT and CONFIG_ZONE_DMA do they

Re: Regression (ARM) arch/arm/mm/init.c doesn't build without CONFIG_ARM_PATCH_PHYS_VIRT.

Russell King - ARM Linux li...@arm.linux.org.uk writes: Okay, reverted. Thanks. -- Krzysztof Halasa Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a

v3.13-rc6+ regression (ARM board)

Hi, There seems to be a regression in v3.13-rc6+ (up to current tip = 71ce176ee6ed1735b9a1160a5704a915d13849b1). Board is Gateworks Cambria, CPU Intel IXP435 ARM big endian, gcc 4.7.3. The board boots correctly and works (shell mostly, and SSHD) for about 50 seconds. After 52-54 seconds, it

[ARM] Fix kernel compile error: drivers/crypto/ixp4xx_crypto.c.

drivers/crypto/ixp4xx_crypto.c: In function 'ixp_module_init': drivers/crypto/ixp4xx_crypto.c:1419:2: error: 'dev' undeclared (first use in this function) Now builds. Not tested on real hw. Signed-off-by: Krzysztof Hałasa khal...@piap.pl --- a/drivers/crypto/ixp4xx_crypto.c +++ b/drivers

Regression (ARM) arch/arm/mm/init.c doesn't build without CONFIG_ARM_PATCH_PHYS_VIRT.

arch/arm/mm/init.c: In function 'setup_dma_zone': arch/arm/mm/init.c:232:19: error: '__pv_phys_offset' undeclared (first use in this function) Reverting the following commit fixes it: commit 787b0d5c1ca7ff24feb6f92e4c7f4410ee7d81a8 Author: Santosh Shilimkar santosh.shilim...@ti.com Date: Mon

Re: Regression (ARM) arch/arm/mm/init.c doesn't build without CONFIG_ARM_PATCH_PHYS_VIRT.

Russell King - ARM Linux li...@arm.linux.org.uk writes: On Tue, Dec 31, 2013 at 12:20:56PM +0100, Krzysztof Hałasa wrote: arch/arm/mm/init.c: In function 'setup_dma_zone': arch/arm/mm/init.c:232:19: error: '__pv_phys_offset' undeclared (first use in this function) Reverting the following

[PATCH REPOST] ARM: Fix regression in IXP4xx network drivers DMA masks.

default DMA masks (0x) as per DMA API. Signed-off-by: Krzysztof Hałasa khal...@piap.pl diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 6d6bde3..cefb80b 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -316,32

Re: v3.13-rc6+ regression (ARM board)

There seems to be a regression in v3.13-rc6+ (up to current tip = 71ce176ee6ed1735b9a1160a5704a915d13849b1). Board is Gateworks Cambria, CPU Intel IXP435 ARM big endian, gcc 4.7.3. The board boots correctly and works (shell mostly, and SSHD) for about 50 seconds. After 52-54 seconds, it

Re: v3.13-rc6+ regression (ARM board)

Hello Uwe, There seems to be a regression in v3.13-rc6+ (up to current tip = 71ce176ee6ed1735b9a1160a5704a915d13849b1). Board is Gateworks Cambria, CPU Intel IXP435 ARM big endian, gcc 4.7.3. The board boots correctly and works (shell mostly, and SSHD) for about 50 seconds. After

Re: v3.13-rc6+ regression (ARM board)

Linus Torvalds torva...@linux-foundation.org writes: --- a/kernel/time/sched_clock.c +++ b/kernel/time/sched_clock.c @@ -36,6 +36,7 @@ core_param(irqtime, irqtime, int, 0400); static struct clock_data cd = { .mult = NSEC_PER_SEC / HZ, + .seq =

Re: [PATCH 2/2] sched_clock: Disable seqlock lockdep usage in sched_clock

John Stultz john.stu...@linaro.org writes: Unforunately the seqlock lockdep enablmenet can't be used in sched_clock, since the lockdep infrastructure eventually calls into sched_clock, which causes a deadlock. Thus, this patch changes all generic sched_clock usage to use the raw_* methods.

Re: DMA masks

Russell King - ARM Linux li...@arm.linux.org.uk writes: struct device { ... u64 *dma_mask; /* dma mask (if dma'able device) */ ^^ If dma-able device gives a clue. It is now the

Re: DMA masks

Russell King - ARM Linux li...@arm.linux.org.uk writes: No. If dma_mask is NULL, then dma_set_mask() will return -EIO no matter what. If dma_mask is non-NULL, dma_set_mask() will succeed if the mask is supported by the hardware. For example, on x86: and this is the same pattern we

[PATCH] Fix unbalanced mutex in dma_pool_create().

dma_pool_create() needs to unlock the mutex in error case. The bug has been present starting with v3.16-rc1 (cc6b664a). Signed-off-by: Krzysztof Hałasa k...@piap.pl Cc: sta...@vger.kernel.org --- a/mm/dmapool.c +++ b/mm/dmapool.c @@ -174,11 +174,11 @@ struct dma_pool *dma_pool_create(const char

Re: [PATCH 08/11] ARM: ixp4xx: fix {in,out}s{bwl} data types

Arnd Bergmann a...@arndb.de writes: Most platforms use void pointer arguments in these functions, but ixp4xx does not, which triggers lots of warnings in device drivers like: net/ethernet/8390/ne2k-pci.c: In function 'ne2k_pci_get_8390_hdr': net/ethernet/8390/ne2k-pci.c:503:3: warning:

Re: [PATCH 06/16] ARM: cns3xxx: convert PCI to use generic config accesses

-by: Krzysztof Hałasa khal...@piap.pl -- Krzysztof Halasa Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo

Re: [PATCH] net:wan:Change location of debug printk statement in the function,hss_hdlc_poll

Nicholas Krause xerofo...@gmail.com writes: This changes the location of the printk for montioring if the stucture pointer desc of type structure desc has a error count due to failing in the switch statement for checking it's status from the default switch case in this switch to the area of

Re: [PATCH 14/15] ARM: cns3xxx: don't export static symbol

Arnd Bergmann a...@arndb.de writes: Looks good. Krzysztof, do you want to pick this up and send me a pull request together with other patches, or should I apply this to the arm-soc fixes directly? The latter, please. Acked-by: Krzysztof Hałasa khal...@piap.pl -- Krzysztof Halasa Research

Re: On register r/w macros/procedures of drivers/media/pci

Andrey Utkin andrey.ut...@corp.bluecherry.net writes: I am starting a work on driver for techwell tw5864 media grabberencoder. If this is tw6864 then I have a driver mostly completed. Actually I'm using tw6869 but I think this is very similar (4 channels instead of 8 and PCI instead of PCIe). I

Re: On register r/w macros/procedures of drivers/media/pci

Andrey Utkin andrey.ut...@corp.bluecherry.net writes: Please check first digit. I mean _5_864, in your post there's 6869. Ok, I just thought it may be a typo. I can now see 5864 is a H.264 encoder, while 686x are simpler frame-grabbers only. Sorry for the noise. -- Krzysztof Halasa Research

Re: Coding style details (checkpatch)

Joe Perches j...@perches.com writes: How is the macro used? #define REG8_1(a0) ((const u16[8]){a0, a0 + 1, a0 + 2, a0 + 3}) #define REG8_1(a0) ((const u16[8]){a0, a0 + 1, a0 + 2, a0 + 3, a0 + 4, a0 + 5, a0 + 6, a0 + 7}) #define REG8_2(a0) ((const u16[8]){a0, a0 + 2, a0 + 4, a0 + 6, a0 + 8, a0

Re: Coding style details (checkpatch)

Joe Perches j...@perches.com writes: It might be better to use some base + index macro as it could be smaller object code. Something like: #define REG_NO(base, multiplier, index) (base + (multiplier * index)) reg_write(vc-dev, REG_NO(0x10, 1, vc-ch), dma_cfg); or #define

Re: [PATCH] Add PCI ID and quirk for Intersil/Techwell TW686[4589] AV capture cards.

Bjorn Helgaas bhelg...@google.com writes: Intersil/Techwell TW686[4589]-based video capture cards have an empty (zero) class code. Fix it. Applied to pci/misc for v4.2, with minor tweak as below to use PCI_CLASS_MULTIMEDIA_OTHER instead of a bare number. Let me know if you see any issues

Re: Coding style details (checkpatch)

Joe Perches j...@perches.com writes: #define VDREG8(a0) ((const u16[]){\ a0 + 0x000, a0 + 0x010, a0 +0x020, a0 + 0x030, \ a0 + 0x100, a0 + 0x110, a0 +0x120, a0 + 0x130}) as const u16[] is a $Type but const u16[digits] is not. Still, as written, the code

[PATCH] MEDIA PCI Kconfig ANALOG_TV - CAMERA

) but it at least doesn't select the TUNERs. Perhaps the following patch would make sense. Signed-off-by: Krzysztof Hałasa khal...@piap.pl --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -11,16 +11,16 @@ if MEDIA_PCI_SUPPORT if MEDIA_CAMERA_SUPPORT comment Media

Re: Coding style details (checkpatch)

Frans Klaver franskla...@gmail.com writes: Ah, right. One might say that this is a false positive, but that's up to Joe or Andy I guess. It may be valid C code, but I think this construction is slightly funky to begin with. Which file is this? A new file, not yet sent anywhere. --

[PATCH] Add PCI ID and quirk for Intersil/Techwell TW686[4589] AV capture cards.

Intersil/Techwell TW686[4589]-based video capture cards have an empty (zero) class code. Fix it. Signed-off-by: Krzysztof Hałasa khal...@piap.pl --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3662,6 +3662,26 @@ DECLARE_PCI_FIXUP_HEADER(0x1283, 0x8892, quirk_use_pcie_bridge_dma_alias

Re: Coding style details (checkpatch)

Frans Klaver franskla...@gmail.com writes: #define REG8_1(a0) ((const u16[8]){a0, a0 + 1, a0 + 2, a0 + 3}) vs #define REG8_1(a0) ((const u16[8]) {a0, a0 + 1, a0 + 2, a0 + 3}) ^ The prescribed style is to have no space between cast and castee. So, the

Coding style details

Hi, a simple question: which style is preferred? #define REG8_1(a0) ((const u16[8]){a0, a0 + 1, a0 + 2, a0 + 3}) vs #define REG8_1(a0) ((const u16[8]) {a0, a0 + 1, a0 + 2, a0 + 3}) ^ -- Krzysztof Halasa Industrial Research Institute for Automation and

Re: [PATCH] ARM: cns3xxx: pci: avoid potential stack overflow

Arnd Bergmann a...@arndb.de writes: The cns3xxx_pcie_hw_init function uses excessive kernel stack space because of a hack that puts a fake struct pci_sys_data and struct pci_bus on the stack in order to call the generic pci_bus_read_config accessors, which causes a warning in ARM

Re: [PATCH] defines modified to match the 80-char rule

Mario Bambagini mario.bambag...@gmail.com writes: Defines have been written in more than one line to match the 80-character rule. This error has been fixed 6 times in this file. The file is fully compliant with respect to the coding rules now. Rules, maybe. But is it better, i.e., more

Re: [PATCH] defines modified to match the 80-char rule

Joe Perches j...@perches.com writes: So, could we have the localized readability when it makes sense, and the default rules when nothing else applies? Then the question becomes how local. The answer seems easy to me: as much as it's needed to get the best readability. If that means 4 or 2

Re: [PATCH] defines modified to match the 80-char rule

Joe Perches j...@perches.com writes: -#define LCONSOLE(mask, format, ...) CDEBUG(D_CONSOLE | (mask), format, ## __VA_ARGS__) -#define LCONSOLE_INFO(format, ...) CDEBUG_LIMIT(D_CONSOLE, format, ## __VA_ARGS__) -#define LCONSOLE_WARN(format, ...) CDEBUG_LIMIT(D_CONSOLE | D_WARNING,

Re: [PATCH] defines modified to match the 80-char rule

Joe Perches j...@perches.com writes: Nah, you're not an extremist, you're just preferring narrowly localized readability over global consistency. That's fine and all, until you come up to LCONSOLE_ERROR_MSG type use which blows the nice old formatting up. So what I suggested is just a

Re: [PATCH v2] ARM: cns3xxx: pci: avoid potential stack overflow

ns3xxx/pcie.c | 71 > + I'm ATM unable to test this change, but will do that at some point. Meanwhile, I guess there is nothing I can say against this patch. Thanks. Acked-by: Krzysztof Hałasa <khal...@piap.pl> -- Krzysztof Halasa Industrial Research Institute for

Re: H264 headers generation for driver

Andrey Utkin writes: [H.264 headers] > I guess that one acceptable way is to pre-generate all headers for all > needed cases and ship them inlined; for correctness checking purpose, > it is possible to ship also a script or additional source code file > which is

Re: [PATCH] ixp4xx_hss: Delete an unnecessary check before the function call "dma_pool_destroy"

SF Markus Elfring writes: > The dma_pool_destroy() function tests whether its argument is NULL > and then returns immediately. Thus the test around the call is not needed. > > This issue was detected by using the Coccinelle software. > ---

Re: [PATCH] ixp4xx_eth: Delete an unnecessary check before the function call "dma_pool_destroy"

SF Markus Elfring writes: > The dma_pool_destroy() function tests whether its argument is NULL > and then returns immediately. Thus the test around the call is not needed. > > This issue was detected by using the Coccinelle software. > ---

Re: [PATCH] ARM: ixp4xx: fix read{b,w,l} return types

Arnd Bergmann writes: > On ixp4xx, the readl() function returns an 'unsigned long' output > when indirect I/O is used. This is unlike any other platform, and > it causes lots of harmless compiler warnings, such as: > > drivers/ata/libahci.c: In function 'ahci_show_host_version': >

Re: [PATCH] Revert "ARM: cns3xxx: pci: avoid potential stack overflow"

Arnd Bergmann writes: > Before that, we were always setting both mrrs and mps. As we don't know > who uses PCIE_BUS_PEER2PEER, maybe another option would be to add yet > another pcie_bus_config value for this particular quirk? It would be a safe approach. Or, maybe another

Re: [PATCH] Revert "ARM: cns3xxx: pci: avoid potential stack overflow"

t to 128/ 512 (was 128), Max Read Rq 128 pci 0001:00:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128 Signed-off-by: Krzysztof Hałasa <khal...@piap.pl> Fixes: 498a92d42596 ("ARM: cns3xxx: pci: avoid potential stack overflow") diff --git a/drivers/pci/probe.c b/

Re: [PATCH] Revert "ARM: cns3xxx: pci: avoid potential stack overflow"

by: Bjorn Helgaas <bhelg...@google.com> > CC: Arnd Bergmann <a...@arndb.de> > CC: Krzysztof Hałasa <khal...@piap.pl> > --- > arch/arm/mach-cns3xxx/pcie.c | 71 > -- > 1 file changed, 41 insertions(+), 30 deletions(-) This

Re: [PATCH] Revert "ARM: cns3xxx: pci: avoid potential stack overflow"

Arnd Bergmann writes: > I'd start by copying the relevant nodes from > arch/arm/boot/dts/arm-realview-pb11mp.dts, which is the closest > I can think of. I've put together something completely untested > below. Thanks. I will try to handle that. 3+ weeks, unfortunately. Now, what

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: > The unclear part here is for IXP4xx, which supports both big-endian > and little-endian configurations. So far, the driver has done > no byteswap in either case. I suspect that is wrong and it would > actually need to swap in one or the other case, but I

Re: [PATCH 1/7] usb: gadget: pxa25x_udc: move register definitions from arch

Arnd Bergmann writes: > This addresses both issues by moving all the definitions into the > pxa25x_udc driver itself. It turns out the only difference between > them was 'UDCCS_IO_ROF', and that could well be a mistake when it > was incorrectly copied from pxa25x to ixp4xx. > >

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: > ixp4xx is really special in that it performs hardware swapping for > internal devices based on CPU endianess but not on PCI devices. Again, IXP4xx does not perform hardware (nor any other) swapping for registers of on-chip devices. The registers are

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: > Ok, so I guess what this means is that ixp4xx (or xscale in general) > implements its big-endian mode by adding a byteswap on its DRAM > and PCI interfaces in be32 mode, rather than by changing the behavior of > the load/store operations (as be8 mode does)

Re: [PATCH] ARM: drop unused Makefile.boot of Multiplatform SoCs

arch/arm/mach-cns3xxx/Makefile.boot| 3 --- Acked-by: Krzysztof Hałasa <khal...@piap.pl> -- Krzysztof Halasa Industrial Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland

Re: [PATCH 1/3] ARM: ixp4xx: use normal prototype for {read,write}s{b,w,l}

her definitions of the same functions pass void pointers, > so doing the same here avoids the warnings. > > Signed-off-by: Arnd Bergmann <a...@arndb.de> > --- > arch/arm/mach-ixp4xx/include/mach/io.h | 23 +-- > 1 file changed, 17 insertions(+), 6 deleti

Re: [PATCH 2/3] ARM: ixp4xx: avoid warning about ioport_map() macro argument processing

h/io.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Krzysztof Hałasa <khal...@piap.pl> -- Krzysztof Halasa Industrial Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland

Re: [PATCH 3/3] ARM: ixp4xx: move indirect I/O into common-pci.c

.de> > --- > arch/arm/mach-ixp4xx/common-pci.c | 98 > ++ > arch/arm/mach-ixp4xx/include/mach/io.h | 95 +++- > 2 files changed, 104 insertions(+), 89 deletions(-) Acked-by: Krzysztof Hałasa <khal...@piap.pl> -- Krzysztof Halasa Industrial Rese

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: >> Anyway, I think readl()/writel() do the right thing: in BE mode they >> swap PCI accesses and don't swap normal registers, in LE mode nothing is >> swapped. > > This seems to be true when CONFIG_IXP4XX_INDIRECT_PCI is set, but > not otherwise. For the

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: > I consider the use of __raw_* accessors a bug, I don't think we should > ever do that because it hides how the hardware actually works, it doesn't > work with spinlocks, and it can lead to the compiler splitting up accesses > into byte sized ones (not on

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: > The barriers on a spinlock synchronize between CPUs but not an external > bus, so (on some architectures) a spinlock protecting an MMIO register > does not guarantee that two CPUs doing > > spin_lock(); > __raw_writel(address); >

Re: [PATCH v2 01/15] arm: use of_platform_default_populate() to populate default bus

Kefeng Wang writes: > Use helper of_platform_default_populate() in linux/of_platform > when possible, instead of calling of_platform_populate() with > the default match table. > --- a/arch/arm/mach-cns3xxx/core.c > +++ b/arch/arm/mach-cns3xxx/core.c > @@ -395,8 +395,7

Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio

Arnd Bergmann writes: > Both writes leave the CPU core within the spinlock but are not serialized > with anything else, so there is no ordering between the CPUs when they > enter the shared bus, other than having address before data. You'd > expect to see address0, data0,

[PATCH] Fix NULL ptr dereference in pci_bus_assign_domain_nr() on ARM

without a parent. This patch fixes the NULL pointer dereference. Signed-off-by: Krzysztof Hałasa <khal...@piap.pl> Cc: sta...@vger.kernel.org diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 602eb42..f89db3a 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4772,8 +4772,10

[PATCH] CNS3xxx: remove unused *_VIRT definitions

diff --git a/arch/arm/mach-cns3xxx/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h index a0f5b60..a642ba5 100644 --- a/arch/arm/mach-cns3xxx/cns3xxx.h +++ b/arch/arm/mach-cns3xxx/cns3xxx.h @@ -162,13 +162,11 @@ #define CNS3XXX_L2C_BASE 0x9200 /* L2 Cache Control */

[PATCH] CNS3xxx: remove unused *_VIRT definitions

Signed-off-by: Krzysztof Hałasa <khal...@piap.pl> diff --git a/arch/arm/mach-cns3xxx/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h index a0f5b60..a642ba5 100644 --- a/arch/arm/mach-cns3xxx/cns3xxx.h +++ b/arch/arm/mach-cns3xxx/cns3xxx.h @@ -162,13 +162,11 @@ #define CNS3XXX_L2

[PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

f8..0x01f8 -> 0x MEM 0x0100..0x01ef -> 0x0100 imx6q-pcie 1ffc000.pcie: phy link never came up Signed-off-by: Krzysztof Hałasa <khal...@piap.pl> diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index fe60096..f17fb02 100644 --- a/drivers/pci

Re: [PATCH] Fix NULL ptr dereference in pci_bus_assign_domain_nr() on ARM

Hi Bjorn, Bjorn Helgaas <helg...@kernel.org> writes: > On Tue, Mar 01, 2016 at 07:07:18AM +0100, Krzysztof Hałasa wrote: >> Many ARM platforms use a wrapper: >> /* >> * Compatibility wrapper for older platforms that do not care about >> * passing the parent dev

Re: [PATCH] Fix NULL ptr dereference in pci_bus_assign_domain_nr() on ARM

Bjorn Helgaas writes: >> At least CNS3xxx doesn't boot. I haven't verified a couple of others, >> but they may be broken as well. > > Good, thanks. Also (I should have asked this before), please include a > "Fixes:" line so we know exactly when this broke and what stable

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Tim, > So perhaps there is something else going on with the tw8689 > device/driver that is causing it to not work with MSI. We have an > avc8000 miniPCIe with tw8689 here and can test if you send me your > patches that enable tw8689 with msi. I think you can use this:

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

> OTOH, we should fix it some day, making sure the DTS files are fixed > first: > > imx6qdl-apf6dev.dtsi: reset-gpio = < 2 GPIO_ACTIVE_HIGH>; > imx6qdl-aristainetos2.dtsi: reset-gpio = < 16 GPIO_ACTIVE_HIGH>; > imx6qdl-hummingboard.dtsi: reset-gpio = < 4 0>; (I think RMK already > handles

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Tim Harvey writes: > ok - I'll respond there as I agree with the patch but not the wording > of the commit (It's Gateworks 'Ventana' using IMX6 not Laguna and we > do define the polarity properly as active-low in Ventana dt's). Right, it's Ventana of course (I had been

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Tim Harvey writes: > It's not too easy to tell how many IMX6 boards incorrectly specify > their reset-gpio polarity. I don't know what the best way to determine > what boards use the IMX6 pcie host controller. Is there a dtc usage > that will display the compiled dtb's

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Fabio Estevam writes: > In order to keep old dtb's working we should simply ignore the GPIO > flags passed in the 'reset-gpio' property. > > That's why we need a revert. Just sent a v2, BTW. OTOH, we should fix it some day, making sure the DTS files are fixed first:

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Lucas Stach writes: >> TW6869: PCI :04:00.0, IRQ 336, MMIO 0x110 >> TW686x :04:00.0: enabling device (0140 -> 0142) >> > I don't see whee the device even tries to use MSI IRQs. Even if the > infrastructure is enabled it opts to use legacy INTA. It only tries

Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Lucas Stach writes: > Is this working with v4.4 and PCI_MSI enabled? I'm sure I've tested MSI > IRQs before enabling them in the defconfig and they have been working > for me for a long time before that. Tested with i210 on Gateworks > Ventana. MSI never worked for me on

Re: [PATCH 4/4] ARM: remove duplicate const qualifier

Eric Engestrom writes: > I can't confirm it (haven't tried), and don't care enough to do it :] > I guess I'm just dropping the patch then. Like I said, it can't hurt to > leave them in. Actually it may hurt (a little bit) - it makes the code less readable. --

Re: [PATCH REPOST] Extend PCIE_BUS_PEER2PEER to set MRSS=128 to fix CNS3xxx BM DMA.

Bjorn Helgaas writes: > It looks like 498a92d42596 merely fixed a warning, at the expense of > breaking DMA on Cavium. Reverting it would bring the warning back, but > that's better than broken DMA. Perhaps we should change PCIE_BUS_PEER2PEER to also write MRRS anyway. I

Re: Aw: BUG: Wrong dma queue handling in ixp4 driver

Hi Lino, "Lino Sanfilippo" writes: >> maybe I miss something, but the ixp4 ethernet driver seems to handle dma >> pools >> in a wrong way: In init_queues() it creates a dma pool for descriptors and >> then >> only allocates a single descriptor from this pool. The

Re: [PATCH] [media] tw686x-kh: Delete an unnecessary check before the function call "video_unregister_device"

SF Markus Elfring writes: > The video_unregister_device() function tests whether its argument is NULL > and then returns immediately. Thus the test around the call is not needed. > > This issue was detected by using the Coccinelle software. > > Signed-off-by:

Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)

Hans Verkuil writes: > That was probably the reason for the pci_read_config_word in the reg_write > code. Try putting that back (and just that). Yes. I guess a single pci_read_config_word() would suffice. Though it would obviously be much better to identify the place in the

Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)

Andrey Utkin writes: > It happens in solo_disp_init at uploading default motion thresholds > array. > > I've got a prints trace with solo6010-fix-lockup branch > https://github.com/bluecherrydvr/linux/tree/solo6010-fix-lockup/drivers/media/pci/solo6x10 > the trace

Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)

Andrey Utkin writes: >> Can you share some details about the machine you are experiencing the >> problems on? CPU, chipset? I'd try to see if I can recreate the problem. > > See solo.txt.gz attached. Thanks. I can see you have quite a set of video devices there. I

Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)

Andrey Utkin writes: > Lockup happens only on 6010. In provided log you can see that 6110 > passes just fine right before 6010. Also if 6010 PCI ID is removed from > solo6x10 driver's devices list, the freeze doesn't happen. Probably explains why I don't see lockups

Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)

Andrey Utkin <andrey_ut...@fastmail.com> writes: > On Thu, Sep 22, 2016 at 10:51:37AM +0200, Krzysztof Hałasa wrote: >> I wonder if the following fixes the problem (completely untested). > > I have given this a run, and it still hangs. Does (only) adding the

Re: solo6010 modprobe lockup since e1ceb25a (v4.3 regression)

Andrey Utkin writes: >> Does (only) adding the >> >> pci_read_config_word(solo_dev->pdev, PCI_STATUS, ); >> >> in solo_reg_write() help? > > Yes. > I have posted a patch with this change few days ago, I thought you have > noticed it. Well, I think you haven't

Re: [PATCH v2] media: solo6x10: fix lockup by avoiding delayed register write

Andrey Utkin writes: > --- a/drivers/media/pci/solo6x10/solo6x10.h > +++ b/drivers/media/pci/solo6x10/solo6x10.h > @@ -284,7 +284,10 @@ static inline u32 solo_reg_read(struct solo_dev > *solo_dev, int reg) > static inline void solo_reg_write(struct solo_dev

Re: [PATCH net-next 3/6] net: use core MTU range checking in WAN drivers

Jarod Wilson writes: > - set min/max_mtu in all hdlc drivers, remove hdlc_change_mtu > - sent max_mtu in lec driver, remove lec_change_mtu > drivers/net/wan/c101.c| 1 - > drivers/net/wan/hdlc.c| 11 ++- > drivers/net/wan/hdlc_fr.c |

[PATCH 4.9.0-rc5] AR9300 calibration problems with antenna selected

Hi, I recently tried to select a single antenna on AR9300 and it works for 30 seconds only. The subsequent calibration makes the RX signal level to drop from the usual -30/-40 dBm to -70/-80 dBm, and the transmission practically stops. With the attached patch it works, though selecting the

[i.MX6 DRM IPUv3] Regression 4.9-rc5: greenish screen with YUV420 video

Hi, The following GStreamer pipeline causes screen to become green with v4.9-rc4+: gst-launch-1.0 udpsrc uri=udp://239.1.2.2:5100 reuse=true caps="application/x-rtp,media=(string)video,clock-rate=(int)9,encoding-name=(string)H264" ! rtph264depay ! h264parse ! v4l2video1dec

Re: [PATCH 01/15] net: phy: Add phy_ethtool_nway_reset

Hi, Florian Fainelli writes: > This function just calls into genphy_restart_aneg() to perform an > autonegotation restart. > > +int phy_ethtool_nway_reset(struct net_device *ndev) > +{ > + struct phy_device *phydev = ndev->phydev; > + > + if (!phydev) > +

Re: [PATCH 4.9.0-rc5] AR9300 calibration problems with antenna selected

miaoq...@codeaurora.org writes: >> rmmod ath9k >> modprobe ath9k >> iw dev wlan0 set type ibss >> iw phy phyX set antenna 2 > > 2 is a bad mask. We use bitmap, the valid masks are 1, 3, 7. Thanks for your response. I have two antenna connections (and a single antenna). Is it possible to select

Super Top USB SD card reader resets and corruption - XHCI

Hi, I came across a problem with an USB SD card reader apparently causing USB resets and corrupting data on the card. The reader in question is a very cheap: 14cd:1212 Super Top microSD card reader (SY-T18) The card is an old SDHC, 32 GB, Sandisk brand. The problems don't seem to exist now if

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