architectures
will report failure when compilation.
Signed-off-by: Leo Yan
---
.../examples/bpf/augmented_raw_syscalls.c | 82 +++
1 file changed, 82 insertions(+)
diff --git a/tools/perf/examples/bpf/augmented_raw_syscalls.c
b/tools/perf/examples/bpf/augmented_raw_syscalls.c
index
ccessfully.
This patch changes error handling in trace__config(), when it detects
failure it will return -1 rather than directly pass error value (1);
finally, perf_config() will directly bail out and perf will exit for
this case.
Signed-off-by: Leo Yan
---
tools/perf/builtin-trace.c | 8
building failure.
0002 patch is minor refactoring code to remove duplicate macro.
0003 patch is to add support arm64 raw syscalls numbers.
0004 patch is to document clang configuration so that can easily use
this program on both x86_64 and aarch64 platforms.
Leo Yan (4):
perf trace: Exit when build
The macro SYS_EXECVE has been defined twice, remove the duplicate one.
Signed-off-by: Leo Yan
---
tools/perf/examples/bpf/augmented_raw_syscalls.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/perf/examples/bpf/augmented_raw_syscalls.c
b/tools/perf/examples/bpf
On Fri, May 31, 2019 at 11:19:44AM +0200, Jiri Olsa wrote:
> On Thu, May 30, 2019 at 10:05:10PM +0800, Leo Yan wrote:
> > Hi Arnaldo,
> >
> > On Thu, May 30, 2019 at 10:36:45AM -0300, Arnaldo Carvalho de Melo wrote:
> >
> > [...]
> >
> > > One oth
Hi Arnaldo,
On Thu, May 30, 2019 at 10:36:45AM -0300, Arnaldo Carvalho de Melo wrote:
[...]
> One other way of testing this:
>
> I used perf trace's use of BPF, using:
>
> [root@quaco ~]# cat ~/.perfconfig
> [llvm]
> dump-obj = true
> clang-opt = -g
> [trace]
> add_events =
Captured and wrote 1.352 MB perf.data ]
I have tested this patch set on Juno and DB410c boards, FWIW:
Tested-by: Leo Yan
> Regards,
> Mathieu
>
> Changes for V2:
> * Fixed error condition in function cs_etm_set_option() (Leo)
> * Fixed changelog spelling error (Leo).
> * Mo
show_prefix = yes
>
> For arm64 this needs fixing, tools/perf/examples/bpf/augmented_raw_syscalls.c
> (its in the kernel sources) is still hard coded for x86_64 syscall numbers :-\
Thanks a lot for sharing this, I will test with this method and let you
and Jiri know the result in tomorrow.
[...]
Thanks,
Leo Yan
On Thu, May 30, 2019 at 09:43:02AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Thu, May 30, 2019 at 05:38:01PM +0800, Leo Yan escreveu:
> > Variable 'err' is defined but never used in function symsrc__init(),
> > remove it and directly return -1 at the end of the funct
Hi Jiri,
On Thu, May 30, 2019 at 02:07:10PM +0200, Jiri Olsa wrote:
> On Thu, May 30, 2019 at 06:54:39PM +0800, Leo Yan wrote:
> > Hi Jiri,
> >
> > On Wed, May 08, 2019 at 03:19:58PM +0200, Jiri Olsa wrote:
> > > hi,
> > > this patchset adds dso suppor
have more direction for the tesing:
What's the bpf program you are suing for the testing? e.g. some
testing program under the kernel's folder $kernel/samples/bpf?
Or you uses perf command to launch bpf program?
[...]
Thanks
Leo Yan
Variable 'err' is defined but never used in function symsrc__init(),
remove it and directly return -1 at the end of the function.
Signed-off-by: Leo Yan
---
tools/perf/util/symbol-elf.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tools/perf/util/symbol-elf
On Wed, May 08, 2019 at 10:18:51AM +0800, Leo Yan wrote:
> Since the DT bindings consolidatoins for CoreSight replicator and funnel
> is ready for kernel v5.2 merge window [1], this patch set is to update
> the related CoreSight DT bindings for platforms; IIUC, this patch set
> will
On Tue, May 28, 2019 at 08:51:26AM -0600, Mathieu Poirier wrote:
> Good day,
>
> On Tue, May 28, 2019 at 01:19:24PM +0800, Leo Yan wrote:
> > Hi Suzuki,
> >
> > On Wed, May 22, 2019 at 11:34:33AM +0100, Suzuki K Poulose wrote:
> > > This series adds the s
Hi Suzuki, Mathieu,
On Tue, May 28, 2019 at 01:19:24PM +0800, Leo Yan wrote:
[...]
> After I applied this patch set, I found all device names under
> '/sys/bus/event_source/devices/cs_etm/sinks/' have been changed as
> below on my DB410c board:
> # ls /sys/bus/event_sourc
Hi Suzuki,
On Wed, May 22, 2019 at 11:34:33AM +0100, Suzuki K Poulose wrote:
> This series adds the support for CoreSight devices on ACPI based
> platforms. The device connections are encoded as _DSD graph property[0],
> with CoreSight specific extensions to indicate the direction of data
> flow a
gement enabling steps in the testing script, we can add the
related operations if later we have clear idea for this.
Thanks,
Leo Yan
sting related works.
Thanks,
Leo Yan
[1] https://lkml.org/lkml/2019/4/15/658
Hi Linus,
On Thu, May 16, 2019 at 02:53:48PM +0200, Linus Walleij wrote:
> On Wed, May 8, 2019 at 4:20 AM Leo Yan wrote:
>
> > CoreSight DT bindings have been updated, thus the old compatible strings
> > are obsolete and the drivers will report warning if DTS uses these
&g
On Sat, Apr 20, 2019 at 10:00:35PM +0800, Wanglai Shi wrote:
> This patch adds DT bindings for the CoreSight trace components
> on hi3660, which is used by 96boards Hikey960.
>
> Signed-off-by: Wanglai Shi
Hi Wei,
Mathieu and me both have reviewed this patch, could you pick up this
patch? Than
On Wed, May 08, 2019 at 03:29:12PM +0100, Suzuki K Poulose wrote:
>
> On 08/05/2019 03:18, Leo Yan wrote:
> > Since the DT bindings consolidatoins for CoreSight replicator and funnel
> > is ready for kernel v5.2 merge window [1], this patch set is to update
> > the relat
: Orson Zhai
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
Acked-by: Chunyan Zhang
---
arch/arm64/boot/dts/sprd/sc9860.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi
b/arch/arm64/boot/dts/sprd/sc9860.dtsi
: Orson Zhai
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
Acked-by: Chunyan Zhang
---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi
b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index
.
Cc: Wei Xu
Cc: Guodong Xu
Cc: Zhangfei Gao
Cc: Haojian Zhuang
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220
: David Brown
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 423dda996b5d
: Sudeep Holla
Cc: Lorenzo Pieralisi
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm64/boot/dts/arm/juno-base.dtsi| 6 +++---
arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/arm
: David Brown
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 45b5c8ef0374..272ebea20a5f
.
Cc: Linus Walleij
Cc: Lee Jones
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm/boot/dts/ste-dbx5x0.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi
b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index
.
Cc: Liviu Dudau
Cc: Sudeep Holla
Cc: Lorenzo Pieralisi
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
b/arch/arm
.
Cc: Andy Gross
Cc: David Brown
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index
.
Cc: Wei Xu
Cc: Guodong Xu
Cc: Zhangfei Gao
Cc: Haojian Zhuang
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm/boot/dts/hip04.dtsi | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot
.
Cc: Shawn Guo
Cc: Chris Healy
Cc: Andrew Lunn
Cc: Fabio Estevam
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Signed-off-by: Leo Yan
---
arch/arm/boot/dts/imx7s.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts
u Poirier
Cc: Suzuki K Poulose
Cc: Liviu Dudau
Cc: Sudeep Holla
Cc: Lorenzo Pieralisi
Cc: Wei Xu
Cc: Guodong Xu
Cc: Zhangfei Gao
Cc: Haojian Zhuang
Cc: Shawn Guo
Cc: Chris Healy
Cc: Andrew Lunn
Cc: Fabio Estevam
Cc: Sascha Hauer
Cc: Andy Gross
Cc: David Brown
Cc: Linus Walleij
Cc: Le
reminding.
Thanks,
Leo Yan
Commit-ID: 35bb59c10a6d0578806dd500477dae9cb4be344e
Gitweb: https://git.kernel.org/tip/35bb59c10a6d0578806dd500477dae9cb4be344e
Author: Leo Yan
AuthorDate: Sun, 28 Apr 2019 16:32:27 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 2 May 2019 16:00:20 -0400
perf cs-etm
Commit-ID: cf0c37b6dbf74fb71bea07b516612d29e00dcbc4
Gitweb: https://git.kernel.org/tip/cf0c37b6dbf74fb71bea07b516612d29e00dcbc4
Author: Leo Yan
AuthorDate: Sun, 28 Apr 2019 16:32:28 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 2 May 2019 16:00:20 -0400
perf cs-etm: Don
Commit-ID: 5f05182fab9a29fea6c4ab8113be45adf0c11bf0
Gitweb: https://git.kernel.org/tip/5f05182fab9a29fea6c4ab8113be45adf0c11bf0
Author: Leo Yan
AuthorDate: Wed, 24 Apr 2019 09:38:02 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 2 May 2019 16:00:19 -0400
tools lib
Since cs_etm_queue::prev_packet is allocated for all cases, it will
never be NULL pointer; now validity checking prev_packet is pointless,
remove all of them.
Signed-off-by: Leo Yan
---
tools/perf/util/cs-etm.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/tools/perf
atch
always allocates memory for cs_etm_queue::prev_packet.
Reported-by: Robert Walker
Suggested-by: Robert Walker
Fixes: 7100b12cf474 ("perf cs-etm: Generate branch sample for exception packet")
Fixes: 24fff5eb2b93 ("perf cs-etm: Avoid stale branch samples when flush
packet")
Signed-of
On Fri, Apr 26, 2019 at 10:26:24AM -0600, Mathieu Poirier wrote:
[...]
> > Leo Yan (4):
> > dt-bindings: arm: coresight: Add new compatible for static replicator
> > coresight: replicator: Add new device id for static replicator
> > dt-bindings: arm: coresight:
On Wed, Apr 24, 2019 at 09:44:27AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Apr 24, 2019 at 08:08:29AM -0400, Steven Rostedt escreveu:
> > On Wed, 24 Apr 2019 09:38:02 +0800
> > Leo Yan wrote:
> >
> > > The traceevnt lib is used by perf tool, wh
avoid
confusion and let users to be more easily to connect the error with
traceevent lib.
Signed-off-by: Leo Yan
---
tools/lib/traceevent/parse-utils.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/lib/traceevent/parse-utils.c
b/tools/lib/traceevent/parse-utils.c
index
On Sat, Apr 20, 2019 at 10:00:35PM +0800, Wanglai Shi wrote:
> This patch adds DT bindings for the CoreSight trace components
> on hi3660, which is used by 96boards Hikey960.
>
> Signed-off-by: Wanglai Shi
Reviewed this patch and tested on my Hikey960 board, FWIW:
Reviewed-and-te
On Fri, Apr 19, 2019 at 03:20:42PM -0700, Stephen Boyd wrote:
> Quoting Leo Yan (2019-03-20 03:05:08)
> > clk_gate_ufs_subsys is a system bus clock, turning off it will
> > introduce lockup issue during system suspend flow. Let's mark
> > clk_gate_ufs_subsys as critic
On Thu, Apr 18, 2019 at 02:52:44PM -0700, Stephen Boyd wrote:
> Quoting Leo Yan (2019-04-17 22:33:39)
> > Hi Michael, Stephen,
> >
> > On Wed, Mar 20, 2019 at 06:05:08PM +0800, Leo Yan wrote:
> > > clk_gate_ufs_subsys is a system bus clock, turning off it will
>
Hi Michael, Stephen,
On Wed, Mar 20, 2019 at 06:05:08PM +0800, Leo Yan wrote:
> clk_gate_ufs_subsys is a system bus clock, turning off it will
> introduce lockup issue during system suspend flow. Let's mark
> clk_gate_ufs_subsys as critical clock, thus keeps it on during
> s
lash (which
> is the "canonical" way of doing things), we either need these drivers
> to be built-in, or we need to fiddle with an initramfs to access that
> flash and eventually load the modules installed over there.
>
> The former is the easiest, do that.
>
> Sig
On Tue, Apr 16, 2019 at 02:18:40PM -0600, Mathieu Poirier wrote:
> Hi Leo,
>
> On Fri, 12 Apr 2019 at 04:28, Leo Yan wrote:
> >
> > CoreSight uses below bindings for replicator:
> >
> > Dynamic replicator, aka. configurable replicator:
> > "arm,c
On Fri, Apr 12, 2019 at 11:40:13AM +0100, Suzuki K Poulose wrote:
> On 04/12/2019 11:27 AM, Leo Yan wrote:
> > CoreSight uses below bindings for replicator:
> >
> >Dynamic replicator, aka. configurable replicator:
> > "arm,coresight-dyn
skips
registers accessing when detect the register base is NULL.
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Cc: Wanglai Shi
Suggested-by: Suzuki K Poulose
Signed-off-by: Leo Yan
Reviewed-by: Suzuki K Poulose
---
.../hwtracing/coresight/coresight-funnel.c| 116 ++
1 file chang
This patch adds a device id for the new static replicator compatible
string; it changes the driver name from "coresight-replicator" to
"coresight-static-replicator" as well.
This patch also gives warning when use the replicator obsolete DT
binding.
Signed-off-by: Leo Yan
--
arm,primecell"; (obsolete)
At the end of this patch, it gives an example for static funnel DT
binding, and updates the dynamic funnel example.
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Cc: Wanglai Shi
Signed-off-by: Leo Yan
---
.../devicetree/bindings/arm/coresight.txt | 53 +
"arm,coresight-static-replicator";
"arm,coresight-replicator"; (obsolete)
Signed-off-by: Leo Yan
---
Documentation/devicetree/bindings/arm/coresight.txt | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/ar
ng uses
the obsolete compatible string (Suzuki).
== Changes for v4 ==
* Consolidate the DT binding compatible strings for replicator and
funnel (Mathieu).
* Changed replicator driver to support new compatible string.
Leo Yan (4):
dt-bindings: arm: coresight: Add new compatible for static repli
On Mon, Apr 08, 2019 at 11:51:16AM +0100, Suzuki K Poulose wrote:
> On 04/06/2019 12:21 PM, Leo Yan wrote:
> > Following the same fashion with replicator DT binding, this patch is to
> > unify the DT binding for funnel to support static and dynamic modes;
> > finally we get
Hi Suzuki,
On Mon, Apr 08, 2019 at 11:44:56AM +0100, Suzuki K Poulose wrote:
> On 04/06/2019 12:21 PM, Leo Yan wrote:
> > CoreSight uses below bindings for replicator:
> >
> >Static replicator, aka. non-configurable replicator:
> > "arm,coresight-
Hi Rob, Suzuki,
On Sat, Apr 06, 2019 at 07:21:44PM +0800, Leo Yan wrote:
> Following the same fashion with replicator DT binding, this patch is to
> unify the DT binding for funnel to support static and dynamic modes;
> finally we get the funnel DT binding as below:
>
&g
skips
registers accessing when detect the register base is NULL.
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Cc: Wanglai Shi
Suggested-by: Suzuki K Poulose
Signed-off-by: Leo Yan
Reviewed-by: Suzuki K Poulose
---
.../hwtracing/coresight/coresight-funnel.c| 112 +-
1 file chang
ot;, "arm,primecell";
At the end of this patch, it gives an example for static funnel DT
binding, and updates the dynamic funnel example.
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Cc: Wanglai Shi
Signed-off-by: Leo Yan
---
.../devicetree/bindings/arm/coresight.txt | 52 +
rg/kernel/coresight.git/log/?h=next
== Changes for v4 ==
* Consolidate the DT binding compatible strings for replicator and
funnel (Mathieu).
* Changed replicator driver to support new compatible string.
Leo Yan (4):
dt-bindings: arm: coresight: Add new compatible for static replicator
coresight
This patch adds a device id for the new static replicator compatible
string; it changes the driver name from "coresight-replicator" to
"coresight-static-replicator" as well.
Signed-off-by: Leo Yan
---
drivers/hwtracing/coresight/coresight-replicator.c | 3 ++-
1 file changed
atic-replicator";
Dynamic replicator:
"arm,coresight-dynamic-replicator", "arm,primecell";
Signed-off-by: Leo Yan
---
Documentation/devicetree/bindings/arm/coresight.txt | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/d
On Thu, Mar 28, 2019 at 07:24:35PM +, Suzuki K Poulose wrote:
> On 03/28/2019 02:35 AM, Leo Yan wrote:
> > Document DT binding for static (non-configurable) funnel and give an
> > example for it.
> >
> > Cc: Mathieu Poirier
> > Cc: Suzuki K Poulose
>
Document DT binding for static (non-configurable) funnel and give an
example for it.
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Cc: Wanglai Shi
Signed-off-by: Leo Yan
---
.../devicetree/bindings/arm/coresight.txt | 45 +--
1 file changed, 42 insertions(+), 3 deletions
skips
registers accessing when detect the register base is NULL.
Cc: Mathieu Poirier
Cc: Suzuki K Poulose
Cc: Wanglai Shi
Suggested-by: Suzuki K Poulose
Signed-off-by: Leo Yan
---
.../hwtracing/coresight/coresight-funnel.c| 112 +-
1 file changed, 85 insertions(+), 27 delet
ynamic
replicator drivers") and tested on Hikey960 with perf commands:
# perf record -e cs_etm/@2001.etf/ --per-thread ./main
# perf report --tui
P.s. in this version, Hikey960 CoreSight DT binding has not been
included and will be sent out separately.
[1] https://git.linaro.org/kernel/c
x.patch: use git to send patch so avoid any
unexpected characters in the mail
P.s. Marc has a good presentation [1] for upstreaming patches, you
could check page 16 for how to use the git tool.
[1]
https://elinux.org/images/2/26/Getting-Your-Patches-in-Mainline-Linux-What-Not-To-Do-and-a-Few-Things-You-Could-Try-Instead-Marc-Zyngier-ARM.pdf
Thanks,
Leo Yan
Hi Suzuki,
On Wed, Mar 20, 2019 at 01:52:58PM +, Suzuki K Poulose wrote:
>
>
> On 20/03/2019 12:38, Wanglai Shi wrote:
> > From: Leo Yan
> >
> > Since CoreSight hardware topology can use a 'hidden' funnel in the
> > trace data path, this kind
Hi Robin,
On Wed, Mar 20, 2019 at 11:24:18AM +, Robin Murphy wrote:
> Hi Leo,
>
> On 20/03/2019 08:31, Leo Yan wrote:
> > Though PCIe controller has been enabled on Juno r1/r2, but it misses to
> > enable its connected SMMU. From the testing, even without set this SMM
")
Cc: sta...@vger.kernel.org
Cc: Zhong Kaihua
Cc: John Stultz
Cc: Zhangfei Gao
Suggested-by: Dong Zhang
Signed-off-by: Leo Yan
---
drivers/clk/hisilicon/clk-hi3660.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/clk-hi3660.c
b/drivers/cl
../../../devices/platform/7ffb.ohci
│ │ └── 7ffc.ehci -> ../../../../devices/platform/7ffc.ehci
│ ├── reserved_regions
│ └── type
└── 2
├── devices
│ └── 2007.etr -> ../../../../devices/platform/2007.etr
├── reserved_regions
└── type
19 directori
On Tue, Mar 19, 2019 at 12:42:43PM -0700, Stephen Boyd wrote:
> Quoting Leo Yan (2019-03-19 02:31:48)
> > diff --git a/drivers/clk/hisilicon/clk-hi3660.c
> > b/drivers/clk/hisilicon/clk-hi3660.c
> > index f40419959656..32ba80181cc6 100644
> > --- a/drivers/clk/hisil
Hi all,
On Tue, Mar 19, 2019 at 03:52:06PM +0800, Leo Yan wrote:
> clk_gate_ufs_subsys is a system bus clock, turning off it will
> introduce lockup issue during system suspend flow. Let's mark
> clk_gate_ufs_subsys as critical clock, thus keeps it on during
> system suspend a
")
Cc: sta...@vger.kernel.org
Cc: Zhong Kaihua
Cc: John Stultz
Cc: Zhangfei Gao
Suggested-by: Dong Zhang
Signed-off-by: Leo Yan
---
drivers/clk/hisilicon/clk-hi3660.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/clk-hi3660.c
b/drivers/clk/hisil
")
Cc: sta...@vger.kernel.org
Cc: Zhong Kaihua
Cc: John Stultz
Cc: Zhangfei Gao
Suggested-by: Dong Zhang
Signed-off-by: Leo Yan
---
drivers/clk/hisilicon/clk-hi3660.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/clk-hi3660.c
b/drivers/clk/hisil
keep all things funnel at the same place and reduce the amount of
> > kernel configuration options.
>
> I back that. I have already merged the static and programmable replicators
> into one and this should be out here soon. So, I back the single driver
> approach for funnels.
That's great! Thanks for advices, Mathieu & Suzuki.
Will sync with you offline for proceeding.
Thanks,
Leo Yan
<&top_etf_in>;
};
};
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
top_funnel_in: endpoint {
remote-endpoint =
<&combo_funnel_out>;
};
};
};
};
--->8---
[...]
Thanks,
Leo Yan
+ port@1 {
> + reg = <1>;
> + replicator0_out1: endpoint {
> + remote-endpoint = <&tpiu_in>;
> + };
> + };
> + };
> + };
> +
> + etr@ec033000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0 0xec033000 0 0x1000>;
> + clocks = <&crg_ctrl HI3660_PCLK>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + etr_in: endpoint {
> + remote-endpoint =
> + <&replicator0_out0>;
> + };
> + };
> + };
> + };
> +
> + tpiu@ec032000 {
> + compatible = "arm,coresight-tpiu", "arm,primecell";
> + reg = <0 0xec032000 0 0x1000>;
> + clocks = <&crg_ctrl HI3660_PCLK>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + tpiu_in: endpoint {
> + remote-endpoint =
> + <&replicator0_out1>;
> + };
> + };
> + };
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index a4a3d08..8f2fede 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -1246,3 +1246,5 @@
> };
> };
> };
> +
> +#include "hi3660-coresight.dtsi"
Except the up mentioned issue, this patch looks good to me.
After applying this patch though I can see Coresight devices
under /sys/bus/coresight, but I cannot capture ETM trace data by
using below two commands:
perf record -e cs_etm/@ec036000.etf/ --per-thread ./main
perf record -e cs_etm/@ec033000.etr/ --per-thread ./main
I checked perf report command with '-D' option, I can see the
perf.data file doesn't contain any trace data from ETM. could you
tell me which test command you are using? At my side I will debug a
bit on my Hikey960 board and will keep you posted if find anything.
Thanks,
Leo Yan
ty setting in the background.
>
> > Sorry if I am asking a stupid question :)
>
> It's not stupid. You're simply confusing multiple independent layers.
Thanks a lot for explaination, Marc.
Thanks,
Leo Yan
ing to understand how you can set
the interrupt affinity for virtio device.
Do you set the physical interrupt affinity to CPU0/1 in host OS and
forward it to guest OS? Or set interrupt affinity in guest OS (I
tried on Juno board to set irq affinity in guest OS from
'/proc/irq/xxx/smp_affinity' but failed)? Or this is accomplished by
user space tool (lkvm or qemu)?
Sorry if I am asking a stupid question :)
Thanks,
Leo Yan
Hi Marc,
On Fri, Feb 22, 2019 at 08:37:56AM +, Marc Zyngier wrote:
> On Fri, 22 Feb 2019 16:23:24 +0800
> Leo Yan wrote:
>
> > The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> > be used to inject interrupt for SPIs; this patch improves com
The function kvm_vgic_inject_irq() is not only used by PPIs but also can
be used to inject interrupt for SPIs; this patch improves comment for
argument @cpuid to reflect support SPIs as well.
Signed-off-by: Leo Yan
---
virt/kvm/arm/vgic/vgic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
er or main developers
could note these points and fix them in appropriate time.
Leo Yan (4):
KVM: arm64: Use macro to replace hard number
KVM: arm/arm64: vgic: Improve comment on kvm_vgic_inject_irq
KVM: arm/arm64: Define TCR_EL2_T0SZ_MASK as TCR_T0SZ_MASK
KVM: arm/arm64: Fix comme
Define macro TCR_EL2_T0SZ_MASK as TCR_T0SZ_MASK, so can remove the hard
number 0x3f.
Signed-off-by: Leo Yan
---
arch/arm64/include/asm/kvm_arm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index
in the function.
Signed-off-by: Leo Yan
---
virt/kvm/arm/mmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
index 5eca48bdb1a6..9634f47c2c8b 100644
--- a/virt/kvm/arm/mmu.c
+++ b/virt/kvm/arm/mmu.c
@@ -734,7 +734,7 @@ sta
Use macro for ID_AA64MMFR1_EL1.VH bits shift instead of 8 directly.
Signed-off-by: Leo Yan
---
arch/arm64/kernel/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4471f570a295..3ac377e9fd28 100644
--- a/arch
This patch contains two minor cleanups: firstly it puts exported symbol
for kvm_io_bus_write() by following the function definition; secondly it
removes a redundant blank line.
Signed-off-by: Leo Yan
---
virt/kvm/kvm_main.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a
ing for this
issue; applied this fixing on my local code and it fixes CoreSight
tracing issue.
Thanks,
Leo Yan
[1] https://lkml.org/lkml/2019/2/12/452
Commit-ID: 96dce7f4f38793b80b1ddfa48d5dbc1aba40df84
Gitweb: https://git.kernel.org/tip/96dce7f4f38793b80b1ddfa48d5dbc1aba40df84
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:41 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Set
Commit-ID: 173e65f6bc354dc07c6be399727a8a48335bccf2
Gitweb: https://git.kernel.org/tip/173e65f6bc354dc07c6be399727a8a48335bccf2
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:42 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Set
Commit-ID: 03919e526b29be8d0c77142e008b397a2c089398
Gitweb: https://git.kernel.org/tip/03919e526b29be8d0c77142e008b397a2c089398
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:40 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Add
Commit-ID: 95c6fe970a0160cb770c5dce9f80311b42d030c0
Gitweb: https://git.kernel.org/tip/95c6fe970a0160cb770c5dce9f80311b42d030c0
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:39 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm
Commit-ID: 465eaaa89e2b7e450d53f4d3a6845f0c595a5f59
Gitweb: https://git.kernel.org/tip/465eaaa89e2b7e450d53f4d3a6845f0c595a5f59
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:37 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Set
Commit-ID: 47106e7413f9fc10780d1ec7df3eaa725df6ebe8
Gitweb: https://git.kernel.org/tip/47106e7413f9fc10780d1ec7df3eaa725df6ebe8
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:38 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Add
Commit-ID: 06220bf472f2bd8f67bb776df73090945ee786ab
Gitweb: https://git.kernel.org/tip/06220bf472f2bd8f67bb776df73090945ee786ab
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:36 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Set
Commit-ID: ca45d843a599b0812a655ba58d42dddacd538e31
Gitweb: https://git.kernel.org/tip/ca45d843a599b0812a655ba58d42dddacd538e31
Author: Leo Yan
AuthorDate: Tue, 29 Jan 2019 20:28:35 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf cs-etm: Add
On Tue, Jan 29, 2019 at 09:25:28PM +0800, Leo Yan wrote:
> On Tue, Jan 29, 2019 at 12:44:03AM +0530, Sai Prakash Ranjan wrote:
> > Add UCI table and a helper macro for coresight CPU debug
> > module. This patch adds the UCI entries for Krypo CPUs
> > found on MSM8996 which sh
with error -22
> [5.513192] coresight-cpu-debug 3b1.debug: Coresight debug-CPU3
> initialized
>
> Also add a helper macro to make adding CPU PIDs easier
> similar to ETM4X driver.
>
> Signed-off-by: Sai Prakash Ranjan
Looks good to me and tested on my Hikey board
to print string for instruction types.
This patch is to set branch instruction flags for instruction range
packet.
Signed-off-by: Leo Yan
Reviewed-by: Mathieu Poirier
---
.../perf/util/cs-etm-decoder/cs-etm-decoder.c | 2 +
.../perf/util/cs-etm-decoder/cs-etm-decoder.h | 1 +
tools/perf/util
lated information and cannot generate sample
flags for branch instructions.
This patch add corresponding three new fields in cs_etm_packet struct
and save related value into the packet structure, it is preparation for
supporting sample flags.
Signed-off-by: Leo Yan
Reviewed-by: Mathieu Po
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