[RFC v2] percpu: Add a separate function to merge free areas

Hello, It seems that free_percpu performance is very bad when working with small objects. The easiest way to reproduce this is to allocate and then free a large number of percpu int counters in order. Small objects (reference counters and pointers) are common users of alloc_percpu and I think

Re: [RFC v2] percpu: Add a separate function to merge free areas

On 12/04/2014 07:57 PM, Tejun Heo wrote: Hello, On Wed, Dec 03, 2014 at 12:33:59AM +0200, Leonard Crestez wrote: It seems that free_percpu performance is very bad when working with small objects. The easiest way to reproduce this is to allocate and then free a large number of percpu int

Re: [PATCH 2/2] ti-adc081c: Initial triggered buffer support

On 04/01/2016 11:34 AM, Peter Meerwald-Stadler wrote: -static const struct iio_chan_spec adc081c_channel = { - .type = IIO_VOLTAGE, - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), -}; the patch would look cleaner/shorter

[PATCH] clk: core: Copy connection id

Some drivers use sprintf to build clk connection id names but the clk core will save those strings and occasionally print them back. Duplicate the con_id strings instead of fixing all the users. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/clk/clk.c | 3 ++-

[PATCH] cpufreq: imx6q: use devm to fetch resources

ice the of_node from cpu_dev. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/cpufreq/imx6q-cpufreq.c | 75 + 1 file changed, 24 insertions(+), 51 deletions(-) Something similar was rejected in the past: https://patchwork.kernel.

Re: [PATCH] clk: core: Copy connection id

On Fri, 2017-02-24 at 12:44 -0800, Stephen Boyd wrote: > On 02/20, Leonard Crestez wrote: > > Some drivers use sprintf to build clk connection id names but the > > clk > > core will save those strings and occasionally print them back. > > Duplicate > > the con

[PATCH] regulator: Fix regulator_summary for deviceless consumers

18) [<801fcd08>] (vfs_read) from [<801fdb00>] (SyS_read+0x3c/0x90) [<801fdb00>] (SyS_read) from [<80107580>] (ret_fast_syscall+0x0/0x34) Code: e59f80c4 e1a0100b e59d2018 e1a4 (e59ce15c) ---[ end trace eca2c2e6d835da26 ]--- Signed-off-by: Leonard Crestez <leonard.cres

Re: [PATCH] of: alloc anywhere from memblock if range not specified

Hello, I have some trouble with this patch. It seems the intention is to allow CMA to be placed in highmem. If the CMA area is larger than highmem and no alloc-ranges is specified (just a size) it is possible to end up allocating a area that spans from multiple zones. This later breaks

[PATCH] ARM: imx_v6_v7_defconfig: Select SMSC_PHY

t includes a few additional minor cleanups. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- I also tried to do some debugging in the fec driver and it apparently receives corrupted packets when this happens. If I hack it to go into promiscuous mode unconditionally it gets a whole bu

[RFC 5/8] regulator: anatop: fix min dropout for bypass mode

pplies. Only set minimum dropout value for ldo enabled mode. Signed-off-by: Irina Tirdea <irina.tir...@nxp.com> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/regulator/anatop-regulator.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a

Re: [PATCH] ARM: imx_v6_v7_defconfig: Select SMSC_PHY

On Fri, 2017-03-24 at 14:43 +0800, Dong Aisheng wrote: > Hi Leonard, > > On Wed, Mar 22, 2017 at 04:27:37PM +0200, Leonard Crestez wrote: > > > > The imx6sl-evk board has a LAN8720A ethernet phy supported by SMSC_PHY. > > Add this driver to the default imx config

Re: [RFC 5/8] regulator: anatop: fix min dropout for bypass mode

On Fri, 2017-03-24 at 12:54 +, Mark Brown wrote: > On Wed, Mar 22, 2017 at 06:53:07PM +0200, Leonard Crestez wrote: > > + if (anatop_reg->bypass) > > + anatop_reg->rdesc.min_dropout_uV = 0; > > + else > > + anatop_reg->rdesc

Re: [RFC 4/8] regulator: core: Check enabling bypass respects constraints

On Fri, 2017-03-24 at 12:52 +, Mark Brown wrote: > On Wed, Mar 22, 2017 at 06:53:06PM +0200, Leonard Crestez wrote: > > > > > Enabling bypass mode makes a regulator passthrough the supply voltage > > directly. It is possible that the supply voltage is set high eno

Re: [RFC 6/8] regulator: core: Add regulator_is_bypass function

On Fri, 2017-03-24 at 12:55 +, Mark Brown wrote: > On Wed, Mar 22, 2017 at 06:53:08PM +0200, Leonard Crestez wrote: > >  /** > > + * regulator_is_bypass - Determine if the regulator is in bypass mode > Bypass is a verb so this should be regulator_is_bypassed() Very well, I will change this.

Re: [RFC 4/8] regulator: core: Check enabling bypass respects constraints

On Tue, 2017-03-28 at 17:47 +0100, Mark Brown wrote: > On Tue, Mar 28, 2017 at 03:39:41PM +0300, Leonard Crestez wrote: > > On Fri, 2017-03-24 at 12:52 +, Mark Brown wrote: > Please fix your mail client to word wrap within paragraphs at something > substantially less than 80

Re: [RFC 3/8] cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend

On Thu, 2017-03-23 at 10:04 +0530, Viresh Kumar wrote: > On 22-03-17, 18:53, Leonard Crestez wrote: > > If the cpufreq driver tries to modify voltage/freq during suspend/resume > > it might need to control an external PMIC via I2C or SPI but those > > devices might

Re: linux-next: Tree for Mar 30

On Thu, 2017-03-30 at 16:55 +1100, Stephen Rothwell wrote: > Hi all, > > Changes since 20170329: > > Undropped tree: xen-tip > > The vfs tree gained a conflict against Linus' tree. > > The drm tree gained conflicts against the drm-intel-fixes tree. > > The mailbox tree lost its build failure.

Re: [RFC 8/8] ARM: dts: imx6qdl-sabresd: Enable fsl,ldo-bypass

On Wed, 2017-03-22 at 18:13 +0100, Lucas Stach wrote: > Am Mittwoch, den 22.03.2017, 18:53 +0200 schrieb Leonard Crestez: > > This enables LDO bypass by default on the imx6qdl-sabresd boards. New > > dts files with -ldo suffix are added for users who want to run with L

[RFC 0/8] ARM: imx: Upstream fsl,ldo-bypass

egulator_ops? Irina Tirdea (2): cpufreq: imx6q: Fix handling EPROBE_DEFER from regulator regulator: anatop: fix min dropout for bypass mode Leonard Crestez (6): ARM: imx: gpc: Do not print error message for EPROBE_DEFER cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend regulato

[RFC 3/8] cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend

by ldo-bypass but in theory any regulator set_voltage call can end up having to modify external supply voltages. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/cpufreq/imx6q-cpufreq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/cpufreq/imx6q-cpufr

[RFC 6/8] regulator: core: Add regulator_is_bypass function

This is a simple kernel API to query the bypass state of a regulator. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/regulator/core.c | 26 ++ include/linux/regulator/consumer.h | 1 + 2 files changed, 27 insertions(+) diff

[RFC 7/8] cpufreq: imx6q: Initialize LDO bypass

ale vendor tree for a long time and compatibility is desirable. Otherwise it would be a bool. Some versions of u-boot shipped by freescale check this same property and set regulators in bypass mode before linux actually starts so we check for that scenario as well and finish early. Signed-off-b

[RFC 4/8] regulator: core: Check enabling bypass respects constraints

consumer who requested a higher voltage. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/regulator/core.c | 52 ++-- 1 file changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/core.c b/drivers/regulator/

[RFC 2/8] cpufreq: imx6q: Fix handling EPROBE_DEFER from regulator

essage to inform when the driver has been successfully registered. Signed-off-by: Irina Tirdea <irina.tir...@nxp.com> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/cpufreq/imx6q-cpufreq.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/cpufreq/imx6q-c

Re: [RFC 7/8] cpufreq: imx6q: Initialize LDO bypass

On Wed, 2017-03-22 at 18:09 +0100, Lucas Stach wrote: > Am Mittwoch, den 22.03.2017, 18:53 +0200 schrieb Leonard Crestez: > > > > Several imx6* socs have three built-in regulators LDO_ARM LDO_SOC and > > LDO_PU used to control internal chip voltages. "ldo-bypass&q

[RFC 8/8] ARM: dts: imx6qdl-sabresd: Enable fsl,ldo-bypass

This enables LDO bypass by default on the imx6qdl-sabresd boards. New dts files with -ldo suffix are added for users who want to run with LDOs enabled on these boards anyway. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/boot/dts/imx6dl-sabresd-ldo.dt

[RFC 1/8] ARM: imx: gpc: Do not print error message for EPROBE_DEFER

com> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/mach-imx/gpc.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index 1dc2a34..ce64d11 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/ma

[PATCH v2] ARM: imx_v6_v7_defconfig: Select SMSC_PHY

with "make savedefconfig" and it includes a few additional minor cleanups. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> Reviewed-by: Fabio Estevam <fabio.este...@nxp.com> Acked-by: Florian Fainelli <f.faine...@gmail.com> Acked-by: Fugang Duan <fugang.d

[PATCH 5/5] ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply

On imx6qp-sabresd LDO_ARM is connected to a different PMIC output than the other imx6qdl-sabresd boards. Setting cpu0 arm-supply to sw2_reg is wrong, this must have mistakenly slipped out of the vendor tree where this is are used for LDO bypass. Signed-off-by: Leonard Crestez <leonard.c

[PATCH 3/5] cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend

by ldo-bypass but in theory any regulator set_voltage call can end up having to modify external supply voltages. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/imx6q-cpufreq.c | 2 ++ 1 file changed, 2 inserti

[PATCH 4/5] ARM: dts: imx6qdl-sabresd: Set LDO regulator supply

Setting the supply is optional but beneficial, it will cause PMIC voltages to be dynamically changed with cpu frequency. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/ar

[PATCH 0/5] ARM: imx: Set LDO regulator supply

igurations. These changes are required for LDO bypass but they are also useful standalone. Here's a link to the that other discussion: https://lkml.org/lkml/2017/3/22/640 Irina Tirdea (1): cpufreq: imx6q: Fix handling EPROBE_DEFER from regulator Leonard Crestez (4): ARM: imx: gpc: Do not print err

[PATCH 1/5] ARM: imx: gpc: Do not print error message for EPROBE_DEFER

com> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/mach-imx/gpc.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index 1dc2a34..ce64d11 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/ma

[PATCH 2/5] cpufreq: imx6q: Fix handling EPROBE_DEFER from regulator

essage to inform when the driver has been successfully registered. Signed-off-by: Irina Tirdea <irina.tir...@nxp.com> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/imx6q-cpufreq.c | 7 +++ 1 file change

Re: [RFC PATCH 1/3] clk: add clk_bulk_get accessories

On Wed, 2017-04-12 at 12:03 +0800, Dong Aisheng wrote: > +/** > + * clk_bulk_enable - ungate a bulk of clocks > + * @num_clks: the number of clk_bulk_data > + * @clks: the clk_bulk_data table being ungated > + * > + * clk_bulk_enable must not sleep > + * Returns 0 on success, -EERROR otherwise. >

Re: [RFC PATCH 3/3] cpufreq: imx6q: refine clk operations

On Wed, 2017-04-12 at 12:03 +0800, Dong Aisheng wrote: > +static int num_clks; > +static struct clk_bulk_data clks[] = { > + { .id = "arm" }, > + { .id = "pll1_sys" }, > + { .id = "step" }, > + { .id = "pll1_sw" }, > + { .id = "pll2_pfd2_396m" }, > + { .id = "pll2_bus" }, >

Re: [PATCH 1/5] ARM: imx: gpc: Do not print error message for EPROBE_DEFER

On Tue, 2017-04-04 at 11:46 +0200, Lucas Stach wrote: > Am Freitag, den 31.03.2017, 22:25 +0300 schrieb Leonard Crestez: > > > > The pu regulator request will return -EPROBE_DEFER if it has a supply > > from PMIC and this supply is not yet registered. This does not represe

[PATCH v2 4/4] ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply

On imx6qp-sabresd LDO_ARM is connected to a different PMIC output than the other imx6qdl-sabresd boards. Setting cpu0 arm-supply to sw2_reg is wrong, this must have mistakenly slipped out of the vendor tree where this is are used for LDO bypass. Signed-off-by: Leonard Crestez <leonard.c

[PATCH v2 1/4] cpufreq: imx6q: Fix handling EPROBE_DEFER from regulator

essage to inform when the driver has been successfully registered. Signed-off-by: Irina Tirdea <irina.tir...@nxp.com> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> Reviewed-by: Lucas Stach <l.st...@pengutronix.de> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drive

[PATCH v2 0/4] ARM: imx: Set LDO regulator supply

clear if policy->cpuinfo.max would be preferable, at init time they should be identical. Link: https://lkml.org/lkml/2017/3/31/683 Irina Tirdea (1): cpufreq: imx6q: Fix handling EPROBE_DEFER from regulator Leonard Crestez (3): cpufreq: imx6q: Set max suspend_freq to avoid changes during

Re: [PATCH 3/5] cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend

On Tue, 2017-04-04 at 11:51 +0200, Lucas Stach wrote: > Am Freitag, den 31.03.2017, 22:25 +0300 schrieb Leonard Crestez: > > > > If the cpufreq driver tries to modify voltage/freq during suspend/resume > > it might need to control an external PMIC via I2C or SPI but th

[PATCH v2 3/4] ARM: dts: imx6qdl-sabresd: Set LDO regulator supply

Setting the supply is optional but beneficial, it will cause PMIC voltages to be dynamically changed with cpu frequency. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> Reviewed-by: Lucas Stach <l.st...@pengutronix.de> --- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 12

[PATCH v2 2/4] cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend

cpufreq to the maximum before suspend. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/cpufreq/imx6q-cpufreq.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index be90ee3..786122e

Re: [PATCH v3 33/37] mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset

On Thu, Mar 30, 2017 at 11:15 AM, Masahiro Yamada wrote: > > Some NAND controllers are using DMA engine requiring a specific > buffer alignment.  The core provides no guarantee on the nand_buffers > pointers, which forces some drivers to allocate their own buffers

Re: [RFC 4/8] regulator: core: Check enabling bypass respects constraints

On Thu, 2017-04-06 at 19:52 +0100, Mark Brown wrote: > On Tue, Mar 28, 2017 at 10:49:55PM +0300, Leonard Crestez wrote: > > On Tue, 2017-03-28 at 17:47 +0100, Mark Brown wrote: > > > To repeat what I said previously the whole point of bypassing is to not > > >

Re: [PATCH v2 2/4] cpufreq: imx6q: Set max suspend_freq to avoid changes during suspend

On Tue, 2017-04-11 at 12:07 +0530, Viresh Kumar wrote: > On 04-04-17, 20:04, Leonard Crestez wrote: > > If the cpufreq driver tries to modify voltage/freq during suspend/resume > > it might need to control an external PMIC via I2C or SPI but those > > devices might be already

Re: [RFC 4/8] regulator: core: Check enabling bypass respects constraints

On Fri, 2017-04-07 at 12:22 +0100, Mark Brown wrote: > On Fri, Apr 07, 2017 at 01:51:52PM +0300, Leonard Crestez wrote: > > It currently seems to work how I expect but from your statement it's > > not clear if it's entirely intentional. > The current behaviour of b

Re: [PATCH] clk: core: Copy connection id

On Tue, 2017-02-28 at 00:05 -0800, sb...@codeaurora.org wrote: > On 02/25, Leonard Crestez wrote: > > > > On Fri, 2017-02-24 at 12:44 -0800, Stephen Boyd wrote: > > > > > > On 02/20, Leonard Crestez wrote: > > > > > > > >

Re: [PATCH v2 0/4] ARM: imx: Set LDO regulator supply

On Tue, 2017-04-04 at 20:04 +0300, Leonard Crestez wrote: > Setting the LDO regulator parent is optional but beneficial. It will cause > the PMIC output voltage to be dynamically set to the minimum input for the > LDOs, this should be more efficient. > > This propagation

Re: [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz

On Thu, 2017-08-03 at 09:32 +0200, Sébastien Szymanski wrote: > On 08/03/2017 04:03 AM, Shawn Guo wrote: > > On Fri, Jul 28, 2017 at 10:36:33AM +0200, Sébastien Szymanski wrote: > > > Setting the frequency higher than 528Mhz actually sets the ARM > > > clock to 528MHz. That's because PLL2 is used

Re: [PATCH V3 3/9] cpufreq: Cap the default transition delay value to 10 ms

On Wed, 2017-08-16 at 12:04 +0530, Viresh Kumar wrote: > On 28-07-17, 10:58, Viresh Kumar wrote: > > > > At this point I really feel that this is a hardware specific problem > > and it was working by chance until now. And I am not sure if we > > shouldn't be stopping this patch from getting

Re: [PATCH v2 3/5] thermal: imx: Add support for reading OCOTP through nvmem

On Tue, 2017-08-08 at 20:58 +0800, Zhang Rui wrote: > On Tue, 2017-08-08 at 12:44 +0100, Srinivas Kandagatla wrote: > > On 08/08/17 12:38, Leonard Crestez wrote: > > > On Tue, 2017-08-08 at 12:00 +0100, Srinivas Kandagatla wrote: > > > > On 08/08/17 08:21, Zhang

[PATCH] selftests: cpufreq: Check cpuinfo_cur_freq set as expected

This checks that the cpufreq driver actually sets the requested frequency. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- I've been looking at using kselftests for imx. This patch exposes an issue with the imx6 cpufreq driver on imx6sx where frequencies are set incorrectly b

[PATCH v2 3/5] thermal: imx: Add support for reading OCOTP through nvmem

-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/thermal/imx_thermal.c | 103 ++ 1 file changed, 73 insertions(+), 30 deletions(-) diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index fb648a4..130405c

[PATCH v2 1/5] thermal: imx: Add nvmem-cells alternate binding for OCOTP access

and because it still works fine on imx6qdl series chips. In theory this problem could be solved by adding a reference to the OCOTP clock instead but it is better to hide such details in a specific nvmem driver. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- Documentation/devi

[PATCH v2 5/5] ARM: dts: imx6ul: Add imx6ul-tempmon

This works identically to imx6sx-tempmon on both imx6ul and imx6ull. It just needs to be defined in dts. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/boot/dts/imx6ul.dtsi | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/bo

[PATCH v2 4/5] ARM: dts: imx6sx: Use nvmem-cells for tempmon

Waßmann <l...@karo-electronics.de> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/boot/dts/imx6sx.dtsi | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index f16b9df..580af30

[PATCH v2 0/5] thermal: imx: Add nvmem-cells binding on imx6sx

l info cells (Shawn Guo) * Link: https://lkml.org/lkml/2017/7/6/426 Leonard Crestez (5): thermal: imx: Add nvmem-cells alternate binding for OCOTP access nvmem: core: Add nvmem_cell_read_u32 thermal: imx: Add support for reading OCOTP through nvmem ARM: dts: imx6sx: Use nvmem-cells for tempmon

[PATCH v2 2/5] nvmem: core: Add nvmem_cell_read_u32

This function does a quick and easy read of an u32 value without any kind of resource management code on the consumer side. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/nvmem/core.c | 37 + include/linux/nvmem-consumer.

Re: [PATCH] selftests: cpufreq: Check cpuinfo_cur_freq set as expected

On Wed, 2017-07-12 at 13:36 +0200, Rafael J. Wysocki wrote: > On Wed, Jul 12, 2017 at 1:29 PM, Leonard Crestez > <leonard.cres...@nxp.com> wrote: > > > > This checks that the cpufreq driver actually sets the requested > > frequency. > This won't work on modern

Re: [PATCH 2/4] thermal: imx: Add support for reading OCOTP through nvmem

On Fri, 2017-07-14 at 09:48 +0100, Srinivas Kandagatla wrote: > On 12/07/17 07:36, Shawn Guo wrote: > > > +static int nvmem_cell_read_u32(struct device* dev, const char *cell_id, > > > u32 *val) > > > +{ > > > + struct nvmem_cell *cell; > > > + void *buf; > > > + size_t len; > > > + > > > + cell

Re: [PATCH v10 2/3] arm/syscalls: Check address limit on user-mode return

On Wed, 2017-06-14 at 18:12 -0700, Thomas Garnier wrote: > Ensure the address limit is a user-mode segment before returning to > user-mode. Otherwise a process can corrupt kernel-mode memory and > elevate privileges [1]. > > The set_fs function sets the TIF_SETFS flag to force a slow path on >

Re: [PATCH v10 2/3] arm/syscalls: Check address limit on user-mode return

On Tue, 2017-07-18 at 09:04 -0700, Thomas Garnier wrote: > On Tue, Jul 18, 2017 at 7:36 AM, Leonard Crestez <leonard.cres...@nxp.com> > wrote: > > > > On Wed, 2017-06-14 at 18:12 -0700, Thomas Garnier wrote: > > > > > > Ensure the address lim

Re: [PATCH] selftests: cpufreq: Check cpuinfo_cur_freq set as expected

On Thu, 2017-07-13 at 14:25 +0530, Viresh Kumar wrote: > On 12-07-17, 14:29, Leonard Crestez wrote: > > > > This checks that the cpufreq driver actually sets the requested > > frequency. > > > > Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com>

Re: [PATCH 1/3] arm/syscalls: Move address limit check in loop

revent the infinite loop, move > > the addr_limit_user_check call at the beginning of the loop. > > > > Fixes: 73ac5d6a2b6a ("arm/syscalls: Check address limit on user- > > mode return") > > Reported-by: Leonard Crestez <leonard.cres...@nxp.com> > > Sig

Re: [PATCH V3 3/9] cpufreq: Cap the default transition delay value to 10 ms

On Wed, 2017-07-19 at 15:42 +0530, Viresh Kumar wrote: > If transition_delay_us isn't defined by the cpufreq driver, the default > value of transition delay (time after which the cpufreq governor will > try updating the frequency again) is currently calculated by multiplying > transition_latency

Re: [PATCH V3 3/9] cpufreq: Cap the default transition delay value to 10 ms

On Wed, 2017-07-26 at 11:36 +0530, Viresh Kumar wrote: > On 25-07-17, 14:54, Leonard Crestez wrote: > > This patch made it's way into linux-next and it seems to cause imx socs > > to almost always hang around their max frequency with the ondemand > > governor, even when a

[PATCH] cpufreq: imx6q: Fix imx6sx low frequency support

pass logic. The definition of pll1_sys is changed to imx_clk_fixed_factor so that it's never disabled. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- Some potential issues: In theory pll1_sys could be explictly kept enabled from cpufreq. It's not clear this would be better since the inten

Re: [PATCH v10 2/3] arm/syscalls: Check address limit on user-mode return

On Tue, 2017-07-18 at 12:04 -0700, Thomas Garnier wrote: > On Tue, Jul 18, 2017 at 10:18 AM, Leonard Crestez <leonard.cres...@nxp.com> > wrote: > > On Tue, 2017-07-18 at 09:04 -0700, Thomas Garnier wrote: > > > On Tue, Jul 18, 2017 at 7:36 AM, Leonard Crestez >

Re: [PATCH] thermal: imx: interpret fsl,tempmon-data through nvmem

On Mon, 2017-06-19 at 16:40 +0300, Leonard Crestez wrote: > On imx6sx accessing the ocotp memory area directly is wrong because the > ocotp clock needs to be enabled first. Fix this by reinterpreting the > fsl,tempmon-data phandle as a reference to a nvmem_device and doing all > the

[PATCH 1/4] thermal: imx: Add nvmem-cells alternate binding for OCOTP access

and because it still works fine on imx6qdl series chips. In theory this problem could be solved by adding a reference to the OCOTP clock instead but it is better to hide such details in a specific nvmem driver. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- Documentation/devi

[PATCH 3/4] ARM: dts: imx6sx: Use nvmem-cells for tempmon

Waßmann <l...@karo-electronics.de> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/boot/dts/imx6sx.dtsi | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index f16b9df..5cfee85

[PATCH 4/4] ARM: dts: imx6ul: Add imx6ul-tempmon

This works identically to imx6sx-tempmon on both imx6ul and imx6ull. It just needs to be defined in dts. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- arch/arm/boot/dts/imx6ul.dtsi | 17 + 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/imx6u

[PATCH 2/4] thermal: imx: Add support for reading OCOTP through nvmem

-by: Leonard Crestez <leonard.cres...@nxp.com> --- drivers/thermal/imx_thermal.c | 131 -- 1 file changed, 101 insertions(+), 30 deletions(-) diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index fb648a4..ffbd579

[PATCH 0/4] thermal: imx: Add nvmem-cells binding on imx6sx

cetree properties would be interesting. Link: https://lkml.org/lkml/2017/6/19/333 Leonard Crestez (4): thermal: imx: Add nvmem-cells alternate binding for OCOTP access thermal: imx: Add support for reading OCOTP through nvmem ARM: dts: imx6sx: Use nvmem-cells for tempmon ARM: dts: imx6u

Re: [PATCH] thermal: imx: interpret fsl,tempmon-data through nvmem

On Tue, 2017-07-04 at 11:54 -0700, Eduardo Valentin wrote: > On Mon, Jun 19, 2017 at 04:40:43PM +0300, Leonard Crestez wrote: > > > > On imx6sx accessing the ocotp memory area directly is wrong because the > > ocotp clock needs to be enabled first. Fix this by reinterpretin

[PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override

oards fail to boot with ugly semi-random crashes, reminiscent of memory corruption. These failures happen the first time the lowest idle state is used. Remove the OPP override in order to fix those crashes. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- It's not clear exactly

Re: [PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override

On Tue, 2017-04-25 at 14:02 -0300, Fabio Estevam wrote: > On Tue, Apr 25, 2017 at 2:02 PM, Fabio Estevam <feste...@gmail.com> wrote: > > > > Hi Leonard, > > > > On Tue, Apr 25, 2017 at 1:57 PM, Leonard Crestez > > <leonard.cres...@nxp.com> wrot

Re: [PATCH V3 3/9] cpufreq: Cap the default transition delay value to 10 ms

On Fri, 2017-07-28 at 10:58 +0530, Viresh Kumar wrote: > On 27-07-17, 19:54, Leonard Crestez wrote: > > On Wed, 2017-07-26 at 11:36 +0530, Viresh Kumar wrote: > > > Without this patch the sampling rate of ondemand governor will be 109 > > > ms. And after this patch it wo

Re: [PATCH v2 3/5] thermal: imx: Add support for reading OCOTP through nvmem

On Tue, 2017-08-08 at 12:00 +0100, Srinivas Kandagatla wrote: > On 08/08/17 08:21, Zhang Rui wrote: > > On Tue, 2017-07-25 at 16:08 +0800, Shawn Guo wrote: > > > On Fri, Jul 14, 2017 at 05:11:08PM +0300, Leonard Crestez wrote: > > > > On newer imx SOCs accessing O

Re: [PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override

On Wed, 2017-05-03 at 16:26 +0200, Marek Vasut wrote: > On 05/03/2017 03:57 PM, Shawn Guo wrote: > > > > On Tue, Apr 25, 2017 at 07:28:06PM +0200, Marek Vasut wrote: > > > > > > On 04/25/2017 07:23 PM, Leonard Crestez wrote: > > > > > > > &

Re: [PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override

On Wed, 2017-05-03 at 17:59 +0200, Marek Vasut wrote: > On 05/03/2017 04:58 PM, Leonard Crestez wrote: > > On Wed, 2017-05-03 at 16:26 +0200, Marek Vasut wrote: > > > 2) It actually fixes a problem with the voltage rails such that the DVFS > > >    works without lea

[PATCH] drm/imx: imx-ldb: Accept drm_of_find_panel_or_bridge failure

boards. Link: https://lists.freedesktop.org/archives/dri-devel/2017-May/141233.html Fixes: ebc944613567 ("drm: convert drivers to use drm_of_find_panel_or_bridge") Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- This relies on drm_of_find_panel_or_bridge returning -ENO

[PATCH v2] drm/imx: imx-ldb: Accept drm_of_find_panel_or_bridge failure

. Link: https://lists.freedesktop.org/archives/dri-devel/2017-May/141233.html Fixes: ebc944613567 ("drm: convert drivers to use drm_of_find_panel_or_bridge") Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- This relies on drm_of_find_panel_or_bridge returning -ENO

Re: [PATCH linux-next v2 1/1] spi: imx: dynamic burst length adjust for PIO mode

On Mon, 2017-05-01 at 03:31 -0700, jiada_w...@mentor.com wrote: > From: Jiada Wang > > previously burst length (BURST_LENGTH) is always set to equal > to bits_per_word, causes a 10us gap between each word in > transfer, which significantly affects performance. > > This

Re: [PATCH linux-next v2 1/1] spi: imx: dynamic burst length adjust for PIO mode

On Wed, 2017-05-17 at 18:50 -0700, Jiada Wang wrote: > Hello Leonard > > Thanks for the report, can you help to check if the following change  > address the issue? > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c > index 782045f..19b30cf 100644 > --- a/drivers/spi/spi-imx.c > +++

Re: [PATCH 1/1] spi: imx: fix issue when tx_buf or rx_buf is NULL

rash. > > Add buffer check at very beginning of spi_imx_u32_swap_u[8|16](), > to avoid such crash. > > Signed-off-by: Jiada Wang <jiada_w...@mentor.com> > Reported-by: Leonard Crestez <leonard.cres...@nxp.com> Tested-by: Leonard Crestez <leonard.cres...@nxp.com>

Re: [PATCH v3 4/5] drm: convert drivers to use drm_of_find_panel_or_bridge

On Wed, Mar 22, 2017 at 5:01 PM, Philipp Zabel wrote: > On Wed, 2017-03-22 at 08:26 -0500, Rob Herring wrote: > > > > Similar to the previous commit, convert drivers open coding OF graph > > parsing to use drm_of_find_panel_or_bridge instead. > > > > This changes some

[PATCH] thermal: imx: interpret fsl,tempmon-data through nvmem

cs.de> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- This was reported as a comment to a patch adding tempmon support for imx6ul (which is very similar to imx6sx). Since it already affects a supported chip this patch is sent as a separate bugfix. Link: https://lkml

Re: [PATCH] cpufreq: imx6q: imx6ull should use the same flow as imx6ul

On Wed, 2017-05-31 at 01:07 -0300, Fabio Estevam wrote: > On Tue, May 30, 2017 at 12:57 PM, Leonard Crestez > <leonard.cres...@nxp.com> wrote: > > > > From: Octavian Purdila <octavian.purd...@nxp.com> > > > > This fixes an issue with imx6ull where set

[PATCH 1/2] gdb/scripts: lx-dmesg: Cast log_buf to void* for addr fetch

'ascii' codec can't encode character u'\u0303' in position 24: ordinal not in range(128) Avoid this by explicitly casting to (void *) inside the gdb expression. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- scripts/gdb/linux/dmesg.py | 2 +- 1 file changed, 1 inserti

[PATCH 2/2] scripts/gdb: lx-dmesg: Use errors=replace for decoding

It is never desirable lx-dmesg to fail on string decoding errors, not even if the log buffer is corrupt. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- scripts/gdb/linux/dmesg.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/gdb/linux/dmes

Re: [PATCH 2/2] scripts/gdb: lx-dmesg: Use errors=replace for decoding

On Fri, 2017-06-23 at 18:02 +0200, Jan Kiszka wrote: > On 2017-06-23 16:20, Leonard Crestez wrote: > > > > It is never desirable lx-dmesg to fail on string decoding errors, > > not > > even if the log buffer is corrupt. > > > > Signed-off-by: L

[PATCH v2 1/2] scripts/gdb: lx-dmesg: Cast log_buf to void* for addr fetch

'ascii' codec can't encode character u'\u0303' in position 24: ordinal not in range(128) Avoid this by explicitly casting to (void *) inside the gdb expression. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> Reviewed-by: Jan Kiszka <jan.kis...@siemens.com> --- Cha

[PATCH v2 2/2] scripts/gdb: lx-dmesg: Use explicit encoding=utf8 errors=replace

='ascii', unknown characters are replaced with U+FFFD REPLACEMENT CHARACTER and they fail to encode back to ascii. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- Changes since v1: * Add encoding='utf8' * Only do an explicit encode for python2. On python3 this returns a bytes object

Re: [PATCH v5 2/6] ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set

On Tue, 2017-06-20 at 06:55 +0200, Oleksij Rempel wrote: > On 19.06.2017 13:35, Leonard Crestez wrote: > > On Mon, 2017-06-19 at 07:02 +0200, Oleksij Rempel wrote: > > > > > > One of the Freescale recommended sequences for power off with > > >

Re: [PATCH v5 3/6] kernel/reboot.c: export pm_power_off_prepare

On Tue, 2017-06-20 at 07:01 +0200, Oleksij Rempel wrote: > > On 19.06.2017 13:35, Leonard Crestez wrote: > > > > On Mon, 2017-06-19 at 07:02 +0200, Oleksij Rempel wrote: > > > > > > Export pm_power_off_prepare. It is needed to implement power off on &

[PATCH] ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS

ux-next since next-20170517. This is bad, DEBUG_FS is extremely useful for kernel introspection and testing. Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com> --- Patch is against next-20170526. Applying it to shawnguo/imx/defconfig and cycling via savedefconfig makes this diff go away. Alt

Re: [PATCH] ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS

On Fri, 2017-05-26 at 08:42 -0700, Paul E. McKenney wrote: > On Fri, May 26, 2017 at 02:26:06PM +0300, Leonard Crestez wrote: > > > > This option was removed by "make savedefconfig" in > > commit c5054a98bce4 ("ARM: imx_v6_v7_defconfig: Select SMSC_

Re: [PATCH 1/2] ARM: dts: imx6ul-14x14-evk: Add ksz8081 phy properties

On Tue, 2017-05-30 at 11:10 -0700, Florian Fainelli wrote: > On 05/30/2017 10:34 AM, Leonard Crestez wrote: > > Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same > > register values can be set through the micrel phy driver by using dts > > properties

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