Re: [PATCH] ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()

2015-04-08 Thread Lorenzo Pieralisi
On Wed, Apr 08, 2015 at 11:54:38AM +0100, Tomeu Vizoso wrote: This callback is expected to do the same as enter() only that all non-wakeup IRQs are expected to be disabled. This is not true or at least it is misworded. The enter_freeze() function is expected to return from the state with IRQs

Re: [PATCH v3] ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()

2015-05-20 Thread Lorenzo Pieralisi
...@intel.com --- v3: * Set CPUIDLE_FLAG_TIMER_STOP to simplify things as suggested by Lorenzo Pieralisi v2: * Disable FIQs also when suspending-to-idle --- arch/arm/mach-tegra/cpuidle-tegra114.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/arm

Re: [PATCH v3] ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()

2015-05-20 Thread Lorenzo Pieralisi
On Wed, May 20, 2015 at 09:55:41AM +0100, Tomeu Vizoso wrote: On 05/20/2015 10:44 AM, Lorenzo Pieralisi wrote: On Tue, May 19, 2015 at 03:49:12PM +0100, Tomeu Vizoso wrote: This callback is expected to do the same as enter() but it has to guarantee that interrupts aren't enabled at any

Re: [Patch v4 5/8] ARM64/PCI/ACPI: Introduce struct pci_controller for ACPI

2015-06-02 Thread Lorenzo Pieralisi
on ARM64. Signed-off-by: Hanjun Guo hanjun@linaro.org Tested-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com CC: Arnd Bergmann a...@arndb.de CC: Catalin Marinas catalin.mari...@arm.com CC: Liviu Dudau liviu.du...@arm.com CC: Lorenzo Pieralisi lorenzo.pieral...@arm.com CC: Will Deacon

[RFC/RFT PATCH v2] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-06-09 Thread Lorenzo Pieralisi
in the resource hierarchy as soon as the bridge bases are probed. Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com Cc: Ralf Baechle r...@linux-mips.org Cc: James E.J. Bottomley j...@parisc-linux.org Cc: Michael Ellerman m...@ellerman.id.au Cc: Bjorn Helgaas bhelg...@google.com Cc: Richard

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-06-08 Thread Lorenzo Pieralisi
On Mon, Jun 08, 2015 at 03:57:38AM +0100, Hanjun Guo wrote: [...] Why can't we make use of the ECAM implementation used by pci-host-generic and drivers/pci/access.c? We had that question when I had posted MMCFG patch set separately, please see: https://lkml.org/lkml/2015/3/11/492

Re: [PATCH] PCI: Only enable IO window if supported

2015-06-03 Thread Lorenzo Pieralisi
On Tue, Jun 02, 2015 at 06:02:49PM +0100, Guenter Roeck wrote: On 06/02/2015 07:55 AM, Lorenzo Pieralisi wrote: Bjorn, Guenter, On Wed, May 27, 2015 at 10:04:47PM +0100, Bjorn Helgaas wrote: [+cc Lorenzo, Suravee, Will] I cc'd Lorenzo, Suravee, and Will because Lorenzo is working

Re: [Patch v4 5/8] ARM64/PCI/ACPI: Introduce struct pci_controller for ACPI

2015-06-03 Thread Lorenzo Pieralisi
On Wed, Jun 03, 2015 at 10:36:19AM +0100, Jiang Liu wrote: On 2015/6/3 16:44, Hanjun Guo wrote: On 2015???06???02??? 17:35, Lorenzo Pieralisi wrote: On Tue, Jun 02, 2015 at 07:12:53AM +0100, Jiang Liu wrote: From: Hanjun Guo hanjun@linaro.org ARM64 ACPI based PCI host bridge init

Re: [Patch v4 5/8] ARM64/PCI/ACPI: Introduce struct pci_controller for ACPI

2015-06-03 Thread Lorenzo Pieralisi
On Wed, Jun 03, 2015 at 11:21:16AM +0100, Jiang Liu wrote: On 2015/6/3 18:03, Lorenzo Pieralisi wrote: On Wed, Jun 03, 2015 at 10:36:19AM +0100, Jiang Liu wrote: On 2015/6/3 16:44, Hanjun Guo wrote: On 2015???06???02??? 17:35, Lorenzo Pieralisi wrote: On Tue, Jun 02, 2015 at 07:12:53AM

Re: [PATCH] PCI: Only enable IO window if supported

2015-06-03 Thread Lorenzo Pieralisi
On Wed, Jun 03, 2015 at 04:12:24PM +0100, Guenter Roeck wrote: [...] After looking into this some more, I think the wrinkle may be that pci_read_bridge_bases() and thus pci_read_bridge_io() isn't called on probe-only systems (if PCI_PROBE_ONLY is set). A secondary That's what we would

Re: [Patch v5 4/6] PCI/ACPI: Consolidate common PCI host bridge code into ACPI core

2015-06-09 Thread Lorenzo Pieralisi
On Mon, Jun 08, 2015 at 05:20:46PM +0100, Jiang Liu wrote: [...] +static int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) +{ + int ret; + struct list_head *list = info-resources; + struct acpi_device *device = info-bridge; + struct resource_entry *entry,

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-06-04 Thread Lorenzo Pieralisi
Hi Hanjun, On Thu, Jun 04, 2015 at 10:28:17AM +0100, Hanjun Guo wrote: Hi Lorenzo, On 2015???06???02??? 21:32, Lorenzo Pieralisi wrote: On Wed, May 27, 2015 at 09:06:26AM +0100, Tomasz Nowicki wrote: On 26.05.2015 19:08, Will Deacon wrote: On Tue, May 26, 2015 at 01:49:18PM +0100

Re: [PATCH v2 6/9] irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init

2015-06-22 Thread Lorenzo Pieralisi
ARM Ltd. * Author: Lorenzo Pieralisi lorenzo.pieral...@arm.com + * Hanjun Guo hanjun@linaro.org for stacked irqdomains support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2

Re: [PATCH v2 3/9] irqchip / GIC: Add GIC version support in ACPI MADT

2015-06-22 Thread Lorenzo Pieralisi
On Fri, Jun 19, 2015 at 09:46:06AM +0100, Hanjun Guo wrote: [...] + +static int __init +match_gic_redist(struct acpi_subtable_header *header, const unsigned long end) +{ + return 0; +} +static bool __init acpi_gic_redist_is_present(void) +{ + int count; + + /* scan MADT

Re: [PATCH v2 6/9] irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init

2015-06-23 Thread Lorenzo Pieralisi
On Tue, Jun 23, 2015 at 04:11:38PM +0100, Hanjun Guo wrote: [...] diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 8fc67bc..d1b2131 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -851,15 +851,22 @@ static struct notifier_block

Re: [PATCH] PCI: Only enable IO window if supported

2015-06-25 Thread Lorenzo Pieralisi
On Wed, Jun 24, 2015 at 12:14:43AM +0100, Benjamin Herrenschmidt wrote: On Tue, 2015-06-23 at 18:02 -0500, Bjorn Helgaas wrote: On Tue, Jun 23, 2015 at 5:46 PM, Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Tue, 2015-06-02 at 15:55 +0100, Lorenzo Pieralisi wrote: While

Re: [PATCH] PCI: Only enable IO window if supported

2015-06-19 Thread Lorenzo Pieralisi
Hi Guenter, On Thu, Jun 18, 2015 at 07:01:03PM +0100, Guenter Roeck wrote: On Thu, May 28, 2015 at 07:41:12AM -0500, Bjorn Helgaas wrote: I'd like res-flags to reflect the capabilities of the hardware, not whether the window is currently enabled. Flag bits seem to be all

Re: [Patch v5 4/6] PCI/ACPI: Consolidate common PCI host bridge code into ACPI core

2015-06-10 Thread Lorenzo Pieralisi
On Tue, Jun 09, 2015 at 05:58:15PM +0100, Jiang Liu wrote: On 2015/6/10 0:12, Lorenzo Pieralisi wrote: [...] +struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, + struct acpi_pci_root_ops *ops, + struct

Re: [RFC/RFT PATCH v2] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-06-15 Thread Lorenzo Pieralisi
On Sun, Jun 14, 2015 at 04:29:52PM +0100, Guenter Roeck wrote: On 06/13/2015 02:12 AM, Lorenzo Pieralisi wrote: On Sat, Jun 13, 2015 at 02:47:55AM +0100, Guenter Roeck wrote: On Tue, Jun 09, 2015 at 10:01:45AM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge

Re: [PATCH 2/3] ACPI: add BAD_MADT_GICC_ENTRY() macro

2015-06-12 Thread Lorenzo Pieralisi
On Thu, Jun 11, 2015 at 08:45:10PM +0100, al.st...@linaro.org wrote: From: Al Stone al.st...@linaro.org The BAD_MADT_ENTRY() macro is designed to work for all of the subtables of the MADT. In the ACPI 5.1 version of the spec, the struct for the GICC subtable (struct

Re: [RFC/RFT PATCH v2] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-06-13 Thread Lorenzo Pieralisi
On Sat, Jun 13, 2015 at 02:47:55AM +0100, Guenter Roeck wrote: On Tue, Jun 09, 2015 at 10:01:45AM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read the bridge registers to set-up its resources so that the PCI resource hierarchy can

Re: [RFC/RFT PATCH v2] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-06-16 Thread Lorenzo Pieralisi
On Thu, Jun 11, 2015 at 08:53:46PM +0100, Suravee Suthikulanit wrote: For ARM64 PROBE_ONLY and non-PROBE_ONLY modes: Reviewed and Tested-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com Thank you ! Please see minor comments below. [...] +static void

Re: [PATCH v3] ARM: dts: mt8173: support arm64 cpuidle-dt

2015-05-29 Thread Lorenzo Pieralisi
= 1088; + local-timer-stop; + }; }; }; I guess there is no hope of seeing the cluster state restored (?). I would like some explanation regarding local-timer-stop change, apart from that you can add: Acked-by: Lorenzo

Re: [RFC/RFT PATCH] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-05-27 Thread Lorenzo Pieralisi
On Wed, May 27, 2015 at 05:42:52PM +0100, Suravee Suthikulanit wrote: Hi Lorenzo, Sorry for late reply. On 5/21/2015 8:14 AM, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read the bridge registers to set-up its resources so

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-06-02 Thread Lorenzo Pieralisi
On Wed, May 27, 2015 at 09:06:26AM +0100, Tomasz Nowicki wrote: On 26.05.2015 19:08, Will Deacon wrote: On Tue, May 26, 2015 at 01:49:18PM +0100, Hanjun Guo wrote: From: Tomasz Nowicki tomasz.nowi...@linaro.org ECAM standard and MCFG table are architecture independent and it makes sense

Re: [PATCH] PCI: Only enable IO window if supported

2015-06-02 Thread Lorenzo Pieralisi
Bjorn, Guenter, On Wed, May 27, 2015 at 10:04:47PM +0100, Bjorn Helgaas wrote: [+cc Lorenzo, Suravee, Will] I cc'd Lorenzo, Suravee, and Will because Lorenzo is working on calling pci_read_bases() from the PCI core instead of from arch code, and there are likely some dependencies between

Re: [Patch v5 4/6] PCI/ACPI: Consolidate common PCI host bridge code into ACPI core

2015-06-11 Thread Lorenzo Pieralisi
Hi Gerry, On Wed, Jun 10, 2015 at 06:19:13PM +0100, Jiang Liu wrote: On 2015/6/11 0:48, Lorenzo Pieralisi wrote: On Tue, Jun 09, 2015 at 05:58:15PM +0100, Jiang Liu wrote: On 2015/6/10 0:12, Lorenzo Pieralisi wrote: [...] +struct pci_bus *acpi_pci_root_create(struct acpi_pci_root

[RFC/RFT PATCH] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-05-21 Thread Lorenzo Pieralisi
the PCI_PROBE_ONLY flag before reading the bridge bases. Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com Cc: Ralf Baechle r...@linux-mips.org Cc: James E.J. Bottomley j...@parisc-linux.org Cc: Michael Ellerman m...@ellerman.id.au Cc: Bjorn Helgaas bhelg...@google.com Cc: Richard Henderson r

Re: [RFC/RFT PATCH] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-05-26 Thread Lorenzo Pieralisi
On Tue, May 26, 2015 at 01:57:59PM +0100, Will Deacon wrote: Hi Lorenzo, On Thu, May 21, 2015 at 02:14:25PM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read the bridge registers to set-up its resources so that the PCI resource

Re: [PATCH 3/6] pci:host: Add Altera PCIe host controller driver

2015-07-29 Thread Lorenzo Pieralisi
On Tue, Jul 28, 2015 at 11:45:42AM +0100, Ley Foon Tan wrote: [...] +static int altera_pcie_parse_request_of_pci_ranges(struct altera_pcie *pcie) +{ + int err, res_valid = 0; + struct device *dev = pcie-pdev-dev; + struct device_node *np = dev-of_node; +

Re: [RFT PATCH v3] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-07-22 Thread Lorenzo Pieralisi
Hi Guenter, On Wed, Jul 22, 2015 at 03:22:57PM +0100, Guenter Roeck wrote: On 07/22/2015 02:14 AM, Lorenzo Pieralisi wrote: Bjorn, Guenter, On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read

Re: [RFT PATCH v3] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-07-24 Thread Lorenzo Pieralisi
On Fri, Jul 24, 2015 at 09:55:42AM +0100, Will Deacon wrote: On Thu, Jul 23, 2015 at 06:48:45PM +0100, Lorenzo Pieralisi wrote: On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote: I'm a little uneasy that we might break some alpha or mips system, since there must have been some

Re: [PATCH v2 7/7] acpi: gsi: Cleanup acpi_register_gsi

2015-07-24 Thread Lorenzo Pieralisi
- irq_type != irq_get_trigger_type(irq)) - irq_set_irq_type(irq, irq_type); - return irq; + return irq_create_acpi_mapping(d, data); } EXPORT_SYMBOL_GPL(acpi_register_gsi); Reviewed-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com -- To unsubscribe from

Re: [PATCH v3 3/3] arm: kernel: implement cpuidle_ops with psci backend

2015-07-27 Thread Lorenzo Pieralisi
On Mon, Jul 27, 2015 at 10:45:07AM +0100, Russell King - ARM Linux wrote: On Mon, Jul 27, 2015 at 10:16:02AM +0100, Lorenzo Pieralisi wrote: Yes, I would only ask you, if the plan above (which can be implemented in two steps) makes sense to you please consider accepting Mark's change

Re: [PATCH v3 3/3] arm: kernel: implement cpuidle_ops with psci backend

2015-07-27 Thread Lorenzo Pieralisi
On Sun, Jul 26, 2015 at 10:45:54PM +0100, Russell King - ARM Linux wrote: On Wed, Jul 15, 2015 at 04:40:56PM +0100, Lorenzo Pieralisi wrote: static struct cpuidle_ops psci_cpuidle_ops __initdata = { .suspend = cpu_psci_cpu_suspend, .init = cpu_psci_cpu_init_idle

Re: [PATCH 5/5] irqchip: GIC: Switch ACPI support to stacked domains

2015-07-21 Thread Lorenzo Pieralisi
On Tue, Jul 21, 2015 at 11:08:00AM +0100, Marc Zyngier wrote: Now that the basic ACPI GSI code is irq domain aware, make sure that the ACPI support in the GIC doesn't pointlessly deviate from the DT path. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- drivers/irqchip/irq-gic.c

Re: [PATCH 4/5] acpi: gsi: Use acpi_gsi_descriptor to allocate interrupts

2015-07-21 Thread Lorenzo Pieralisi
On Tue, Jul 21, 2015 at 11:07:59AM +0100, Marc Zyngier wrote: Now that the irqdomain layer is a bit more ACPI friendly, add the mapping code that allows irq_create_acpi_mapping to be called. As we only support the GIC so far, support is pretty limited. Signed-off-by: Marc Zyngier

Re: [PATCH 2/5] genirq: irqdomain: Remove irqdomain dependency on struct device_node

2015-07-21 Thread Lorenzo Pieralisi
On Tue, Jul 21, 2015 at 11:07:57AM +0100, Marc Zyngier wrote: struct device_node is very much DT specific, and the original authors of the irqdomain subsystem recognized that tie, and went as far as mentionning that this could be replaced by some void *token, should another firmware

Re: [RFT PATCH v3] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-07-22 Thread Lorenzo Pieralisi
Bjorn, Guenter, On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read the bridge registers to set-up its resources so that the PCI resource hierarchy can be validated properly. Most if not all

Re: [PATCH v2 5/7] acpi: gsi: Add acpi_set_irq_model to initialize the GSI layer

2015-07-24 Thread Lorenzo Pieralisi
*, + u32, unsigned int)); + #ifdef CONFIG_X86_IO_APIC extern int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity); #else It makes sense and it removes GIC specific mapping from generic code: Reviewed-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com

Re: [PATCH v2 6/7] irqchip: GIC: Switch ACPI support to stacked domains

2015-07-24 Thread Lorenzo Pieralisi
| 45 ++--- include/linux/irqchip/arm-gic.h | 2 +- 2 files changed, 34 insertions(+), 13 deletions(-) Reviewed-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index b41ccf5..ce531e6

Re: [RFT PATCH v3] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-07-23 Thread Lorenzo Pieralisi
On Thu, Jul 23, 2015 at 05:47:44PM +0100, Guenter Roeck wrote: On 07/23/2015 09:12 AM, Bjorn Helgaas wrote: On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read the bridge registers to set-up its

Re: [RFT PATCH v3] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-07-23 Thread Lorenzo Pieralisi
On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote: On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote: When a PCI bus is scanned, upon PCI bridge detection the kernel has to read the bridge registers to set-up its resources so that the PCI resource hierarchy can

Re: [PATCH v3 3/3] arm: kernel: implement cpuidle_ops with psci backend

2015-07-14 Thread Lorenzo Pieralisi
On Tue, Jul 14, 2015 at 11:34:21AM +0100, Russell King - ARM Linux wrote: On Thu, Jul 09, 2015 at 04:31:25PM +0800, Jisheng Zhang wrote: This patch implements cpuidle_ops using psci. After this patch, we can use cpuidle-arm.c with psci backend for both arm and arm64. Signed-off-by:

Re: [PATCH v3 3/3] arm: kernel: implement cpuidle_ops with psci backend

2015-07-14 Thread Lorenzo Pieralisi
On Tue, Jul 14, 2015 at 01:29:04PM +0100, Russell King - ARM Linux wrote: On Tue, Jul 14, 2015 at 12:03:02PM +0100, Lorenzo Pieralisi wrote: On Tue, Jul 14, 2015 at 11:34:21AM +0100, Russell King - ARM Linux wrote: +static struct cpuidle_ops psci_cpuidle_ops __initdata

Re: [PATCH 3/5] arm64, pci: Allow RC drivers to supply pcibios_add_device() implementation.

2015-07-16 Thread Lorenzo Pieralisi
Hi David, On Wed, Jul 15, 2015 at 05:54:43PM +0100, David Daney wrote: From: David Daney david.da...@cavium.com The default is to continue doing the what we have done before, but add a hook so that this can be overridden. This commit log is inappropriate. On top of that, it is already

Re: [PATCH 5/5] PCI: Add host drivers for Cavium ThunderX processors.

2015-07-16 Thread Lorenzo Pieralisi
Hi David, On Wed, Jul 15, 2015 at 05:54:45PM +0100, David Daney wrote: From: David Daney david.da...@cavium.com -ENOCOMMITLOG Signed-off-by: David Daney david.da...@cavium.com --- drivers/pci/host/Kconfig| 12 + drivers/pci/host/Makefile | 2 +

Re: [PATCH 3/5] arm64, pci: Allow RC drivers to supply pcibios_add_device() implementation.

2015-07-17 Thread Lorenzo Pieralisi
Hi David, On Thu, Jul 16, 2015 at 06:00:36PM +0100, David Daney wrote: On 07/16/2015 02:04 AM, Lorenzo Pieralisi wrote: Hi David, On Wed, Jul 15, 2015 at 05:54:43PM +0100, David Daney wrote: From: David Daney david.da...@cavium.com [...] diff --git a/arch/arm64/kernel/pci.c b/arch

Re: [PATCH v3 3/3] arm: kernel: implement cpuidle_ops with psci backend

2015-07-15 Thread Lorenzo Pieralisi
On Tue, Jul 14, 2015 at 09:41:38PM +0100, Russell King - ARM Linux wrote: [...] Yet, we're stuffing _all_ the PSCI CPU idle code into drivers/firmware/psci.c, but then stuffing the PSCI OF data structures into arch/arm. This is utterly _insane_. Ok, so we will copy the ARM64 PSCI

Re: [PATCH v3 3/3] arm: kernel: implement cpuidle_ops with psci backend

2015-07-15 Thread Lorenzo Pieralisi
On Wed, Jul 15, 2015 at 03:45:07PM +0100, Russell King - ARM Linux wrote: On Wed, Jul 15, 2015 at 02:46:03PM +0100, Lorenzo Pieralisi wrote: On Tue, Jul 14, 2015 at 09:41:38PM +0100, Russell King - ARM Linux wrote: Sorry, NAK, and end of discussion. There is nothing more to be said here

Re: Can arm64 plan to support hibernation(suspend-to-disk)in current kernel(ATF)?

2015-10-26 Thread Lorenzo Pieralisi
On Mon, Oct 26, 2015 at 05:51:53PM +0800, wangfei wrote: > Hi all, > > Is any one knew,whether mainline kernel and psci plan to support hibernation > on arm64 architecture now? Suspend-to-disk relies on PSCI SYSTEM_OFF to be implemented and does not require any additional calls in ATF. Suspend

Re: arm64: PCI: HAVE_PCI_MMAP not defined

2015-10-27 Thread Lorenzo Pieralisi
On Tue, Oct 27, 2015 at 09:11:29AM +, Vijay Mishra wrote: > Hi All, > > I see "HAVE_PCI_MMAP" is defined in arm32 but missing in arm64 support. > Is it intentional or missed out because no-body asked for it. http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/358906.html Lorenzo

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-11 Thread Lorenzo Pieralisi
On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote: [...] > >> In particular, I would like to understand, for an eg DWordIO descriptor, > >> what Range Minimum, Range Maximum and Translation Offset represent, > >> they can't mean different things depending on the SW parsing them, > >>

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-09 Thread Lorenzo Pieralisi
[CC'ing Arnd] On Mon, Nov 09, 2015 at 03:07:38PM +0100, Tomasz Nowicki wrote: > On 06.11.2015 14:22, Jiang Liu wrote: > >On 2015/11/6 20:40, Tomasz Nowicki wrote: > >>On 06.11.2015 12:46, Jiang Liu wrote: > >>>On 2015/11/6 18:37, Tomasz Nowicki wrote: > On 06.11.2015 09:52, Jiang Liu wrote: >

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-12 Thread Lorenzo Pieralisi
On Wed, Nov 11, 2015 at 09:55:37PM +0100, Arnd Bergmann wrote: > On Wednesday 11 November 2015 17:46:47 Lorenzo Pieralisi wrote: > > On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote: > > If we go with this approach though, you are not adding the offset to > > the

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-13 Thread Lorenzo Pieralisi
Please trim your emails, thanks. On Fri, Nov 13, 2015 at 01:57:30PM +0100, Tomasz Nowicki wrote: > On 12.11.2015 16:05, Jiang Liu wrote: [...] > >>>IA64 actually ignores the translation type flag and just assume it's > >>>TypeTranslation, so there may be some IA64 BIOS implementations >

Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI hostbridge init

2015-11-03 Thread Lorenzo Pieralisi
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote: [...] > menu "Kernel Features" > diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c > index b3d098b..66cc1ae 100644 > --- a/arch/arm64/kernel/pci.c > +++ b/arch/arm64/kernel/pci.c > @@ -11,12 +11,15 @@ > */ > >

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-05 Thread Lorenzo Pieralisi
On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote: > On 14.10.2015 08:29, Jiang Liu wrote: [...] > >+static void acpi_pci_root_validate_resources(struct device *dev, > >+ struct list_head *resources, > >+

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-06 Thread Lorenzo Pieralisi
On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote: > On 2015/11/6 20:40, Tomasz Nowicki wrote: > > On 06.11.2015 12:46, Jiang Liu wrote: > >> On 2015/11/6 18:37, Tomasz Nowicki wrote: > >>> On 06.11.2015 09:52, Jiang Liu wrote: > >>> Sure, ARM64 (0-16M IO space) QEMU example: > >>> DWordIO

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-11-06 Thread Lorenzo Pieralisi
On Fri, Nov 06, 2015 at 04:52:47PM +0800, Jiang Liu wrote: [...] > >>> +int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) > >>> +{ > >>> + int ret; > >>> + struct list_head *list = >resources; > >>> + struct acpi_device *device = info->bridge; > >>> + struct resource_entry

Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI hostbridge init

2015-11-03 Thread Lorenzo Pieralisi
On Wed, Oct 28, 2015 at 11:49:40AM +, liviu.du...@arm.com wrote: > On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote: [...] > > +static int __init pcibios_assign_resources(void) > > +{ > > + if (acpi_disabled) > > + return 0; > > + > > +

Re: [PATCH V1 10/11] pci, acpi: Provide generic way to assign bus domain number.

2015-11-03 Thread Lorenzo Pieralisi
On Tue, Oct 27, 2015 at 05:38:41PM +0100, Tomasz Nowicki wrote: > Architectures which support PCI_DOMAINS_GENERIC (like ARM64) > cannot call pci_bus_assign_domain_nr along ACPI PCI host bridge > initialization since this function needs valid parent device reference > to be able to retrieve domain

Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI hostbridge init

2015-11-03 Thread Lorenzo Pieralisi
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote: [...] > >-int raw_pci_write(unsigned int domain, unsigned int bus, > >-unsigned int devfn, int reg, int len, u32 val) > >+struct pci_ops pci_root_ops = { > >+.map_bus = pci_mcfg_dev_base, > >+.read =

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-10-15 Thread Lorenzo Pieralisi
On Mon, Sep 14, 2015 at 03:55:50PM +0100, Tomasz Nowicki wrote: [...] > > Well, I still have not figured out whether on arm64 the raw accessors > > required by ACPICA make sense. > > > > So either arm64 relies on the generic MCFG based raw read and writes > > or we define the global raw read and

Re: [PATCH v4 1/5] PCI: Add pci_bus_fixup_irqs().

2015-10-08 Thread Lorenzo Pieralisi
Hi Matthew, On Thu, Oct 08, 2015 at 03:07:34AM +0100, Matthew Minter wrote: > On Wednesday 07 October 2015 18:08:47 Bjorn Helgaas wrote: [...] > Yes, I had been working on this last year, and got a patchset that was tested > on arm, x86 (and amd64), and slightly tested on powerpc. However I

Re: [PATCH v4 4/5] PCI: generic: Correct, and avoid overflow, in bus_max calculation.

2015-10-08 Thread Lorenzo Pieralisi
get the start address of the ECAM register area > >for the domain that the host is part of, and that needs to be the same > >address for each host in the domain. > > > > We are agreed that it is a bad thing to do. There is disagreement > about if we should do it. >

Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()

2015-10-21 Thread Lorenzo Pieralisi
root_create() and related data > >>>structures to create PCI root bus for ACPI PCI host bridges. It will > >>>be used to kill duplicated arch specific code for IA64 and x86. It may > >>>also help ARM64 in future. > >>> > >>>Reviewed-by: Lorenzo Pierali

Re: [PATCH v2 00/17] Divorcing irqdomain and device_node

2015-10-13 Thread Lorenzo Pieralisi
gt; irq/irq-domain-fwnode-v2 Tested on AMD Supercharger (ACPI PCI+MSI), by applying dependent series [0,1] and some code soon to be posted to match gic v2m fwnode using this neat patch series :-) Tested-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> [0] https://lkml.org/lkml/2015/6/8

Re: [PATCH] PCI: Only enable IO window if supported

2015-07-08 Thread Lorenzo Pieralisi
On Wed, Jun 24, 2015 at 12:02:14AM +0100, Bjorn Helgaas wrote: On Tue, Jun 23, 2015 at 5:46 PM, Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Tue, 2015-06-02 at 15:55 +0100, Lorenzo Pieralisi wrote: While at it, do you think it is reasonable to also claim the bridge windows

Re: [PATCH] PCI: Only enable IO window if supported

2015-07-07 Thread Lorenzo Pieralisi
On Tue, Jul 07, 2015 at 04:01:45PM +0100, Guenter Roeck wrote: Hi Lorenzo, On 07/07/2015 07:40 AM, Lorenzo Pieralisi wrote: On Fri, Jun 19, 2015 at 05:24:13PM +0100, Lorenzo Pieralisi wrote: Hi Guenter, On Thu, Jun 18, 2015 at 07:01:03PM +0100, Guenter Roeck wrote: On Thu, May 28

Re: [PATCH v2 1/2] firmware: psci: move cpu_suspend handling to generic code

2015-07-08 Thread Lorenzo Pieralisi
Hi Jisheng, On Wed, Jul 08, 2015 at 01:51:07PM +0100, Jisheng Zhang wrote: Functions implemented on arm64 to suspend cpu and translate the idle state index passed by the cpu_suspend core call to a valid PSCI state are not arm64 specific and should be moved to generic code so that they can be

Re: [PATCH v2 2/2] arm: kernel: implement cpuidle_ops with psci backend

2015-07-08 Thread Lorenzo Pieralisi
On Wed, Jul 08, 2015 at 01:51:08PM +0100, Jisheng Zhang wrote: This patch implements cpuidle_ops using psci. After this patch, we can use cpuidle-arm.c with psci backend for both arm and arm64. Signed-off-by: Jisheng Zhang jszh...@marvell.com --- arch/arm/kernel/Makefile | 1 +

Re: [PATCH v3 00/15] Introducing per-device MSI domain

2015-07-09 Thread Lorenzo Pieralisi
at present). This has been tested on arm64 with GICv2m (AMD Seattle) and GICv3 ITS (FVP model). I tested it on arm64 AMD Seattle too, so FWIW: Tested-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com Patches are on top of 4.2-rc1 and available at: git://git.kernel.org/pub/scm/linux/kernel

Re: [RFC PATCH 2/3] arm: psci: enable PSCI on UP systems

2015-07-07 Thread Lorenzo Pieralisi
insertions(+), 4 deletions(-) You will have to rewrite the commit log (mostly because PSCI CPU suspend will move to drivers/firmware so it will become stale, I know what you mean but it might be unclear to others so please improve it). Patch (and intent) seems fine though: Acked-by: Lorenzo Pieralisi

Re: [RFC PATCH 3/3] arm: psci: add cpuidle_ops support

2015-07-07 Thread Lorenzo Pieralisi
On Sat, Jul 04, 2015 at 02:01:50PM +0100, Jisheng Zhang wrote: This patch implement cpuidle_ops using psci, the code is stolen from arm64. Now we can use cpuidle-arm.c for both arm and arm64. You mean cpuidle-arm.c with PSCI back-end. You will have to rewrite the commit log anyway since this

Re: [PATCH] PCI: Only enable IO window if supported

2015-07-07 Thread Lorenzo Pieralisi
On Fri, Jun 19, 2015 at 05:24:13PM +0100, Lorenzo Pieralisi wrote: Hi Guenter, On Thu, Jun 18, 2015 at 07:01:03PM +0100, Guenter Roeck wrote: On Thu, May 28, 2015 at 07:41:12AM -0500, Bjorn Helgaas wrote: I'd like res-flags to reflect the capabilities of the hardware

[RFT PATCH v3] PCI: move pci_read_bridge_bases to the generic PCI layer

2015-07-09 Thread Lorenzo Pieralisi
the PCI_PROBE_ONLY flag before reading the bridge bases. Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com Cc: Ralf Baechle r...@linux-mips.org Cc: James E.J. Bottomley j...@parisc-linux.org Cc: Michael Ellerman m...@ellerman.id.au Cc: Bjorn Helgaas bhelg...@google.com Cc: Richard Henderson r

Re: [PATCH v3 2/3] ARM: cpuidle: refine cpuidle_ops member's parameters.

2015-07-09 Thread Lorenzo Pieralisi
On Thu, Jul 09, 2015 at 09:43:04AM +0100, Jisheng Zhang wrote: On Thu, 9 Jul 2015 16:31:24 +0800 Jisheng Zhang jszh...@marvell.com wrote: As for the suspend member function, the to-be-suspended cpu is always the calling cpu itself, so the 'cpu' parameter may not be necessary, let driver

Re: ACPI: regression: Failed to initialize GIC IRQ controller

2015-07-10 Thread Lorenzo Pieralisi
On Fri, Jul 10, 2015 at 03:45:32PM +0100, Moore, Robert wrote: It's nice that someone took a sizeof() on the struct -- so, one would hope that no code actually depended on a particular value, no? Unfortunately that sizeof has been there forever (x86/ia64), ia64 code ran into a similar issue,

Re: [PATCH v3 00/15] Introducing per-device MSI domain

2015-07-10 Thread Lorenzo Pieralisi
On Thu, Jul 09, 2015 at 03:35:05PM +0100, Marc Zyngier wrote: [...] BTW, is there a reason why _all_ arm host bridges rely on pcibios_msi_controller (so pci_sys_data) instead of initializing the struct pci_bus.msi pointer to carry out the MSI controller look-up ? Probably an ordering

Re: ACPI: regression: Failed to initialize GIC IRQ controller

2015-07-10 Thread Lorenzo Pieralisi
On Fri, Jul 10, 2015 at 03:28:36PM +0100, Moore, Robert wrote: -Original Message- From: Ming Lei [mailto:ming@canonical.com] Sent: Friday, July 10, 2015 12:46 AM To: Moore, Robert; Zheng, Lv; Wysocki, Rafael J Cc: Linux Kernel Mailing List; linux-arm-kernel; Thomas

Re: ACPI: regression: Failed to initialize GIC IRQ controller

2015-07-10 Thread Lorenzo Pieralisi
On Fri, Jul 10, 2015 at 04:47:34PM +0100, Moore, Robert wrote: -Original Message- From: Lorenzo Pieralisi [mailto:lorenzo.pieral...@arm.com] Sent: Friday, July 10, 2015 8:18 AM To: Moore, Robert Cc: Ming Lei; Zheng, Lv; Wysocki, Rafael J; Linux Kernel Mailing List; linux

Re: [PATCH] ACPI / ARM64: Get configuration base address of ECAM via ACPI MCFG table

2015-08-28 Thread Lorenzo Pieralisi
Hi Dennis, You should CC linux-...@vger.kernel.org and the PCI subsystem maintainer next time. On Fri, Aug 28, 2015 at 01:49:23PM +0100, Dennis Chen wrote: This patch will fall back to ACPI MCFG table if _CBA method fails to get the configuration base address of ECAM. Firmware on ARM platform

Re: [PATCH] x86, acpi: Handle lapic/x2apic entries in MADT

2015-08-26 Thread Lorenzo Pieralisi
Hi Lukasz, On Wed, Aug 26, 2015 at 11:43:04AM +0100, Marc Zyngier wrote: Hi Lukasz, On 26/08/15 08:04, Anaczkowski, Lukasz wrote: On Monday, August 3, 2015 8:26 PM Lukasz Anaczkowski lukasz.anaczkow...@intel.com wrote: v2: Fixed ARM64 syntax error Hi Marc, Does this patch

Re: [PATCH] x86, arm64, acpi: Handle lapic/x2apic entries in MADT

2015-08-27 Thread Lorenzo Pieralisi
On Wed, Aug 26, 2015 at 06:49:29PM +0100, Lukasz Anaczkowski wrote: [...] diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c index 2e19189..d5c9a1b 100644 --- a/drivers/acpi/tables.c +++ b/drivers/acpi/tables.c @@ -214,27 +214,45 @@ void acpi_table_print_madt_entry(struct

Re: [PATCH] ACPI / ARM64: Get configuration base address of ECAM via ACPI MCFG table

2015-09-01 Thread Lorenzo Pieralisi
On Mon, Aug 31, 2015 at 06:51:58AM +0100, Dennis Chen wrote: > On Fri, Aug 28, 2015 at 03:39:43PM +0100, Lorenzo Pieralisi wrote: > > Hi Dennis, > > > > You should CC linux-...@vger.kernel.org and the PCI subsystem > > maintainer next time. > > >

Re: [PATCH 01/11] ARM64 / PCI: introduce struct pci_controller for ACPI

2015-09-07 Thread Lorenzo Pieralisi
On Mon, Sep 07, 2015 at 05:14:22AM +0100, Ganapatrao Kulkarni wrote: > Hi Hanjun, > > On Wed, May 27, 2015 at 1:51 PM, Hanjun Guo wrote: > > Hi Liviu, > > > > On 2015???05???27??? 01:20, Jiang Liu wrote: > >> > >> On 2015/5/27 0:58, Liviu Dudau wrote: > >>> > >>> On Tue,

Re: [PATCH 1/5] acpi: Add basic device probing infrastructure

2015-09-07 Thread Lorenzo Pieralisi
[+M.Salter] On Fri, Sep 04, 2015 at 06:06:48PM +0100, Marc Zyngier wrote: > IRQ controllers and timers are the two types of device the kernel > requires before being able to use the device driver model. > > ACPI so far lacks a proper probing infrastructure similar to the one > we have with DT,

Re: [PATCH v6 3/6] pci:host: Add Altera PCIe host controller driver

2015-09-08 Thread Lorenzo Pieralisi
On Fri, Sep 04, 2015 at 09:29:14AM +0100, Ley Foon Tan wrote: > On Wed, Sep 2, 2015 at 12:33 AM, Lorenzo Pieralisi > <lorenzo.pieral...@arm.com> wrote: [...] > > > +static bool altera_pcie_valid_config(struct altera_pcie *pcie, > > > +

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-09-08 Thread Lorenzo Pieralisi
Hi Tomasz, On Mon, Sep 07, 2015 at 10:59:44AM +0100, Tomasz Nowicki wrote: > On 31.08.2015 13:01, Tomasz Nowicki wrote: > > On 08.06.2015 17:14, Lorenzo Pieralisi wrote: > >> On Mon, Jun 08, 2015 at 03:57:38AM +0100, Hanjun Guo wrote: > >> > >> [...] &g

Re: [PATCH v6 3/6] pci:host: Add Altera PCIe host controller driver

2015-09-01 Thread Lorenzo Pieralisi
On Tue, Sep 01, 2015 at 11:30:05AM +0100, Ley Foon Tan wrote: [...] > +static void altera_pcie_retrain(struct pci_dev *dev) > +{ > + u16 linkcap, linkstat; > + > + /* > +* Set the retrain bit if the PCIe rootport support > 2.5GB/s, but > +* current speed is 2.5 GB/s.

Re: [PATCH 2/2] x86, acpi: Handle apic/x2apic entries in MADT in correct order

2015-09-09 Thread Lorenzo Pieralisi
On Wed, Sep 09, 2015 at 10:30:18AM +0100, Lukasz Anaczkowski wrote: > ACPI specifies the following rules when listing APIC IDs: > (1) Boot processor is listed first > (2) For multi-threaded processors, BIOS should list the first logical > processor of each of the individual multi-threaded

Re: [PATCH 2/2] x86, acpi: Handle apic/x2apic entries in MADT in correct order

2015-09-09 Thread Lorenzo Pieralisi
On Wed, Sep 09, 2015 at 03:27:47PM +0100, Anaczkowski, Lukasz wrote: > -Original Message- > From: Lorenzo Pieralisi [mailto:lorenzo.pieral...@arm.com] > Sent: Wednesday, September 9, 2015 3:56 PM > > > On Wed, Sep 09, 2015 at 10:30:18AM +0100, Lukasz Anaczkowski wrote:

Re: [PATCH 4/6] PCI: generic: Correct, and avoid overflow, in bus_max calculation.

2015-09-16 Thread Lorenzo Pieralisi
On Wed, Sep 16, 2015 at 11:41:53AM +0100, Will Deacon wrote: [...] > > Here is the current code: > > > > >> bus_range = pci->cfg.bus_range; > > >> for (busn = bus_range->start; busn <= bus_range->end; ++busn) { > > >> u32 idx = busn - bus_range->start; > > > > The index is offset by

Re: [PATCH 2/6] PCI: generic: Only fixup irqs for bus we are creating.

2015-09-16 Thread Lorenzo Pieralisi
On Tue, Sep 15, 2015 at 06:49:24PM +0100, David Daney wrote: > On 09/15/2015 10:36 AM, Will Deacon wrote: > > Hi David, > > > > On Sat, Sep 12, 2015 at 12:21:55AM +0100, David Daney wrote: > >> From: David Daney > >> > >> Use pci_walk_bus() to restrict the fixup irq

Re: [PATCH] arm64: add cpu_idle tracepoints to arch_cpu_idle

2015-09-16 Thread Lorenzo Pieralisi
On Wed, Sep 16, 2015 at 03:23:21PM +0100, Jisheng Zhang wrote: > Currently, if cpuidle is disabled or not supported, powertop reports > zero wakeups and zero events. This is due to the cpu_idle tracepoints > are missing. > > This patch is to make cpu_idle tracepoints always available even if >

Re: [PATCH] arm64: add cpu_idle tracepoints to arch_cpu_idle

2015-09-16 Thread Lorenzo Pieralisi
On Wed, Sep 16, 2015 at 04:11:05PM +0100, Jisheng Zhang wrote: > Dear Lorenzo, > > On Wed, 16 Sep 2015 22:53:12 +0800 > Jisheng Zhang <jszh...@marvell.com> wrote: > > > Dear Lorenzo, > > > > On Wed, 16 Sep 2015 15:47:38 +0100 > > Lorenz

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-09-11 Thread Lorenzo Pieralisi
On Wed, Sep 09, 2015 at 02:47:55PM +0100, Tomasz Nowicki wrote: [...] > > I think (but I am happy to be corrected) that the map_bus() hook > > (ie that's why struct pci_bus is required in eg pci_generic_config_write) > > is there to ensure that when the generic accessors are called > > a) we

Re: [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory

2015-09-14 Thread Lorenzo Pieralisi
On Fri, Sep 11, 2015 at 01:35:36PM +0100, Tomasz Nowicki wrote: > On 11.09.2015 13:20, Lorenzo Pieralisi wrote: [...] > >>> With that in place using raw_pci_write/read or the generic accessors > >>> becomes almost identical, with code requiring the pci_bus to be >

Re: [PATCH v3 1/7] acpi: Add early device probing infrastructure

2015-09-29 Thread Lorenzo Pieralisi
| 39 +++ > include/asm-generic/vmlinux.lds.h | 10 ++ > include/linux/acpi.h | 66 > +++ Reviewed-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> -- To unsubscribe from this list: send the line "uns

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