[PATCH v5 14/17] phy: Add USB speed related PHY modes

of wakeup events for detection. E.g. QUSB2 PHY monitors DP/DM line state depending on whether speed is LS or FS/HS to detect resume. Similarly QMP USB3 PHY in SS mode should monitor RX terminations attach/detach and LFPS events depending on SSPHY is active or not. Signed-off-by: Manu Gautam <m

[PATCH v5 14/17] phy: Add USB speed related PHY modes

of wakeup events for detection. E.g. QUSB2 PHY monitors DP/DM line state depending on whether speed is LS or FS/HS to detect resume. Similarly QMP USB3 PHY in SS mode should monitor RX terminations attach/detach and LFPS events depending on SSPHY is active or not. Signed-off-by: Manu Gautam

[PATCH v5 16/17] phy: qcom-qmp: Add support for runtime PM

Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c

[PATCH v5 16/17] phy: qcom-qmp: Add support for runtime PM

Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 177

[PATCH v5 17/17] phy: add SPDX identifier to QMP and QUSB2 PHY drivers

The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c | 11 +-- drivers/phy/qualcomm/phy-qcom-qusb2.c | 10 +- 2 files chan

[PATCH v5 17/17] phy: add SPDX identifier to QMP and QUSB2 PHY drivers

The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 11 +-- drivers/phy/qualcomm/phy-qcom-qusb2.c | 10 +- 2 files changed, 2 insertions(+), 19

[PATCH v5 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam <mgau...@codeaurora.

[PATCH v5 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam --- drivers/phy

[PATCH v5 15/17] phy: qcom-qusb2: Add support for runtime PM

Disable clocks and enable DP/DM wakeup interrupts when suspending PHY. Core driver should notify speed to PHY driver to enable appropriate DP/DM wakeup interrupts polarity in suspend state. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qusb2.c

[PATCH v5 15/17] phy: qcom-qusb2: Add support for runtime PM

Disable clocks and enable DP/DM wakeup interrupts when suspending PHY. Core driver should notify speed to PHY driver to enable appropriate DP/DM wakeup interrupts polarity in suspend state. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 176

[PATCH v5 09/17] phy: qcom-qusb2: Add support for QUSB2 V2 version

Use register layout to add additional registers present on QUSB2 PHY V2 version for PHY initialization. Other than new registers on V2, following two register's offset and bit definitions are different: POWERDOWN control and PLL_STATUS. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> Re

[PATCH v5 10/17] phy: qcom-qmp: Move register offsets to header file

New revision (v3) of QMP PHY uses different offsets for almost all of the registers. Hence, move these definitions to header file so that updated offsets can be added for QMP v3. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gau...@codea

[PATCH v5 11/17] phy: qcom-qmp: Add register offsets for QMP V3 PHY

Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.h | 149 1 file changed, 149 insertions(+) diff --git a/d

[PATCH v5 09/17] phy: qcom-qusb2: Add support for QUSB2 V2 version

Use register layout to add additional registers present on QUSB2 PHY V2 version for PHY initialization. Other than new registers on V2, following two register's offset and bit definitions are different: POWERDOWN control and PLL_STATUS. Signed-off-by: Manu Gautam Reviewed-by: Vivek Gautam

[PATCH v5 10/17] phy: qcom-qmp: Move register offsets to header file

New revision (v3) of QMP PHY uses different offsets for almost all of the registers. Hence, move these definitions to header file so that updated offsets can be added for QMP v3. Signed-off-by: Manu Gautam Reviewed-by: Vivek Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 119

[PATCH v5 11/17] phy: qcom-qmp: Add register offsets for QMP V3 PHY

Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.h | 149 1 file changed, 149 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom

[PATCH v5 07/17] phy: qcom-qusb2: Add support for different register layouts

New version of QUSB2 PHY has some registers offset changed. Add support to have register layout for a target and update the same in phy_configuration. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- drivers/phy/qualc

[PATCH v5 07/17] phy: qcom-qusb2: Add support for different register layouts

New version of QUSB2 PHY has some registers offset changed. Add support to have register layout for a target and update the same in phy_configuration. Signed-off-by: Manu Gautam Reviewed-by: Vivek Gautam --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 149 +- 1 file

[PATCH v5 04/17] phy: qcom-qusb2: Power-on PHY before initialization

poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++---

[PATCH v5 06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset

Driver is currently performing PHY reset after starting SERDES/PCS. As per hardware datasheet reset must be done before starting PHY. Hence, update the sequence. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++--- 1 file changed, 3 inse

[PATCH v5 04/17] phy: qcom-qusb2: Power-on PHY before initialization

poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam Reviewed-by: Vivek Gautam --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++ 1 file changed, 15 insertions(+), 32 deletions(-) diff

[PATCH v5 06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset

Driver is currently performing PHY reset after starting SERDES/PCS. As per hardware datasheet reset must be done before starting PHY. Hence, update the sequence. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff

[PATCH v5 03/17] phy: qcom-qmp: Power-on PHY before initialization

PHY and some core drivers e.g. PCIe follow specific sequence after phy_init() that mandates pipe_clk to be enabled from power_on() only. On similar lines move clk_enable from init() to com_init() which executes once for multi lane PHYs. Signed-off-by: Manu Gautam <mgau...@codeaurora.

[PATCH v5 03/17] phy: qcom-qmp: Power-on PHY before initialization

PHY and some core drivers e.g. PCIe follow specific sequence after phy_init() that mandates pipe_clk to be enabled from power_on() only. On similar lines move clk_enable from init() to com_init() which executes once for multi lane PHYs. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy

[PATCH v5 02/17] phy: qcom-qmp: Adapt to clk_bulk_* APIs

From: Vivek Gautam <vivek.gau...@codeaurora.org> Move from using array of clocks to clk_bulk_* APIs that are available now. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/p

[PATCH v5 02/17] phy: qcom-qmp: Adapt to clk_bulk_* APIs

From: Vivek Gautam Move from using array of clocks to clk_bulk_* APIs that are available now. Signed-off-by: Vivek Gautam Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 50 - 1 file changed, 16 insertions(+), 34 deletions(-) diff

[PATCH v5 01/17] phy: qcom-qmp: Fix phy pipe clock gating

/0x12c [ 33.381776] [] ret_from_fork+0x10/0x50 Fix this by disabling it as the first thing in phy_exit(). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Signed-off-by: Manu Gautam <mgau...@codeaur

[PATCH v5 01/17] phy: qcom-qmp: Fix phy pipe clock gating

Fix this by disabling it as the first thing in phy_exit(). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by: Vivek Gautam Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletion

Re: [RESEND PATCH 1/3] usb: dwc3: Don't reinitialize core during host bus-suspend/resume

Hi Roger, On 1/15/2018 9:10 PM, Roger Quadros wrote: > Hi Manu, [snip] >> I think it will be better to separate runtime_suspend and pm_suspend >> handling for >> host mode in dwc3. Powering offf/on PHYs and dwc3_core_exit/init across >> system >> susp

Re: [RESEND PATCH 1/3] usb: dwc3: Don't reinitialize core during host bus-suspend/resume

Hi Roger, On 1/15/2018 9:10 PM, Roger Quadros wrote: > Hi Manu, [snip] >> I think it will be better to separate runtime_suspend and pm_suspend >> handling for >> host mode in dwc3. Powering offf/on PHYs and dwc3_core_exit/init across >> system >> susp

Re: [PATCH v4 05/16] phy: qcom-qmp: Fix PHY block reset sequence

Hi Vivek, On 1/12/2018 2:14 PM, Vivek Gautam wrote: > On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam <mgau...@codeaurora.org> wrote: >> PHY block or asynchronous reset requires signal >> to be asserted before de-asserting. Driver is only >> de-asserting signal which is

Re: [PATCH v4 05/16] phy: qcom-qmp: Fix PHY block reset sequence

Hi Vivek, On 1/12/2018 2:14 PM, Vivek Gautam wrote: > On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote: >> PHY block or asynchronous reset requires signal >> to be asserted before de-asserting. Driver is only >> de-asserting signal which is already low, hence >> rese

Re: [RESEND PATCH 1/3] usb: dwc3: Don't reinitialize core during host bus-suspend/resume

Hi Felipe, On 1/11/2018 1:44 PM, Felipe Balbi wrote: > Hi, > > Manu Gautam <mgau...@codeaurora.org> writes: >>> On 27/09/17 14:19, Manu Gautam wrote: >>>> Driver powers-off PHYs and reinitializes DWC3 core and gadget on >>>> resume. While this

Re: [RESEND PATCH 1/3] usb: dwc3: Don't reinitialize core during host bus-suspend/resume

Hi Felipe, On 1/11/2018 1:44 PM, Felipe Balbi wrote: > Hi, > > Manu Gautam writes: >>> On 27/09/17 14:19, Manu Gautam wrote: >>>> Driver powers-off PHYs and reinitializes DWC3 core and gadget on >>>> resume. While this works fine for gadget

Re: [RESEND PATCH 1/3] usb: dwc3: Don't reinitialize core during host bus-suspend/resume

Hi, On 1/10/2018 6:18 PM, Roger Quadros wrote: > Hi Manu, > > On 27/09/17 14:19, Manu Gautam wrote: >> Driver powers-off PHYs and reinitializes DWC3 core and gadget on >> resume. While this works fine for gadget mode but in host >> mode there is not re-initial

Re: [RESEND PATCH 1/3] usb: dwc3: Don't reinitialize core during host bus-suspend/resume

Hi, On 1/10/2018 6:18 PM, Roger Quadros wrote: > Hi Manu, > > On 27/09/17 14:19, Manu Gautam wrote: >> Driver powers-off PHYs and reinitializes DWC3 core and gadget on >> resume. While this works fine for gadget mode but in host >> mode there is not re-initial

Re: [PATCH v4 14/16] phy: Add USB speed related PHY modes

Hi, On 1/5/2018 4:31 PM, Kishon Vijay Abraham I wrote: >> +enum phy_mode phy_get_mode(struct phy *phy) >> +{ >> +enum phy_mode ret; >> + >> +if (!phy || !phy->ops->get_mode) >> +return PHY_MODE_INVALID; >> + >> +mutex_lock(>mutex); >> +ret = phy->ops->get_mode(phy); >

Re: [PATCH v4 14/16] phy: Add USB speed related PHY modes

Hi, On 1/5/2018 4:31 PM, Kishon Vijay Abraham I wrote: >> +enum phy_mode phy_get_mode(struct phy *phy) >> +{ >> +enum phy_mode ret; >> + >> +if (!phy || !phy->ops->get_mode) >> +return PHY_MODE_INVALID; >> + >> +mutex_lock(>mutex); >> +ret = phy->ops->get_mode(phy); >

[PATCH v4 05/16] phy: qcom-qmp: Fix PHY block reset sequence

that as well. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 1

[PATCH v4 05/16] phy: qcom-qmp: Fix PHY block reset sequence

that as well. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 1b82cea..ecff261 100644 --- a/drivers

[PATCH v4 14/16] phy: Add USB speed related PHY modes

of wakeup events for detection. E.g. QUSB2 PHY monitors DP/DM line state depending on whether speed is LS or FS/HS to detect resume. Similarly QMP USB3 PHY in SS mode should monitor RX terminations attach/detach and LFPS events depending on SSPHY is active or not. Signed-off-by: Manu Gautam <m

[PATCH v4 14/16] phy: Add USB speed related PHY modes

of wakeup events for detection. E.g. QUSB2 PHY monitors DP/DM line state depending on whether speed is LS or FS/HS to detect resume. Similarly QMP USB3 PHY in SS mode should monitor RX terminations attach/detach and LFPS events depending on SSPHY is active or not. Signed-off-by: Manu Gautam

[PATCH v4 16/16] phy: qcom-qmp: Add support for runtime PM

Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c

[PATCH v4 16/16] phy: qcom-qmp: Add support for runtime PM

Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 186

[PATCH v4 15/16] phy: qcom-qusb2: Add support for runtime PM

Disable clocks and enable DP/DM wakeup interrupts when suspending PHY. Core driver should notify speed to PHY driver to enable appropriate DP/DM wakeup interrupts polarity in suspend state. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qusb2.c

[PATCH v4 15/16] phy: qcom-qusb2: Add support for runtime PM

Disable clocks and enable DP/DM wakeup interrupts when suspending PHY. Core driver should notify speed to PHY driver to enable appropriate DP/DM wakeup interrupts polarity in suspend state. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 184

[PATCH v4 13/16] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam <mgau...@codeaurora.

[PATCH v4 13/16] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam --- drivers/phy

[PATCH v4 11/16] phy: qcom-qmp: Add register offsets for QMP V3 PHY

Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.h | 149 1 file changed, 149 insertions(+) diff --git a/d

[PATCH v4 11/16] phy: qcom-qmp: Add register offsets for QMP V3 PHY

Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.h | 149 1 file changed, 149 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom

[PATCH v4 10/16] phy: qcom-qmp: Move register offsets to header file

New revision (v3) of QMP PHY uses different offsets for almost all of the registers. Hence, move these definitions to header file so that updated offsets can be added for QMP v3. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c

[PATCH v4 10/16] phy: qcom-qmp: Move register offsets to header file

New revision (v3) of QMP PHY uses different offsets for almost all of the registers. Hence, move these definitions to header file so that updated offsets can be added for QMP v3. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 119 +-- drivers

[PATCH v4 09/16] phy: qcom-qusb2: Add support for QUSB2 V2 version

Use register layout to add additional registers present on QUSB2 PHY V2 version for PHY initialization. Other than new registers on V2, following two register's offset and bit definitions are different: POWERDOWN control and PLL_STATUS. Signed-off-by: Manu Gautam <mgau...@codeaurora.

[PATCH v4 08/16] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version

Update generic compatible string for QUSB2 V2 PHY. This will allow all targets using QUSB2 V2 use same string. Acked-by: Rob Herring <r...@kernel.org> Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 - 1 fil

[PATCH v4 12/16] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY

Update compatible string and clock names for QMP version V3 USB PHY. Acked-by: Rob Herring <r...@kernel.org> Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-)

[PATCH v4 09/16] phy: qcom-qusb2: Add support for QUSB2 V2 version

Use register layout to add additional registers present on QUSB2 PHY V2 version for PHY initialization. Other than new registers on V2, following two register's offset and bit definitions are different: POWERDOWN control and PLL_STATUS. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy

[PATCH v4 08/16] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version

Update generic compatible string for QUSB2 V2 PHY. This will allow all targets using QUSB2 V2 use same string. Acked-by: Rob Herring Signed-off-by: Manu Gautam --- Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git

[PATCH v4 12/16] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY

Update compatible string and clock names for QMP version V3 USB PHY. Acked-by: Rob Herring Signed-off-by: Manu Gautam --- Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom

[PATCH v4 07/16] phy: qcom-qusb2: Add support for different register layouts

New version of QUSB2 PHY has some registers offset changed. Add support to have register layout for a target and update the same in phy_configuration. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 149 +-

[PATCH v4 07/16] phy: qcom-qusb2: Add support for different register layouts

New version of QUSB2 PHY has some registers offset changed. Add support to have register layout for a target and update the same in phy_configuration. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 149 +- 1 file changed, 109 insertions

[PATCH v4 06/16] phy: qcom-qmp: Move SERDES/PCS START after PHY reset

Driver is currently performing PHY reset after starting SERDES/PCS. As per hardware datasheet reset must be done before starting PHY. Hence, update the sequence. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++--- 1 file changed, 3 inse

[PATCH v4 06/16] phy: qcom-qmp: Move SERDES/PCS START after PHY reset

Driver is currently performing PHY reset after starting SERDES/PCS. As per hardware datasheet reset must be done before starting PHY. Hence, update the sequence. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff

[PATCH v4 04/16] phy: qcom-qusb2: Power-on PHY before initialization

poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++ 1 file changed, 15 insertions(+), 32 deletions(-)

[PATCH v4 01/16] phy: qcom-qmp: Fix phy pipe clock gating

/0x12c [ 33.381776] [] ret_from_fork+0x10/0x50 Fix this by disabling it as the first thing in phy_exit(). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Signed-off-by: Manu Gautam <mgau...@codeaur

[PATCH v4 04/16] phy: qcom-qusb2: Power-on PHY before initialization

poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++ 1 file changed, 15 insertions(+), 32 deletions(-) diff --git a/drivers/phy

[PATCH v4 01/16] phy: qcom-qmp: Fix phy pipe clock gating

Fix this by disabling it as the first thing in phy_exit(). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by: Vivek Gautam Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletion

[PATCH v4 03/16] phy: qcom-qmp: Power-on PHY before initialization

PHY and some core drivers e.g. PCIe follow specific sequence after phy_init() that mandates pipe_clk to be enabled from power_on() only. On similar lines move clk_enable from init() to com_init() which executes once for multi lane PHYs. Signed-off-by: Manu Gautam <mgau...@codeaurora.

[PATCH v4 02/16] phy: qcom-qmp: Adapt to clk_bulk_* APIs

From: Vivek Gautam <vivek.gau...@codeaurora.org> Move from using array of clocks to clk_bulk_* APIs that are available now. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/p

[PATCH v4 02/16] phy: qcom-qmp: Adapt to clk_bulk_* APIs

From: Vivek Gautam Move from using array of clocks to clk_bulk_* APIs that are available now. Signed-off-by: Vivek Gautam Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 50 - 1 file changed, 16 insertions(+), 34 deletions(-) diff

[PATCH v4 03/16] phy: qcom-qmp: Power-on PHY before initialization

PHY and some core drivers e.g. PCIe follow specific sequence after phy_init() that mandates pipe_clk to be enabled from power_on() only. On similar lines move clk_enable from init() to com_init() which executes once for multi lane PHYs. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/29/2017 11:58 AM, Kishon Vijay Abraham I wrote: > Hi, > > On Friday 29 December 2017 09:54 AM, Manu Gautam wrote: >> Hi, [snip] > > suggest using switch in such case.. and not all PHY drivers do specific > configurations for specific speeds. >> This loo

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/29/2017 11:58 AM, Kishon Vijay Abraham I wrote: > Hi, > > On Friday 29 December 2017 09:54 AM, Manu Gautam wrote: >> Hi, [snip] > > suggest using switch in such case.. and not all PHY drivers do specific > configurations for specific speeds. >> This loo

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/28/2017 4:34 PM, Kishon Vijay Abraham I wrote: > Hi, > [snip] > >>> I'd prefer adding modes in enum phy_mode according to speed and using >>> phy_set_mode. >> yeah, that also seems good idea. How about something like this: >> >> --- a/include/linux/phy/phy.h >> +++

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/28/2017 4:34 PM, Kishon Vijay Abraham I wrote: > Hi, > [snip] > >>> I'd prefer adding modes in enum phy_mode according to speed and using >>> phy_set_mode. >> yeah, that also seems good idea. How about something like this: >> >> --- a/include/linux/phy/phy.h >> +++

Re: [PATCH] usb: gadget: uvc:change the UVC_NUM_REQUESTS value

Hi, On 12/26/2017 8:22 AM, Lipengcheng wrote: > The value is 4, it can cache four descriptors. When streaming_interval = 1, > it can tolerate 500us. Some busy scenes, it may be more than 500us because > cpu scheduling is not timely. There will have some problems. It is better > set to eight. > >

Re: [PATCH] usb: gadget: uvc:change the UVC_NUM_REQUESTS value

Hi, On 12/26/2017 8:22 AM, Lipengcheng wrote: > The value is 4, it can cache four descriptors. When streaming_interval = 1, > it can tolerate 500us. Some busy scenes, it may be more than 500us because > cpu scheduling is not timely. There will have some problems. It is better > set to eight. > >

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi On 12/20/2017 12:47 PM, Kishon Vijay Abraham I wrote: > Hi, > [snip] >>> Why not use a notification mechanism instead of adding new APIs in phy-core. >>> This will only bloat phy-core with APIs for a particular platform. >> Do you mean notifier_chains ? >> When we have multiple instances of

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi On 12/20/2017 12:47 PM, Kishon Vijay Abraham I wrote: > Hi, > [snip] >>> Why not use a notification mechanism instead of adding new APIs in phy-core. >>> This will only bloat phy-core with APIs for a particular platform. >> Do you mean notifier_chains ? >> When we have multiple instances of

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/20/2017 11:19 AM, Kishon Vijay Abraham I wrote: > Hi, > > On Tuesday 12 December 2017 08:54 PM, Manu Gautam wrote: >> Hi, >> >> >> On 12/12/2017 5:13 PM, Kishon Vijay Abraham I wrote: >>> Hi, >>> >>> On Tuesday 21 Novem

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/20/2017 11:19 AM, Kishon Vijay Abraham I wrote: > Hi, > > On Tuesday 12 December 2017 08:54 PM, Manu Gautam wrote: >> Hi, >> >> >> On 12/12/2017 5:13 PM, Kishon Vijay Abraham I wrote: >>> Hi, >>> >>> On Tuesday 21 Novem

Re: [PATCH v3 02/16] phy: qcom-qmp: Adapt to clk_bulk_* APIs

On 12/20/2017 8:07 AM, Vivek Gautam wrote: > Hi Manu, > > [snip] > >> @@ -998,29 +992,17 @@ static int qcom_qmp_phy_reset_init(struct device *dev) >> static int qcom_qmp_phy_clk_init(struct device *dev) >> { >> struct qcom_qmp *qmp = dev_get

Re: [PATCH v3 02/16] phy: qcom-qmp: Adapt to clk_bulk_* APIs

On 12/20/2017 8:07 AM, Vivek Gautam wrote: > Hi Manu, > > [snip] > >> @@ -998,29 +992,17 @@ static int qcom_qmp_phy_reset_init(struct device *dev) >> static int qcom_qmp_phy_clk_init(struct device *dev) >> { >> struct qcom_qmp *qmp = dev_get

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/12/2017 5:13 PM, Kishon Vijay Abraham I wrote: > Hi, > > On Tuesday 21 November 2017 02:53 PM, Manu Gautam wrote: >> QCOM USB PHYs can monitor resume/remote-wakeup event in >> suspended state. However PHY driver must know current >> operational speed of

Re: [PATCH v3 14/16] phy: Add notify_speed callback

Hi, On 12/12/2017 5:13 PM, Kishon Vijay Abraham I wrote: > Hi, > > On Tuesday 21 November 2017 02:53 PM, Manu Gautam wrote: >> QCOM USB PHYs can monitor resume/remote-wakeup event in >> suspended state. However PHY driver must know current >> operational speed of

Re: [PATCH v3 07/16] phy: qcom-qusb2: Add support for different register layouts

Hi Vivek, On 12/5/2017 3:53 PM, Vivek Gautam wrote: > > > On 11/21/2017 02:53 PM, Manu Gautam wrote: >> New version of QUSB2 PHY has some registers offset changed. >> Add support to have register layout for a target and update >> the same in phy_configuration. >&

Re: [PATCH v3 07/16] phy: qcom-qusb2: Add support for different register layouts

Hi Vivek, On 12/5/2017 3:53 PM, Vivek Gautam wrote: > > > On 11/21/2017 02:53 PM, Manu Gautam wrote: >> New version of QUSB2 PHY has some registers offset changed. >> Add support to have register layout for a target and update >> the same in phy_configuration. >&

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I have important transaction for you, Please contact me with this email address: t_m...@aol.com, Regards Thomas

Re: [PATCH v3 10/16] phy: qcom-qmp: Move register offsets to header file

Hi, On 11/22/2017 10:56 PM, Stephen Boyd wrote: > On 11/21/2017 01:23 AM, Manu Gautam wrote: >> New revision (v3) of QMP PHY uses different offsets >> for almost all of the registers. Hence, move these >> definitions to header file so that updated offsets >> can be add

Re: [PATCH v3 10/16] phy: qcom-qmp: Move register offsets to header file

Hi, On 11/22/2017 10:56 PM, Stephen Boyd wrote: > On 11/21/2017 01:23 AM, Manu Gautam wrote: >> New revision (v3) of QMP PHY uses different offsets >> for almost all of the registers. Hence, move these >> definitions to header file so that updated offsets >> can be add

Re: [PATCH v3 03/16] phy: qcom-qmp: Power-on PHY before initialization

Hi, On 11/22/2017 11:33 PM, Stephen Boyd wrote: > On 11/21/2017 01:23 AM, Manu Gautam wrote: >> PHY must be powered on before turning ON clocks and >> attempting to initialize it. Driver is exposing >> separate init and power_on routines for this. >> Apparently USB dwc3

Re: [PATCH v3 03/16] phy: qcom-qmp: Power-on PHY before initialization

Hi, On 11/22/2017 11:33 PM, Stephen Boyd wrote: > On 11/21/2017 01:23 AM, Manu Gautam wrote: >> PHY must be powered on before turning ON clocks and >> attempting to initialize it. Driver is exposing >> separate init and power_on routines for this. >> Apparently USB dwc3

[PATCH v3 11/16] phy: qcom-qmp: Add register offsets for QMP V3 PHY

Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.h | 149 1 file changed, 149 insertions(+) diff --git a/d

[PATCH v3 11/16] phy: qcom-qmp: Add register offsets for QMP V3 PHY

Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.h | 149 1 file changed, 149 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom

[PATCH v3 14/16] phy: Add notify_speed callback

. Similarly QMP USB3 PHY in SS mode should monitor RX terminations attach/detach and LFPS events depending on SSPHY is active or not. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/phy-core.c | 30 ++ include/linux/phy/phy.

[PATCH v3 14/16] phy: Add notify_speed callback

. Similarly QMP USB3 PHY in SS mode should monitor RX terminations attach/detach and LFPS events depending on SSPHY is active or not. Signed-off-by: Manu Gautam --- drivers/phy/phy-core.c | 30 ++ include/linux/phy/phy.h | 26 ++ 2 files changed, 56

[PATCH v3 16/16] phy: qcom-qmp: Add support for runtime PM

Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam <mgau...@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c

[PATCH v3 16/16] phy: qcom-qmp: Add support for runtime PM

Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 185

[PATCH v3 13/16] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam <mgau...@codeaurora.

[PATCH v3 13/16] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam --- drivers/phy

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