Update compatible string and clock names for QMP version V3
USB PHY.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
Update compatible string and clock names for QMP version V3
USB PHY.
Acked-by: Rob Herring
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom
Disable clocks and enable DP/DM wakeup interrupts when
suspending PHY.
Core driver should notify speed to PHY driver to enable
appropriate DP/DM wakeup interrupts polarity in suspend state.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c
Disable clocks and enable DP/DM wakeup interrupts when
suspending PHY.
Core driver should notify speed to PHY driver to enable
appropriate DP/DM wakeup interrupts polarity in suspend state.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 181
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 inse
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
Use register layout to add additional registers present
on QUSB2 PHY V2 version for PHY initialization.
Other than new registers on V2, following two register's
offset and bit definitions are different: POWERDOWN control
and PLL_STATUS.
Signed-off-by: Manu Gautam <mgau...@codeaurora.
Update generic compatible string for QUSB2 V2 PHY. This will allow
all targets using QUSB2 V2 use same string.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 -
1 fil
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 --
Update generic compatible string for QUSB2 V2 PHY. This will allow
all targets using QUSB2 V2 use same string.
Acked-by: Rob Herring
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 --
1 file changed, 95 insertions
Use register layout to add additional registers present
on QUSB2 PHY V2 version for PHY initialization.
Other than new registers on V2, following two register's
offset and bit definitions are different: POWERDOWN control
and PLL_STATUS.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy
New revision (v3) of QMP PHY uses different offsets
for almost all of the registers. Hence, move these
definitions to header file so that updated offsets
can be added for QMP v3.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c
that as well.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 2
New revision (v3) of QMP PHY uses different offsets
for almost all of the registers. Hence, move these
definitions to header file so that updated offsets
can be added for QMP v3.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 119 +--
drivers
that as well.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 2f427e3..aa27757 100644
--- a/drivers
poweron callback from phy_ops and explicitly perform
this from init, similar changes needed for poweroff.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++
1 file changed, 15 insertions(+), 32 deletions(-)
poweron callback from phy_ops and explicitly perform
this from init, similar changes needed for poweroff.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++
1 file changed, 15 insertions(+), 32 deletions(-)
diff --git a/drivers/phy
poweron callback
from phy_ops and explicitly perform this from com_init,
similar changes needed for poweroff. On similar lines move
clk_enable from init to com_init which can be called once
for multi lane PHYs.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom
poweron callback
from phy_ops and explicitly perform this from com_init,
similar changes needed for poweroff. On similar lines move
clk_enable from init to com_init which can be called once
for multi lane PHYs.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 61
From: Vivek Gautam <vivek.gau...@codeaurora.org>
Move from using array of clocks to clk_bulk_* APIs that
are available now.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/p
From: Vivek Gautam
Move from using array of clocks to clk_bulk_* APIs that
are available now.
Signed-off-by: Vivek Gautam
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 50 -
1 file changed, 16 insertions(+), 34 deletions(-)
diff
/0x12c
[ 33.381776] [] ret_from_fork+0x10/0x50
Fix this by enabling pipe clock at the end of phy_init(), and disabling
it as the first thing in phy_exit().
Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org&g
Fix this by enabling pipe clock at the end of phy_init(), and disabling
it as the first thing in phy_exit().
Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Signed-off-by: Vivek Gautam
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-
Hi,
On 10/26/2017 3:31 AM, Alex Elder wrote:
> No Qualcomm SoC requires the "phy-msm-usb.c" USB phy driver support
> any more, so remove the code.
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Alex Elder
> Acked-by: Bjorn Andersson
Hi,
On 10/26/2017 3:31 AM, Alex Elder wrote:
> No Qualcomm SoC requires the "phy-msm-usb.c" USB phy driver support
> any more, so remove the code.
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Alex Elder
> Acked-by: Bjorn Andersson
> Acked-by: Andy Gross
> ---
> drivers/usb/phy/Makefile
Hi,
On 10/26/2017 3:31 AM, Alex Elder wrote:
> No Qualcomm SoC requires the "ehci-msm.c" code any more. So remove it.
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Alex Elder
> Acked-by: Bjorn Andersson
> Acked-by: Andy
Hi,
On 10/26/2017 3:31 AM, Alex Elder wrote:
> No Qualcomm SoC requires the "ehci-msm.c" code any more. So remove it.
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Alex Elder
> Acked-by: Bjorn Andersson
> Acked-by: Andy Gross
> ---
> drivers/usb/host/Makefile | 1 -
>
Hi Kishon,
Please review this so that I can re-submit patch-set based on this approach.
On 10/9/2017 1:33 PM, Manu Gautam wrote:
> Hi Kishon
>
> On 10/5/2017 2:38 PM, Manu Gautam wrote:
>> Kishon,
>> What would you suggest here?
>> Should we add new calls e.g. phy
Hi Kishon,
Please review this so that I can re-submit patch-set based on this approach.
On 10/9/2017 1:33 PM, Manu Gautam wrote:
> Hi Kishon
>
> On 10/5/2017 2:38 PM, Manu Gautam wrote:
>> Kishon,
>> What would you suggest here?
>> Should we add new calls e.g. phy
Hi Felipe,
Let me know if patches in this series look fine to you.
On 9/27/2017 4:49 PM, Manu Gautam wrote:
> Driver powers-off PHYs and reinitializes DWC3 core and gadget on
> resume. While this works fine for gadget mode but in host
> mode there is not re-initialization of host st
Hi Felipe,
Let me know if patches in this series look fine to you.
On 9/27/2017 4:49 PM, Manu Gautam wrote:
> Driver powers-off PHYs and reinitializes DWC3 core and gadget on
> resume. While this works fine for gadget mode but in host
> mode there is not re-initialization of host st
Hi,
On 10/19/2017 5:17 PM, Philipp Zabel wrote:
> From: Vivek Gautam
>
> Add support to get a list of resets available for the device.
> These resets must be kept de-asserted until the device is
> in use.
>
> Signed-off-by: Vivek Gautam
Hi,
On 10/19/2017 5:17 PM, Philipp Zabel wrote:
> From: Vivek Gautam
>
> Add support to get a list of resets available for the device.
> These resets must be kept de-asserted until the device is
> in use.
>
> Signed-off-by: Vivek Gautam
> [p.za...@pengutronix.de: switch to hidden reset control
Hi Kishon
On 10/5/2017 2:38 PM, Manu Gautam wrote:
> Hi Jack,
>
> On 9/28/2017 10:23 PM, Jack Pham wrote:
>>
>>>>>> +static int qusb2_phy_set_mode(struct phy *phy, enum phy_mode mode)
>>>>>> +{
>>>>>> +struct qusb2_
Hi Kishon
On 10/5/2017 2:38 PM, Manu Gautam wrote:
> Hi Jack,
>
> On 9/28/2017 10:23 PM, Jack Pham wrote:
>>
>>>>>> +static int qusb2_phy_set_mode(struct phy *phy, enum phy_mode mode)
>>>>>> +{
>>>>>> +struct qusb2_
Hi Jack,
On 9/28/2017 10:23 PM, Jack Pham wrote:
> Hi Manu,
>
> On Thu, Sep 28, 2017 at 09:30:38AM +0530, Manu Gautam wrote:
>> On 9/28/2017 12:46 AM, Jack Pham wrote:
>>> On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote:
>>>> On Wed, Sep 27, 2017 at
Hi Jack,
On 9/28/2017 10:23 PM, Jack Pham wrote:
> Hi Manu,
>
> On Thu, Sep 28, 2017 at 09:30:38AM +0530, Manu Gautam wrote:
>> On 9/28/2017 12:46 AM, Jack Pham wrote:
>>> On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote:
>>>> On Wed, Sep 27, 2017 at
On 9/27/2017 11:29 PM, Jack Pham wrote:
> On Wed, Sep 27, 2017 at 02:29:09PM +0530, Manu Gautam wrote:
>> QMP V3 USB3 PHY is a DP USB combo PHY with
>> dual RX/TX lanes to support type-c. There is a
>> separate block DP_COM for configuration related
>> to type-c or
On 9/27/2017 11:29 PM, Jack Pham wrote:
> On Wed, Sep 27, 2017 at 02:29:09PM +0530, Manu Gautam wrote:
>> QMP V3 USB3 PHY is a DP USB combo PHY with
>> dual RX/TX lanes to support type-c. There is a
>> separate block DP_COM for configuration related
>> to type-c or
Hi Jack,
On 9/28/2017 12:46 AM, Jack Pham wrote:
> On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote:
>> Hi Manu,
>>
>> On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote:
>>> VBUS signal coming from PHY must be asserted in device for
>>>
Hi Jack,
On 9/28/2017 12:46 AM, Jack Pham wrote:
> On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote:
>> Hi Manu,
>>
>> On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote:
>>> VBUS signal coming from PHY must be asserted in device for
>>>
) as well which results in dwc3
pm usage_count becoming negative after couple of
runtime suspend resume iterations. Fix this by
performing runtime_get/put from dwc3-pci driver only
using workqueue.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/usb/dwc3/core.c | 1 -
drive
) as well which results in dwc3
pm usage_count becoming negative after couple of
runtime suspend resume iterations. Fix this by
performing runtime_get/put from dwc3-pci driver only
using workqueue.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/core.c | 1 -
drivers/usb/dwc3/dwc3-pci.c | 29
this by not reinitializing core on suspend/resume in host mode
for HOST only and OTG/drd configurations.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/usb/dwc3/core.c | 43 ---
1 file changed, 20 insertions(+), 23 deletions(-)
diff
this by not reinitializing core on suspend/resume in host mode
for HOST only and OTG/drd configurations.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/core.c | 43 ---
1 file changed, 20 insertions(+), 23 deletions(-)
diff --git a/drivers/usb/dwc3/core.c
line is not connected to PHYs. Also, remove NULL checks
for PHY when calling phy_set_mode as PHY ops already check this.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/usb/dwc3/core.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drive
line is not connected to PHYs. Also, remove NULL checks
for PHY when calling phy_set_mode as PHY ops already check this.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/core.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb
Update generic compatible string for QUSB2 V2 PHY. This will allow
all targets using QUSB2 V2 use same string.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff
Update generic compatible string for QUSB2 V2 PHY. This will allow
all targets using QUSB2 V2 use same string.
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree
Registers offsets for QMP V3 PHY are changed from
previous versions (1/2), update same in header file.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.h | 149
1 file changed, 149 insertions(+)
diff --git a/d
Registers offsets for QMP V3 PHY are changed from
previous versions (1/2), update same in header file.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.h | 149
1 file changed, 149 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom
New revision (v3) of QMP PHY uses different offsets
for almost all of the registers. Hence, move these
definitions to header file so that updated offsets
can be added for QMP v3.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c
New revision (v3) of QMP PHY uses different offsets
for almost all of the registers. Hence, move these
definitions to header file so that updated offsets
can be added for QMP v3.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 119 +--
drivers
-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c
b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index bda1f4c..0e9d88b 100644
--- a/d
-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c
b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index bda1f4c..0e9d88b 100644
--- a/drivers/phy/qualcomm/phy-qcom
Disable clocks as part of PHY suspend. This also requires enabling
PHY autonomous mode to detect lfps/rx_det in suspend state.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 182 +++-
drivers/phy/qualcomm/ph
Disable clocks as part of PHY suspend. This also requires enabling
PHY autonomous mode to detect lfps/rx_det in suspend state.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 182 +++-
drivers/phy/qualcomm/phy-qcom-qmp.h | 3 +
2 files
lane0_power_present signal must be asserted of hardware to
operate properly in SS device mode. On some platforms where VBUS
line is not connected to SS QMP PHY there is SS_PHY_CTRL register
in QSCRATCH wrapper that can be used by software to override VBUS.
Signed-off-by: Manu Gautam <m
Disable clocks and dp/dm asynchronous interrupts from
PHY as part of runtime suspend.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 159 ++
1 file changed, 159 insertions(+)
diff --git a/drivers/phy/qualco
lane0_power_present signal must be asserted of hardware to
operate properly in SS device mode. On some platforms where VBUS
line is not connected to SS QMP PHY there is SS_PHY_CTRL register
in QSCRATCH wrapper that can be used by software to override VBUS.
Signed-off-by: Manu Gautam
---
drivers
Disable clocks and dp/dm asynchronous interrupts from
PHY as part of runtime suspend.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 159 ++
1 file changed, 159 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c
b/drivers
QMP V3 USB3 PHY is a DP USB combo PHY with
dual RX/TX lanes to support type-c. There is a
separate block DP_COM for configuration related
to type-c or DP. Add support for dp_com region
and secondary rx/tx lanes initialization.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drive
Update compatible string and clock names for QMP version V3
USB PHY.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/ph
QMP V3 USB3 PHY is a DP USB combo PHY with
dual RX/TX lanes to support type-c. There is a
separate block DP_COM for configuration related
to type-c or DP. Add support for dp_com region
and secondary rx/tx lanes initialization.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c
Update compatible string and clock names for QMP version V3
USB PHY.
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
b
Use register layout to add additional registers present
on QUSB2 PHY V2 version for PHY initialization.
Other than new registers on V2, following two register's
offset and bit definitions are different: POWERDOWN control
and PLL_STATUS.
Signed-off-by: Manu Gautam <mgau...@codeaurora.
Use register layout to add additional registers present
on QUSB2 PHY V2 version for PHY initialization.
Other than new registers on V2, following two register's
offset and bit definitions are different: POWERDOWN control
and PLL_STATUS.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 --
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 --
1 file changed, 95 insertions
poweron callback from phy_ops and explicitly perform
this from init, similar changes needed for poweroff.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++
1 file changed, 15 insertions(+), 32 deletions(-)
poweron callback from phy_ops and explicitly perform
this from init, similar changes needed for poweroff.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++
1 file changed, 15 insertions(+), 32 deletions(-)
diff --git a/drivers/phy
that as well.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 2
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 inse
that as well.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 2f427e3..aa27757 100644
--- a/drivers
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
poweron callback
from phy_ops and explicitly perform this from com_init,
similar changes needed for poweroff. On similar lines move
clk_enable from init to com_init which can be called once
for multi lane PHYs.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom
From: Vivek Gautam <vivek.gau...@codeaurora.org>
Move from using array of clocks to clk_bulk_* APIs that
are available now.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/p
poweron callback
from phy_ops and explicitly perform this from com_init,
similar changes needed for poweroff. On similar lines move
clk_enable from init to com_init which can be called once
for multi lane PHYs.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 61
From: Vivek Gautam
Move from using array of clocks to clk_bulk_* APIs that
are available now.
Signed-off-by: Vivek Gautam
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 50 -
1 file changed, 16 insertions(+), 34 deletions(-)
diff
/0x12c
[ 33.381776] [] ret_from_fork+0x10/0x50
Fix this by enabling pipe clock at the end of phy_init(), and disabling
it as the first thing in phy_exit().
Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org&g
Fix this by enabling pipe clock at the end of phy_init(), and disabling
it as the first thing in phy_exit().
Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Signed-off-by: Vivek Gautam
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-
On 7/21/2017 4:31 PM, Manu Gautam wrote:
> }
> @@ -729,19 +771,17 @@ static int qcom_qmp_phy_init(struct phy *phy)
> void __iomem *pcs = qphy->pcs;
> void __iomem *status;
> unsigned int mask, val;
> - int ret, i;
> + int ret;
>
On 7/21/2017 4:31 PM, Manu Gautam wrote:
> }
> @@ -729,19 +771,17 @@ static int qcom_qmp_phy_init(struct phy *phy)
> void __iomem *pcs = qphy->pcs;
> void __iomem *status;
> unsigned int mask, val;
> - int ret, i;
> + int ret;
>
Hi,
On 7/25/2017 1:30 PM, Baolin Wang wrote:
> This patch introduces the usb charger support based on usb phy that
> makes an enhancement to a power driver. The basic conception of the
> usb charger is that, when one usb charger is added or removed by
> reporting from the extcon device state
Hi,
On 7/25/2017 1:30 PM, Baolin Wang wrote:
> This patch introduces the usb charger support based on usb phy that
> makes an enhancement to a power driver. The basic conception of the
> usb charger is that, when one usb charger is added or removed by
> reporting from the extcon device state
Hi,
On 7/21/2017 10:54 PM, Stephen Boyd wrote:
> On 07/21/2017 04:01 AM, Manu Gautam wrote:
>> Driver can turn off clocks during runtime suspend.
>> Also, runtime suspend is not as a result of host mode
>> selective suspend then PHY can be powered off as well.
>>
&g
Hi,
On 7/21/2017 10:54 PM, Stephen Boyd wrote:
> On 07/21/2017 04:01 AM, Manu Gautam wrote:
>> Driver can turn off clocks during runtime suspend.
>> Also, runtime suspend is not as a result of host mode
>> selective suspend then PHY can be powered off as well.
>>
&g
On 7/21/2017 10:39 PM, Stephen Boyd wrote:
> On 07/21/2017 04:02 AM, Manu Gautam wrote:
>> Driver currently notifies only USB3 PHY for mode change.
>> Extend this to USB3 PHY so that driver based on the mode
>> can release system resources - clocks, regulators etc.
>>
On 7/21/2017 10:39 PM, Stephen Boyd wrote:
> On 07/21/2017 04:02 AM, Manu Gautam wrote:
>> Driver currently notifies only USB3 PHY for mode change.
>> Extend this to USB3 PHY so that driver based on the mode
>> can release system resources - clocks, regulators etc.
>>
On 7/21/2017 10:29 PM, Stephen Boyd wrote:
> On 07/21/2017 04:01 AM, Manu Gautam wrote:
>> From: Vivek Gautam <vivek.gau...@codeaurora.org>
>>
>> Pipe clock comes out of the phy and is available as long as
>> the phy is turned on. Clock controller fails to
On 7/21/2017 10:29 PM, Stephen Boyd wrote:
> On 07/21/2017 04:01 AM, Manu Gautam wrote:
>> From: Vivek Gautam
>>
>> Pipe clock comes out of the phy and is available as long as
>> the phy is turned on. Clock controller fails to gate this
>> clock after th
Hi,
On 7/24/2017 2:45 PM, Baolin Wang wrote:
> Hi Manu,
>
> On 24 July 2017 at 16:42, Manu Gautam <mgau...@codeaurora.org> wrote:
>> Hi Baolin,
>>
>>
>> On 7/24/2017 11:26 AM, Baolin Wang wrote:
>>
>>>>>> Other than what I pushed i
Hi,
On 7/24/2017 2:45 PM, Baolin Wang wrote:
> Hi Manu,
>
> On 24 July 2017 at 16:42, Manu Gautam wrote:
>> Hi Baolin,
>>
>>
>> On 7/24/2017 11:26 AM, Baolin Wang wrote:
>>
>>>>>> Other than what I pushed in my patch -
>>>>&
Hi Baolin,
On 7/24/2017 11:26 AM, Baolin Wang wrote:
Other than what I pushed in my patch -
("usb: dwc3: Don't reinitialize core during host bus-suspend/resume")
Just performing pm_request_resume or handling same in dwc3 glue
driver should be sufficient.
>>> Yes.
>>>
Hi Baolin,
On 7/24/2017 11:26 AM, Baolin Wang wrote:
Other than what I pushed in my patch -
("usb: dwc3: Don't reinitialize core during host bus-suspend/resume")
Just performing pm_request_resume or handling same in dwc3 glue
driver should be sufficient.
>>> Yes.
>>>
Driver can turn off clocks during runtime suspend.
Also, runtime suspend is not as a result of host mode
selective suspend then PHY can be powered off as well.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/ph
Driver can turn off clocks during runtime suspend.
Also, runtime suspend is not as a result of host mode
selective suspend then PHY can be powered off as well.
Signed-off-by: Manu Gautam
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index aefb853
Driver currently notifies only USB3 PHY for mode change.
Extend this to USB3 PHY so that driver based on the mode
can release system resources - clocks, regulators etc.
and can even turn off PHY during runtime suspend.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
diff --git a/drive
Driver currently notifies only USB3 PHY for mode change.
Extend this to USB3 PHY so that driver based on the mode
can release system resources - clocks, regulators etc.
and can even turn off PHY during runtime suspend.
Signed-off-by: Manu Gautam
diff --git a/drivers/usb/dwc3/core.c b/drivers
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