From: Maxime Coquelin maxime.coque...@st.com
In clk_reg_prcmu(), clk-hw.init field is assigned with a
reference local to clk_reg_prcmu() function.
This patch replaces references to clk-hw.init with calls
to __clk_get_name when called after clock registration.
This patch applies on top of v3.9
Le 03/26/2013 09:05 PM, Mike Turquette a écrit :
Quoting Maxime Coquelin (2013-03-26 07:27:15)
From: Maxime Coquelin maxime.coque...@st.com
In clk_reg_prcmu(), clk-hw.init field is assigned with a
reference local to clk_reg_prcmu() function.
This patch replaces references to clk-hw.init
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
This patch supplies I2C configuration to STiH415 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++
arch/arm/boot/dts/stih415.dtsi | 53
2 files changed, 89 insertions
This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 53
2 files changed, 88 insertions
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih41x-b2000.dtsi |9 +
arch/arm/boot/dts/stih41x-b2020.dtsi | 22 ++
2 files changed
- Use clock-names property to comply with GCF
- DT cosmetic changes reported by Lee and Gabriel
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c: busses: i2c-st: Add ST I2C controller
ARM: STi: Supply I2C configuration to STiH416 SoC
ARM: STi: Supply I2C
taking into account Stephen's comments
- Use clock-names property to comply with GCF
- DT cosmetic changes reported by Lee and Gabriel
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c: busses: i2c-st: Add ST I2C controller
ARM: STi: Supply I2C configuration
updates taking into account Stephen's comments
- Use clock-names property to comply with GCF
- DT cosmetic changes reported by Lee and Gabriel
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c: busses: i2c-st: Add ST I2C controller
ARM: STi: Supply I2C configuration
This patch supplies I2C configuration to STiH416 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 53
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih41x-b2000.dtsi |9 +
arch/arm/boot/dts/stih41x-b2020
This patch supplies I2C configuration to STiH415 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++
arch/arm/boot/dts/stih415.dtsi | 53
On 10/01/2013 10:45 PM, Stephen Warren wrote:
On 10/01/2013 04:39 AM, Maxime COQUELIN wrote:
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top
On 10/02/2013 11:02 AM, Wolfram Sang wrote:
+Optional properties :
+- i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
allowed
+ through the deglitch circuit. In units of us.
+- i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is
allowed
+
Hi Pawel,
On 10/02/2013 11:35 AM, Maxime Coquelin wrote:
On 10/02/2013 11:02 AM, Wolfram Sang wrote:
+Optional properties :
+- i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width
that is allowed
+ through the deglitch circuit. In units of us.
+- i2c-min-sda-pulse-width-us
This patch supplies I2C configuration to STiH415 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36
arch/arm/boot/dts/stih415.dtsi | 57
...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
Documentation/devicetree/bindings/i2c/i2c-st.txt | 35 ++
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile |1 +
drivers/i2c/busses/i2c-st.c
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih41x-b2000.dtsi |7 +++
arch/arm/boot/dts/stih41x-b2020.dtsi
This patch supplies I2C configuration to STiH416 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35
arch/arm/boot/dts/stih416.dtsi | 57
The goal of this series is to add I2C support to ST SoCs.
The DT definition is added for STiH415 and STiH416 SoCs on
B2000 and B2020 boards.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c: busses: i2c-st: Add ST I2C controller
ARM: STi: Supply I2C
Hi Lee,
On 09/18/2013 01:40 PM, Lee Jones wrote:
On Wed, 18 Sep 2013, Maxime COQUELIN wrote:
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque
On 09/18/2013 02:00 PM, Lee Jones wrote:
On Wed, 18 Sep 2013, Maxime COQUELIN wrote:
This patch supplies I2C configuration to STiH415 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi
On 09/18/2013 02:03 PM, Lee Jones wrote:
This patch supplies I2C configuration to STiH416 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35
arch/arm/boot/dts
Hi Srini,
On 09/18/2013 03:17 PM, Srinivas KANDAGATLA wrote:
On 18/09/13 13:46, Maxime COQUELIN wrote:
On 09/18/2013 02:03 PM, Lee Jones wrote:
This patch supplies I2C configuration to STiH416 SoC.
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Maxime Coquelin
On 09/19/2013 03:01 PM, Srinivas KANDAGATLA wrote:
On 19/09/13 08:16, Maxime COQUELIN wrote:
Hi Srini,
On 09/18/2013 03:17 PM, Srinivas KANDAGATLA wrote:
On 18/09/13 13:46, Maxime COQUELIN wrote:
On 09/18/2013 02:03 PM, Lee Jones wrote:
This patch supplies I2C configuration to STiH416 SoC
Hi Wolfram,
On 10/14/2013 02:46 PM, Maxime COQUELIN wrote:
The goal of this series is to add I2C support to ST SoCs.
The DT definition is added for STiH415 and STiH416 SoCs on
B2000 and B2020 boards.
The series has been tested working on STiH416-B2020 board.
It applies on top of v3.12-rc5
Hi Jean-Christophe,
On 10/16/2013 05:14 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
...
+
+static inline void st_i2c_set_bits(void __iomem *reg, u32 mask)
+{
+ writel(readl(reg) | mask, reg);
+}
+
+static inline void st_i2c_clr_bits(void __iomem *reg, u32 mask)
+{
+
On 10/17/2013 04:16 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 09:27 Thu 17 Oct , Maxime COQUELIN wrote:
Hi Jean-Christophe,
On 10/16/2013 05:14 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
...
+
+static inline void st_i2c_set_bits(void __iomem *reg, u32 mask)
+{
+ writel
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
specification
- Handle spurious interrupts properly
- DT binding updates taking into account Stephen's comments
- Use clock-names property to comply with GCF
- DT cosmetic changes reported by Lee and Gabriel
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih41x-b2000.dtsi |9 +
arch/arm/boot/dts/stih41x-b2020.dtsi | 22 ++
2 files changed
This patch supplies I2C configuration to STiH415 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++
arch/arm/boot/dts/stih415.dtsi | 53
2 files changed, 89 insertions
This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 53
2 files changed, 88 insertions
On 11/14/2013 06:00 PM, Wolfram Sang wrote:
On Wed, Nov 06, 2013 at 09:25:12AM +0100, Maxime COQUELIN wrote:
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST
On 11/14/2013 06:03 PM, Wolfram Sang wrote:
On Wed, Nov 06, 2013 at 09:25:13AM +0100, Maxime COQUELIN wrote:
This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
I suppose the dts patches go via arm-soc.
Yes, I think so.
Regards
Hi Linus,
On 03/12/2014 03:20 PM, Linus Walleij wrote:
On Wed, Mar 12, 2014 at 9:50 AM, Maxime COQUELIN maxime.coque...@st.com wrote:
This series adds basic support to the STMicroelectronics STiH407 SoC and its
B2120 reference board. The STiH407 is a dual-core ARM Cortex-A9 CPU aimed at
STB
On 03/14/2014 10:20 AM, Linus Walleij wrote:
On Wed, Mar 12, 2014 at 3:25 PM, Joe Perches j...@perches.com wrote:
On Wed, 2014-03-12 at 09:50 +0100, Maxime COQUELIN wrote:
This patch replaces the raw values with ARRAY_SIZE for assigning the
ninput_delays and noutput_delays fields of STiH416
can pick the right people to send patch to and avoid email
bounces.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
CC: Stuart Menefy stuart.men...@st.com
CC: Maxime Coquelin maxime.coque...@st.com
CC: Patrice Chotard patrice.chot...@st.com
---
MAINTAINERS | 12 ++--
1 file
Hi Patrice,
Could you add an overview documentation as it has been done for other
STi platforms?
See Documentation/arm/sti/stih416-overview.txt
Thanks,
Maxime
On 01/30/2014 03:55 PM, Patrice CHOTARD wrote:
From: Alexandre TORGUE alexandre.tor...@st.com
This patch adds support to STiD127
functionnalities, such as I2C and UART.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/stih407-b2120.dts | 78 +
2 files changed
and other routines to manipulate the registers only if
actually available.
In any case, for example the st_parse_syscfgs detected
an error condition but no action was made in the
st_pctl_probe_dt.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
unavailable registers
Maxime Coquelin (3):
ARM: STi: Add STiH407 SoC support
ARM: dts: Add STiH407 SoC support
ARM: dts: STiH407: Add B2120 board support
Documentation/arm/sti/stih407-overview.txt| 18 +
Documentation/devicetree/bindings/arm/sti.txt | 15 +
arch/arm/boot/dts/Makefile
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds the initial support for pinctrl based on H407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
drivers/pinctrl/pinctrl-st.c | 4
1 file changed, 4
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
arch/arm/boot/dts/stih407-clock.dtsi | 41 +++
arch/arm/boot/dts
This patch adds support to STiH407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
Documentation/arm/sti/stih407-overview.txt| 18 ++
Documentation/devicetree/bindings/arm/sti.txt | 15
This patch fixes the error returned to the i2c_transfer function
to -EAGAIN in case of arbitratin lost, so that the retry mechanism
can be used.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
drivers/i2c/busses/i2c-st.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Sylwester,
I like the principle of your implementation, but I have two questions:
1 - How can we manage PM with this solution, as the parent/rate will be
set only once at probe time?
2 - How to set the parent of a parent clock (which can be shared with
other devices)? Same
Hi Linus
On 03/07/2014 04:11 AM, Linus Walleij wrote:
On Fri, Feb 28, 2014 at 8:17 PM, Maxime COQUELIN maxime.coque...@st.com wrote:
This series adds basic support to the STMicroelectronics STiH407 SoC and its
B2120 reference board. The STiH407 is a dual-core ARM Cortex-A9 CPU aimed at
STB
On 03/07/2014 04:10 AM, Linus Walleij wrote:
On Fri, Feb 28, 2014 at 8:17 PM, Maxime COQUELIN maxime.coque...@st.com wrote:
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds a new logic inside the st pinctrl to manage
an unsupported scenario: some sysconfig are not available
functionnalities, such as I2C and UART.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/stih407-b2120.dts | 78 +
2 files changed
and other routines to manipulate the registers only if
actually available.
In any case, for example the st_parse_syscfgs detected
an error condition but no action was made in the
st_pctl_probe_dt.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds the initial support for pinctrl based on H407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
drivers/pinctrl/pinctrl-st.c | 4
1 file changed, 4
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
arch/arm/boot/dts/stih407-clock.dtsi | 41 +++
arch/arm/boot/dts
This patch adds support to STiH407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
Documentation/arm/sti/stih407-overview.txt| 18 ++
Documentation/devicetree/bindings/arm/sti.txt | 15
- Rebased ARM patches to arm_soc/for-next
Giuseppe Cavallaro (2):
pinctrl: st: add pinctrl support for the STiH407 SoC
pinctrl: st: Enhance the controller to manage unavailable registers
Maxime Coquelin (3):
ARM: STi: Add STiH407 SoC support
ARM: dts: Add STiH407 SoC support
ARM
Hi Srini,
On 03/07/2014 11:41 AM, srinivas kandagatla wrote:
Hi Peppe/Maxime,
I missed a comment... :-)
On 07/03/14 09:41, Maxime COQUELIN wrote:
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds a new logic inside the st pinctrl to manage
an unsupported scenario: some
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds the initial support for pinctrl based on H407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
drivers/pinctrl/pinctrl-st.c | 17 +
1 file
support for the STiH407 SoC
Maxime Coquelin (3):
ARM: STi: Add STiH407 SoC support
ARM: dts: Add STiH407 SoC support
ARM: dts: STiH407: Add B2120 board support
Documentation/arm/sti/stih407-overview.txt| 18 +
Documentation/devicetree/bindings/arm/sti.txt | 15 +
arch/arm/boot/dts
functionnalities, such as I2C and UART.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/stih407-b2120.dts | 78 +
2 files changed
This patch adds support to STiH407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
Documentation/arm/sti/stih407-overview.txt| 18 ++
Documentation/devicetree/bindings/arm/sti.txt | 15
and other routines to manipulate the registers only if
actually available.
In any case, for example the st_parse_syscfgs detected
an error condition but no action was made in the
st_pctl_probe_dt.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
arch/arm/boot/dts/stih407-clock.dtsi | 41 +++
arch/arm/boot/dts
this the patch also reviews the st_parse_syscfgs
and other routines to manipulate the registers only if
actually available.
In any case, for example the st_parse_syscfgs detected
an error condition but no action was made in the
st_pctl_probe_dt.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed
On 03/10/2014 03:44 PM, Lee Jones wrote:
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds the initial support for pinctrl based on H407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
SOBs should be in order
On 03/10/2014 01:28 PM, Lee Jones wrote:
On Fri, 07 Mar 2014, Maxime COQUELIN wrote:
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro
Hi Lee,
On 03/11/2014 11:22 AM, Lee Jones wrote:
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to rev E board of B2020 which has few minor
changes :
PHY reset PIO (Change from PIO30 to PIO07)
Power LED(Green) Control(Change from PIO47 to PIO13)
On 03/11/2014 11:22 AM, Lee Jones wrote:
At the moment we're relying on inheriting them from DTSI files which
we're including Ideally we should be specifying these for ourselves.
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/stih416-b2020-revE.dts | 1 +
1 file
On 03/11/2014 09:18 AM, Maxime Coquelin wrote:
On 03/10/2014 10:17 AM, Lee Jones wrote:
From: Giuseppe Cavallaro peppe.cavall...@st.com
This patch adds a new logic inside the st pinctrl to manage
an unsupported scenario: some sysconfig are not available!
This is the case of STiH407 where
On 03/11/2014 12:23 PM, Lee Jones wrote:
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to rev E board of B2020 which has few minor
changes :
PHY reset PIO (Change from PIO30 to PIO07)
Power LED(Green) Control(Change from PIO47 to PIO13)
I
Sorry, I missed this one.
On 03/10/2014 01:34 PM, Lee Jones wrote:
This patch adds support to STiH407 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
---
Documentation/arm/sti/stih407-overview.txt| 18
This patch adds support to STiH407 SoC.
Acked-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
Documentation/arm/sti/stih407-overview.txt| 18 ++
Documentation
functionnalities, such as I2C and UART.
Acked-by: Giuseppe Cavallaro peppe.cavall...@st.com
Acked-by: Lee Jones lee.jo...@linaro.org
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/Makefile | 3 +-
arch
Cavallaro peppe.cavall...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
drivers/pinctrl/pinctrl-st.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c
index 7073eaf..39cddaa 100644
--- a/drivers/pinctrl
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
drivers/pinctrl/pinctrl-st.c | 104 +--
1 file changed, 61 insertions(+), 43 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Acked-by: Giuseppe Cavallaro peppe.cavall...@st.com
Acked-by: Lee Jones lee.jo...@linaro.org
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Maxime Coquelin
This patch replaces the raw values with ARRAY_SIZE for assigning the
ninput_delays and noutput_delays fields of STiH416's st_pctl_data struct.
CC: Lee Jones lee.jo...@linaro.org
Acked-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
drivers
- Rebased pinctrl patches to linux-pinctrl/devel
- Rebased ARM patches to arm_soc/for-next
Giuseppe Cavallaro (2):
pinctrl: st: Enhance the controller to manage unavailable registers
pinctrl: st: add pinctrl support for the STiH407 SoC
Maxime Coquelin (4):
ARM: STi: Add STiH407 SoC
Hi Paul,
On 02/16/2014 08:05 PM, Paul Bolle wrote:
The Kconfig symbols SOC_STIH415 and SOC_STIH416 were added in v3.11.
They have never been used. They default to y but nothing cares. They
can safely be removed.
This is going to be used by the reset controller series from Srinivas:
Hi Philipp,
On 02/07/2014 01:54 PM, srinivas kandagatla wrote:
Hi Philipp,
Thankyou for looking at the patches.
On 05/02/14 09:28, Philipp Zabel wrote:
Hi Srinivas,
...
the patchset looks good to me for the soft resets. But for the powerdown
bits I am wondering whether the reset
Hi Mike,
Did you have a look at this series?
If patch 1 gets accepted, should it also be submitted to the stable
branches?
Thanks,
Maxime
On 01/29/2014 05:24 PM, Maxime COQUELIN wrote:
Hi Mike,
First patch fixes round_rate for power-of-two and table-based dividers when
Hi Mike,
Did you have a look at this series?
If patch 1 gets accepted, should it also be submitted to the stable
branches?
Thanks,
Maxime
ps: Mail resent because our company mail server IP is blocked by Spamhaus.
On 01/29/2014 05:24 PM, Maxime COQUELIN wrote:
Hi Mike,
First
Could you please split this patch in two ?
1 - stih416-pinctrl.dtsi and stih416.dtsi
2 - stih41x-b2020.dtsi and stih41x-b2020x.dtsi
Once these changes done, you can add
Acked-by: Maxime Coquelin maxime.coque...@st.com
Thanks,
Maxime
4 files changed, 55 insertions(+)
create
On 03/20/2014 01:42 PM, Sylwester Nawrocki wrote:
Hi Maxime,
On 06/03/14 14:45, Maxime Coquelin wrote:
Hi Sylwester,
I like the principle of your implementation, but I have two questions:
1 - How can we manage PM with this solution, as the parent/rate will be
set only once
Hi Mike,
On 03/21/2014 02:45 AM, Mike Turquette wrote:
Quoting Sylwester Nawrocki (2014-03-20 05:42:33)
Hi Maxime,
On 06/03/14 14:45, Maxime Coquelin wrote:
Hi Sylwester,
I like the principle of your implementation, but I have two questions:
1 - How can we manage PM
On 10/28/2013 08:25 PM, Kumar Gala wrote:
On Oct 14, 2013, at 7:46 AM, Maxime COQUELIN wrote:
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top
Hi Wolfram,
On 11/01/2013 12:16 PM, Wolfram Sang wrote:
Hi,
...
diff --git a/Documentation/devicetree/bindings/i2c/i2c-st.txt
b/Documentation/devicetree/bindings/i2c/i2c-st.txt
new file mode 100644
index 000..8b2fd0b
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-st.txt
On 10/18/2013 10:22 AM, Srinivas KANDAGATLA wrote:
On 17/10/13 15:49, Lucas Stach wrote:
Am Donnerstag, den 17.10.2013, 15:30 +0100 schrieb srinivas kandagatla:
[...]
Sorry to ask this but, Where is this requirement coming from?
I have not spotted any thing as such in ePAPR specs.
All the
This patch supplies I2C configuration to STiH415 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 ++
arch/arm/boot/dts/stih415.dtsi | 53
2 files changed, 89 insertions
This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih41x-b2000.dtsi |9 +
arch/arm/boot/dts/stih41x-b2020.dtsi | 22 ++
2 files changed
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
- Handle spurious interrupts properly
- DT binding updates taking into account Stephen's comments
- Use clock-names property to comply with GCF
- DT cosmetic changes reported by Lee and Gabriel
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c: busses: i2c-st: Add
This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: Maxime Coquelin maxime.coque...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 53
2 files changed, 88 insertions
Hi Wolfram,
On 10/08/2013 06:42 PM, Maxime COQUELIN wrote:
The goal of this series is to add I2C support to ST SoCs.
The DT definition is added for STiH415 and STiH416 SoCs on
B2000 and B2020 boards.
The series has been tested working on STiH416-B2020 board.
It applies on top of v3.12-rc4
On 10/10/2013 02:33 PM, Stephen GALLIMORE wrote:
-Original Message-
From: Maxime COQUELIN [mailto:maxime.coque...@st.com]
Sent: 08 October 2013 17:43
.
+
+i2c@fed4 {
+compatible = st,comms-ssc-i2c;
+reg
On 10/10/2013 12:03 PM, Wolfram Sang wrote:
Changes since v3:
- Switch back to vendor specific DT properties regarding the anti-glitch
filter configuration, as this IP is the only one having such a filter.
Do you agree to keep these properties vendor-specifics?
My preference is
On 09/23/2013 11:06 PM, Stephen Warren wrote:
On 09/18/2013 04:01 AM, Maxime COQUELIN wrote:
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top
On 09/24/2013 05:59 PM, Wolfram Sang wrote:
glitch is is used to tune the I2C timing requirements, and has a
nanosecond granularity.
These values are added to default timing values.
I'm not 100% sure, but it looks like the samsung,i2c-sda-delay in the
i2c-s3c2410 driver.
For that, we have
-by: Maxime Coquelin maxime.coque...@st.com
Maxime Coquelin (4):
i2c: busses: i2c-st: Add ST I2C controller
ARM: STi: Supply I2C configuration to STiH416 SoC
ARM: STi: Supply I2C configuration to STiH415 SoC
ARM: STi: Add I2C config to B2000 and B2020 boards
Documentation/devicetree/bindings/i2c
This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.
This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: Maxime Coquelin
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