On Mon, Mar 10, 2014 at 06:57:00PM +0100, Arnd Bergmann wrote:
On Monday 10 March 2014 17:51:56 Maxime Ripard wrote:
Neither pll6 nor ahb1_mux are listed in the DT binding. Also, why
is it the driver's business to set the parent?
Those are global clocks, so it's not really part pof
Hi,
On Tue, Mar 11, 2014 at 09:52:55AM +, Shevchenko, Andriy wrote:
On Mon, 2014-03-10 at 15:41 +0100, Maxime Ripard wrote:
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older
-by: Maxime Ripard maxime.rip...@free-electrons.com
Cc: sta...@vger.kernel.org
---
drivers/spi/spi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 23756b0..39f12be 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -756,8 +756,6 @@ static void
Hi Geert,
On Mon, Feb 17, 2014 at 07:02:09PM +0100, Geert Uytterhoeven wrote:
On Mon, Feb 17, 2014 at 6:20 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
When the generic implementation of the transfer_one_message callback was
called
by the spi_pump_messages function
.
Once you added it, you can add my Acked-by
Maxime
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On Mon, Feb 17, 2014 at 11:02:28AM +0100, David Lanzendörfer wrote:
From: Hans de Goede hdego...@redhat.com
Signed-off-by: Hans de Goede hdego...@redhat.com
Again, your SoB is missing, and that can be squashed with the previous
patch.
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are the
arguments it takes and what it's supposed to return would be great.
Thanks!
Maxime
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= mmc3;
+ allwinner,drive = 3;
+ allwinner,pull = 0;
+ };
};
timer@01c20c00 {
Looks good otherwise.
Thanks!
Maxime
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on this!
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about bus-width either.
+ status = disabled;
+};
Isn't the cd-gpios property requested too?
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Hi Hans,
On Tue, Feb 18, 2014 at 09:49:21PM +0100, Hans de Goede wrote:
Hi,
On 02/18/2014 04:37 PM, Maxime Ripard wrote:
snip
+
+ for (i = 0; i data-sg_len; i++) {
+ pdes[i].config = SDXC_IDMAC_DES0_CH | SDXC_IDMAC_DES0_OWN
unique through other means.
What do you suggest to make the name unique then?
The ePAPR is pretty clear that the above is the way to go, so I'm
unclear on what you have in mind here.
Plus, I haven't seen anywhere that reg was actually mandatory.
Thanks!
Maxime
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);
+ pm_runtime_use_autosuspend(qup-dev);
+ pm_runtime_enable(qup-dev);
Since the device is already woken up, you probably need to call
pm_runtime_set_active here.
Maxime
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On Tue, Feb 18, 2014 at 04:10:38PM +0100, Hans de Goede wrote:
Hi,
On 02/18/2014 03:22 PM, Maxime Ripard wrote:
On Mon, Feb 17, 2014 at 11:02:41AM +0100, David Lanzendörfer wrote:
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
-by: Maxime Ripard maxime.rip...@free-electrons.com
Thanks!
Maxime
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of the TX clock used by GMAC.
Just merged patches 2-8.
Thanks!
Maxime
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.
Cc: sta...@vger.kernel.org
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
Thanks!
Maxime
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On Fri, Mar 21, 2014 at 11:49:59AM -0400, Paul Gortmaker wrote:
On Mon, Mar 10, 2014 at 7:29 AM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Mon, Mar 10, 2014 at 11:58:08AM +0100, Maxime Ripard wrote:
On Fri, Mar 07, 2014 at 04:08:36PM +, Russell King - ARM Linux wrote
Hi Greg,
On Fri, Jun 07, 2013 at 05:42:23PM +0200, Gregory CLEMENT wrote:
The mv64xxx-i2c embedded in the Armada XP have a new feature called
i2c-bridge. This commit split the i2c information into armada-370.dtsi
and armada-xp.dtsi. Most of the data remains the same and stay in the
common
On Fri, Jun 07, 2013 at 07:26:49PM +0100, luke.leighton wrote:
maxime: we need to talk :)
please tell me in 4 or 5 sentences what you've managed to do so far,
expanding a little on what thomas says below, more specifically what
it achieves and/or allows rather than technically what it does
to enable these interrupts, which
leads to some additional logic.
Thanks,
Maxime
Maxime Ripard (4):
pinctrl: sunxi: Search the description array by pin id
pinctrl: sunxi: Add external interrupts support
pinctrl: sunxi: Add external interrupt functions
ARM: sunxi: dt: Register the pio node
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 2 ++
arch/arm/boot/dts/sun5i-a13.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index e7ef619..9b3c99c 100644
Avoid to use expensive string manipulation functions and search by pin
id when possible.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/pinctrl/pinctrl-sunxi.c | 50 -
1 file changed, 29 insertions(+), 21 deletions(-)
diff --git
The A10 and A13 has a few pins that can be muxed into a particular
function that can be used as an interrupt source. Add the available
pins for such functions to the A10 and A13 description array.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/pinctrl/pinctrl-sunxi.c
'
pins have to be muxed to a specific function to generate an interrupt.
This patch adds the irqchip and the needed logic to use the PIO
controller as an interrupt controller.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/pinctrl/pinctrl-sunxi.c | 158
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 286 ++
1 file changed, 286 insertions(+)
create mode 100644 arch/arm/boot/dts/sun5i-a10s.dtsi
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi
b/arch/arm
The A10s is a SoC member of the Allwinner sun5i family. It is basically
an A13 with an EMAC and an HDMI controller.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
Documentation/arm/sunxi/README | 4
arch/arm/mach-sunxi/sunxi.c| 1 +
2 files changed, 5 insertions
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/configs/multi_v7_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 2e67a27..4aa6401 100644
--- a/arch/arm/configs
we find a proper datasheet for this SoCs),
the clock definition is taken from the A10 one.
This patches depends on the Add external interrupt support for Allwinner SoCs
patch serie.
Thanks,
Maxime
Maxime Ripard (6):
ARM: sunxi: Add Allwinner A10s machine compatible
pinctrl: sunxi: Move
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 75
1 file changed, 75 insertions(+)
create mode 100644 arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
diff --git a/arch/arm/boot/dts/sun5i-a10s
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/pinctrl/pinctrl-sunxi-pins.h | 645 +++
drivers/pinctrl/pinctrl-sunxi.c | 1 +
2 files changed, 646 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-sunxi-pins.h
b/drivers/pinctrl
Hi Arnd,
On Sun, Jun 09, 2013 at 11:36:24PM +0200, Arnd Bergmann wrote:
On Sunday 09 June 2013 18:36:05 Maxime Ripard wrote:
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 286
++
1 file
Hi Linus,
On Mon, Jun 10, 2013 at 03:57:23PM +0200, Linus Walleij wrote:
On Sat, Jun 8, 2013 at 12:05 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Acked-by: Linus Walleij linus.wall...@linaro.org
I guess
From: Brian Lilly br...@crystalfontz.com
The CFA-10057 is a breakout board for the CFA-10036 that has Ethernet,
USB and a 4.3 LCD screen on it.
Signed-off-by: Brian Lilly br...@crystalfontz.com
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/Makefile
From: Brian Lilly br...@crystalfontz.com
The CFA-10055 is yet another breakout board for the CFA-10036, and is
basically a CFA-10037, with the screen and LCD controller found on the
CFA-10049.
Signed-off-by: Brian Lilly br...@crystalfontz.com
Signed-off-by: Maxime Ripard maxime.rip...@free
From: Brian Lilly br...@crystalfontz.com
The early prototypes had the chip select pin for the LCD controller
wired on the GPIO 3-23, while the production run of the CFA-10049 have
this chip select on the GPIO 3-5.
Signed-off-by: Brian Lilly br...@crystalfontz.com
Signed-off-by: Maxime Ripard
the Crystalfontz CFA-10055 device tree
ARM: mxs: dt: Add Crystalfontz CFA-10057 device tree
Maxime Ripard (1):
ARM: cfa10036: Add USB0 OTG port
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx28-cfa10036.dts | 23 +
arch/arm/boot/dts/imx28-cfa10049.dts | 4 +-
arch/arm/boot
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/imx28-cfa10036.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts
b/arch/arm/boot/dts/imx28-cfa10036.dts
index 1594694..eae9c97 100644
--- a/arch
Hi Arnd,
On Fri, Jun 14, 2013 at 12:06:51AM +0200, Arnd Bergmann wrote:
On Thursday 13 June 2013 15:43:42 Maxime Ripard wrote:
+
+ ahb@8008 {
+ usb0: usb@8008 {
+ pinctrl-names = default;
+ pinctrl-0
Hi Linus,
On Sun, Jun 09, 2013 at 06:36:01PM +0200, Maxime Ripard wrote:
Hi everyone,
This patch serie reworks a bit the pinctrl driver and adds the necessary
bits needed to support the Allwinner A10s SoC.
This SoC is a bit in between the A10 and A13. Notable differences with
the A13
Hi Emilio,
On Fri, Jun 14, 2013 at 03:09:49PM -0300, Emilio López wrote:
Hi Maxime,
El 09/06/13 13:36, Maxime Ripard escribió:
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 75
1 file
Hi Linus,
On Sun, Jun 16, 2013 at 01:03:09PM +0200, Linus Walleij wrote:
On Sun, Jun 9, 2013 at 6:36 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
It will allow us to have a cleaner separation between the data needed by
the driver to work, and the core logic of the driver
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Emilio López emi...@elopez.com.ar
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 76
2 files changed, 77 insertions(+)
create mode
of an additionnal property for example.
Maxime
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MXS, unlike other ARM platforms, has no way to make a FIQ from an
interrupt from a driver, without poking directly into the icoll.
Add an exported function to do this.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/mach-mxs/icoll.c | 11 +++
1 file changed
when a gpio is not modified by the
gpio controller, while it can easily be fixed by using the set and clear
registers.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/gpio/gpio-mxs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio
The Hackberry has a PHY that needs to be powered up through a GPIO, so
we need to use a fixed regulator here.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 41 +++
1 file changed, 41 insertions(+)
diff
From: Stefan Roese s...@denx.de
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index ff1f41f..983da33 100644
--- a/arch/arm/boot/dts/sun4i
The EMAC only has one pinset available for muxing, so hopefully, we
cover all cases.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm
been heavily cleaned up.
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../bindings/net/allwinner,sun4i-emac.txt | 22 +
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile
This patch adds a separate driver for the MDIO interface of the
Allwinner ethernet controllers.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../bindings/net/allwinner,sun4i-mdio.txt | 26 +++
drivers/net/ethernet/allwinner/Kconfig | 8 +
drivers/net
Commit b00adbe0 (ARM: sunxi: Rename uart nodes to serial) changed the
node names in the DTSI, changes that were not accordingly made to the
Mini X-Plus device tree. This breakage slipped through because it was
not properly declared in the Makefile.
Fix both issues.
Signed-off-by: Maxime Ripard
The A13 has a lot less clocks than the one found in the Allwinner A10.
Add these stripped down clocks to the clock driver and in the
documentation.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
Documentation/devicetree/bindings/clock/sunxi.txt | 117
The Allwinner A13 has a smaller clock set than the one found in the A10.
Fix the A13 device tree and documentation to reflect this.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a13.dtsi | 35 ---
1 file changed, 12
Hi Shawn,
Le 02/05/2013 04:39, Shawn Guo a écrit :
On Mon, Apr 29, 2013 at 03:58:37PM +0200, Maxime Ripard wrote:
MXS, unlike other ARM platforms,
How are other ARM platforms handling that?
Just like that. You can look at mxc_set_irq_fiq in
arch/arm/mach-imx/irq-common.c or s3c24xx_set_fiq
The A13-Olinuxino makes use of the 3 i2c controllers found on the Allwinner
A13. Enable them in the device tree.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git
The i2c controller found on the Allwinner A13 has only one muxing option
available for each controller. Add them to the dtsi
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a13.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
The Allwinner A10 and A13 both have 3 i2c controller embedded.
Add those to the common sunxi dtsi.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 27 +++
arch/arm/boot/dts/sun5i-a13.dtsi | 27
The i2c controller found on the Allwinner A10 has only one muxing option
available for each controller. Add them to the dtsi
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c
This patch implements a basic driver for the I2C host driver found on
the Allwinner A10, A13 and A31 SoCs.
Notable missing feature is 10-bit addressing.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree/bindings/i2c/i2c-sunxi.txt | 19 +
drivers/i2c
The i2c controller found on the Allwinner A10 has only one muxing option
available for each controller. Add them to the dtsi
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
The A13-Olinuxino makes use of the 3 i2c controllers found on the Allwinner
A13. Enable them in the device tree.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git
The i2c controller found on the Allwinner A13 has only one muxing option
available for each controller. Add them to the dtsi
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun5i-a13.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
The Allwinner A10 and A13 both have 3 i2c controller embedded.
Add those to the common sunxi dtsi.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 27 +++
arch/arm/boot/dts/sun5i-a13.dtsi | 27
in 2.6.31!
The correct assignment is present as well, so we just need
to remove the wrong one.
Thanks for fixing this,
Acked-by: Maxime Ripard maxime.rip...@anandra.org
Maxime
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-mvebu, mach-bcm2835, mach-bcm, mach-highbank, etc.
Cc'ing Maxime Ripard, since I see that mach-sunxi does have a
Makefile.boot, even though I believe it is not needed.
Yes, it is a left-over and should be removed obviously.
Thanks for reminding it to me :)
Maxime
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no need for anybody to join Linaro to contribute upstream.
That's a crazy notion.
Listen, Allwinner isn't working in a vacuum, believe it or not. I've
talked to them, so has Arnd and other people working on ARM, including
Maxime Ripard, who's been reimplementing upstream support
functions can be called, right?
And another dumb question for you, what is the proper device file API
you are referring to ? :)
Thanks!
Maxime
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On Mon, Jun 24, 2013 at 09:04:40AM -0700, Greg KH wrote:
On Mon, Jun 24, 2013 at 11:29:42AM +0200, Maxime Ripard wrote:
Hi Greg,
On Mon, Jun 17, 2013 at 03:58:47PM -0700, Greg KH wrote:
On Mon, Jun 17, 2013 at 10:59:37PM +0200, Oliver Schinagl wrote:
[..]
+static int __init
Hi Jean Christophe,
On Mon, Jun 24, 2013 at 04:26:45PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote:
On 20:27 Fri 21 Jun , Alexandre Belloni wrote:
From: Maxime Ripard maxime.rip...@free-electrons.com
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Signed-off
;
+ };
+};
This code has never been merged, and even with the unmerged driver the
driver won't load. You should maybe remove it :)
Maxime
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,
Maxime
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On Wed, Jun 26, 2013 at 04:52:25PM +0200, Alexandre Belloni wrote:
As all CrystalFontz boards are compatible with crystalfontz,cfa10036, make
it
easier to add future boards.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Maxime Ripard maxime.rip...@free
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be grabed by their respective drivers.
Thanks,
Maxime
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---
drivers/clocksource/sun4i_timer.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clocksource/sun4i_timer.c
b/drivers/clocksource/sun4i_timer.c
index d4674e7..bdf34d9 100644
--- a/drivers
The A10 and the A13 has a 64 bits free running counter that we can use
as a clocksource and a sched clock, that were both not used yet on these
platforms.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clocksource/sun4i_timer.c | 27 +++
1 file
support, work that
is still ongoing, but will hopefully benefit from this patchset as well.
Thanks,
Maxime
Maxime Ripard (8):
clocksource: sun4i: Use the BIT macros where possible
clocksource: sun4i: Add clocksource and sched clock drivers
clocksource: sun4i: Don't forget to enable the clock we
Even if in our case, this clock was non-gatable, used as a parent clock
for several IPs, it still is a good idea to enable it.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clocksource/sun4i_timer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
The current bring-up code for the timer was overly complicated. The only
thing we need is actually which clock we want to use as source and
that's pretty much all. Let's keep it that way.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clocksource/sun4i_timer.c | 15
The interval was firing at was set up at probe time, and only changed in
the set_next_event, and never changed back, which is not really what is
expected.
When enabling the periodic mode, now set an interval to tick every
jiffy.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
The next_event logic was setting the next interval to fire in the
current timer value instead of the interval value register, which is
obviously wrong. Plus the logic to set the actual value was wrong as
well, so this code has always been broken.
Signed-off-by: Maxime Ripard maxime.rip...@free
The set_next_event and set_mode callbacks share a lot of common code we
can easily factor to avoid duplication and mistakes.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clocksource/sun4i_timer.c | 48 ++-
1 file changed, 32
The prescaler is only used when using the internal low frequency
oscillator (at 32kHz). Since we're using the higher frequency oscillator
at 24MHz, we can just remove it.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clocksource/sun4i_timer.c | 10 +++---
1 file
:yes
MFP:no
TDLS peer: no
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Hi Richard,
On Wed, May 29, 2013 at 08:15:49PM +0200, Richard Genoud wrote:
2013/5/24 Maxime Ripard maxime.rip...@free-electrons.com:
I tested it successfully on cubieboard 1GB, on top of kernel 3.10-rc3,
nfsroot (debian wheezy)
I also added in sun4i-a10-cubieboard.dts
phy0: ethernet-phy@0
with Davicom
- Fix various small things around the driver: add defines for undocumented
values, fix documentation name and compatible example, etc.
Maxime Ripard (4):
net: Add MDIO bus driver for the Allwinner EMAC
ARM: sun4i: Add muxing options for the ethernet controller
ARM: sunxi: Add
been heavily cleaned up.
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Richard Genoud richard.gen...@gmail.com
---
.../bindings/net/allwinner,sun4i-emac.txt | 22 +
drivers/net/ethernet/Kconfig | 1
This patch adds a separate driver for the MDIO interface of the
Allwinner ethernet controllers.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Richard Genoud richard.gen...@gmail.com
---
.../bindings/net/allwinner,sun4i-mdio.txt | 26 +++
drivers/net/phy
The Hackberry has a PHY that needs to be powered up through a GPIO, so
we need to use a fixed regulator here.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Richard Genoud richard.gen...@gmail.com
---
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 41
From: Stefan Roese s...@denx.de
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Richard Genoud richard.gen...@gmail.com
---
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 15 +++
1 file changed, 15 insertions(+)
diff
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Richard Genoud richard.gen...@gmail.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index
The EMAC only has one pinset available for muxing, so hopefully, we
cover all cases.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Tested-by: Richard Genoud richard.gen...@gmail.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff
);
+ client-irq = 0;
+ /*
+ * We are polling, use the fastest sample rate by
+ * default
+ */
+ st-sample_rate = 0x7;
Ditto.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel
Hi Shawn,
Le 18/04/2013 16:48, Shawn Guo a écrit :
Copy Sascha.
Ah, yes, sorry, I somehow got confused and thought you were the one that
wrote the driver.
I'll resend the patch.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
back to the default controller
behaviour.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
- Copied Sascha
drivers/video/mxsfb.c |5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 76c..2cfaf8b 100644
--- a/drivers
The Solomon SSD1306 OLED controller is very similar to the SSD1307,
except for the fact that the power is given through an external PWM for
the 1307, and while the 1306 can generate its own power without any PWM.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree
The SSD1307 was used in an early prototype that will never get
distributed. The final board now has a SSD1306 instead, that has its own
power generation unit and thus doesn't need any PWM. The panel attached
to it also changed.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
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