Re: [PATCH] cxl: Remove use of macro DEFINE_PCI_DEVICE_TABLE

2015-07-19 Thread Michael Neuling
h that performs this transformation > is as follows: > > @@ > identifier a; > declarer name DEFINE_PCI_DEVICE_TABLE; > initializer i; > @@ > - DEFINE_PCI_DEVICE_TABLE(a) > + const struct pci_device_id a[] > = i; > > Signed-off-by: Vaishali Thakkar Looks good, thanks! Ack

Re: [PATCH] cxl: Remove use of macro DEFINE_PCI_DEVICE_TABLE

2015-07-19 Thread Michael Neuling
is as follows: @@ identifier a; declarer name DEFINE_PCI_DEVICE_TABLE; initializer i; @@ - DEFINE_PCI_DEVICE_TABLE(a) + const struct pci_device_id a[] = i; Signed-off-by: Vaishali Thakkar vthakkar1...@gmail.com Looks good, thanks! Acked-by: Michael Neuling mi...@neuling.org

Re: [PATCH 1/1] cxl/vphb.c: Use phb pointer after NULL check

2015-06-29 Thread Michael Neuling
On Mon, 2015-06-29 at 16:05 +0530, Maninder Singh wrote: > static Anlaysis detected below error:- > (error) Possible null pointer dereference: phb > > So, Use phb after NULL check. > > Signed-off-by: Maninder Singh Thanks, looks good. Acked-By: Michael Neuling > --

Re: [PATCH 1/1] cxl/vphb.c: Use phb pointer after NULL check

2015-06-29 Thread Michael Neuling
On Mon, 2015-06-29 at 16:05 +0530, Maninder Singh wrote: static Anlaysis detected below error:- (error) Possible null pointer dereference: phb So, Use phb after NULL check. Signed-off-by: Maninder Singh maninder...@samsung.com Thanks, looks good. Acked-By: Michael Neuling mi

Re: [PATCH] powerpc: Make doorbell check preemption safe

2015-05-19 Thread Michael Neuling
ks. Looks good and it's boots for me. Signed-off-by: Michael Neuling > Signed-off-by: Shreyas B. Prabhu > --- > arch/powerpc/sysdev/xics/icp-native.c | 14 +- > 1 file changed, 9 insertions(+), 5 deletions(-) > > diff --git a/arch/powerpc/sysdev/xics/icp-native.c &

Re: [PATCH] powerpc: Make doorbell check preemption safe

2015-05-19 Thread Michael Neuling
. Signed-off-by: Michael Neuling mi...@neuling.org Signed-off-by: Shreyas B. Prabhu shre...@linux.vnet.ibm.com --- arch/powerpc/sysdev/xics/icp-native.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev

Re: [PATCH 2/6] powerpc: Add cpu name to dump stack arch description

2015-05-06 Thread Michael Neuling
On Tue, 2015-05-05 at 21:12 +1000, Michael Ellerman wrote: > As soon as we know the name of the cpu we're on, add it to the dump > stack arch description, which is printed in case of an oops. > > Signed-off-by: Michael Ellerman > --- > arch/powerpc/kernel/cputable.c | 3 +++ > 1 file changed, 3

Re: [PATCH 2/6] powerpc: Add cpu name to dump stack arch description

2015-05-06 Thread Michael Neuling
On Tue, 2015-05-05 at 21:12 +1000, Michael Ellerman wrote: As soon as we know the name of the cpu we're on, add it to the dump stack arch description, which is printed in case of an oops. Signed-off-by: Michael Ellerman m...@ellerman.id.au --- arch/powerpc/kernel/cputable.c | 3 +++ 1

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-04-08 Thread Michael Neuling
On Wed, 2015-04-08 at 19:50 +0200, Ulrich Weigand wrote: > Anshuman Khandual wrote on 23.03.2015 > 11:34:30: > > > > With that in mind, do we have a way to set the top 32bits of the MSR > > > (which contain the TM bits) when ptracing 32 bit processes? I can't > > > find anything like that in

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-04-08 Thread Michael Neuling
On Wed, 2015-04-08 at 19:50 +0200, Ulrich Weigand wrote: Anshuman Khandual khand...@linux.vnet.ibm.com wrote on 23.03.2015 11:34:30: With that in mind, do we have a way to set the top 32bits of the MSR (which contain the TM bits) when ptracing 32 bit processes? I can't find anything

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-03-18 Thread Michael Neuling
On Thu, 2015-03-19 at 09:45 +1100, Michael Neuling wrote: > On Wed, 2015-03-18 at 13:53 +0100, Ulrich Weigand wrote: > > Michael Neuling wrote on 23.02.2015 05:51:50: > > > > > Sorry for the slow response. > > > > Same here :-( > > I'm going to

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-03-18 Thread Michael Neuling
On Wed, 2015-03-18 at 13:53 +0100, Ulrich Weigand wrote: > Michael Neuling wrote on 23.02.2015 05:51:50: > > > Sorry for the slow response. > > Same here :-( I'm going to break the cycle and respond in a few hours :-) > > I think what you're proposing with runni

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-03-18 Thread Michael Neuling
On Thu, 2015-03-19 at 09:45 +1100, Michael Neuling wrote: On Wed, 2015-03-18 at 13:53 +0100, Ulrich Weigand wrote: Michael Neuling mi...@neuling.org wrote on 23.02.2015 05:51:50: Sorry for the slow response. Same here :-( I'm going to break the cycle and respond in a few hours

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-03-18 Thread Michael Neuling
On Wed, 2015-03-18 at 13:53 +0100, Ulrich Weigand wrote: Michael Neuling mi...@neuling.org wrote on 23.02.2015 05:51:50: Sorry for the slow response. Same here :-( I'm going to break the cycle and respond in a few hours :-) I think what you're proposing with running the inferior

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-02-22 Thread Michael Neuling
Uli, Sorry for the slow response. > Michael Neuling wrote on 28.01.2015 05:28:09: > > > Sorry, I'm rethinking this as we didn't consider user suspended > > transactions. > > > > It makes sense for normal transactions but for user suspended > > transactions

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-02-22 Thread Michael Neuling
Uli, Sorry for the slow response. Michael Neuling mi...@neuling.org wrote on 28.01.2015 05:28:09: Sorry, I'm rethinking this as we didn't consider user suspended transactions. It makes sense for normal transactions but for user suspended transactions the running values are the ones

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-01-27 Thread Michael Neuling
On Fri, 2015-01-23 at 08:44 +1100, Michael Neuling wrote: > > > > Inside transaction both running and check pointed values can be > > > > probed independently. > > > > > > Yep, that's the idea, although setting the running values won't change > >

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-01-27 Thread Michael Neuling
On Fri, 2015-01-23 at 08:44 +1100, Michael Neuling wrote: Inside transaction both running and check pointed values can be probed independently. Yep, that's the idea, although setting the running values won't change anything since the the translation is already doomed

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-01-22 Thread Michael Neuling
> > > Inside transaction both running and check pointed values can be > > > probed independently. > > > > Yep, that's the idea, although setting the running values won't change > > anything since the the translation is already doomed and will abort once > > the cpu starts executing it. > > So

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-01-22 Thread Michael Neuling
Inside transaction both running and check pointed values can be probed independently. Yep, that's the idea, although setting the running values won't change anything since the the translation is already doomed and will abort once the cpu starts executing it. So this looks to me

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-01-21 Thread Michael Neuling
On Thu, 2015-01-01 at 13:38 +0530, Anshuman Khandual wrote: > On 12/20/2014 12:58 AM, Edjunior Barbosa Machado wrote: > > On 12/08/2014 08:08 AM, Anshuman Khandual wrote: > >> On 12/03/2014 12:18 PM, Anshuman Khandual wrote: > >>> On 12/03/2014 10:52 AM, Michael Ellerman wrote: > On Tue,

Re: [V6,1/9] elf: Add new powerpc specifc core note sections

2015-01-21 Thread Michael Neuling
On Thu, 2015-01-01 at 13:38 +0530, Anshuman Khandual wrote: On 12/20/2014 12:58 AM, Edjunior Barbosa Machado wrote: On 12/08/2014 08:08 AM, Anshuman Khandual wrote: On 12/03/2014 12:18 PM, Anshuman Khandual wrote: On 12/03/2014 10:52 AM, Michael Ellerman wrote: On Tue, 2014-02-12 at

Re: [PATCH] cxl: remove redundant increment of hwirq

2015-01-08 Thread Michael Neuling
ninitialized variable: hwirq > > Commit 80fa93fce37d ("cxl: Name interrupts in /proc/interrupt") > introduced this error. > > This is a simple fix that removes the redundant increment. > > Signed-off-by: Colin Ian King Thanks. Looks good. Acked-By: Michael Neulin

Re: [PATCH] cxl: remove redundant increment of hwirq

2015-01-08 Thread Michael Neuling
) Uninitialized variable: hwirq Commit 80fa93fce37d (cxl: Name interrupts in /proc/interrupt) introduced this error. This is a simple fix that removes the redundant increment. Signed-off-by: Colin Ian King colin.k...@canonical.com Thanks. Looks good. Acked-By: Michael Neuling mi...@neuling.org

Re: [PATCH] misc: cxl: sysfs.c: Remove unused function

2014-12-20 Thread Michael Neuling
> Remove the function mmio_size_show() that is not used anywhere. Did you compile check this patch? drivers/misc/cxl/sysfs.c:291:74: error: ‘mmio_size_show’ undeclared here (not in a function) It's used here: static struct device_attribute afu_attrs[] = {

Re: [PATCH] misc: cxl: sysfs.c: Remove unused function

2014-12-20 Thread Michael Neuling
Remove the function mmio_size_show() that is not used anywhere. Did you compile check this patch? drivers/misc/cxl/sysfs.c:291:74: error: ‘mmio_size_show’ undeclared here (not in a function) It's used here: static struct device_attribute afu_attrs[] = {

[PATCH v4 02/16] powerpc/cell: Move data segment faulting code out of cell platform

2014-10-08 Thread Michael Neuling
-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/copro.h | 7 + arch/powerpc/include/asm/mmu-hash64.h | 7 + arch/powerpc/mm/copro_fault.c | 46 arch/powerpc/mm/slb.c | 3 -- arch/powerpc

[PATCH v4 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform

2014-10-08 Thread Michael Neuling
-by: Michael Neuling --- arch/powerpc/Kconfig | 4 arch/powerpc/include/asm/copro.h | 16 arch/powerpc/include/asm/spu.h | 5 ++--- arch/powerpc/mm/Makefile

[PATCH v4 03/16] powerpc/cell: Make spu_flush_all_slbs() generic

2014-10-08 Thread Michael Neuling
From: Ian Munsie This moves spu_flush_all_slbs() into a generic call copro_flush_all_slbs(). This will be useful when we add cxl which also needs a similar SLB flush call. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/copro.h | 6 ++ arch/powerpc

[PATCH v4 11/16] powerpc/mm: Add hooks for cxl

2014-10-08 Thread Michael Neuling
SLBs are invalidated. This ensures any corresponding SLBs in cxl are also invalidated at the same time. This is required for segment demotion. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/mm/copro_fault.c| 2 ++ arch/powerpc/mm/hash_native_64.c | 6 +- 2 files

[PATCH v4 14/16] cxl: Add userspace header file

2014-10-08 Thread Michael Neuling
in Documentation/powerpc/cxl.txt. It also adds this new userspace header file to Kbuild so it's exported when doing "make headers_installs". Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- include/uapi/Kbuild | 1 + include/uapi/misc/Kbuild | 2 ++ include/uapi/

[PATCH v4 12/16] cxl: Add base builtin support

2014-10-08 Thread Michael Neuling
with CONFIG_SPU_BASE. This adds a cxl_slbia() call (similar to spu_flush_all_slbs()) which checks if the cxl module is loaded and in use, returning immediately if it is not. If it is in use it calls into the cxl SLB invalidation code. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- drivers/misc

[PATCH v4 15/16] cxl: Add driver to Kbuild and Makefiles

2014-10-08 Thread Michael Neuling
From: Ian Munsie Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- drivers/misc/cxl/Kconfig | 17 + drivers/misc/cxl/Makefile | 2 ++ 2 files changed, 19 insertions(+) diff --git a/drivers/misc/cxl/Kconfig b/drivers/misc/cxl/Kconfig index 5cdd319..a990b39 100644

[PATCH v4 13/16] cxl: Driver code for powernv PCIe based cards for userspace access

2014-10-08 Thread Michael Neuling
. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- drivers/misc/cxl/context.c | 193 + drivers/misc/cxl/cxl.h | 629 drivers/misc/cxl/debugfs.c | 132 ++ drivers/misc/cxl/fault.c | 291 + drivers/misc/cxl/file.c| 508

[PATCH v4 16/16] cxl: Add documentation for userspace APIs

2014-10-08 Thread Michael Neuling
From: Ian Munsie This documentation gives an overview of the hardware architecture, userspace APIs via /dev/cxl/afuM.N and the syfs files. It also adds a MAINTAINERS file entry for cxl. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- Documentation/ABI/testing/sysfs-class-cxl

[PATCH v4 07/16] cxl: Add new header for call backs and structs

2014-10-08 Thread Michael Neuling
is not enabled. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- include/misc/cxl.h | 48 1 file changed, 48 insertions(+) create mode 100644 include/misc/cxl.h diff --git a/include/misc/cxl.h b/include/misc/cxl.h new file mode 100644

[PATCH v4 09/16] powerpc/mm: Add new hash_page_mm()

2014-10-08 Thread Michael Neuling
to be careful here as the current hash_page() assumes current in a few places. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/mmu-hash64.h | 1 + arch/powerpc/mm/hash_utils_64.c | 24 +--- 2 files changed, 18 insertions(+), 7

[PATCH v4 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts

2014-10-08 Thread Michael Neuling
From: Ian Munsie This adds a number of functions for allocating IRQs under powernv PCIe for cxl. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/pnv-pci.h| 31 ++ arch/powerpc/platforms/powernv/pci-ioda.c | 154

[PATCH v4 06/16] powerpc/powernv: Split out set MSI IRQ chip code

2014-10-08 Thread Michael Neuling
From: Ian Munsie Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so split it out. This will be used by some of the cxl PCIe code later. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/platforms/powernv/pci-ioda.c | 42

[PATCH v4 05/16] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize

2014-10-08 Thread Michael Neuling
From: Ian Munsie Export mmu_kernel_ssize and mmu_linear_psize. These are needed by the cxl driver which has it's own MMU. To setup the MMU cxl needs access to these. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/mm/hash_utils_64.c | 2 ++ 1 file changed, 2

[PATCH v4 04/16] powerpc/msi: Improve IRQ bitmap allocator

2014-10-08 Thread Michael Neuling
though. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/sysdev/msi_bitmap.c | 36 +--- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c index 2ff6302

[PATCH v4 0/16] POWER8 Coherent Accelerator device driver

2014-10-08 Thread Michael Neuling
This is the latest version of the cxl driver. Change log below: v4: - Updates based on comments from mpe (offline and online). - Refactor the sstp lock to be an entry lock. - Fixed error paths on new status_mutex in start_work - added some missing include files - moved associating pid/mm

[PATCH v4 10/16] powerpc/opal: Add PHB to cxl mode call

2014-10-08 Thread Michael Neuling
From: Ian Munsie This adds the OPAL call to change a PHB into cxl mode. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/opal.h| 2 ++ arch/powerpc/platforms/powernv/opal-wrappers.S | 1 + 2 files changed, 3 insertions(+) diff --git

[PATCH v4 10/16] powerpc/opal: Add PHB to cxl mode call

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This adds the OPAL call to change a PHB into cxl mode. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/opal.h| 2 ++ arch/powerpc/platforms/powernv/opal-wrappers.S

[PATCH v4 0/16] POWER8 Coherent Accelerator device driver

2014-10-08 Thread Michael Neuling
This is the latest version of the cxl driver. Change log below: v4: - Updates based on comments from mpe (offline and online). - Refactor the sstp lock to be an entry lock. - Fixed error paths on new status_mutex in start_work - added some missing include files - moved associating pid/mm

[PATCH v4 04/16] powerpc/msi: Improve IRQ bitmap allocator

2014-10-08 Thread Michael Neuling
alignment requirement though. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/sysdev/msi_bitmap.c | 36 +--- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/sysdev/msi_bitmap.c

[PATCH v4 05/16] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com Export mmu_kernel_ssize and mmu_linear_psize. These are needed by the cxl driver which has it's own MMU. To setup the MMU cxl needs access to these. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch

[PATCH v4 06/16] powerpc/powernv: Split out set MSI IRQ chip code

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so split it out. This will be used by some of the cxl PCIe code later. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc

[PATCH v4 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This adds a number of functions for allocating IRQs under powernv PCIe for cxl. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/pnv-pci.h| 31 ++ arch/powerpc/platforms

[PATCH v4 09/16] powerpc/mm: Add new hash_page_mm()

2014-10-08 Thread Michael Neuling
process. We need to be careful here as the current hash_page() assumes current in a few places. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/mmu-hash64.h | 1 + arch/powerpc/mm/hash_utils_64.c | 24

[PATCH v4 16/16] cxl: Add documentation for userspace APIs

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This documentation gives an overview of the hardware architecture, userspace APIs via /dev/cxl/afuM.N and the syfs files. It also adds a MAINTAINERS file entry for cxl. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi

[PATCH v4 07/16] cxl: Add new header for call backs and structs

2014-10-08 Thread Michael Neuling
CONFIG_CXL_BASE is not enabled. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- include/misc/cxl.h | 48 1 file changed, 48 insertions(+) create mode 100644 include/misc/cxl.h diff --git a/include

[PATCH v4 13/16] cxl: Driver code for powernv PCIe based cards for userspace access

2014-10-08 Thread Michael Neuling
in subsequent patches. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- drivers/misc/cxl/context.c | 193 + drivers/misc/cxl/cxl.h | 629 drivers/misc/cxl/debugfs.c | 132 ++ drivers/misc/cxl/fault.c | 291

[PATCH v4 15/16] cxl: Add driver to Kbuild and Makefiles

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- drivers/misc/cxl/Kconfig | 17 + drivers/misc/cxl/Makefile | 2 ++ 2 files changed, 19 insertions(+) diff --git a/drivers/misc/cxl/Kconfig b

[PATCH v4 12/16] cxl: Add base builtin support

2014-10-08 Thread Michael Neuling
-by: Michael Neuling mi...@neuling.org --- drivers/misc/Kconfig | 1 + drivers/misc/Makefile | 1 + drivers/misc/cxl/Kconfig | 8 + drivers/misc/cxl/Makefile | 1 + drivers/misc/cxl/base.c | 86 +++ 5 files changed, 97 insertions(+) create

[PATCH v4 14/16] cxl: Add userspace header file

2014-10-08 Thread Michael Neuling
in a subsequent patch in Documentation/powerpc/cxl.txt. It also adds this new userspace header file to Kbuild so it's exported when doing make headers_installs. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- include/uapi/Kbuild | 1

[PATCH v4 11/16] powerpc/mm: Add hooks for cxl

2014-10-08 Thread Michael Neuling
a hook for when SLBs are invalidated. This ensures any corresponding SLBs in cxl are also invalidated at the same time. This is required for segment demotion. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/mm/copro_fault.c| 2

[PATCH v4 03/16] powerpc/cell: Make spu_flush_all_slbs() generic

2014-10-08 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This moves spu_flush_all_slbs() into a generic call copro_flush_all_slbs(). This will be useful when we add cxl which also needs a similar SLB flush call. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org

[PATCH v4 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform

2014-10-08 Thread Michael Neuling
Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/Kconfig | 4 arch/powerpc/include/asm/copro.h | 16 arch/powerpc/include/asm/spu.h | 5

[PATCH v4 02/16] powerpc/cell: Move data segment faulting code out of cell platform

2014-10-08 Thread Michael Neuling
parameters. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/copro.h | 7 + arch/powerpc/include/asm/mmu-hash64.h | 7 + arch/powerpc/mm/copro_fault.c | 46 arch/powerpc

Re: [v3, 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts

2014-10-07 Thread Michael Neuling
On Wed, 2014-10-08 at 09:59 +1100, Michael Ellerman wrote: > On Tue, 2014-07-10 at 10:48:14 UTC, Michael Neuling wrote: > > From: Ian Munsie > > > > This adds a number of functions for allocating IRQs under powernv PCIe for > > cxl. > > > > diff --g

Re: [v3,12/16] cxl: Add base builtin support

2014-10-07 Thread Michael Neuling
On Wed, 2014-10-08 at 10:04 +1100, Michael Ellerman wrote: > On Tue, 2014-07-10 at 10:48:18 UTC, Michael Neuling wrote: > > From: Ian Munsie > > > > This adds the base cxl support that needs to be build into the kernel to use > > cxl as a module. This is needed so t

Re: [PATCH v3 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform

2014-10-07 Thread Michael Neuling
> > +int copro_data_segment(struct mm_struct *mm, u64 ea, u64 *esid, u64 *vsid); > > This function is otherwise not included in this patch, so it should > probably be removed (as the next patch removes it anyway). Yeah, looks like I screwed it up slightly in the packing of these patches.

[PATCH v3 02/16] powerpc/cell: Move data segment faulting code out of cell platform

2014-10-07 Thread Michael Neuling
segment handling which Cell didn't have. This also moves the internal struct spu_slb to a generic struct copro_slb which is now used in the spu and copro code. We use this new struct instead of the us passing around esid and vsid parameters. Signed-off-by: Ian Munsie Signed-off-by: Michael

[PATCH v3 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform

2014-10-07 Thread Michael Neuling
-by: Michael Neuling --- arch/powerpc/Kconfig | 4 arch/powerpc/include/asm/copro.h | 18 ++ arch/powerpc/include/asm/spu.h | 5 ++--- arch/powerpc/mm/Makefile | 1

[PATCH v3 04/16] powerpc/msi: Improve IRQ bitmap allocator

2014-10-07 Thread Michael Neuling
though. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/sysdev/msi_bitmap.c | 33 ++--- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c index 2ff6302..56c8b13

[PATCH v3 03/16] powerpc/cell: Make spu_flush_all_slbs() generic

2014-10-07 Thread Michael Neuling
From: Ian Munsie This moves spu_flush_all_slbs() into a generic call copro_flush_all_slbs(). This will be useful when we add cxl which also needs a similar SLB flush call. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/copro.h | 6 ++ arch/powerpc

[PATCH v3 05/16] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize

2014-10-07 Thread Michael Neuling
From: Ian Munsie Export mmu_kernel_ssize and mmu_linear_psize. These are needed by the cxl driver which has it's own MMU. To setup the MMU cxl need access to these. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/mm/hash_utils_64.c | 2 ++ 1 file changed, 2

[PATCH v3 11/16] powerpc/mm: Add hooks for cxl

2014-10-07 Thread Michael Neuling
-by: Michael Neuling --- arch/powerpc/mm/copro_fault.c| 2 ++ arch/powerpc/mm/hash_native_64.c | 6 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c index 222ef9b..55791fc 100644 --- a/arch/powerpc/mm/copro_fault.c

[PATCH v3 06/16] powerpc/powernv: Split out set MSI IRQ chip code

2014-10-07 Thread Michael Neuling
From: Ian Munsie Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so split it out. This will be used by some of the cxl PCIe code later. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/platforms/powernv/pci-ioda.c | 42

[PATCH v3 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts

2014-10-07 Thread Michael Neuling
From: Ian Munsie This adds a number of functions for allocating IRQs under powernv PCIe for cxl. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/pnv-pci.h| 27 ++ arch/powerpc/platforms/powernv/pci-ioda.c | 153

[PATCH v3 10/16] powerpc/opal: Add PHB to cxl mode call

2014-10-07 Thread Michael Neuling
From: Ian Munsie This adds the OPAL call to change a PHB into cxl mode. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/opal.h| 2 ++ arch/powerpc/platforms/powernv/opal-wrappers.S | 1 + 2 files changed, 3 insertions(+) diff --git

[PATCH v3 13/16] cxl: Driver code for powernv PCIe based cards for userspace access

2014-10-07 Thread Michael Neuling
. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- drivers/misc/cxl/context.c | 173 drivers/misc/cxl/cxl.h | 622 drivers/misc/cxl/debugfs.c | 112 + drivers/misc/cxl/fault.c | 299 ++ drivers/misc/cxl/file.c| 493

[PATCH v3 16/16] cxl: Add documentation for userspace APIs

2014-10-07 Thread Michael Neuling
From: Ian Munsie This documentation gives an overview of the hardware architecture, userspace APIs via /dev/cxl/afu0.0 and the syfs files. It also adds a MAINTAINERS file entry for cxl. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- Documentation/ABI/testing/sysfs-class-cxl

[PATCH v3 15/16] cxl: Add driver to Kbuild and Makefiles

2014-10-07 Thread Michael Neuling
From: Ian Munsie Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- drivers/misc/cxl/Kconfig | 10 ++ drivers/misc/cxl/Makefile | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/misc/cxl/Kconfig b/drivers/misc/cxl/Kconfig index 5cdd319..585d6e3 100644

[PATCH v3 09/16] powerpc/mm: Add new hash_page_mm()

2014-10-07 Thread Michael Neuling
to be careful here as the current hash_page() assumes current in a few places. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/mmu-hash64.h | 1 + arch/powerpc/mm/hash_utils_64.c | 24 +--- 2 files changed, 18 insertions(+), 7

[PATCH v3 12/16] cxl: Add base builtin support

2014-10-07 Thread Michael Neuling
contexts are currently in use. This is used by the tlbie() to determine if it can do local TLB invalidations or not. This also adds get/put calls for the cxl driver module to refcount the active cxl contexts. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- drivers/misc/Kconfig

[PATCH v3 14/16] cxl: Userspace header file.

2014-10-07 Thread Michael Neuling
From: Ian Munsie This defines structs and magic numbers required for userspace to interact with the kernel cxl driver via /dev/cxl/afu0.0. It adds this header file Kbuild so it's exported when doing make headers_installs. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- include

[PATCH v3 07/16] cxl: Add new header for call backs and structs

2014-10-07 Thread Michael Neuling
CONFIG_CXL_BASE is not enabled. Signed-off-by: Ian Munsie Signed-off-by: Michael Neuling --- include/misc/cxl.h | 48 1 file changed, 48 insertions(+) create mode 100644 include/misc/cxl.h diff --git a/include/misc/cxl.h b/include/misc/cxl.h new file mode

[PATCH v3 0/16] POWER8 Coherent Accelerator device driver

2014-10-07 Thread Michael Neuling
This is the latest version of the cxl driver. Change log below: v3: - Updates based on comments from mpe, benh, aneesh and offline reviews. - Fixed bug freeing AFU IRQs that also freed the multiplexed PSL IRQ - Change copro_flush_all_slbs to a static inline as suggested by mpe - Implement

[PATCH v3 0/16] POWER8 Coherent Accelerator device driver

2014-10-07 Thread Michael Neuling
This is the latest version of the cxl driver. Change log below: v3: - Updates based on comments from mpe, benh, aneesh and offline reviews. - Fixed bug freeing AFU IRQs that also freed the multiplexed PSL IRQ - Change copro_flush_all_slbs to a static inline as suggested by mpe - Implement

[PATCH v3 09/16] powerpc/mm: Add new hash_page_mm()

2014-10-07 Thread Michael Neuling
process. We need to be careful here as the current hash_page() assumes current in a few places. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/mmu-hash64.h | 1 + arch/powerpc/mm/hash_utils_64.c | 24

[PATCH v3 07/16] cxl: Add new header for call backs and structs

2014-10-07 Thread Michael Neuling
are provided when CONFIG_CXL_BASE is not enabled. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- include/misc/cxl.h | 48 1 file changed, 48 insertions(+) create mode 100644 include/misc/cxl.h diff --git

[PATCH v3 12/16] cxl: Add base builtin support

2014-10-07 Thread Michael Neuling
to see if any cxl contexts are currently in use. This is used by the tlbie() to determine if it can do local TLB invalidations or not. This also adds get/put calls for the cxl driver module to refcount the active cxl contexts. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael

[PATCH v3 14/16] cxl: Userspace header file.

2014-10-07 Thread Michael Neuling
-off-by: Michael Neuling mi...@neuling.org --- include/uapi/Kbuild | 1 + include/uapi/misc/Kbuild | 2 ++ include/uapi/misc/cxl.h | 86 3 files changed, 89 insertions(+) create mode 100644 include/uapi/misc/Kbuild create mode 100644 include

[PATCH v3 16/16] cxl: Add documentation for userspace APIs

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This documentation gives an overview of the hardware architecture, userspace APIs via /dev/cxl/afu0.0 and the syfs files. It also adds a MAINTAINERS file entry for cxl. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi

[PATCH v3 15/16] cxl: Add driver to Kbuild and Makefiles

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- drivers/misc/cxl/Kconfig | 10 ++ drivers/misc/cxl/Makefile | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/misc/cxl/Kconfig b/drivers

[PATCH v3 13/16] cxl: Driver code for powernv PCIe based cards for userspace access

2014-10-07 Thread Michael Neuling
in subsequent patches. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- drivers/misc/cxl/context.c | 173 drivers/misc/cxl/cxl.h | 622 drivers/misc/cxl/debugfs.c | 112 + drivers/misc/cxl/fault.c | 299

[PATCH v3 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This adds a number of functions for allocating IRQs under powernv PCIe for cxl. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/pnv-pci.h| 27 ++ arch/powerpc/platforms

[PATCH v3 10/16] powerpc/opal: Add PHB to cxl mode call

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This adds the OPAL call to change a PHB into cxl mode. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/opal.h| 2 ++ arch/powerpc/platforms/powernv/opal-wrappers.S

[PATCH v3 11/16] powerpc/mm: Add hooks for cxl

2014-10-07 Thread Michael Neuling
Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/mm/copro_fault.c| 2 ++ arch/powerpc/mm/hash_native_64.c | 6 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c index

[PATCH v3 06/16] powerpc/powernv: Split out set MSI IRQ chip code

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so split it out. This will be used by some of the cxl PCIe code later. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc

[PATCH v3 05/16] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com Export mmu_kernel_ssize and mmu_linear_psize. These are needed by the cxl driver which has it's own MMU. To setup the MMU cxl need access to these. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch

[PATCH v3 03/16] powerpc/cell: Make spu_flush_all_slbs() generic

2014-10-07 Thread Michael Neuling
From: Ian Munsie imun...@au1.ibm.com This moves spu_flush_all_slbs() into a generic call copro_flush_all_slbs(). This will be useful when we add cxl which also needs a similar SLB flush call. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org

[PATCH v3 04/16] powerpc/msi: Improve IRQ bitmap allocator

2014-10-07 Thread Michael Neuling
alignment requirement though. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/sysdev/msi_bitmap.c | 33 ++--- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/sysdev/msi_bitmap.c b

[PATCH v3 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform

2014-10-07 Thread Michael Neuling
Munsie imun...@au1.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/Kconfig | 4 arch/powerpc/include/asm/copro.h | 18 ++ arch/powerpc/include/asm/spu.h | 5 ++--- arch

[PATCH v3 02/16] powerpc/cell: Move data segment faulting code out of cell platform

2014-10-07 Thread Michael Neuling
.ibm.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/copro.h | 7 - arch/powerpc/include/asm/mmu-hash64.h | 7 - arch/powerpc/mm/copro_fault.c | 46 arch/powerpc/mm/slb.c | 3 -- arch/powerpc

Re: [PATCH v3 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform

2014-10-07 Thread Michael Neuling
+int copro_data_segment(struct mm_struct *mm, u64 ea, u64 *esid, u64 *vsid); This function is otherwise not included in this patch, so it should probably be removed (as the next patch removes it anyway). Yeah, looks like I screwed it up slightly in the packing of these patches. Thanks.

Re: [v3,12/16] cxl: Add base builtin support

2014-10-07 Thread Michael Neuling
On Wed, 2014-10-08 at 10:04 +1100, Michael Ellerman wrote: On Tue, 2014-07-10 at 10:48:18 UTC, Michael Neuling wrote: From: Ian Munsie imun...@au1.ibm.com This adds the base cxl support that needs to be build into the kernel to use cxl as a module. This is needed so that the cxl call

Re: [v3, 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts

2014-10-07 Thread Michael Neuling
On Wed, 2014-10-08 at 09:59 +1100, Michael Ellerman wrote: On Tue, 2014-07-10 at 10:48:14 UTC, Michael Neuling wrote: From: Ian Munsie imun...@au1.ibm.com This adds a number of functions for allocating IRQs under powernv PCIe for cxl. diff --git a/arch/powerpc/platforms/powernv/pci

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