Non-doorbell interrupts are routed through "shared interrupts". These
interrupts can be mapped to various internal interrupt lines. Add
interrupt properties for shared interrupts to the tegra186-hsp device
tree bindings.
Signed-off-by: Mikko Perttunen
---
Documentation/devicetre
but is compatible to tegra186-hsp.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 34 +---
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index
.
The initial use for the mailboxes is the Tegra Combined UART. For this
purpose, we use interrupts to receive data, and spinning to wait for
the transmit mailbox to be emptied to minimize unnecessary overhead.
Signed-off-by: Mikko Perttunen
---
drivers/mailbox/tegra-hsp.c | 216
Add a new TXDONE option, TXDONE_BY_BLOCK. With this option, the
send_data function of the mailbox driver is expected to block until
the message has been sent. The new option is used with the Tegra
Combined UART driver to minimize unnecessary overhead when transmitting
data.
Signed-off-by: Mikko
Add bindings for the Tegra Combined UART device used to talk to the
UART console on Tegra194 systems.
Signed-off-by: Mikko Perttunen
---
.../bindings/serial/nvidia,tegra194-tcu.txt| 35 ++
1 file changed, 35 insertions(+)
create mode 100644
Documentation/devicetree
patches 4 and 5 add support for the "shared mailbox" primitive
to the Tegra HSP driver.
* patch 6 adds the TCU driver itself
* patches 7 and 8 do the necessary device tree changes.
The series has been tested on the Tegra194 P2972 board.
Thanks,
Mikko
Mikko Perttunen (8):
dt-bind
code.
The series has been tested on the Jetson TX1 (T210) and TX2 (T186)
using the host1x_test test suite available at
http://github.com/cyndis/host1x_test
The series itself is available at
http://github.com/cyndis/linux, branch host1x-t186-1
Cheers,
Mikko
Mikko Perttunen (6):
arm64: tegra
Add Tegra186 support for VIC - no changes are required except for new
firmware and compatibility string.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 1 +
drivers/gpu/drm/tegra/vic.c | 10 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/tegra
Add #power-domain-cells for the BPMP node on Tegra186 so that the power
domain provider may be used.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts
Add the node for Host1x on the Tegra186, without any subdevices
for now.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia
Add note that address/size-cells should be 2 on 64-bit systems,
and add Tegra186-specific register range properties.
Signed-off-by: Mikko Perttunen
---
.../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
with this commit.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/Makefile| 3 +-
drivers/gpu/host1x/dev.c | 60 ++-
drivers/gpu/host1x/dev.h | 4 +
drivers/gpu/host1x/hw/cdma_hw.c| 49
Add a node for the Video Image Compositor on the Tegra186.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index
since that would require extra work and is unnecessary with
the current channel allocation model.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/dev.h | 16
drivers/gpu/host1x/hw/channel_hw.c | 3 +++
drivers/gpu/host1x/hw/syncpt_hw.c | 26
to the TegraDRM submit path.
Everything was tested on TX1 and TX2 and should be applied on the
previously posted Tegra186 support series.
Cheers,
Mikko
*** BLURB HERE ***
Mikko Perttunen (4):
gpu: host1x: Enable Tegra186 syncpoint protection
gpu: host1x: Enable gather filter
gpu: host1x
Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
to user pointers instead of writing out the cast manually.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tegra
-off-by: Mikko Perttunen
---
drivers/gpu/host1x/hw/channel_hw.c | 22 ++
drivers/gpu/host1x/hw/hw_host1x04_channel.h | 12
drivers/gpu/host1x/hw/hw_host1x05_channel.h | 12
3 files changed, 46 insertions(+)
diff --git a/drivers/gpu/host1x/hw
y newlines
and by fixing other small issues.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/debug.c| 14 ++-
drivers/gpu/host1x/debug.h| 14 ---
drivers/gpu/host1x/hw/debug_hw.c | 46 ++-
drivers/gpu/host1x/hw/debug
In Tegra186, the BPMP (Boot and Power Management Processor) implements
an interface that is used to read system temperatures, including CPU
cluster and GPU temperatures. This binding describes the thermal sensor
that is exposed by BPMP.
Signed-off-by: Mikko Perttunen
Acked-by: Rob Herring
Expose and export the tegra_bpmp_mrq_return function for use of drivers
outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 5
-by: Mikko Perttunen
---
v2:
- don't allocate space for disabled zones
- allow compilation with COMPILE_TEST
drivers/thermal/Makefile | 2 +-
drivers/thermal/tegra/Kconfig| 7 +
drivers/thermal/tegra/Makefile | 3 +-
drivers/thermal/tegra/bpmp-thermal.c | 263
Add static inline stubs to bpmp.h when CONFIG_BPMP is not enabled.
This allows building BPMP-related drivers with COMPILE_TEST.
Signed-off-by: Mikko Perttunen
---
v2:
- added patch
include/soc/tegra/bpmp.h | 42 +++---
1 file changed, 39 insertions(+), 3
This adds the thermal sensor device provided by the BPMP, and the
relevant thermal sensors to the Tegra186 device tree.
Signed-off-by: Mikko Perttunen
---
v2:
- added trips and cooling-maps nodes
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 103 +++
1 file changed, 103
The disassembler for debug dumps was missing some newer host1x opcodes.
Add disassembly support for these.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/hw/debug_hw.c | 59 ---
drivers/gpu/host1x/hw/debug_hw_1x01.c | 2 +-
drivers/gpu/host1x/hw
in case of job timeouts. They are now actually readable by humans
without use of additional scripts.
Patch 4 is a simple aesthetical fix to the TegraDRM submit path.
Everything was tested on TX1 and TX2 and should be applied on the
previously posted Tegra186 support series.
Cheers,
Mikko
Mikko
Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
to user pointers instead of writing out the cast manually. Also do
some other cleanup with user pointers to make them stand out more
and look cleaner.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 29
y newlines
and by fixing other small issues.
Signed-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
Tested-by: Dmitry Osipenko
---
drivers/gpu/host1x/debug.c| 14 ++-
drivers/gpu/host1x/debug.h| 14 ---
drivers/gpu/host1x/hw/debug_hw.c
since that would require extra work and is unnecessary with
the current channel allocation model.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/dev.h | 15 +
drivers/gpu/host1x/hw/channel_hw.c | 3 +++
drivers/gpu/host1x/hw/syncpt_hw.c | 46
-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/host1x/hw/channel_hw.c | 22 ++
drivers/gpu/host1x/hw/hw_host1x04_channel.h | 12
drivers/gpu/host1x/hw/hw_host1x05_channel.h | 12
3 files changed, 46 insertions(+)
diff
This function actually doesn't sleep in the version that was merged.
Signed-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/host1x/channel.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/host1x/channel.c b/drivers/gpu/host1x/channel.c
On 09/30/2017 05:41 AM, Dmitry Osipenko wrote:
On 28.09.2017 15:50, Mikko Perttunen wrote:
..
diff --git a/drivers/gpu/host1x/hw/channel_hw.c
b/drivers/gpu/host1x/hw/channel_hw.c
index 8447a56c41ca..b929d7f1e291 100644
--- a/drivers/gpu/host1x/hw/channel_hw.c
+++ b/drivers/gpu/host1x/hw
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to boot to UART console.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra194.dt
Add the configuration option to enable support for the Tegra194
system-on-chip, and enable it by default in the arm64 defconfig.
Signed-off-by: Mikko Perttunen
---
arch/arm64/configs/defconfig | 1 +
drivers/soc/tegra/Kconfig| 10 ++
2 files changed, 11 insertions(+)
diff --git
channel are supported, and channels
are not required to be placed contiguously in memory. The same
configuration also works on T186 so we end up with less code.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 142 +++---
include/soc/tegra
Add device tree files for the Tegra194 P2972- development board.
The board consists of the P2888 compute module and the P2822 baseboard.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/Makefile| 1 +
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 246
The Tegra194 PMC is mostly compatible with Tegra186, including in all
currently supported features. As such, add a new compatibility string
but point to the existing Tegra186 SoC data for now.
Signed-off-by: Mikko Perttunen
---
drivers/soc/tegra/pmc.c | 1 +
1 file changed, 1 insertion(+)
diff
The Tegra194 power management controller has one additional register
aperture to be specified in the device tree node.
Signed-off-by: Mikko Perttunen
---
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation
e required in the BPMP driver to support the
new channel layout in Tegra194.
The series has been tested on Tegra186 (Jetson TX2) and Tegra194
(P2972).
Cheers,
Mikko
Mikko Perttunen (6):
firmware: tegra: Simplify channel management
soc/tegra: Add Tegra194 SoC configuration option
soc/tegra: pmc: Ad
On 16.11.2017 18:40, Dmitry Osipenko wrote:
On 05.11.2017 14:01, Mikko Perttunen wrote:
To allow client drivers to free resources when jobs have completed,
deliver job completion callbacks to them. This requires adding
reference counting to context objects, as job completion can happen
after
On 12.11.2017 13:23, Dmitry Osipenko wrote:
On 11.11.2017 00:15, Dmitry Osipenko wrote:
On 07.11.2017 18:29, Dmitry Osipenko wrote:
On 07.11.2017 16:11, Mikko Perttunen wrote:
On 05.11.2017 19:14, Dmitry Osipenko wrote:
On 05.11.2017 14:01, Mikko Perttunen wrote:
Add an option
On 29.11.2017 00:18, Vasyl Gomonovych wrote:
Fix ptr_ret.cocci warnings:
drivers/gpu/drm/tegra/gem.c:420:1-3: WARNING: PTR_ERR_OR_ZERO can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: scripts/coccinelle/api/ptr_ret.cocci
Signed-off-by: Vasyl Gomonovych
---
On 07.11.2017 23:23, Dmitry Osipenko wrote:
On 07.11.2017 15:28, Mikko Perttunen wrote:
On 05.11.2017 18:46, Dmitry Osipenko wrote:
On 05.11.2017 14:01, Mikko Perttunen wrote:
...
+static int mlock_id_for_class(unsigned int class)
+{
+#if HOST1X_HW >= 6
+switch (class)
+{
+c
With the new channel allocation model, multiple threads can be
allocating channels simultaneously. Therefore we need to add a lock
around the code.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/channel.c | 7 +++
drivers/gpu/host1x/channel.h | 2 ++
2 files changed, 9 insertions
sted using the host1x_test test suite, and also by running
the performance test of host1x_test in parallel.
Thanks,
Mikko
Mikko Perttunen (10):
gpu: host1x: Parameterize channel aperture size
gpu: host1x: Print MLOCK state in debug dumps on T186
gpu: host1x: Add lock around channel allocation
g
Add support for dumping current MLOCK state in debug dumps also
on T186, now that MLOCKs are used by the driver.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/hw/debug_hw_1x06.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/host1x/hw
This ensures that there are no concurrency issues when multiple users
are trying to use VIC concurrently, and also simplifies the code
slightly.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/vic.c | 47 +++--
1 file changed, 20 insertions
, this patch only adapts VIC to the new model.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 46 ++
drivers/gpu/drm/tegra/drm.h | 7 +++-
drivers/gpu/drm/tegra/vic.c | 79 +++--
3 files changed, 92 insertions(+), 40
Add an option to host1x_channel_request to interruptibly wait for a
free channel. This allows IOCTLs that acquire a channel to block
the userspace.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 9 +
drivers/gpu/drm/tegra/gr2d.c | 6 +++---
drivers/gpu/drm/tegra
As a preparation for each context potentially being able to have a
separate hardware channel, and thus requiring a separate syncpoint,
move syncpoints to be stored inside each context instead of global
client data.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 8
.
This patch implements locking on all platforms from Tegra20 to
Tegra186.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/cdma.c | 1 +
drivers/gpu/host1x/cdma.h | 1 +
drivers/gpu/host1x/hw/cdma_hw.c| 122
Allow job submitters to set a callback to be called when the job has
completed. The jobs are stored and the callbacks called outside the
CDMA lock area to allow the callbacks to do CDMA-requiring operations
like freeing channels.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/cdma.c | 44
for contexts.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 27 ---
drivers/gpu/drm/tegra/drm.h | 4
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 2cdd054520bf
The size of a single channel's aperture is different on Tegra186 vs.
previous chips. Parameterize the value using a new define in the
register definition headers.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/hw/channel_hw.c | 3 +--
drivers/gpu/host1x/hw/hw_host1x01_channel.h
On 09/05/2017 04:33 PM, Dmitry Osipenko wrote:
On 05.09.2017 11:10, Mikko Perttunen wrote:
... >> diff --git a/drivers/gpu/host1x/hw/channel_hw.c
b/drivers/gpu/host1x/hw/channel_hw.c
index 8447a56c41ca..0161da331702 100644
--- a/drivers/gpu/host1x/hw/channel_hw.c
+++ b/drivers/gpu/hos
Reviewed-by: Mikko Perttunen
Tested-by: Mikko Perttunen
Tested to work with Host1x :)
I noticed a slight difference with downstream where downstream has
global interrupts 170 and 171 - but looks like the latter is for secure
faults which we should never get so this way seems more correct
On 08/19/2017 01:05 AM, Dmitry Osipenko wrote:
On 18.08.2017 19:15, Mikko Perttunen wrote:
Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
to user pointers instead of writing out the cast manually.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 9
On 08/19/2017 01:36 AM, Dmitry Osipenko wrote:
On 18.08.2017 19:15, Mikko Perttunen wrote:
Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
specific channels, preventing any other channels from incrementing
them.
Enable this feature where available and assign syncpoints
On 08/19/2017 01:09 PM, Dmitry Osipenko wrote:
On 19.08.2017 11:10, Mikko Perttunen wrote:
[snip]
+host1x_hw_syncpt_set_protection(host, true);
Is it really okay to force the protection? Maybe protection should be enabled
with a respect to CONFIG_TEGRA_HOST1X_FIREWALL? In that case we
On 08/19/2017 01:42 PM, Dmitry Osipenko wrote:
On 18.08.2017 19:15, Mikko Perttunen wrote:
The gather filter is a feature present on Tegra124 and newer where the
hardware prevents GATHERed command buffers from executing commands
normally reserved for the CDMA pushbuffer which is maintained
On 08/19/2017 02:11 PM, Dmitry Osipenko wrote:
On 19.08.2017 13:35, Mikko Perttunen wrote:
On 08/19/2017 01:09 PM, Dmitry Osipenko wrote:
On 19.08.2017 11:10, Mikko Perttunen wrote:
[snip]
+host1x_hw_syncpt_set_protection(host, true);
Is it really okay to force the protection? Maybe
On 08/20/2017 07:59 PM, Dmitry Osipenko wrote:
On 20.08.2017 19:44, Dmitry Osipenko wrote:
On 20.08.2017 19:24, Dmitry Osipenko wrote:
On 18.08.2017 19:15, Mikko Perttunen wrote:
The gather filter is a feature present on Tegra124 and newer where the
hardware prevents GATHERed command
On 08/21/2017 08:27 PM, Mikko Perttunen wrote:
On 08/20/2017 07:59 PM, Dmitry Osipenko wrote:
On 20.08.2017 19:44, Dmitry Osipenko wrote:
On 20.08.2017 19:24, Dmitry Osipenko wrote:
On 18.08.2017 19:15, Mikko Perttunen wrote:
The gather filter is a feature present on Tegra124 and newer
was tested on TX1 and TX2 and should be applied on the
previously posted Tegra186 support series.
Cheers,
Mikko
Mikko Perttunen (6):
gpu: host1x: Enable Tegra186 syncpoint protection
gpu: host1x: Enable gather filter
gpu: host1x: Improve debug disassembly formatting
gpu: host1x: Disassemble more
Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
to user pointers instead of writing out the cast manually.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu
This function actually doesn't sleep in the version that was merged.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/channel.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/host1x/channel.c b/drivers/gpu/host1x/channel.c
index db9b91d1384c..2fb93c27c1d9
-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/host1x/hw/channel_hw.c | 22 ++
drivers/gpu/host1x/hw/hw_host1x04_channel.h | 12
drivers/gpu/host1x/hw/hw_host1x05_channel.h | 12
3 files changed, 46 insertions(+)
diff
The disassembler for debug dumps was missing some newer host1x opcodes.
Add disassembly support for these.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/hw/debug_hw.c | 57 ---
drivers/gpu/host1x/hw/debug_hw_1x01.c | 3 +-
drivers/gpu/host1x/hw
since that would require extra work and is unnecessary with
the current channel allocation model.
Signed-off-by: Mikko Perttunen
---
Notes:
v2:
- Changed from set_protection(bool) to enable_protection
- Added some comments
- Added missing check for hv_regs being NULL
y newlines
and by fixing other small issues.
Signed-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
Tested-by: Dmitry Osipenko
---
This uses pr_cont, which there are currently talks of being replaced
with something better. I kept using it here for now until there is
some conclusion of what'
with this commit.
Signed-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
Tested-by: Dmitry Osipenko
---
drivers/gpu/host1x/Makefile| 3 +-
drivers/gpu/host1x/dev.c | 60 +++-
drivers/gpu/host1x/dev.h | 4 +
drivers/gpu/host1x
Add the Tegra186-specific hypervisor-related register range
properties.
Signed-off-by: Mikko Perttunen
---
v2:
- Dropped incorrect note about cells properties.
.../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4
1 file changed, 4 insertions(+)
diff --git
Add the node for Host1x on the Tegra186, without any subdevices
for now.
Signed-off-by: Mikko Perttunen
---
v2:
- Changed address-cells and size-cells to 1 and fixed the ranges
property correspondingly.
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++
1 file changed, 18
Add Tegra186 support for VIC - no changes are required except for new
firmware and compatibility string.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 1 +
drivers/gpu/drm/tegra/vic.c | 10 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/tegra
Add #power-domain-cells for the BPMP node on Tegra186 so that the power
domain provider may be used.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts
Add a node for the Video Image Compositor on the Tegra186.
Signed-off-by: Mikko Perttunen
---
v2:
- Fixed reg property in accordance with changed parent cells.
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia
.
The series has been tested on the Jetson TX1 (T210) and TX2 (T186)
using the host1x_test test suite available at
http://github.com/cyndis/host1x_test
The series itself is available at
http://github.com/cyndis/linux, branch host1x-t186-1
Cheers,
Mikko
Mikko Perttunen (6):
arm64: tegra: Add
On 05.09.2017 14:10, Daniel Vetter wrote:
Since this is new hw support, is there also open source userspace using
all this?
The VIC HW in Tegra186 is backwards compatible with the one in Tegra210,
which has open userspace (https://github.com/cyndis/vaapi-tegra-driver),
so that userspace
to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mikko-Perttunen/arm64-tegra-Add-BPMP-thermal-sensor-to-Tegra186/20170726-055759
base: https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
config: arm64-allnoconfig (attached as .config)
compiler: aarch64
Reviewed-by: Mikko Perttunen
On 23.04.2018 12:54, Dmitry Osipenko wrote:
If IOVA allocation or IOMMU mapping fails, dma_free_wc() is invoked with
size=0 because of a typo, that triggers "kernel BUG at mm/vmalloc.c:124!".
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/cdma.c
On 04/09/2018 04:21 PM, Rob Herring wrote:
On Mon, Apr 9, 2018 at 12:38 AM, Mikko Perttunen wrote:
Rob,
Please don't top post to lists.
this binding is for a specific IP block (for measuring/aggregating input
pulses) on the Tegra186 SoC, so I don't think it fits into any generic
binding
Rob,
this binding is for a specific IP block (for measuring/aggregating input
pulses) on the Tegra186 SoC, so I don't think it fits into any generic
binding.
Thanks,
Mikko
On 03/27/2018 05:52 PM, Rob Herring wrote:
On Wed, Mar 21, 2018 at 10:10:38AM +0530, Rajkumar Rampelli wrote:
Supply
On 02/28/2018 08:12 AM, Rajkumar Rampelli wrote:
On Wednesday 28 February 2018 11:28 AM, Guenter Roeck wrote:
On 02/27/2018 09:38 PM, Rajkumar Rampelli wrote:
On Wednesday 21 February 2018 08:20 PM, Guenter Roeck wrote:
On 02/20/2018 10:58 PM, Rajkumar Rampelli wrote:
Add generic PWM based
On 11.01.2018 23:56, Rob Herring wrote:
On Mon, Jan 08, 2018 at 06:54:37AM +0200, Mikko Perttunen wrote:
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to bo
On 16.02.2018 14:33, Philippe Ombredanne wrote:
Mikko,
On Thu, Feb 15, 2018 at 3:52 PM, Mikko Perttunen wrote:
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enou
channel are supported, and channels
are not required to be placed contiguously in memory. The same
configuration also works on T186 so we end up with less code.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 142 +++---
include/soc/tegra
e required in the BPMP driver to support the
new channel layout in Tegra194.
The series has been tested on Tegra186 (Jetson TX2) and Tegra194
(P2972).
Cheers,
Mikko
Mikko Perttunen (7):
firmware: tegra: Simplify channel management
soc/tegra: Add Tegra194 SoC configuration option
soc/tegra: pmc: Ad
Add device tree files for the Tegra194 P2972- development board.
The board consists of the P2888 compute module and the P2822 baseboard.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/Makefile| 1 +
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 248
The Tegra194 PMC is mostly compatible with Tegra186, including in all
currently supported features. As such, add a new compatibility string
but point to the existing Tegra186 SoC data for now.
Signed-off-by: Mikko Perttunen
---
drivers/soc/tegra/pmc.c | 1 +
1 file changed, 1 insertion(+)
diff
The Tegra194 power management controller has one additional register
aperture to be specified in the device tree node.
Signed-off-by: Mikko Perttunen
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt | 2 ++
1 file changed, 2 insertions(+)
diff
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to boot to UART console.
Signed-off-by: Mikko Perttunen
---
Notes:
v4:
- fixed copyright headers
Add compatibility strings for supported but undocumented Tegra chips
(Tegra114/124/132/210/186/194) and reference boards.
Signed-off-by: Mikko Perttunen
Reviewed-by: Rob Herring
---
Notes:
v2:
- add patch
Documentation/devicetree/bindings/arm/tegra.txt | 16
1 file
Add the configuration option to enable support for the Tegra194
system-on-chip, and enable it by default in the arm64 defconfig.
Signed-off-by: Mikko Perttunen
---
arch/arm64/configs/defconfig | 1 +
drivers/soc/tegra/Kconfig| 10 ++
2 files changed, 11 insertions(+)
diff --git
Add the configuration option to enable support for the Tegra194
system-on-chip, and enable it by default in the arm64 defconfig.
Signed-off-by: Mikko Perttunen
---
arch/arm64/configs/defconfig | 1 +
drivers/soc/tegra/Kconfig| 10 ++
2 files changed, 11 insertions(+)
diff --git
e required in the BPMP driver to support the
new channel layout in Tegra194.
The series has been tested on Tegra186 (Jetson TX2) and Tegra194
(P2972).
Cheers,
Mikko
Mikko Perttunen (7):
firmware: tegra: Simplify channel management
soc/tegra: Add Tegra194 SoC configuration option
soc/tegra: pmc: Ad
Add compatibility strings for supported but undocumented Tegra chips
(Tegra114/124/132/210/186/194) and reference boards.
Signed-off-by: Mikko Perttunen
---
Notes:
v2:
- add patch
Documentation/devicetree/bindings/arm/tegra.txt | 16
1 file changed, 16 insertions
Add device tree files for the Tegra194 P2972- development board.
The board consists of the P2888 compute module and the P2822 baseboard.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/Makefile| 1 +
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 248
The Tegra194 PMC is mostly compatible with Tegra186, including in all
currently supported features. As such, add a new compatibility string
but point to the existing Tegra186 SoC data for now.
Signed-off-by: Mikko Perttunen
---
drivers/soc/tegra/pmc.c | 1 +
1 file changed, 1 insertion(+)
diff
channel are supported, and channels
are not required to be placed contiguously in memory. The same
configuration also works on T186 so we end up with less code.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 142 +++---
include/soc/tegra
The Tegra194 power management controller has one additional register
aperture to be specified in the device tree node.
Signed-off-by: Mikko Perttunen
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt | 2 ++
1 file changed, 2 insertions(+)
diff
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to boot to UART console.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi
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