eported-by: Nathan Chancellor
Signed-off-by: Nicolas Saenz Julienne
---
drivers/of/address.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 275d764efc77..89822e191956 100644
--- a/drivers/of/address.c
+++ b/drivers/of/ad
Hi Nathan,
On Thu, 2020-07-30 at 18:10 -0700, Nathan Chancellor wrote:
> On Tue, Jul 28, 2020 at 12:09:18PM +0200, Christoph Hellwig wrote:
> > Ok, I found a slight bug that wasn't intended. I wanted to make sure
> > we can always fall back to a lower pool, but got that wrong. Should be
> > fixe
Hi Jim,
thanks for having a go at this! My two cents.
On Tue, 2020-05-19 at 16:34 -0400, Jim Quinlan wrote:
> The device variable 'dma_pfn_offset' is used to do a single
> linear map between cpu addrs and dma addrs. The variable
> 'dma_map' is added to struct device to point to an array
> of mult
Hi Jim,
On Tue, 2020-05-19 at 16:34 -0400, Jim Quinlan wrote:
> From: Jim Quinlan
>
> Add in compatibility strings and code for three Broadcom STB chips.
> Some of the register locations, shifts, and masks are different
> for certain chips, requiring the use of different constants based
> on of_
On Tue, 2020-05-19 at 16:34 -0400, Jim Quinlan wrote:
> From: Jim Quinlan
>
> The proper value of the parameter SCB_MAX_BURST_SIZE varies
> per chip. The 2711 family requires 128B whereas other devices
> can employ 512. The assignment is complicated by the fact
> that the values for this two-bi
On Wed, 2020-05-20 at 10:30 -0400, Jim Quinlan wrote:
> On Wed, May 20, 2020 at 7:51 AM Nicolas Saenz Julienne
> wrote:
[...]
> > > +
> > > +static const struct pcie_cfg_data bcm7278_cfg = {
> > > + .reg_field_info = pcie_reg_field_i
Hi Maxime,
On Fri, 2020-05-15 at 10:19 +0200, Maxime Ripard wrote:
> Hi Nicolas,
>
> On Mon, May 04, 2020 at 02:05:47PM +0200, Nicolas Saenz Julienne wrote:
> > Hi Maxime, as always, thanks for the series!
> > Some extra context, and comments below.
> >
> >
Hi Jim,
On Fri, 2020-07-24 at 16:33 -0400, Jim Quinlan wrote:
> The Raspberry Pi (RPI) is currently the only chip using this driver
> (pcie-brcmstb.c). There, only one memory controller is used, without an
> extension region, and the SCB0 viewport size is set to the size of the
> first and only d
rally done when parsing ranges.
Add test to catch regressions on that specific quirk as developers will
be tempted to edit it out in favor of the default method.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/of/unittest-data/tests-address.dtsi | 10 +-
drivers/of/unittest.c
From: Christoph Hellwig
When allocating coherent pool memory for an IOMMU mapping we don't care
about the DMA mask. Move the guess for the initial GFP mask into the
dma_direct_alloc_pages and pass dma_coherent_ok as a function pointer
argument so that it doesn't get applied to the IOMMU case.
S
There is no guarantee to CMA's placement, so allocating a zone specific
atomic pool from CMA might return memory from a completely different
memory zone. To get around this double check CMA's placement before
allocating from it.
Signed-off-by: Nicolas Saenz Julienne
---
Change
or calling it
Christoph Hellwig (1):
dma-pool: fix coherent pool allocations for IOMMU mappings
Nicolas Saenz Julienne (1):
dma-pool: Only allocate from CMA when in same memory zone
drivers/iommu/dma-iommu.c | 4 +-
include/linux/dma-direct.h | 3 -
include/linux/dma-mapping.h | 5
On Thu, 2020-08-06 at 07:18 +0200, Christoph Hellwig wrote:
> On Tue, Aug 04, 2020 at 11:43:15AM +0200, Nicolas Saenz Julienne wrote:
> > > Second I don't see the need (and actually some harm) in preventing
> > > GFP_KERNEL
> > > allocations from dipping into
There is no guarantee to CMA's placement, so allocating a zone specific
atomic pool from CMA might return memory from a completely different
memory zone. To get around this double check CMA's placement before
allocating from it.
Signed-off-by: Nicolas Saenz Julienne
[hch: rebase
From: Christoph Hellwig
When allocating coherent pool memory for an IOMMU mapping we don't care
about the DMA mask. Move the guess for the initial GFP mask into the
dma_direct_alloc_pages and pass dma_coherent_ok as a function pointer
argument so that it doesn't get applied to the IOMMU case.
S
rior calling it
Christoph Hellwig (1):
dma-pool: fix coherent pool allocations for IOMMU mappings
Nicolas Saenz Julienne (1):
dma-pool: Only allocate from CMA when in same memory zone
drivers/iommu/dma-iommu.c | 4 +-
include/linux/dma-direct.h | 3 -
include/linux/dma-mapping.h | 5 +-
kern
On Fri, 2020-08-07 at 07:21 +0200, Christoph Hellwig wrote:
> On Thu, Aug 06, 2020 at 08:47:55PM +0200, Nicolas Saenz Julienne wrote:
> > There is no guarantee to CMA's placement, so allocating a zone specific
> > atomic pool from CMA might return memory from a completely diffe
seen with big crash
kernel allocations.
Signed-off-by: Nicolas Saenz Julienne
---
Whith this patch, on a 8GB RPi4 the setup looks like this:
DMA [mem 0x-0x3fff]
DMA32[mem 0x4000-0x]
Normal [mem 0x00
@Maxime it seems you forgot to CC me on the series :)
On Mon, 2021-01-11 at 08:54 -0800, Florian Fainelli wrote:
>
> On 1/11/2021 6:22 AM, Maxime Ripard wrote:
> > The BCM2711 has a number of instances of interrupt controllers handled
> > by the driver behind the BRCMSTB_L2_IRQ Kconfig option (ir
On Fri, 2020-12-11 at 17:47 +0100, Nicolas Saenz Julienne wrote:
> The aim of this series is to add support to the fan found on RPi's PoE
> HAT. Some commentary on the design can be found below. But the imporant
> part to the people CC'd here not involved with PWM is that, in
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
Acked-by: Bartosz Golaszewski
---
drivers/gpio/gpio-raspberrypi-exp.c | 2 +-
1 file changed, 1 insertion(
upon
unbinding consumer drivers.
Suggested-by: Uwe Kleine-König
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
Changes since v5:
- Add comment to avoid people blindly switching the memory allocation
to the devm variant.
- Fix function documentation as per Flor
unction
- Use kref
Changes since v2:
- Introduce devm_rpi_firmware_get()
- Small cleanups in PWM driver
Changes since v1:
- Address PWM driver changes
- Fix binding, now with 2 cells
Nicolas Saenz Julienne (11):
firmware: raspberrypi: Keep count of all consumers
firmware: raspberrypi: I
It'll simplify the firmware handling for most consumers.
Suggested-by: Bartosz Golaszewski
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
Changes since v4:
- Rearrange function calls for clarity, same functionality
Changes since v2:
- Create devm_rpi_firmwar
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 2 +-
1 file changed, 1 insertion(+), 1 del
Adds support to control the PWM bus available in official Raspberry Pi
PoE HAT. Only RPi's co-processor has access to it, so commands have to
be sent through RPi's firmware mailbox interface.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v3:
- Rename compatible string
There is no use for the firmware interface after getting the touch
buffer address, so release it.
Signed-off-by: Nicolas Saenz Julienne
Acked-by: Dmitry Torokhov
---
Changes since v5:
- Correct commit message
Changes since v3:
- Release firmware handle in probe function
Changes since v2
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/reset/reset-raspberrypi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/clk/bcm/clk-raspberrypi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
The PWM bus controlling the fan in RPi's official PoE hat can only be
controlled by the board's co-processor.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Rob Herring
---
Changes since v4:
- Rename compatible string to be more explicit with the bus' limitations
Changes s
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/soc/bcm/raspberrypi-power.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
This is an example on how to enable the fan on top of RPi's official PoE
hat.
Signed-off-by: Nicolas Saenz Julienne
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 54 +++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
b/arch/arm
co-processor to edit
before booting the system so as for Linux not to overwrite that memory
and to expose it as an nvmem device.
Signed-off-by: Nicolas Saenz Julienne
Tested-by: Tim Gover
[1]
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711_bootloader_config.md
---
C
drivers and user-space, the driver
models the reserved memory area as an nvmem device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Rob Herring
Tested-by: Tim Gover
---
Changes since v1:
- Remove reserved memory phandle indirection by directly creating a
platform device from the reserved
rmem.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Run yamllint and fix indentation issues
Changes since v1:
- Update schema to new driver design
.../devicetree/bindings/nvmem/rmem.yaml | 49 +++
1 file changed, 49 insertions(+)
create mode 1
i.org/documentation/hardware/raspberrypi/bcm2711_bootloader_config.md
---
Changes since v2:
- Fix DT bingins
Changes since v1:
- Avoid the reserved-memory indirection by integrating the nvmem driver
into the reserved memory node.
Nicolas Saenz Julienne (5):
dt-bindings: nvmem: Add bindings for r
It'll be used by the RPi4 family of boards to access its bootloader
configuration.
Signed-off-by: Nicolas Saenz Julienne
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 9957b66
It'll be used by the RPi4 family of boards to access its bootloader
configuration.
Signed-off-by: Nicolas Saenz Julienne
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
Regards,
Nicolas
Hi Guenter,
I found patches #2 and #3 fixed an issue for us at suse. Are you planning on
sending a v2? Do you mind if I give it a try?
Regards,
Nicolas
re no more transfer attempts
with odd buffer addresses.
Cc: Boris ARZUR
Cc: Douglas Anderson
Signed-off-by: Guenter Roeck
Reviewed-by: Douglas Anderson
Fixes: 151d0cbdbe860 ("usb: dwc2: make the scheduler handle excessive NAKs
better")
Signed-off-by: Nicolas Saenz Julienne
Tested-by
Fixes: 7359d482eb4d3 ("staging: HCD files for the DWC2 driver")
Signed-off-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
---
drivers/usb/dwc2/hcd_intr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/
I'm picking up this series by Guenter Roeck as he stated he has no time
for it ATM. It was found to solve some unaligned DMA access issues on
Raspberry Pi 3. You can find the original discussion here:
https://lore.kernel.org/linux-usb/20200226210414.28133-1-li...@roeck-us.net/
I removed the fist p
y: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
---
drivers/usb/dwc2/hcd.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index e9ac215b9663..fc3269f5faf1 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/d
On Thu, 2020-12-17 at 19:16 -0800, Saravana Kannan wrote:
> As discussed in LPC 2020, cyclic dependencies in firmware that couldn't
> be broken using logic was one of the last remaining reasons
> fw_devlink=on couldn't be set by default.
>
> This series changes fw_devlink so that when a cyclic dep
Hi All,
On Tue, 2021-01-12 at 16:03 -0800, Florian Fainelli wrote:
> On 1/5/21 7:41 PM, Claire Chang wrote:
> > Add the initialization function to create restricted DMA pools from
> > matching reserved-memory nodes in the device tree.
> >
> > Signed-off-by: Claire Chang
> > ---
> > include/linu
refcount, then #2 the devm function
- Fix touchscreen function
- Use kref
Changes since v2:
- Introduce devm_rpi_firmware_get()
- Small cleanups in PWM driver
Changes since v1:
- Address PWM driver changes
- Fix binding, now with 2 cells
Nicolas Saenz Julienne (11):
firmware: raspberrypi: Keep
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
Acked-by: Bartosz Golaszewski
---
drivers/gpio/gpio-raspberrypi-exp.c | 2 +-
1 file changed, 1 insertion(
Adds support to control the PWM bus available in official Raspberry Pi
PoE HAT. Only RPi's co-processor has access to it, so commands have to
be sent through RPi's firmware mailbox interface.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v6:
- Use %pe
- Round divisions prop
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 2 +-
1 file changed, 1 insertion(+), 1 del
There is no use for the firmware interface after getting the touch
buffer address, so release it.
Signed-off-by: Nicolas Saenz Julienne
Acked-by: Dmitry Torokhov
Reviewed-by: Florian Fainelli
---
Changes since v5:
- Correct commit message
Changes since v3:
- Release firmware handle in
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/reset/reset-raspberrypi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
This is an example on how to enable the fan on top of RPi's official PoE
hat.
Signed-off-by: Nicolas Saenz Julienne
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 54 +++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
b/arch/arm
The PWM bus controlling the fan in RPi's official PoE hat can only be
controlled by the board's co-processor.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Rob Herring
---
Changes since v4:
- Rename compatible string to be more explicit with the bus' limitations
Changes s
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
---
drivers/soc/bcm/raspberrypi-power.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
It'll simplify the firmware handling for most consumers.
Suggested-by: Bartosz Golaszewski
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
Reviewed-by: Bartosz Golaszewski
---
Changes since v4:
- Rearrange function calls for clarity, same functionality
Changes sin
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
Acked-by: Stephen Boyd
drivers/clk/bcm/clk-raspberrypi.c | 2 +-
1 file changed, 1 insertion(+), 1 del
upon
unbinding consumer drivers.
Suggested-by: Uwe Kleine-König
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Florian Fainelli
Reviewed-by: Stephen Boyd
Reviewed-by: Bartosz Golaszewski
---
Changes since v5:
- Add comment to avoid people blindly switching the memory allocation
to the
Hi Guenter, Doug, thanks for having a look at this.
On Wed, 2021-01-13 at 19:07 -0800, Guenter Roeck wrote:
> On Wed, Jan 13, 2021 at 03:20:55PM -0800, Doug Anderson wrote:
> > Hi,
> >
> [ ... ]
> >
> > It's been long enough ago that I've forgotten where this was left off,
> > but IIRC the 3 pat
Hi Uwe, thanks for the review.
On Tue, 2021-01-12 at 10:18 +0100, Uwe Kleine-König wrote:
[...]
> > +duty_cycle = DIV_ROUND_CLOSEST_ULL(state->duty_cycle *
> > RPI_PWM_MAX_DUTY,
> > + RPI_PWM_PERIOD_NS);
>
> ... and round down here.
Hi Chen, thanks for looking at this.
On Sat, 2020-12-26 at 11:35 +0800, Chen Zhou wrote:
> If the memory reserved for crash dump kernel falled in ZONE_DMA32,
> the devices in crash dump kernel need to use ZONE_DMA will alloc fail.
>
> Fix this by reserving low memory in ZONE_DMA if CONFIG_ZONE_DM
f the Raspberry Pi 4, it'll only span the 30-bit address
> space. Update the comments.
>
> Signed-off-by: Chen Zhou
> ---
Reviewed-by: Nicolas Saenz Julienne
> arch/arm64/mm/init.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --g
Hi Stefan,
On Wed, 2021-03-24 at 16:16 +0100, Stefan Wahren wrote:
> Hi Nicolas,
>
> Am 22.03.21 um 19:58 schrieb Nicolas Saenz Julienne:
> > From: Nicolas Saenz Julienne
> >
> > Force emmc2's frequency to 150MHz as the default 100MHz (set by FW)
> > seem
On Wed, 2021-03-24 at 09:27 -0700, Scott Branden wrote:
> On 2021-03-23 2:24 p.m., Nicolas Saenz Julienne wrote:
> > On Tue, 2021-03-23 at 15:08 -0600, Rob Herring wrote:
> > > On Mon, Mar 22, 2021 at 12:11:29PM -0700, Scott Branden wrote:
> > > > On 2021-03-22 11:5
On Thu, 2021-03-25 at 14:31 +0100, Marek Szyprowski wrote:
> Hi
>
> On 10.02.2021 12:44, Tudor Ambarus wrote:
> > This is a follow-up for:
> > commit 3c9ea42802a1 ("clk: Mark fwnodes when their clock provider is
> > added/removed")
> >
> > The above commit updated the deprecated of_clk_add_provi
by: Marek Szyprowski
Signed-off-by: Nicolas Saenz Julienne
---
drivers/clk/bcm/clk-raspberrypi.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/bcm/clk-raspberrypi.c
b/drivers/clk/bcm/clk-raspberrypi.c
index f89b9cfc4309..27e85687326f 100644
--- a/driv
On Tue, 2021-03-23 at 15:08 -0600, Rob Herring wrote:
> On Mon, Mar 22, 2021 at 12:11:29PM -0700, Scott Branden wrote:
> > On 2021-03-22 11:58 a.m., Nicolas Saenz Julienne wrote:
> > > Convert the brcm,iproc-sdhci binding to DT schema format using json-schema
> > >
&
Hi Alvaro,
On Tue, 2021-02-23 at 18:00 +0100, Álvaro Fernández Rojas wrote:
> Some devices may need to perform a reset before using the RNG, such as the
> BCM6368.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v3: make resets required if brcm,bcm6368-rng.
> v2: document reset support.
>
>
Sorry Alvaro I missed you sent a v5 already. See my comments in v3.
Regards,
Nicolas
On Thu, 2021-03-04 at 08:33 +0100, Álvaro Fernández Rojas wrote:
> Some devices may need to perform a reset before using the RNG, such as the
> BCM6368.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v5: no
On Thu, 2021-03-04 at 13:18 +0100, Álvaro Fernández Rojas wrote:
>
> > El 4 mar 2021, a las 13:07, Nicolas Saenz Julienne
> > escribió:
> >
> > Hi Alvaro,
> >
> > On Tue, 2021-02-23 at 18:00 +0100, Álvaro Fernández Rojas wrote:
> > > Some devi
Hi Greg.
On Thu, 2021-03-04 at 14:46 +0100, Greg KH wrote:
> On Wed, Mar 03, 2021 at 03:33:12PM +0800, Jing Xiangfeng wrote:
> > Using two distinct DMA zones turned out to be problematic. Here's an
> > attempt go back to a saner default.
>
> What problem does this solve? How does this fit into t
On Thu, 2021-03-04 at 15:17 +0100, Greg KH wrote:
> On Thu, Mar 04, 2021 at 03:05:32PM +0100, Nicolas Saenz Julienne wrote:
> > Hi Greg.
> >
> > On Thu, 2021-03-04 at 14:46 +0100, Greg KH wrote:
> > > On Wed, Mar 03, 2021 at 03:33:12PM +0800, Jing Xiangfeng wrote:
On Wed, 2021-03-03 at 10:29 +0100, Álvaro Fernández Rojas wrote:
> Hi Herbert,
>
> > El 3 mar 2021, a las 10:20, Herbert Xu
> > escribió:
> >
> > On Sat, Feb 20, 2021 at 08:12:45PM +0100, Álvaro Fernández Rojas wrote:
> > >
> > > I ran rngtest and this is what I got:
> >
> > This is meaningle
On Mon, 2021-03-22 at 14:40 -0400, Jon Masters wrote:
> On 3/22/21 2:34 PM, Jon Masters wrote:
> > Hi Nicolas,
> >
> > On 11/7/19 4:56 AM, Nicolas Saenz Julienne wrote:
> > > With the introduction of ZONE_DMA in arm64 we moved the default CMA and
> > > crash
x27;s VPU clock configured at 500MHz or more, lower clocks are OK.
There is no specific command that will time out, it seems random.
I found out that by bumping the controller's frequency to 150MHz the
issue disapears. So let's do that.
Regards,
Nicolas
---
Nicolas Saenz Julienne (4):
Convert the brcm,iproc-sdhci binding to DT schema format using json-schema
Signed-off-by: Nicolas Saenz Julienne
---
.../bindings/mmc/brcm,iproc-sdhci.yaml| 58 +++
.../bindings/mmc/brcm,sdhci-iproc.txt | 37
2 files changed, 58 insertions(+), 37
From: Nicolas Saenz Julienne
devicetree might request a clock frequency different from whatever is
set-up by the bootloader. Make sure to setup the new rate.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/mmc/host/sdhci-iproc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Nicolas Saenz Julienne
Force emmc2's frequency to 150MHz as the default 100MHz (set by FW)
seems to interfere with the VPU clock when setup at frequencies bigger
than 500MHz (a pretty common case). This ends up causing unwarranted
SDHCI CMD hangs when no SD card is present.
Signed-o
Users might want to choose a different clock frequency than whatever the
bootloader provided at probe time. Add 'clock-frequency' bindings.
Signed-off-by: Nicolas Saenz Julienne
---
Documentation/devicetree/bindings/mmc/brcm,iproc-sdhci.yaml | 6 ++
1 file changed, 6 insertion
On Mon, 2021-03-22 at 12:11 -0700, Scott Branden wrote:
> On 2021-03-22 11:58 a.m., Nicolas Saenz Julienne wrote:
> > Convert the brcm,iproc-sdhci binding to DT schema format using json-schema
> >
> > Signed-off-by: Nicolas Saenz Julienne
> > ---
> > .../b
On Mon, 2021-03-22 at 12:06 -0700, Scott Branden wrote:
> 1st line of commit should be ARM: dts: bcm2711
Ouch, of course... Sorry for that.
Regards,
Nicolas
signature.asc
Description: This is a digitally signed message part
Hi Uwe,
On Fri, 2021-03-12 at 21:12 +0100, Uwe Kleine-König wrote:
> Hello Nicolas,
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2020 Nicolas Saenz Julienne
>
> 2021?
Yes.
> > + * For more information on Raspberry Pi's PoE hat se
On Thu, 2021-03-25 at 20:11 +0100, Stefan Wahren wrote:
> Am 24.03.21 um 16:34 schrieb Nicolas Saenz Julienne:
> > Hi Stefan,
> >
> > On Wed, 2021-03-24 at 16:16 +0100, Stefan Wahren wrote:
> > > Hi Nicolas,
> > >
> > > Am 22.03.21 um 19:58 schri
On Mon, 2021-04-12 at 09:52 +0200, Ulf Hansson wrote:
> On Tue, 6 Apr 2021 at 12:48, Nicolas Saenz Julienne wrote:
> >
> > Convert the brcm,iproc-sdhci binding to DT schema format using json-schema
> >
> > Signed-off-by: Nicolas Saenz Julienne
>
> Applied for
it seems random.
As an extra to this I also include a small fix, and convert the
controller's bindings to yaml.
Regards,
Nicolas
[1] https://lore.kernel.org/linux-mmc/20210322185816.27582-1-nsa...@kernel.org/
---
Nicolas Saenz Julienne (3):
dt-bindings: mmc: iproc-sdhci: Convert to json
Convert the brcm,iproc-sdhci binding to DT schema format using json-schema
Signed-off-by: Nicolas Saenz Julienne
---
.../bindings/mmc/brcm,iproc-sdhci.yaml| 63 +++
.../bindings/mmc/brcm,sdhci-iproc.txt | 37 ---
2 files changed, 63 insertions(+), 37
rnel.org/T/#m11f2783a09b581da6b8a15f302625b43a6ecdeca
Fixes: f84e411c85be ("mmc: sdhci-iproc: Add support for emmc2 of the BCM2711")
Signed-off-by: Nicolas Saenz Julienne
---
drivers/mmc/host/sdhci-iproc.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host
The controller doesn't seem to pick-up on clock changes, so set the
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN flag to query the clock frequency
directly from the clock.
Fixes: f84e411c85be ("mmc: sdhci-iproc: Add support for emmc2 of the BCM2711")
Signed-off-by: Nicolas Saenz Julienne
-
On Tue, 2021-04-06 at 19:59 +0200, Stefan Wahren wrote:
> Hi Nicolas,
>
> Am 06.04.21 um 12:48 schrieb Nicolas Saenz Julienne:
> > There is a known bug on BCM2711's SDHCI core integration where the
> > controller will hang when the difference between the core clock an
On Tue, 2021-03-16 at 13:48 -0600, Rob Herring wrote:
> Users of common properties shouldn't have a type definition as the
> common schemas already have one. Drop all the unnecessary type
> references in the tree.
>
> A meta-schema update to catch these is pending.
>
>
ot;)
Signed-off-by: Nicolas Saenz Julienne
---
@arndb: This was just meged into the arm-soc tree some days ago. Should I
prepare a second PR once it's been reviewed?
drivers/pwm/pwm-raspberrypi-poe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-raspberr
Hi Al,
On Wed, 2021-04-07 at 16:37 -0400, Alan Cooper wrote:
> Nicolas,
>
> I got a better description of the failure and it looks like the bus
> clock needs to be limited to 300KHz for a 500MHz core clock.
> What's happening is that an internal reset sequence is needed after a
> command timeout
The @kernel.org e-mail address is likely to last longer than the current
one, so use it.
Signed-off-by: Nicolas Saenz Julienne
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index d269763af39d..c8f32b7c1e06 100644
--- a/MAINTAINERS
Hi again,
On Wed, 2021-04-07 at 16:37 -0400, Alan Cooper wrote:
> Nicolas,
>
> I got a better description of the failure and it looks like the bus
> clock needs to be limited to 300KHz for a 500MHz core clock.
> What's happening is that an internal reset sequence is needed after a
> command timeo
Add my kernel.org address for old email address.
Signed-off-by: Nicolas Saenz Julienne
---
.mailmap | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.mailmap b/.mailmap
index 78835e80214a..b407e1192fb3 100644
--- a/.mailmap
+++ b/.mailmap
@@ -260,6 +260,8 @@ Nguyen Anh Quynh
Nicolas
Hi Alan,
On Thu, 2021-04-01 at 11:23 -0400, Alan Cooper wrote:
> Nicolas,
>
> Sorry, I just noticed this thread.
> This is a known bug in some newer Arasan cores.
> The problem happens when the difference between the core clock and the bus
> clock is too great.
> Limiting the clock to 200KHz mini
On Wed, 2021-03-31 at 12:25 -0700, Stephen Boyd wrote:
> Quoting Geert Uytterhoeven (2021-03-31 00:05:00)
> > On Wed, Mar 31, 2021 at 4:22 AM Stephen Boyd wrote:
> > > > > Does it have any use?
> > > >
> > > > of_clk_del_provider() removes the first provider found with node ==
> > > > NULL.
> >
Hi All,
On Mon, 2020-11-23 at 19:38 +0100, Nicolas Saenz Julienne wrote:
> Adds support to control the PWM bus available in official Raspberry Pi
> PoE HAT. Only RPi's co-processor has access to it, so commands have to
> be sent through RPi's firmware mailbox interface.
On Thu, 2020-12-10 at 21:54 +0800, Zheng Yongjun wrote:
> Simplify the return expression.
>
> Signed-off-by: Zheng Yongjun
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
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Hi Catalin, James,
sorry for the late reply but I got sidetracked.
On Fri, 2020-11-13 at 11:29 +, Catalin Marinas wrote:
[...]
> > > > Let me stress that knowing the DMA constraints in the system before
> > > > reserving
> > > > crashkernel's regions is necessary if we ever want it to work
>
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