ad of in(out)put_word_width.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_asrc.c | 56 +++-
> sound/soc/fsl/fsl_asrc.h | 4 +--
> 2 files changed, 40 insertions(+), 20 deletions(-)
>
> diff --git a/soun
On Tue, Sep 10, 2019 at 02:22:06AM +, S.j. Wang wrote:
> Hi
>
> >
> > On Mon, Sep 09, 2019 at 06:33:19PM -0400, Shengjiu Wang wrote:
> > > snd_pcm_format_t is more formal than enum asrc_word_width, which
> > has
> > > two property, width and physical width, which is more accurate than
> > > e
On Tue, Sep 10, 2019 at 02:07:25AM +, S.j. Wang wrote:
> > On Mon, Sep 09, 2019 at 06:33:20PM -0400, Shengjiu Wang wrote:
> > > The ASRC support 24bit/16bit/8bit input width, so S20_3LE format
> > > should not be supported, it is word width is 20bit.
> >
> > I thought 3LE used 24-bit physical
On Wed, Sep 11, 2019 at 12:08:07PM +0100, Mark Brown wrote:
> On Mon, Sep 09, 2019 at 06:52:13PM -0700, Nicolin Chen wrote:
>
> > And a quick feeling is that below code is mostly identical to what
> > is in the soc-generic-dmaengine-pcm.c file. So I'm wondering if we
>
Daniel Baluta
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_sai.c | 21 +++--
> sound/soc/fsl/fsl_sai.h | 1 +
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> index fe126029f4
On Wed, Sep 11, 2019 at 04:06:41PM +0300, Daniel Baluta wrote:
> On Wed, Sep 11, 2019 at 2:01 PM Mark Brown wrote:
> >
> > On Thu, Sep 05, 2019 at 06:29:39PM -0700, Nicolin Chen wrote:
> > > On Sat, Aug 31, 2019 at 12:59:10AM +0300, Daniel Baluta wrote:
> >
&g
On Fri, Sep 13, 2019 at 05:48:40AM +, S.j. Wang wrote:
> Hi
>
> >
> > On Tue, Sep 10, 2019 at 02:07:25AM +, S.j. Wang wrote:
> > > > On Mon, Sep 09, 2019 at 06:33:20PM -0400, Shengjiu Wang wrote:
> > > > > The ASRC support 24bit/16bit/8bit input width, so S20_3LE format
> > > > > should n
ng a constraint on
> SNDRV_PCM_HW_PARAM_PERIOD_SIZE to be multiple of tx/rx maxburst value.
>
> Signed-off-by: Mihai Serban
> Signed-off-by: Daniel Baluta
Acked-by: Nicolin Chen
Thanks
> ---
> Changes since v1:
> * rename variable to use_edma as per Nicolin's su
On Fri, Sep 13, 2019 at 10:28:06PM +0300, Daniel Baluta wrote:
> From: Shengjiu Wang
>
> When Tx is synchronous with receiver the RMR should not be changed.
> When Rx is synchronous with transmitter the TMR should not be changed.
Would you please explain why and what bug this patch fixes?
We mig
Hello Daniel,
On Fri, Sep 13, 2019 at 10:28:07PM +0300, Daniel Baluta wrote:
> The SAI transmitter and receiver can be configured to operate with
> synchronous bit clock and frame sync.
>
> When Tx is synchronous with receiver RCSR.RE should be set in playback
> to enable the receiver which provi
On Fri, Sep 13, 2019 at 05:42:13PM +0800, Shengjiu Wang wrote:
> Add the DT binding documentation for NXP MQS driver
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> Changes in v2
> -refine the comments for properties
>
> .../devicetree/bindings/so
Tx section.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> Changes in v2
> - use devm_platform_ioremap_resource
>
> sound/soc/fsl/Kconfig | 10 ++
> sound/soc/fsl/Makefile | 2 +
> sound/soc/fsl/fsl_mqs.c | 333
; is the volume is lower than expected, it likes 24bit data
> right shift 4 bits
>
> So replace S20_3LE with S24_3LE in supported list and add S8
> format in TX supported list
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_asrc.c | 5 +
On Tue, Sep 24, 2019 at 06:52:35PM +0800, Shengjiu Wang wrote:
> There is error "aplay: pcm_write:2023: write error: Input/output error"
> on i.MX8QM/i.MX8QXP platform for S24_3LE format.
>
> In i.MX8QM/i.MX8QXP, the DMA is EDMA, which don't support 24bit
> sample, but we didn't add any constraint
parate function
> snd_dmaengine_pcm_refine_runtime_hwparams, that other components
> which need this feature can call this function.
>
> Signed-off-by: Shengjiu Wang
Looks good to me.
Reviewed-by: Nicolin Chen
Just a small concern...
On Thu, Sep 26, 2019 at 09:29:51AM +0800, Shengjiu Wang wrote:
> static int fsl_asrc_dma_startup(struct snd_pcm_substream *substream)
> {
> +
> + release_pair = false;
> + ret = snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
This set_runtime_hwparams
sample, but we didn't add any constraint, that cause issues.
>
> So we need to query the caps of dma, then update the hw parameters
> according to the caps.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_asrc.c | 4 +--
> sound/soc
On Fri, Sep 20, 2019 at 04:53:16PM +0200, Thierry Reding wrote:
> From: Adrian Hunter
>
> Add host operation ->set_dma_mask() so that drivers can define their own
> DMA masks.
>
> Signed-off-by: Adrian Hunter
> Signed-off-by: Thierry Reding
Tested-by: Nicolin Chen
R
On Thu, Sep 19, 2019 at 08:11:41PM +0800, Shengjiu Wang wrote:
> When set the runtime hardware parameters, we may need to query
> the capability of DMA to complete the parameters.
>
> This patch is to Extract this operation from
> dmaengine_pcm_set_runtime_hwparams function to a separate function
Hello Shengjiu,
One issue for error-out and some nit-pickings inline. Thanks.
On Thu, Sep 19, 2019 at 08:11:42PM +0800, Shengjiu Wang wrote:
> There is error "aplay: pcm_write:2023: write error: Input/output error"
> on i.MX8QM/i.MX8QXP platform for S24_3LE format.
>
> In i.MX8QM/i.MX8QXP, the D
On Wed, Oct 23, 2019 at 03:29:49PM +0800, Shengjiu Wang wrote:
> xrun may happen at the end of stream, the
> trigger->fsl_esai_trigger_stop maybe called in the middle of
> fsl_esai_hw_reset, this may cause esai in wrong state
> after stop, and there may be endless xrun interrupt.
What about fsl_es
On Wed, Oct 23, 2019 at 06:25:20AM +, S.j. Wang wrote:
> > On Thu, Oct 17, 2019 at 02:21:08PM +0800, Shengjiu Wang wrote:
> > > For P2P output, the output divider should align with the output sample
> >
> > I think we should avoid "P2P" (or "M2M") keyword in the mainline code as
> > we know M2
On Fri, Oct 11, 2019 at 10:35:38PM +0800, YueHaibing wrote:
> gcc warn about this:
>
> sound/soc/fsl/fsl_mqs.c:146:1: warning:
> static is not at beginning of declaration [-Wold-style-declaration]
>
> Signed-off-by: YueHaibing
Acked-by: Nicolin Chen
> ---
5ac624058f ("ASoC: fsl_easrc: Add EASRC ASoC CPU DAI drivers")
> Signed-off-by: Arnd Bergmann
Acked-by: Nicolin Chen
Hello Shengjiu,
On Thu, Oct 17, 2019 at 02:21:08PM +0800, Shengjiu Wang wrote:
> For P2P output, the output divider should align with the output sample
I think we should avoid "P2P" (or "M2M") keyword in the mainline
code as we know M2M will never get merged while somebody working
with the mainli
CONFIG_CMA_ALIGNMENT.
This patch adds a cma_align to take care of cma_alloc() and prevent
the align from being overwritten.
Fixes: fdaeec198ada ("dma-contiguous: add dma_{alloc,free}_contiguous()
helpers")
Reported-by: Dafna Hirschfeld
Signed-off-by: Nicolin Chen
---
kernel/dma/co
On Mon, Feb 18, 2019 at 02:12:17PM +, Viorel Suman wrote:
> According to RM SPDIF TXCLK_DF mask is 7-bit wide.
>
> Signed-off-by: Viorel Suman
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_spdif.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> di
On Mon, Feb 18, 2019 at 03:25:00PM +, Viorel Suman wrote:
> According to RM SPDIF STC SYSCLK_DF field is 9-bit wide, values
> being in 0..511 range. Use a proper type to handle sysclk_df.
>
> Signed-off-by: Viorel Suman
Acked-by: Nicolin Chen
> ---
> sound/soc/fs
reduce CMA fragmentations resulted from trivial allocations.
Signed-off-by: Nicolin Chen
---
Robin/Christoph,
I have some personal priority to submit this patch. I understand
you might have other plan to clean up the code first. Just would
it be possible for you to review and apply this one if it doesn'
On Thu, Jan 17, 2019 at 10:06:36AM +0100, Stefan Agner wrote:
> Probe deferral is to be expected during normal operation, so avoid
> printing an error when it is encountered.
>
> Signed-off-by: Stefan Agner
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_spdif.c | 2 +-
&g
I am okay to remove it since it makes things clean. But
as you mentioned, we gotta be careful if code gets added later.
> Signed-off-by: Stefan Agner
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/imx-spdif.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> dif
On Thu, Jan 17, 2019 at 10:06:40AM +0100, Stefan Agner wrote:
> Not finding the codec/SSI instance can be due to probe deferral.
> Do not print error messages in those cases.
>
> Signed-off-by: Stefan Agner
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/imx-sgtl5000.c
On Thu, Jan 17, 2019 at 10:06:38AM +0100, Stefan Agner wrote:
> Probe deferral is to be expected during normal operation, so avoid
> printing an error when it is encountered.
>
> Signed-off-by: Stefan Agner
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/imx-sgtl5000.c
On Thu, Jan 17, 2019 at 10:06:39AM +0100, Stefan Agner wrote:
> Make sure to properly put the of node in case finding the codec
> fails.
>
> Fixes: 81e8e4926167 ("ASoC: fsl: add sgtl5000 clock support for imx-sgtl5000")
> Signed-off-by: Stefan Agner
Acked-by: Nicolin
tation.
>
> Viorel Suman (4):
> ASoC: fsl: Add Audio Mixer CPU DAI driver
> ASoC: add fsl_audmix DT binding documentation
> ASoC: fsl: Add Audio Mixer machine driver
> ASoC: add imx-audmix DT binding documentation
Reviewed-by: Nicolin Chen
On Thu, Jan 17, 2019 at 02:22:18PM -0800, Nicolin Chen wrote:
> On Thu, Jan 17, 2019 at 12:46:25PM +, Viorel Suman wrote:
> > The patchset adds NXP Audio Mixer (AUDMIX) device and machine
> > drivers and related DT bindings documentation.
> >
> > Changes since V
On Mon, Jan 07, 2019 at 11:35:55AM -0800, Guenter Roeck wrote:
> > + if (of_property_read_bool(np, "ti,single-shot"))
> > + ina->single_shot = true;
> > +
> ina->single_shot = of_property_read_bool(np, "ti,single-shot");
>
> No need to resend right now; let's wait for feedback f
On Fri, Jan 04, 2019 at 05:26:42PM -0800, Nicolin Chen wrote:
> Hi Stefan,
>
> Sorry for a super late reply. I took a long vacation.
>
> On Wed, Nov 21, 2018 at 10:16:09PM +, Brüns, Stefan wrote:
> > > > Another concern may be voltage drop over the shunt, but
On Thu, Jan 17, 2019 at 02:58:42PM -0800, Guenter Roeck wrote:
> "Right now" was supposed to mean that you should wait for Rob's
> feedback before sending v3 with the feedback above applied.
> Did you send that version ? I don't see it in patchwork, nor
> in my inbox.
Oh, sorry. Will resend it.
.
Changelog
v2->v3:
* Added "Reviewed-by" from Rob to PATCH-1
* Cleaned-up PATCH-2
v1->v2:
* Cleaned-up PATCH-2
Nicolin Chen (2):
dt-bindings: hwmon: ina3221: Add ti,single-shot property
hwmon: (ina3221) Implement ti,single-shot DT property
.../devicetree/bindings/hwmon/ina3
ingle-shot operating mode.
Signed-off-by: Nicolin Chen
Reviewed-by: Rob Herring
---
Changelog
v2->v3:
* Added "Reviewed-by" from Rob
v1->v2:
* N/A
Documentation/devicetree/bindings/hwmon/ina3221.txt | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicet
consuming mode to
single-shot mode, which will measure input on demand and then shut
down to save power.
So this patch implements the DT property accordingly.
Signed-off-by: Nicolin Chen
---
Changelog
v2->v3:
* Dropped useless if condition by using the return value directly.
v1->v2:
* Re
Hi Guenter,
On Thu, Jan 17, 2019 at 03:13:23PM -0800, Guenter Roeck wrote:
> I have one claim stating that your change won't make a difference,
> and your claim that it would. That leaves me with no choice but to
> spend a large amount of time with the datasheet, and possibly with
> my evaluation
use scnprintf which returns the number of
> characters actually written to the buffer, so the size variable will never
> exceed SIZE.
>
> Signed-off-by: Silvio Cesare
> Cc: Nicolin Chen
I think you probably need to run get_maintainer.pl for the patch
and should send to Mark Bro
On Fri, Jan 18, 2019 at 01:16:24PM +, Viorel Suman wrote:
> > > 1. Moved "dais" node from machine driver DTS node to device driver
> > > DTS node
> > > as suggested by Rob.
> > That was not what I suggested. You still have a virtual node which
> > looks to me to be unnecessary.
>
> To me rem
introduced
> by dev_err another underrun error will occur causing a vicious circle
> making impossible to stop CPU DAI.
>
> Signed-off-by: Shengjiu Wang
> Signed-off-by: Daniel Baluta
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_sai.c | 8
> 1 file changed, 4
Hello Shengjiu,
On Thu, May 23, 2019 at 09:53:42AM +, S.j. Wang wrote:
> > > + /*
> > > + * Add fifo reset here, because the regcache_sync will
> > > + * write one more data to ETDR.
> > > + * Which will cause channel shift.
> >
> > Sounds like a bug to me...should fix it f
On Fri, May 17, 2019 at 03:09:22AM +, S.j. Wang wrote:
> There is chip errata ERR008000, the reference doc is
> (https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf),
>
> The issue is "While using ESAI transmit or receive and
> an underrun/overrun happens, channel swap may occur.
> The only recove
On Thu, May 23, 2019 at 11:04:03AM +, S.j. Wang wrote:
> > On Thu, May 23, 2019 at 09:53:42AM +, S.j. Wang wrote:
> > > > > + /*
> > > > > + * Add fifo reset here, because the regcache_sync will
> > > > > + * write one more data to ETDR.
> > > > > + * Which will cause cha
On Fri, Apr 19, 2019 at 10:23:53AM +, S.j. Wang wrote:
> @@ -289,6 +318,12 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair
> *pair)
> return -EINVAL;
> }
>
> + ret = fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc);
Since the function always return
On Sat, Apr 20, 2019 at 07:23:59AM +, S.j. Wang wrote:
> > > /* Validate input and output sample rates */
> > > - for (in = 0; in < ARRAY_SIZE(supported_input_rate); in++)
> > > - if (inrate == supported_input_rate[in])
> > > + for (in = 0; in < ARRAY_SIZE(supported_as
On Sat, Apr 20, 2019 at 09:12:52AM +, Daniel Baluta wrote:
> From: Shengjiu Wang
>
> SAI has 4 clock sources, which can be selected using MSEL
> bit of SAI TCR2 register.
I have a doubt at this statement. As far as I can understand,
this MSEL is probably used by its internal clock MUX, so it
On Mon, Apr 22, 2019 at 03:30:26AM +, S.j. Wang wrote:
> > > SAI has 4 clock sources, which can be selected using MSEL bit of SAI
> > > TCR2 register.
> >
> > I have a doubt at this statement. As far as I can understand, this MSEL is
> > probably used by its internal clock MUX, so it's not rea
se mclk is externally provided.
>
> Signed-off-by: Shengjiu Wang
> Signed-off-by: Daniel Baluta
> Reviewed-by: Viorel Suman
Acked-by: Nicolin Chen
Hi Mark,
On Fri, May 03, 2019 at 01:27:31PM +0900, Mark Brown wrote:
> On Thu, May 02, 2019 at 09:13:58AM +, S.j. Wang wrote:
>
> > I am checking, but I don't know why this patch failed in your side. I
> > Tried to apply this patch on for-5.1, for 5.2, for-linus and for-next,
> > all are
n underrun/overrun happens, channel swap may occur.
> The only recovery mechanism is to reset the ESAI."
>
> This issue exist in imx3/imx5/imx6(partial) series.
>
> In this commit add a tasklet to handle reset of ESAI
> after xrun happens to recover the channel swap.
>
>
via enable_dma() callback in the device driver directly.
So this patch implements an enable_dma() callback in the sdhci-tegra,
in order to set an accurate DMA_BIT_MASK, other than 32-bit or 64-bit.
Signed-off-by: Nicolin Chen
---
drivers/mmc/host/sdhci-tegra.c | 28 +++-
On Tue, Aug 13, 2019 at 11:36:51AM +0200, Thierry Reding wrote:
> On Mon, Aug 12, 2019 at 03:42:17PM -0700, Nicolin Chen wrote:
> > Commit 68481a7e1c84 ("mmc: tegra: Mark 64 bit dma broken on Tegra186")
> > added a SDHCI_QUIRK2_BROKEN_64_BIT_DMA flag to let sdhci core fall
sdhci.c file, to set dma_mask via enable_dma() callback in
the device driver directly.
So this patch implements an enable_dma() callback in the sdhci-tegra,
in order to set an accurate DMA_BIT_MASK, other than just 32/64 bits.
Signed-off-by: Nicolin Chen
---
Changelog
v1->v2:
* Applied to older
On Sun, Aug 11, 2019 at 10:45:17PM +0300, Daniel Baluta wrote:
> From: Viorel Suman
>
> The SAI interface can be a clock supplier or consumer
> as a function of stream direction. e.g SAI can be master
> for Tx and slave for Rx.
>
> Signed-off-by: Viorel Suman
> Signed-off-by: Daniel Baluta
> -
On Sun, Aug 11, 2019 at 10:55:45PM +0300, Daniel Baluta wrote:
> An audio data frame consists of a number of slots one for each
> channel. In the case of I2S there are 2 data slots / frame.
>
> The maximum number of SAI slots / frame is configurable at
> IP integration time. This affects the width
On Fri, Aug 09, 2019 at 06:27:46PM +0800, Shengjiu Wang wrote:
> Add compatible string for imx6ull, from imx6ull platform,
> the issue of channel swap after xrun is fixed in hardware.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_esai
On Fri, Aug 09, 2019 at 06:27:47PM +0800, Shengjiu Wang wrote:
> Add new compatible string "fsl,imx6ull-esai" in the binding document.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> Documentation/devicetree/bindings/sound/fsl,esai.txt | 7 +++
On Mon, Jul 22, 2019 at 03:48:24PM +0300, Daniel Baluta wrote:
> From: Lucas Stach
>
> New revisions of the SAI IP block have even more differences that need
> be taken into account by the driver. To avoid sprinking compatible
> checks all over the driver move the current differences into of_matc
On Mon, Jul 22, 2019 at 03:48:29PM +0300, Daniel Baluta wrote:
> SAI supports up to 8 data lines. This property let the user
> configure how many data lines should be used per transfer
> direction (Tx/Rx).
>
> Signed-off-by: Daniel Baluta
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.t
On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> This allows combining multiple-data-line FIFOs into a
> single-data-line FIFO.
>
> Signed-off-by: Daniel Baluta
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 4
This should be sent to devicetree mail-list also.
On Mon, Jul 22, 2019 at 03:48:32PM +0300, Daniel Baluta wrote:
> New IP version introduces Version ID and Parameter registers
> and optionally added Timestamp feature.
>
> VERID and PARAM registers are placed at the top of registers
> address space and some registers are shifted according to
> the
On Thu, Jul 25, 2019 at 09:02:22AM +0300, Daniel Baluta wrote:
> On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen wrote:
> >
> > On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> > > This allows combining multiple-data-line FIFOs into a
> > > single-d
On Thu, Jul 25, 2019 at 07:31:05PM +0200, Dafna Hirschfeld wrote:
> On Thu, 2019-07-25 at 09:50 -0700, Nicolin Chen wrote:
> > On Thu, Jul 25, 2019 at 01:06:42PM -0300, Ezequiel Garcia wrote:
> > > I can't find a way to forward-redirect from Gmail, so I'm Ccing Dafna
There are two obvious bugs in these two functions. So having
two patches to fix them.
Nicolin Chen (2):
dma-contiguous: do not overwrite align in dma_alloc_contiguous()
dma-contiguous: page-align the size in dma_free_contiguous()
kernel/dma/contiguous.c | 12 +++-
1 file changed, 7
() was page
aligned before the right-shifting operation, while the new API
dma_free_contiguous() forgets to have PAGE_ALIGN() at the size.
So this patch simply adds it to prevent any corner case.
Fixes: fdaeec198ada ("dma-contiguous: add dma_{alloc,free}_contiguous()
helpers")
Signed-off-
On Sun, Jul 28, 2019 at 10:24:23PM +0300, Daniel Baluta wrote:
> SAI IP supports up to 8 data lines. The configuration of
> supported number of data lines is decided at SoC integration
> time.
>
> This patch adds definitions for all related data TX/RX registers:
> * TDR0..7, Transmit data re
On Sun, Jul 28, 2019 at 10:24:26PM +0300, Daniel Baluta wrote:
> SAI supports up to 8 data lines. This property let the user
> configure how many data lines should be used per transfer
> direction (Tx/Rx).
This sounds a bit less persuasive to me as we are adding a
DT property that's used to descri
On Sun, Jul 28, 2019 at 10:24:25PM +0300, Daniel Baluta wrote:
> SAI supports up to 8 Rx/Tx data lines which can be enabled
> using TCE/RCE bits of TCR3/RCR3 registers.
>
> Data lines to be enabled are read from DT fsl,dl-mask property.
> By default (if no DT entry is provided) only data line 0 is
On Mon, Jul 29, 2019 at 09:20:01PM +0100, Mark Brown wrote:
> On Mon, Jul 29, 2019 at 10:57:43PM +0300, Daniel Baluta wrote:
> > On Mon, Jul 29, 2019 at 10:42 PM Nicolin Chen
> > wrote:
> > > On Sun, Jul 28, 2019 at 10:24:23PM +0300, Daniel Baluta wrote:
>
> >
On Sun, Jul 28, 2019 at 10:24:29PM +0300, Daniel Baluta wrote:
> For i.MX7ULP and i.MX8MQ register map is changed. Add two new compatbile
> strings to differentiate this.
>
> Signed-off-by: Daniel Baluta
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 3 ++-
> 1 file changed, 2 ins
32 bit samples.
>
> Signed-off-by: Daniel Baluta
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_sai.c | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> index 54e5e9abae01..0fb6750fefd5 100644
On Tue, Aug 06, 2019 at 02:15:03PM +0300, Daniel Baluta wrote:
> On Tue, Jul 30, 2019 at 10:59 AM Nicolin Chen wrote:
> >
> > On Mon, Jul 29, 2019 at 09:20:01PM +0100, Mark Brown wrote:
> > > On Mon, Jul 29, 2019 at 10:57:43PM +0300, Daniel Baluta wrote:
> > > &
On Tue, Aug 06, 2019 at 06:23:27PM +0300, Daniel Baluta wrote:
> On Mon, Jul 29, 2019 at 11:22 PM Nicolin Chen wrote:
> >
> > On Sun, Jul 28, 2019 at 10:24:25PM +0300, Daniel Baluta wrote:
> > > SAI supports up to 8 Rx/Tx data lines which can be enabled
> > >
..7, Transmit data register
> * TFR0..7, Transmit FIFO register
> * RDR0..7, Receive data register
> * RFR0..7, Receive FIFO register
>
> Signed-off-by: Daniel Baluta
Acked-by: Nicolin Chen
Thanks
> ---
> sound/soc/fsl/fsl_sai.c | 76 +++
need to extend
> the mask to reflect this.
>
> Signed-off-by: Daniel Baluta
Acked-by: Nicolin Chen
Thanks
> ---
> sound/soc/fsl/fsl_sai.c | 6 --
> sound/soc/fsl/fsl_sai.h | 1 +
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/sound/soc/fsl/f
675cb141b91bec7&fileExt=.pdf
>
> Signed-off-by: Mihai Serban
> [initial coding in the NXP internal tree]
> Signed-off-by: Shengjiu Wang
> [bugfixing and cleanups]
> Signed-off-by: Daniel Baluta
> [adapted to linux-next]
Acked-by: Nicolin Chen
One small request that we
On Tue, Aug 06, 2019 at 06:12:14PM +0300, Daniel Baluta wrote:
> For i.MX7ULP and i.MX8MQ register map is changed. Add two new compatbile
> strings to differentiate this.
>
> Signed-off-by: Daniel Baluta
Looks good to me. As long as one of DT maintainers acks,
Acked-by: Nicolin C
/downloads
tegra186-p3310:
https://developer.nvidia.com/embedded/dlc/jetson-tx2-series-modules-oem-product-design-guide
tegra186-p2771-:
http://developer.nvidia.com/embedded/dlc/jetson-tx1-tx2-developer-kit-carrier-board-spec-20180618
Signed-off-by: Nicolin Chen
---
.../boot/dts/nvidia
already assume that any single segment must be no longer than
> max_len to begin with, this can easily be addressed by reshuffling the
> comparison.
>
> Fixes: 809eac54cdd6 ("iommu/dma: Implement scatterlist segment merging")
> Reported-by: Nicolin Chen
> Signed-off-b
Looks good to me, yet two small comments inline.
Please add this to this patch in the next version:
Acked-by: Nicolin Chen
On Wed, Jul 03, 2019 at 02:42:04PM +0800, shengjiu.w...@nxp.com wrote:
> +static int fsl_esai_register_restore(struct fsl_esai *esai_priv)
> +{
> +
On Wed, Jul 03, 2019 at 02:42:05PM +0800, shengjiu.w...@nxp.com wrote:
> From: Shengjiu Wang
>
> There is chip errata ERR008000, the reference doc is
> (https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf),
>
> The issue is "While using ESAI transmit or receive and
> an underrun/overrun happens, cha
entries in the list. And this patch isn't
very necessary to Cc stable tree since there has been always a FIFO
reset operation around the regcache_sync() call, even prior to this
reverted commit.
Signed-off-by: Nicolin Chen
Cc: Shengjiu Wang
---
Hi Mark,
In case there's no objection aga
Hello Mark,
On Fri, Jun 07, 2019 at 12:12:44PM +0100, Mark Brown wrote:
> On Thu, Jun 06, 2019 at 04:01:05PM -0700, Nicolin Chen wrote:
> > This reverts commit 8973112aa41b8ad956a5b47f2fe17bc2a5cf2645.
>
> Please use subject lines matching the style for the subsystem. This
> m
registers remaining in the default value list while the original
commit also changed other entries in the list. And this patch isn't
very necessary to Cc stable tree since there has been always a FIFO
reset operation around the regcache_sync() call, even prior to this
reverted commit.
Signed-
On Fri, Jul 05, 2019 at 07:03:47AM +, S.j. Wang wrote:
> >
> > > +
> > > + /* restore registers by regcache_sync */
> > > + fsl_esai_register_restore(esai_priv);
> > > +
> > > + regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,
> > > +ESAI_xCR_xPR_MASK, 0)
Hi Shengjiu,
Mostly looks good to me, just some small comments.
On Mon, Jul 08, 2019 at 02:38:52PM +0800, shengjiu.w...@nxp.com wrote:
> +static void fsl_esai_hw_reset(unsigned long arg)
> +{
> + struct fsl_esai *esai_priv = (struct fsl_esai *)arg;
> + u32 saisr, tfcr, rfcr;
> + bo
On Fri, Mar 08, 2019 at 05:39:30PM +, Daniel Baluta wrote:
> @@ -542,6 +544,11 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> *substream, int cmd,
> case SNDRV_PCM_TRIGGER_START:
> case SNDRV_PCM_TRIGGER_RESUME:
> case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
> +
rmal pages unless the device
has its own CMA area. This would save resources from the CMA area
for more CMA allocations. And it'd also reduce CMA fragmentations
resulted from trivial allocations.
Signed-off-by: Nicolin Chen
---
kernel/dma/contiguous.c | 22 +++---
1 file changed
On Fri, Feb 15, 2019 at 02:01:32PM +, Viorel Suman wrote:
> The patchset adds NXP Audio Mixer (AUDMIX) device and machine
> drivers and related DT bindings documentation.
For this series,
Acked-by: Nicolin Chen
And Rob gave his at the previous version already.
Thanks.
> Changes
This would save resources
from the CMA area for more CMA allocations. And it'd also reduce
CMA fragmentations resulted from trivial allocations.
Also, it updates the API and its callers so as to pass gfp flags.
Signed-off-by: Nicolin Chen
---
Changelog
v1->v2:
* Removed one ';'
t; ASoC: fsl: Add Audio Mixer CPU DAI driver
> ASoC: add fsl_audmix DT binding documentation
> ASoC: fsl: Add Audio Mixer machine driver
> ASoC: add imx-audmix DT binding Documentation
For this series,
Acked-by: Nicolin Chen
Thanks
>
> .../devicetree/bindings/sound/fs
t memory region. Furthermore, the linear region size of
ARM64 only has the half of Virtual Memory size -- "VA_BITS - 1".
So this patch updates the iomem_resource.end by using the end of
physical address space or the end of linear mapping region when
(VA_BITS - 1) is smaller than PA_BITS.
Si
Thanks for the comments, Robin.
On Thu, May 10, 2018 at 06:45:59PM +0100, Robin Murphy wrote:
> On 09/05/18 23:58, Nicolin Chen wrote:
> >The iomem_resource.end is -1 by default and should be updated in
> >arch-level code.
> >
> >ARM64 so far hasn't updated it
which is the type expected by
> dmaengine_prep_dma_cyclic().
>
> Replace DMA_TO_DEVICE with DMA_MEM_TO_DEV and DMA_FROM_DEVICE with
> DMA_DEV_TO_MEM to fix this type mismatch issue.
>
> Signed-off-by: Nicolas Iooss
Acked-by: Nicolin Chen
Thanks.
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