cation issue by
initializing boot_command_line to a non-empty string that
early_init_dt_scan_chosen() will not overwrite with CONFIG_CMDLINE.
This is a little ugly, but cleanup in this area is on its way. In the
meantime this is at least easy to backport & contains the ugliness
within arch/mips/.
S
Hi Maksym,
On Thu, Sep 27, 2018 at 07:56:57PM +0300, Maksym Kokhan wrote:
> -choice
> - prompt "Kernel command line type" if !CMDLINE_OVERRIDE
> - default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
> - !MIPS_MALTA && \
> -
Hi Maksym,
On Thu, Sep 27, 2018 at 07:56:57PM +0300, Maksym Kokhan wrote:
> -choice
> - prompt "Kernel command line type" if !CMDLINE_OVERRIDE
> - default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
> - !MIPS_MALTA && \
> -
instructions too.
>
> Signed-off-by: Yasha Cherikovsky
> Cc: Ralf Baechle
> Cc: Paul Burton
> Cc: James Hogan
> Cc: linux-m...@linux-mips.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/mips/Kconfig| 35 +--
> ar
instructions too.
>
> Signed-off-by: Yasha Cherikovsky
> Cc: Ralf Baechle
> Cc: Paul Burton
> Cc: James Hogan
> Cc: linux-m...@linux-mips.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/mips/Kconfig| 35 +--
> ar
Hi Jim,
On Wed, Sep 19, 2018 at 10:32:01AM -0400, Jim Quinlan wrote:
> The design of the Broadcom PCIe RC controller requires us to remap its
> DMA addresses for inbound traffic. We do this by modifying the
> definitions of __phys_to_dma() and __dma_to_phys().
>
> In arch/mips/bmips/dma.c,
Hi Jim,
On Wed, Sep 19, 2018 at 10:32:01AM -0400, Jim Quinlan wrote:
> The design of the Broadcom PCIe RC controller requires us to remap its
> DMA addresses for inbound traffic. We do this by modifying the
> definitions of __phys_to_dma() and __dma_to_phys().
>
> In arch/mips/bmips/dma.c,
Hi Yasha,
On Tue, Sep 25, 2018 at 09:08:21PM +0300, Yasha Cherikovsky wrote:
> Hi,
>
> This patch series simplifies and cleans up the handling of
> CONFIG_MIPS_ELF_APPENDED_DTB in the MIPS tree.
>
> Specifically, it makes sure that the dtb appears in 'fw_passed_dtb'
> also under
Hi Yasha,
On Tue, Sep 25, 2018 at 09:08:21PM +0300, Yasha Cherikovsky wrote:
> Hi,
>
> This patch series simplifies and cleans up the handling of
> CONFIG_MIPS_ELF_APPENDED_DTB in the MIPS tree.
>
> Specifically, it makes sure that the dtb appears in 'fw_passed_dtb'
> also under
Hi Yasha,
On Tue, Sep 25, 2018 at 10:30:52PM +0300, Yasha Cherikovsky wrote:
> On Tue, 2018-09-25 at 17:45 +0000, Paul Burton wrote:
> > How about we:
> >
> > - Add a Kconfig option CONFIG_CPU_SUPPORTS_LOAD_STORE_LR, and
> > select
> > it for all exist
Hi Yasha,
On Tue, Sep 25, 2018 at 10:30:52PM +0300, Yasha Cherikovsky wrote:
> On Tue, 2018-09-25 at 17:45 +0000, Paul Burton wrote:
> > How about we:
> >
> > - Add a Kconfig option CONFIG_CPU_SUPPORTS_LOAD_STORE_LR, and
> > select
> > it for all exist
Hi Yasha,
On Thu, Sep 20, 2018 at 08:03:06PM +0300, Yasha Cherikovsky wrote:
> MIPSR6 doesn't support unaligned access instructions (lwl, lwr, swl, swr).
> The MIPS tree has some special cases to avoid these instructions,
> and currently the code is testing for CONFIG_CPU_MIPSR6.
>
> Declare a
Hi Yasha,
On Thu, Sep 20, 2018 at 08:03:06PM +0300, Yasha Cherikovsky wrote:
> MIPSR6 doesn't support unaligned access instructions (lwl, lwr, swl, swr).
> The MIPS tree has some special cases to avoid these instructions,
> and currently the code is testing for CONFIG_CPU_MIPSR6.
>
> Declare a
Hi Mike,
On Mon, Sep 10, 2018 at 12:23:18PM +0300, Mike Rapoport wrote:
> MIPS already has memblock support and all the memory is already registered
> with it.
>
> This patch replaces bootmem memory reservations with memblock ones and
> removes the bootmem initialization.
>
> Since memblock
Hi Mike,
On Mon, Sep 10, 2018 at 12:23:18PM +0300, Mike Rapoport wrote:
> MIPS already has memblock support and all the memory is already registered
> with it.
>
> This patch replaces bootmem memory reservations with memblock ones and
> removes the bootmem initialization.
>
> Since memblock
Hi Matthieu,
On Mon, Sep 10, 2018 at 02:09:21PM +0200, Mathieu Malaterre wrote:
> On Fri, Sep 7, 2018 at 8:55 PM Paul Burton wrote:
> > Commit 8ce355cf2e38 ("MIPS: Setup boot_command_line before
> > plat_mem_setup") fixed a problem for systems which have
> > C
Hi Matthieu,
On Mon, Sep 10, 2018 at 02:09:21PM +0200, Mathieu Malaterre wrote:
> On Fri, Sep 7, 2018 at 8:55 PM Paul Burton wrote:
> > Commit 8ce355cf2e38 ("MIPS: Setup boot_command_line before
> > plat_mem_setup") fixed a problem for systems which have
> > C
Hi Igor,
On Fri, Sep 07, 2018 at 09:03:02PM +0300, Igor Stoppa wrote:
> diff --git a/arch/mips/include/asm/bug.h b/arch/mips/include/asm/bug.h
> index 745dc160a069..02101b54aec2 100644
> --- a/arch/mips/include/asm/bug.h
> +++ b/arch/mips/include/asm/bug.h
> @@ -31,7 +31,7 @@ static inline void
Hi Igor,
On Fri, Sep 07, 2018 at 09:03:02PM +0300, Igor Stoppa wrote:
> diff --git a/arch/mips/include/asm/bug.h b/arch/mips/include/asm/bug.h
> index 745dc160a069..02101b54aec2 100644
> --- a/arch/mips/include/asm/bug.h
> +++ b/arch/mips/include/asm/bug.h
> @@ -31,7 +31,7 @@ static inline void
Hi Rob,
On Fri, Sep 07, 2018 at 03:29:03PM -0500, Rob Herring wrote:
> On Fri, Sep 7, 2018 at 1:55 PM Paul Burton wrote:
> > The CONFIG_CMDLINE-related logic in early_init_dt_scan_chosen() falls
> > back to copying CONFIG_CMDLINE into boot_command_line/data if the DT has
>
Hi Rob,
On Fri, Sep 07, 2018 at 03:29:03PM -0500, Rob Herring wrote:
> On Fri, Sep 7, 2018 at 1:55 PM Paul Burton wrote:
> > The CONFIG_CMDLINE-related logic in early_init_dt_scan_chosen() falls
> > back to copying CONFIG_CMDLINE into boot_command_line/data if the DT has
>
t we continue to
use the existing logic for architectures where it's suitable but also
allow MIPS to override this behaviour such that the architecture code
knows when CONFIG_CMDLINE is used.
Signed-off-by: Paul Burton
References: https://patchwork.linux-mips.org/patch/18804/
Cc: Frank Rowand
Cc: Ja
t we continue to
use the existing logic for architectures where it's suitable but also
allow MIPS to override this behaviour such that the architecture code
knows when CONFIG_CMDLINE is used.
Signed-off-by: Paul Burton
References: https://patchwork.linux-mips.org/patch/18804/
Cc: Frank Rowand
Cc: Ja
by instead
providing a no-op implementation of early_init_dt_fixup_cmdline_arch()
to prevent early_init_dt_scan_chosen() from using CONFIG_CMDLINE.
Signed-off-by: Paul Burton
Fixes: 8ce355cf2e38 ("MIPS: Setup boot_command_line before plat_mem_setup")
References: https://patchwork.linux-
by instead
providing a no-op implementation of early_init_dt_fixup_cmdline_arch()
to prevent early_init_dt_scan_chosen() from using CONFIG_CMDLINE.
Signed-off-by: Paul Burton
Fixes: 8ce355cf2e38 ("MIPS: Setup boot_command_line before plat_mem_setup")
References: https://patchwork.linux-
Hi Matthias,
On Wed, Sep 05, 2018 at 08:51:26AM +0200, Mathias Kresin wrote:
> From: Tobias Wolf
>
> Set the PCI controller of_node such that PCI devices can be
> instantiated via device tree.
>
> Signed-off-by: Tobias Wolf
> Signed-off-by: Mathias Kresin
> ---
> arch/mips/pci/pci-rt2880.c
Hi Matthias,
On Wed, Sep 05, 2018 at 08:51:26AM +0200, Mathias Kresin wrote:
> From: Tobias Wolf
>
> Set the PCI controller of_node such that PCI devices can be
> instantiated via device tree.
>
> Signed-off-by: Tobias Wolf
> Signed-off-by: Mathias Kresin
> ---
> arch/mips/pci/pci-rt2880.c
Hi Ding,
On Thu, Sep 06, 2018 at 12:19:19PM +0800, Ding Xiang wrote:
> if device_register return error, iounmap should be called, also iounmap
> need to call before put_device.
>
> Signed-off-by: Ding Xiang
> ---
> arch/mips/txx9/generic/setup.c | 5 ++---
> 1 file changed, 2 insertions(+), 3
Hi Ding,
On Thu, Sep 06, 2018 at 12:19:19PM +0800, Ding Xiang wrote:
> if device_register return error, iounmap should be called, also iounmap
> need to call before put_device.
>
> Signed-off-by: Ding Xiang
> ---
> arch/mips/txx9/generic/setup.c | 5 ++---
> 1 file changed, 2 insertions(+), 3
Hi Alexandre & Wolfram,
On Sat, Sep 01, 2018 at 02:43:53PM +0200, Wolfram Sang wrote:
> > Because the designware IP was not able to handle the SDA hold time before
> > version 1.11a, MSCC has its own implementation. Add support for it and then
> > add
> > i2c on ocelot boards.
> >
> > I would
Hi Alexandre & Wolfram,
On Sat, Sep 01, 2018 at 02:43:53PM +0200, Wolfram Sang wrote:
> > Because the designware IP was not able to handle the SDA hold time before
> > version 1.11a, MSCC has its own implementation. Add support for it and then
> > add
> > i2c on ocelot boards.
> >
> > I would
Hi Mike,
On Sat, Sep 01, 2018 at 12:17:48AM +0300, Mike Rapoport wrote:
> On Thu, Aug 30, 2018 at 02:48:57PM -0700, Paul Burton wrote:
> > On Mon, Aug 27, 2018 at 10:59:35AM +0300, Mike Rapoport wrote:
> > > MIPS already has memblock support and all the memory is
Hi Mike,
On Sat, Sep 01, 2018 at 12:17:48AM +0300, Mike Rapoport wrote:
> On Thu, Aug 30, 2018 at 02:48:57PM -0700, Paul Burton wrote:
> > On Mon, Aug 27, 2018 at 10:59:35AM +0300, Mike Rapoport wrote:
> > > MIPS already has memblock support and all the memory is
On Fri, Aug 31, 2018 at 01:37:52PM -0700, Paul Burton wrote:
> Further to that, this series doesn't seem to work for me. With
> v4.19-rc1, with the patch from [1] & then this series applied I see the
> following when booting a ci20_defconfig kernel:
>
> [0.84668
On Fri, Aug 31, 2018 at 01:37:52PM -0700, Paul Burton wrote:
> Further to that, this series doesn't seem to work for me. With
> v4.19-rc1, with the patch from [1] & then this series applied I see the
> following when booting a ci20_defconfig kernel:
>
> [0.84668
Hi Matthieu,
On Tue, Jul 24, 2018 at 01:47:57PM -0700, Paul Burton wrote:
> On Wed, Jun 06, 2018 at 09:38:08PM +0200, Mathieu Malaterre wrote:
> > diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
> > index 1a354a6b6e87..35d82d96e781 100644
> > --- a/sou
Hi Matthieu,
On Tue, Jul 24, 2018 at 01:47:57PM -0700, Paul Burton wrote:
> On Wed, Jun 06, 2018 at 09:38:08PM +0200, Mathieu Malaterre wrote:
> > diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
> > index 1a354a6b6e87..35d82d96e781 100644
> > --- a/sou
Hi Mike,
On Mon, Aug 27, 2018 at 10:59:35AM +0300, Mike Rapoport wrote:
> MIPS already has memblock support and all the memory is already registered
> with it.
>
> This patch replaces bootmem memory reservations with memblock ones and
> removes the bootmem initialization.
>
> Signed-off-by:
Hi Mike,
On Mon, Aug 27, 2018 at 10:59:35AM +0300, Mike Rapoport wrote:
> MIPS already has memblock support and all the memory is already registered
> with it.
>
> This patch replaces bootmem memory reservations with memblock ones and
> removes the bootmem initialization.
>
> Signed-off-by:
Hi Mathias,
On Wed, Aug 22, 2018 at 10:38:06PM +0200, Mathias Kresin wrote:
> The rt3352 has a pin that can be used as second spi chip select,
> watchdog reset or GPIO. The pinmux setup was missing the definition of
> said pin.
>
> The pin is configured via the same bit on rt5350, so reuse the
Hi Mathias,
On Wed, Aug 22, 2018 at 10:38:06PM +0200, Mathias Kresin wrote:
> The rt3352 has a pin that can be used as second spi chip select,
> watchdog reset or GPIO. The pinmux setup was missing the definition of
> said pin.
>
> The pin is configured via the same bit on rt5350, so reuse the
Hi Tuomas,
On Sun, Aug 19, 2018 at 10:20:23PM +0300, Tuomas Tynkkynen wrote:
> Setting GPIO 21 high seems to be required to enable power to USB ports
> on the WNDR3400v3. As there is already similar code for WNR3500L,
> make the existing USB power GPIO code generic and use that.
>
>
Hi Tuomas,
On Sun, Aug 19, 2018 at 10:20:23PM +0300, Tuomas Tynkkynen wrote:
> Setting GPIO 21 high seems to be required to enable power to USB ports
> on the WNDR3400v3. As there is already similar code for WNR3500L,
> make the existing USB power GPIO code generic and use that.
>
>
Hi Philippe,
On Tue, Aug 28, 2018 at 05:52:50PM +0200, Philippe Reynes wrote:
> Since commit 27c524d17430 ("MIPS: Use the entry point from the ELF
> file header"), the kernel entry point is computed with a grep on
> "start address" on the output of objdump. It works fine when the
> default
Hi Philippe,
On Tue, Aug 28, 2018 at 05:52:50PM +0200, Philippe Reynes wrote:
> Since commit 27c524d17430 ("MIPS: Use the entry point from the ELF
> file header"), the kernel entry point is computed with a grep on
> "start address" on the output of objdump. It works fine when the
> default
Hi Rob,
On Mon, Aug 27, 2018 at 08:52:05PM -0500, Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Ralf Baechle
> Cc: Paul Burton
> Cc: James Hogan
> Cc: John C
Hi Rob,
On Mon, Aug 27, 2018 at 08:52:05PM -0500, Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Ralf Baechle
> Cc: Paul Burton
> Cc: James Hogan
> Cc: John C
s made to other drivers.
Signed-off-by: Paul Burton
Fixes: a203728ac6bb ("pinctrl: core: Return selector to the pinctrl driver")
Fixes: f913cfce4ee4 ("pinctrl: pinmux: Return selector to the pinctrl driver")
Cc: Linus Walleij
Cc: Paul Cercueil
Cc: Tony Lindgren
Cc: linux-g
s made to other drivers.
Signed-off-by: Paul Burton
Fixes: a203728ac6bb ("pinctrl: core: Return selector to the pinctrl driver")
Fixes: f913cfce4ee4 ("pinctrl: pinmux: Return selector to the pinctrl driver")
Cc: Linus Walleij
Cc: Paul Cercueil
Cc: Tony Lindgren
Cc: linux-g
Hi Masahiro,
On Tue, Aug 21, 2018 at 11:49:48AM +0900, Masahiro Yamada wrote:
> The code diff looks good to me.
>
> Reviewed-by: Masahiro Yamada
Thanks :)
> > A straightforward approach to the per-arch header is to make use of
> > asm-generic to provide a default empty header & adjust
Hi Masahiro,
On Tue, Aug 21, 2018 at 11:49:48AM +0900, Masahiro Yamada wrote:
> The code diff looks good to me.
>
> Reviewed-by: Masahiro Yamada
Thanks :)
> > A straightforward approach to the per-arch header is to make use of
> > asm-generic to provide a default empty header & adjust
permail/kbuild-all/2018-August/051175.html
Signed-off-by: Paul Burton
Cc: Arnd Bergmann
Cc: James Hogan
Cc: Masahiro Yamada
Cc: Ralf Baechle
Cc: linux-a...@vger.kernel.org
Cc: linux-kbu...@vger.kernel.org
Cc: linux-m...@linux-mips.org
---
Changes in v9:
- Use Kconfig & a #include dir
luded by linux/compiler_types.h after
linux/compiler-gcc.h. This will result in asm/compiler.h being included
in all C compilations via the -include linux/compiler_types.h argument
in c_flags, which should be harmless.
Signed-off-by: Paul Burton
Fixes: 173a3efd3edb ("bug.h: work around GCC PR82365 i
permail/kbuild-all/2018-August/051175.html
Signed-off-by: Paul Burton
Cc: Arnd Bergmann
Cc: James Hogan
Cc: Masahiro Yamada
Cc: Ralf Baechle
Cc: linux-a...@vger.kernel.org
Cc: linux-kbu...@vger.kernel.org
Cc: linux-m...@linux-mips.org
---
Changes in v9:
- Use Kconfig & a #include dir
luded by linux/compiler_types.h after
linux/compiler-gcc.h. This will result in asm/compiler.h being included
in all C compilations via the -include linux/compiler_types.h argument
in c_flags, which should be harmless.
Signed-off-by: Paul Burton
Fixes: 173a3efd3edb ("bug.h: work around GCC PR82365 i
tempt:
https://marc.info/?l=linux-mips=14921408274=2
Paul Burton (2):
kbuild: Allow arch-specific asm/compiler.h
MIPS: Workaround GCC __builtin_unreachable reordering bug
arch/Kconfig | 8
arch/mips/Kconfig| 1 +
arch/mips/include/asm/com
tempt:
https://marc.info/?l=linux-mips=14921408274=2
Paul Burton (2):
kbuild: Allow arch-specific asm/compiler.h
MIPS: Workaround GCC __builtin_unreachable reordering bug
arch/Kconfig | 8
arch/mips/Kconfig| 1 +
arch/mips/include/asm/com
Hi Masahiro,
On Mon, Aug 20, 2018 at 02:04:24PM +0900, Masahiro Yamada wrote:
> 2018-08-19 3:10 GMT+09:00 Paul Burton :
> > We have a need to override the definition of
> > barrier_before_unreachable() for MIPS, which means we either need to add
> > architecture-specific cod
Hi Masahiro,
On Mon, Aug 20, 2018 at 02:04:24PM +0900, Masahiro Yamada wrote:
> 2018-08-19 3:10 GMT+09:00 Paul Burton :
> > We have a need to override the definition of
> > barrier_before_unreachable() for MIPS, which means we either need to add
> > architecture-specific cod
proach 4, by including an
asm/compiler_types.h header using the -include flag in the same way we
do for linux/compiler_types.h, but only if the header actually exists.
[1] https://lists.01.org/pipermail/kbuild-all/2018-August/051175.html
Signed-off-by: Paul Burton
Cc: Arnd Bergmann
Cc: James Hogan
C
what comes next is code. This may or may not be true,
since we don't really know what comes next, but as this code is in an
unreachable path anyway that doesn't matter since we won't execute it.
Signed-off-by: Paul Burton
Fixes: 173a3efd3edb ("bug.h: work around GCC PR82365 in BUG()")
proach 4, by including an
asm/compiler_types.h header using the -include flag in the same way we
do for linux/compiler_types.h, but only if the header actually exists.
[1] https://lists.01.org/pipermail/kbuild-all/2018-August/051175.html
Signed-off-by: Paul Burton
Cc: Arnd Bergmann
Cc: James Hogan
C
what comes next is code. This may or may not be true,
since we don't really know what comes next, but as this code is in an
unreachable path anyway that doesn't matter since we won't execute it.
Signed-off-by: Paul Burton
Fixes: 173a3efd3edb ("bug.h: work around GCC PR82365 in BUG()")
ml
v7: https://www.spinics.net/lists/linux-arch/msg47934.html
Older #ifdef-based attempt:
https://marc.info/?l=linux-mips=14921408274=2
Paul Burton (2):
kbuild: Allow asm-specific compiler_types.h
MIPS: Workaround GCC __builtin_unreachable reordering bug
arch/mips/include/asm/compiler_
ml
v7: https://www.spinics.net/lists/linux-arch/msg47934.html
Older #ifdef-based attempt:
https://marc.info/?l=linux-mips=14921408274=2
Paul Burton (2):
kbuild: Allow asm-specific compiler_types.h
MIPS: Workaround GCC __builtin_unreachable reordering bug
arch/mips/include/asm/compiler_
Hi Sergey & Mike,
On Thu, Aug 09, 2018 at 12:30:03AM +0300, Fancer's opinion wrote:
> Hello Mike,
> I haven't read your patch text yet. I am waiting for the subsystem
> maintainers response at least
> about the necessity to have this type of changes being merged into the
> sources (I mean
>
Hi Sergey & Mike,
On Thu, Aug 09, 2018 at 12:30:03AM +0300, Fancer's opinion wrote:
> Hello Mike,
> I haven't read your patch text yet. I am waiting for the subsystem
> maintainers response at least
> about the necessity to have this type of changes being merged into the
> sources (I mean
>
Hi Songjun / Hua,
On Fri, Aug 03, 2018 at 11:02:20AM +0800, Songjun Wu wrote:
> From: Hua Ma
>
> Add initial support for Intel MIPS interAptiv SoCs made by Intel.
> This series will add support for the grx500 family.
>
> The series allows booting a minimal system using a initramfs.
Thanks for
Hi Songjun / Hua,
On Fri, Aug 03, 2018 at 11:02:20AM +0800, Songjun Wu wrote:
> From: Hua Ma
>
> Add initial support for Intel MIPS interAptiv SoCs made by Intel.
> This series will add support for the grx500 family.
>
> The series allows booting a minimal system using a initramfs.
Thanks for
Hi Alexandre,
On Tue, Jul 31, 2018 at 04:38:52PM +0200, Alexandre Belloni wrote:
> Hello,
>
> This series only contains the DT documentation and the corresponding DT
> addition
> since it has been rebased on spi-next.
>
> Alexandre Belloni (3):
> spi: dw: document Microsemi integration
>
Hi Alexandre,
On Tue, Jul 31, 2018 at 04:38:52PM +0200, Alexandre Belloni wrote:
> Hello,
>
> This series only contains the DT documentation and the corresponding DT
> addition
> since it has been rebased on spi-next.
>
> Alexandre Belloni (3):
> spi: dw: document Microsemi integration
>
Hi Raghu,
On Tue, Jul 17, 2018 at 05:11:45PM +0530, RAGHU Halharvi wrote:
> Signed-off-by: RAGHU Halharvi
> ---
> arch/mips/sgi-ip22/ip22-gio.c | 2 ++
> 1 file changed, 2 insertions(+)
You should write a commit message, even for trivial patches, which
describes the motivation for the patch.
Hi Raghu,
On Tue, Jul 17, 2018 at 05:11:45PM +0530, RAGHU Halharvi wrote:
> Signed-off-by: RAGHU Halharvi
> ---
> arch/mips/sgi-ip22/ip22-gio.c | 2 ++
> 1 file changed, 2 insertions(+)
You should write a commit message, even for trivial patches, which
describes the motivation for the patch.
Hi Quentin,
On Wed, Jul 25, 2018 at 02:26:20PM +0200, Quentin Schulz wrote:
> The GPIO controller also serves as an interrupt controller for events
> on the GPIO it handles.
>
> An interrupt occurs whenever a GPIO line has changed.
>
> Signed-off-by: Quentin Schulz
> ---
>
Hi Quentin,
On Wed, Jul 25, 2018 at 02:26:20PM +0200, Quentin Schulz wrote:
> The GPIO controller also serves as an interrupt controller for events
> on the GPIO it handles.
>
> An interrupt occurs whenever a GPIO line has changed.
>
> Signed-off-by: Quentin Schulz
> ---
>
Hi Anders,
On Thu, Jul 26, 2018 at 09:04:57AM +0200, Anders Roxell wrote:
> > Since commit eedf265aa003 ("devpts: Make each mount of devpts an
> > independent filesystem.") CONFIG_DEVPTS_MULTIPLE_INSTANCES isn't needed
> > in the defconfig anymore.
> >
> > Signed-off-by: Anders Roxell
> > ---
>
Hi Anders,
On Thu, Jul 26, 2018 at 09:04:57AM +0200, Anders Roxell wrote:
> > Since commit eedf265aa003 ("devpts: Make each mount of devpts an
> > independent filesystem.") CONFIG_DEVPTS_MULTIPLE_INSTANCES isn't needed
> > in the defconfig anymore.
> >
> > Signed-off-by: Anders Roxell
> > ---
>
Hi Quentin,
On Wed, Jul 25, 2018 at 02:22:41PM +0200, Quentin Schulz wrote:
> There is an additional MIIM (MDIO) bus in this SoC so let's declare it
> in the dtsi.
>
> This bus requires GPIO 14 and 15 pins that need to be muxed. There is no
> support for internal PHY reset on this bus on the
Hi Quentin,
On Wed, Jul 25, 2018 at 02:22:41PM +0200, Quentin Schulz wrote:
> There is an additional MIIM (MDIO) bus in this SoC so let's declare it
> in the dtsi.
>
> This bus requires GPIO 14 and 15 pins that need to be muxed. There is no
> support for internal PHY reset on this bus on the
Hi Quentin,
On Wed, Jul 25, 2018 at 02:21:32PM +0200, Quentin Schulz wrote:
> The length of memory address space for MIIM0 is from 0x7107009c to
> 0x710700bf included which is 36 bytes long in decimal, or 0x24 bytes in
> hexadecimal and not 0x36.
>
> Fixes: 49b031690abe ("MIPS: mscc: Add switch
Hi Quentin,
On Wed, Jul 25, 2018 at 02:21:32PM +0200, Quentin Schulz wrote:
> The length of memory address space for MIIM0 is from 0x7107009c to
> 0x710700bf included which is 36 bytes long in decimal, or 0x24 bytes in
> hexadecimal and not 0x36.
>
> Fixes: 49b031690abe ("MIPS: mscc: Add switch
Hi Alexandre,
On Thu, Jul 26, 2018 at 06:40:54PM +0200, Alexandre Belloni wrote:
> The RTC definitions were moved to the driver, remove them from the platform
> header.
>
> Signed-off-by: Alexandre Belloni
> ---
> arch/mips/include/asm/txx9/tx4939.h | 27 ---
> 1 file
Hi Alexandre,
On Thu, Jul 26, 2018 at 06:40:54PM +0200, Alexandre Belloni wrote:
> The RTC definitions were moved to the driver, remove them from the platform
> header.
>
> Signed-off-by: Alexandre Belloni
> ---
> arch/mips/include/asm/txx9/tx4939.h | 27 ---
> 1 file
Hi Mike,
On Thu, Jul 26, 2018 at 10:03:56AM +0300, Mike Rapoport wrote:
> Any comments on this?
I haven't looked at this in detail yet, but there was a much larger
series submitted to accomplish this not too long ago, which needed
another revision:
Hi Mike,
On Thu, Jul 26, 2018 at 10:03:56AM +0300, Mike Rapoport wrote:
> Any comments on this?
I haven't looked at this in detail yet, but there was a much larger
series submitted to accomplish this not too long ago, which needed
another revision:
Hi Matthieu,
On Wed, Jun 06, 2018 at 09:38:08PM +0200, Mathieu Malaterre wrote:
> diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
> index 1a354a6b6e87..35d82d96e781 100644
> --- a/sound/soc/jz4740/Kconfig
> +++ b/sound/soc/jz4740/Kconfig
> @@ -1,20 +1,20 @@
> config
Hi Matthieu,
On Wed, Jun 06, 2018 at 09:38:08PM +0200, Mathieu Malaterre wrote:
> diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
> index 1a354a6b6e87..35d82d96e781 100644
> --- a/sound/soc/jz4740/Kconfig
> +++ b/sound/soc/jz4740/Kconfig
> @@ -1,20 +1,20 @@
> config
Hi Mathieu,
On Wed, Jun 06, 2018 at 09:37:29PM +0200, Mathieu Malaterre wrote:
> Update the Ci20's defconfig to enable the JZ4780's SPI/GPIO driver.
>
> Signed-off-by: Mathieu Malaterre
> ---
> arch/mips/configs/ci20_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
Thanks - both patches
Hi Mathieu,
On Wed, Jun 06, 2018 at 09:37:29PM +0200, Mathieu Malaterre wrote:
> Update the Ci20's defconfig to enable the JZ4780's SPI/GPIO driver.
>
> Signed-off-by: Mathieu Malaterre
> ---
> arch/mips/configs/ci20_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
Thanks - both patches
Hi Thomas,
On Tue, Jul 24, 2018 at 01:52:08PM +0200, Thomas Petazzoni wrote:
> This is necessary to be able to include when
> CONFIG_GENERIC_MSI_IRQ_DOMAIN is enabled. Without this, a build with
> CONFIG_GENERIC_MSI_IRQ_DOMAIN fails with:
>
>In file included from
Hi Thomas,
On Tue, Jul 24, 2018 at 01:52:08PM +0200, Thomas Petazzoni wrote:
> This is necessary to be able to include when
> CONFIG_GENERIC_MSI_IRQ_DOMAIN is enabled. Without this, a build with
> CONFIG_GENERIC_MSI_IRQ_DOMAIN fails with:
>
>In file included from
Hi Paul,
On Sun, Jul 08, 2018 at 05:07:12PM +0200, Paul Cercueil wrote:
> Having the zload address at 0x8060. means the size of the
> uncompressed kernel cannot be bigger than around 6 MiB, as it is
> deflated at address 0x8001..
>
> This limit is too small; a kernel with some built-in
Hi Paul,
On Sun, Jul 08, 2018 at 05:07:12PM +0200, Paul Cercueil wrote:
> Having the zload address at 0x8060. means the size of the
> uncompressed kernel cannot be bigger than around 6 MiB, as it is
> deflated at address 0x8001..
>
> This limit is too small; a kernel with some built-in
Hi Andreas,
On Sun, Jul 22, 2018 at 11:20:01PM +0200, Andreas Färber wrote:
> diff --git a/arch/mips/boot/dts/img/pistachio_marduk.dts
> b/arch/mips/boot/dts/img/pistachio_marduk.dts
> index d723b68084c9..b0b6b534a41f 100644
> --- a/arch/mips/boot/dts/img/pistachio_marduk.dts
> +++
Hi Andreas,
On Sun, Jul 22, 2018 at 11:20:01PM +0200, Andreas Färber wrote:
> diff --git a/arch/mips/boot/dts/img/pistachio_marduk.dts
> b/arch/mips/boot/dts/img/pistachio_marduk.dts
> index d723b68084c9..b0b6b534a41f 100644
> --- a/arch/mips/boot/dts/img/pistachio_marduk.dts
> +++
PS .dts changes in patches 16-18 through
the DMA tree with the rest of the series?
If so then for patches 16-18:
Acked-by: Paul Burton
Thanks,
Paul
PS .dts changes in patches 16-18 through
the DMA tree with the rest of the series?
If so then for patches 16-18:
Acked-by: Paul Burton
Thanks,
Paul
Hi Huacai,
On Sat, Jul 21, 2018 at 09:35:59AM +0800, 陈华才 wrote:
> SFB can improve the memory bandwidth as much as 30%, and we are
> planning to enable SFB by default. So, we want to control cpu_relax()
> under CONFIG_CPU_LOONGSON3, not under CONFIG_LOONGSON3_ENHANCEMENT.
OK, applied to mips-next
Hi Huacai,
On Sat, Jul 21, 2018 at 09:35:59AM +0800, 陈华才 wrote:
> SFB can improve the memory bandwidth as much as 30%, and we are
> planning to enable SFB by default. So, we want to control cpu_relax()
> under CONFIG_CPU_LOONGSON3, not under CONFIG_LOONGSON3_ENHANCEMENT.
OK, applied to mips-next
in
> Suggested-by: Christoph Hellwig
> CC: Paul Burton
> Cc: James Hogan
> Cc: Ralf Baechle
> Cc: Sinan Kaya
> Cc: Huacai Chen
> Cc: sergey.se...@t-platforms.ru
> Cc: linux-m...@linux-mips.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/mips/include/asm
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