...@samsung.com
Signed-off-by: Jingoo Han jg1@samsung.com
Cc: Pratyush Anand pratyush.an...@st.com
Cc: Mohit KUMAR mohit.ku...@st.com
---
Changes since v1:
- removed unnecessary exynos_pcie_clear_irq_level()
- updated the bindings documentation
- used new msi_chip infrastructure
- removed
On 6/13/2013 7:48 PM, Arnd Bergmann wrote:
On Thursday 13 June 2013 22:18:50 Jingoo Han wrote:
On Wednesday, June 12, 2013 8:23 PM, Arnd Bergmann wrote:
On Wednesday 12 June 2013 19:19:05 Jingoo Han wrote:
+
+/* synopsis specific PCIE configuration registers*/
+#define
Hi,
On 6/20/2013 4:28 PM, Jingoo Han wrote:
On Thursday, June 20, 2013 6:59 PM, Pratyush Anand wrote:
On 6/13/2013 7:48 PM, Arnd Bergmann wrote:
On Thursday 13 June 2013 22:18:50 Jingoo Han wrote:
On Wednesday, June 12, 2013 8:23 PM, Arnd Bergmann wrote:
On Wednesday 12 June 2013 19:19:05
On 6/21/2013 8:51 AM, Jingoo Han wrote:
diff --git a/drivers/pci/host/pci-designware.c
b/drivers/pci/host/pci-designware.c
new file mode 100644
index 000..f8558ff
--- /dev/null
+++ b/drivers/pci/host/pci-designware.c
If you plan to send next version, then I would suggest to rename it as
Hi Kishon,
On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote:
Hi Jingoo,
On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote:
On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I
the exact reason. :(
Pratyush Anand may know about this.
Pratyush Anand, could you answer the question?
Also, if you find some problems, please let me know.
One more query..
Where is inbound translation configuration done in your driver? how should
it
be done?
Yes, Kishon
On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
Hi Kishon,
On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 12 September 2013 03:00 PM, Pratyush Anand
On Thu, Sep 12, 2013 at 03:48:03PM +0530, Pratyush Anand wrote:
On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
Hi Kishon,
On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I
On Tue, Mar 18, 2014 at 02:31:58AM +0800, Bartlomiej Zolnierkiewicz wrote:
The new driver is named ahci_spear1340 and is only compile tested. Once
it is tested on the real hardware and verified to work correctly, the legacy
platform code (which depends on the deprecated struct
On Tue, Mar 18, 2014 at 07:00:08PM +0800, Viresh Kumar wrote:
On Tue, Mar 18, 2014 at 4:28 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
Make sata_miphy_exit(), sata_suspend() and sata_resume() static.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
On Wed, Oct 09, 2013 at 06:49:15PM +0800, Jingoo Han wrote:
On Wednesday, October 09, 2013 7:27 PM, Kishon Vijay Abraham I wrote:
On Wednesday 09 October 2013 03:35 PM, Jingoo Han wrote:
On Wednesday, October 09, 2013 6:48 PM, Kishon Vijay Abraham I wrote:
On Wednesday 09 October 2013
On Wed, Aug 28, 2013 at 04:17:24PM +0800, Jingoo Han wrote:
On Friday, August 23, 2013 5:36 PM, Pratyush Anand wrote:
On Fri, Aug 23, 2013 at 02:04:20PM +0800, Jingoo Han wrote:
[...]
#define MAX_PCIE_PORT_SUPPORTED 3
static DECLARE_BITMAP(msi_irq_in_use[MAX_PCIE_PORT_SUPPORTED
parts such as Synopsys
designware part and Exynos specific part.
A quick and nice job :)
Just few minor comments.
Signed-off-by: Jingoo Han jg1@samsung.com
Cc: Pratyush Anand pratyush.an...@st.com
Cc: Mohit KUMAR mohit.ku...@st.com
---
drivers/pci/host/Makefile |1 +
drivers/pci
Hi Kishon,
On Sun, Sep 22, 2013 at 07:16:34PM +0800, Kishon Vijay Abraham I wrote:
Hi Arnd,
Thanks for replying :-)
On Sunday 22 September 2013 03:33 AM, Arnd Bergmann wrote:
On Saturday 21 September 2013, Kishon Vijay Abraham I wrote:
{
u32 val;
void __iomem
On Mon, Sep 23, 2013 at 01:32:54PM +0800, Kishon Vijay Abraham I wrote:
Hi Pratyush,
On Monday 23 September 2013 09:44 AM, Pratyush Anand wrote:
Hi Kishon,
On Sun, Sep 22, 2013 at 07:16:34PM +0800, Kishon Vijay Abraham I wrote:
Hi Arnd,
Thanks for replying :-)
On Sunday 22
;
+ }
+ }
+
+ pp-dbi_base = devm_ioremap(pp-dev, pp-cfg.start,
+ resource_size(pp-cfg));
Why is configuraion space divided into two?
Sorry, I don't know the exact reason.:(
Pratyush Anand may know about this.
Pratyush Anand, could you answer the question?
CfgRd1 and CfgWr1
On Fri, Jun 06, 2014 at 08:12:12PM +0800, Vivek Gautam wrote:
Some PHY controllers may need to calibrate certain
PHY settings after initialization of the controller and
sometimes even after initializing the PHY-consumer too.
Add support for the same in order to let consumers do so in need.
: defconfig: Update
Pratyush Anand (8):
clk: SPEAr13XX: Fix pcie clock name
SPEAr13XX: Fix static mapping table
phy: SPEAr1310/40-miphy: Add binding information
SPEAr: misc: Add binding information
phy: SPEAr1310/40-miphy: Add phy driver for PCIe and SATA
SPEAr13XX: Add
. They all have been transmitted to
host and callback has been called for all of them. After some time
application is ready with new data. So when gadget does ep_queue of
this new data you should be able to see this issue.
Reviewed-by: Pratyush Anand pratyush.an...@st.com
Regards
Pratyush
been
CC: Pratyush Anand pratyush.an...@st.com
CC: Richard Zhu r65...@freescale.com
CC: Kishon Vijay Abraham I kis...@ti.com
CC: Marek Vasut ma...@denx.de
CC: Arnd Bergmann a...@arndb.de
CC: Pawel Moll pawel.m...@arm.com
CC: Mark Rutland mark.rutl...@arm.com
CC: Ian Campbell ijc+devicet
Helgaas bhelg...@google.com
CC: Pratyush Anand pratyush.an...@st.com
CC: Richard Zhu r65...@freescale.com
CC: Kishon Vijay Abraham I kis...@ti.com
CC: Marek Vasut ma...@denx.de
CC: Arnd Bergmann a...@arndb.de
CC: Pawel Moll pawel.m...@arm.com
CC: Mark Rutland mark.rutl...@arm.com
CC: Ian
Hi Kishon,
I have a phy driver which has to be used by two different consumer
driver, say pcie and sata.
I have a common set of registers, which need to be programmed
differently for PCIe and SATA during phy init/exit.
Therefore, in the init/exit routine of phy_ops, I need some way of
Hi Arnd / Kishon,
Thanks for your inputs.
On Wed, Jan 29, 2014 at 01:41:56PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 29 January 2014 02:56 AM, Arnd Bergmann wrote:
On Tuesday 28 January 2014, Kishon Vijay Abraham I wrote:
I have a common set of registers, which need to be
On Wed, Jan 29, 2014 at 10:24:35PM +0800, Arnd Bergmann wrote:
On Wednesday 29 January 2014, Pratyush Anand wrote:
On Wed, Jan 29, 2014 at 01:41:56PM +0800, Kishon Vijay Abraham I wrote:
I would instead recommend making the mode of the PHY device the
argument to the phy handle
On Thu, Jan 30, 2014 at 07:43:37PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 30 January 2014 04:18 PM, Mohit Kumar wrote:
From: Pratyush Anand pratyush.an...@st.com
PCIe RC drivers are initialized with subsys_initcall. Few PCIe drivers
like SPEAr13xx needs phy drivers
On Thu, Jan 30, 2014 at 07:52:12PM +0800, Pratyush ANAND wrote:
On Thu, Jan 30, 2014 at 07:43:37PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 30 January 2014 04:18 PM, Mohit Kumar wrote:
From: Pratyush Anand pratyush.an...@st.com
PCIe RC drivers are initialized
On Thu, Jan 30, 2014 at 08:44:58PM +0800, Arnd Bergmann wrote:
On Thursday 30 January 2014, Pratyush Anand wrote:
On Thu, Jan 30, 2014 at 07:43:37PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 30 January 2014 04:18 PM, Mohit Kumar wrote:
From: Pratyush Anand pratyush.an
On Mon, Aug 12, 2013 at 06:56:40PM +0800, Thierry Reding wrote:
On Mon, Aug 12, 2013 at 05:56:47PM +0900, Jingoo Han wrote:
[...]
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 855d4a7..9ef1c95 100644
--- a/arch/arm/mach-exynos/Kconfig
+++
Hi Kishon,
Few things, if you can help me to understand:
On Wed, Jun 25, 2014 at 11:26 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
In DRA7, the cpu sees 32bit address, but the pcie controller can see only
28bit
address. So whenever the cpu issues a read/write request, the 4 most
Hi Kishon,
On Thu, Jun 26, 2014 at 02:10:02PM +0800, Kishon Vijay Abraham I wrote:
Hi Pratyush,
On Thursday 26 June 2014 11:07 AM, Pratyush Anand wrote:
Hi Kishon,
Few things, if you can help me to understand:
On Wed, Jun 25, 2014 at 11:26 PM, Kishon Vijay Abraham I kis...@ti.com
On Sat, Jun 21, 2014 at 02:47:27AM +0800, Murali Karicheri wrote:
On 6/18/2014 3:05 AM, Pratyush Anand wrote:
Hi Murali,
On Wed, Jun 11, 2014 at 02:51:21AM +0800, Murali Karicheri wrote:
[...]
Pratyush,
Thanks for the comments.
This is IP specific code and another driver that has
On Sat, Jun 21, 2014 at 05:17:07AM +0800, Murali Karicheri wrote:
Sorry, my previous response was in html and not sure it has made to the
list. I did
get an error as well. So resending my response.
On 6/18/2014 6:14 AM, Mohit KUMAR DCG wrote:
Hello Murali,
[...]
*pos = pos0;
On Sat, Jun 21, 2014 at 03:05:30AM +0800, Arnd Bergmann wrote:
On Friday 20 June 2014 13:11:37 Santosh Shilimkar wrote:
Arnd suggestion was to have the version 3.65 code in generic place since
its IP specific and just in case some other vendor using the same version
can leverage the
On Sat, Jul 5, 2014 at 11:02 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Wed, Jun 25, 2014 at 11:26:44PM +0530, Kishon Vijay Abraham I wrote:
[1] is split into separate series in order for individual subsystem
Maintainers to pick up the patches. This series handles the PCIe
support for
Oh.. I see my reply from gmail is not readable at all. (I forgot to
switch to plain text :( ) Please ignore last mail I am replying again
here.
On Sat, Jul 12, 2014 at 04:36:29AM +0800, Murali Karicheri wrote:
[...]
Murali Karicheri (6):
PCI: designware: add rd[wr]_other_conf API
PCI:
ST miphy-40lp supports PCIe, SATA and Super Speed USB. This driver adds
skeleton support for the same.
Currently phy ops are returning -EINVAL. They can be elaborated
depending on the SOC being supported in future.
Signed-off-by: Pratyush Anand pratyush.an...@st.com
Tested-by: Mohit Kumar
SPEAr1310 and SPEAr1340 uses miphy40lp phy for PCIe. This driver adds
support for the same.
Signed-off-by: Pratyush Anand pratyush.an...@st.com
Tested-by: Mohit Kumar mohit.ku...@st.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Kishon Vijay Abraham I kis...@ti.com
Cc: spear-de...@list.st.com
Cc: linux
move all these SATA platform code to phy-miphy40lp driver.
Signed-off-by: Pratyush Anand pratyush.an...@st.com
Tested-by: Mohit Kumar mohit.ku...@st.com
Cc: Viresh Kumar viresh.li...@gmail.com
Cc: Tejun Heo t...@kernel.org
Cc: Arnd Bergmann a...@arndb.de
Cc: Kishon Vijay Abraham I kis...@ti.com
Cc
driver maintainer
Pratyush Anand (6):
clk: SPEAr13xx: Fix pcie clock name
SPEAr13xx: Fix static mapping table
phy: st-miphy-40lp: Add skeleton driver
SPEAr13xx: Fixup: Move SPEAr1340 SATA platform code to phy driver
phy: st-miphy-40lp: Add SPEAr1310 and SPEAr1340 PCIe phy support
pcie
Hi Kishon,
On Thu, Feb 06, 2014 at 02:01:45PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 06 February 2014 10:14 AM, Pratyush Anand wrote:
ST miphy-40lp supports PCIe, SATA and Super Speed USB. This driver adds
skeleton support for the same.
Currently phy ops are returning
On Thu, Feb 06, 2014 at 02:23:20PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 06 February 2014 11:44 AM, Pratyush Anand wrote:
Hi Kishon,
On Thu, Feb 06, 2014 at 02:01:45PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 06 February 2014 10:14 AM, Pratyush Anand
On Thu, Feb 06, 2014 at 02:32:42PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 06 February 2014 10:14 AM, Pratyush Anand wrote:
ahci driver needs some platform specific functions which are called at
init, exit, suspend and resume conditions. Till now these functions were
present
On Thu, Feb 06, 2014 at 04:01:25PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 06 February 2014 12:30 PM, Pratyush Anand wrote:
On Thu, Feb 06, 2014 at 02:32:42PM +0800, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 06 February 2014 10:14 AM, Pratyush Anand wrote:
ahci
Hi Arnd,
Do you see any more improvement in this series.
Else we will send V5 (probably the final one) with modifications for
Kishon's comment.
Regards
Pratyush
On Thu, Feb 6, 2014 at 10:14 AM, Pratyush Anand pratyush.an...@st.com wrote:
First three patches are improvement and fixes
Hi Arnd,
On Thu, Feb 06, 2014 at 11:37:05PM +0800, Arnd Bergmann wrote:
On Thursday 06 February 2014, Pratyush Anand wrote:
+static int spear1310_pcie_miphy_exit(struct st_miphy40lp_priv *phypriv)
+{
+ u32 mask;
+
+ switch (phypriv-id) {
+ case 0
Hi Arnd,
On Fri, Feb 07, 2014 at 11:54:30AM +0800, Pratyush ANAND wrote:
Hi Arnd,
On Thu, Feb 06, 2014 at 11:37:05PM +0800, Arnd Bergmann wrote:
On Thursday 06 February 2014, Pratyush Anand wrote:
[...]
I think it's better to make this code table-driven. Rather than checking
m-kariche...@ti.com
Acked-by: Mohit Kumar mohit.ku...@st.com
Acked-by: Jingoo Han jg1@samsung.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Pratyush Anand pratyush.an...@st.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body
Shilimkar santosh.shilim...@ti.com
Reviewed-by: Pratyush Anand pratyush.an...@st.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ
the driver to allow setup of inbound access to
MSI irq register as a post scan bus API callback.
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Looks almost ok to me.
Reviewed-by: Pratyush Anand pratyush.an...@st.com
int __init dw_pcie_host_init(struct pcie_port *pp)
{
struct
On Wednesday 17 December 2014 04:04 PM, Gabriel FERNANDEZ wrote:
sti pcie is built around a Synopsis Designware PCIe IP.
Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
Documentation/devicetree/bindings/pci/st-pcie.txt
On Wednesday 17 December 2014 04:04 PM, Gabriel FERNANDEZ wrote:
sti pcie is built around a Synopsis Designware PCIe IP.
Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
drivers/pci/host/Kconfig | 5 +
Hi Dave,
On Tue, Nov 18, 2014 at 12:02 PM, David Long dave.l...@linaro.org wrote:
From: Sandeepa Prabhu sandeepa.pra...@linaro.org
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Some part of the code can be reused for uprobes as well. I think,
there would
Author: Pratyush Anand pratyush.an...@st.com
Date: Fri Jul 18 12:37:10 2014 +0530
USB: Fix persist resume of some SS USB devices
The regression was introduced as of v3.17-rc1. The regression still
exists in the 3.18-rc3 mainline kernel, and has made it's way into the
stable kernels.
Its
On Wed, Nov 05, 2014 at 10:53:35AM +0530, Pratyush Anand wrote:
Hello Joe,
On Wed, Nov 05, 2014 at 06:20:06AM +0800, Joseph Salisbury wrote:
Hello Pratyush,
A kernel bug report was opened against Ubuntu [0]. After a kernel
bisect, it was found that reverting the following commit
+Dave
Sorry, I took all cc list from your kprobe patches and forgot to add you. :(
Please review.
On Wednesday 31 December 2014 08:51 PM, Pratyush Anand wrote:
These patches have been prepared on top of ARM64 kprobe v3 patches [1]
under review.
Unit test for following has been done so far
instruction_pointer_set is needed for uprobe implementation. Hence
define it for ARM64.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/include/asm/ptrace.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
Re-factor flush_ptrace_access to reuse vma independent part.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/mm/flush.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index b6f14e8d2121
Its better to keep all BRK opcodes used by kprobes and uprobes at one
place. Therefore move these defines to asm/insn.h.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/include/asm/insn.h | 6 ++
arch/arm64/kernel/kprobes.h | 7 +--
2 files changed, 7 insertions(+), 6
uprobe is registered at break_hook with a unique ESR code. So, when a
TRAP_BRKPT occurs, call_break_hook checks if it was for uprobe. If not,
then send a SIGTRAP to user.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/kernel/debug-monitors.c | 8 +---
1 file changed, 5
This patch adds support for uprobe on ARM64 architecture.
Unit test for following has been done so far and they have been found
working
1. Normal instruction, which can be probed like sub, ldr, add etc.
2. Instructions which can be simulated like ret.
3. uretprobe
Signed-off-by: Pratyush Anand
. uretprobe
[1]https://lkml.org/lkml/2014/11/18/33
Pratyush Anand (8):
ARM64: Move BRK opcodes defines from kprobes.h to insn.h
ARM64: Refactor kprobes-arm64
Kernel/uprobe: Define arch_uprobe_exception_notify as __weak
ARM64: Add instruction_pointer_set function
ARM64: Re-factor
uprobe registers a handler at step_hook. So, single_step_handler now
checks for user mode as well if there is a valid hook.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/kernel/debug-monitors.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64
Both ARM and ARM64 handle uprobe exceptions through their own hooks.So
nothing to be done in arch_uprobe_exception_notify except to return
NOTIFY_DONE. Implement this as weak default function and remove
definition from arm arch code.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm
Most of the stuff of kprobes-arm64.c can also be used by uprobes.c. So
move all those part to common code area. In the process rename kprobe to
probe whereever possible.
No functional change.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/include/asm/probes.h
Hi Will / Catalin,
On Tuesday 13 January 2015 11:23 PM, Pratyush Anand wrote:
I will still try to find some way to capture enable_dbg macro path.H
I did instrumented debug tap points at all the location from where
enable_debug macro is called(see attached debug patch). But, I do not
see
On Friday 16 January 2015 09:52 PM, Will Deacon wrote:
On Fri, Jan 16, 2015 at 12:00:09PM +, Pratyush Anand wrote:
On Thursday 15 January 2015 10:17 PM, Pratyush Anand wrote:
On Tuesday 13 January 2015 11:23 PM, Pratyush Anand wrote:
I will still try to find some way to capture
On Saturday 17 January 2015 12:58 AM, David Long wrote:
+static bool aarch64_insn_is_steppable(u32 insn)
+{
+ if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
+ if (aarch64_insn_is_branch(insn))
+ return false;
+
+ /*
Hi Will,
On Thursday 15 January 2015 10:17 PM, Pratyush Anand wrote:
Hi Will / Catalin,
On Tuesday 13 January 2015 11:23 PM, Pratyush Anand wrote:
I will still try to find some way to capture enable_dbg macro path.H
I did instrumented debug tap points at all the location from where
Sorry for writing so many mails...But I have one more closer information
which could help to further explain the behavior. See below.
On Friday 16 January 2015 05:30 PM, Pratyush Anand wrote:
Hi Will,
On Thursday 15 January 2015 10:17 PM, Pratyush Anand wrote:
Hi Will / Catalin
On Friday 09 January 2015 11:29 PM, Oleg Nesterov wrote:
On 12/31, Pratyush Anand wrote:
+int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
+ unsigned long addr)
+{
+ probe_opcode_t insn;
+
+ insn = *(probe_opcode_t *)(auprobe-insn[0
On Friday 09 January 2015 11:15 PM, Oleg Nesterov wrote:
On 01/08, Pratyush Anand wrote:
On Thursday 08 January 2015 10:33 PM, Will Deacon wrote:
I'm assuming that means you don't support compat (AArch32) tasks with this?
Hummm.. Yes, compat not yet supported.
I will come back
Hi Oleg,
How can I generate a scenario to test:
a) arch_uprobe_xol_was_trapped
b) arch_uprobe_abort_xol
~Pratyush
On Monday 12 January 2015 10:34 AM, Pratyush Anand wrote:
On Friday 09 January 2015 11:29 PM, Oleg Nesterov wrote:
On 12/31, Pratyush Anand wrote:
+int
On Thursday 08 January 2015 10:29 PM, Will Deacon wrote:
On Wed, Dec 31, 2014 at 03:21:20PM +, Pratyush Anand wrote:
instruction_pointer_set is needed for uprobe implementation. Hence
define it for ARM64.
Signed-off-by: Pratyush Anand pan...@redhat.com
---
arch/arm64/include/asm
On Friday 09 January 2015 09:16 PM, Will Deacon wrote:
On Thu, Jan 08, 2015 at 05:28:37PM +, Pratyush Anand wrote:
On Thursday 08 January 2015 09:53 PM, Will Deacon wrote:
On Thu, Jan 08, 2015 at 01:15:58PM +, Pratyush Anand wrote:
I am trying to test following scenario, which seems
On Tuesday 13 January 2015 09:22 PM, Catalin Marinas wrote:
On Tue, Jan 13, 2015 at 06:46:36AM +, Pratyush Anand wrote:
On Monday 12 January 2015 11:00 PM, Will Deacon wrote:
On Fri, Jan 09, 2015 at 05:13:29PM +, Pratyush Anand wrote:
On Friday 09 January 2015 09:16 PM, Will Deacon
Hi Dave,
On Sun, Jan 11, 2015 at 9:33 AM, David Long dave.l...@linaro.org wrote:
From: Sandeepa Prabhu sandeepa.pra...@linaro.org
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes will utilize software breakpoint and single step debug
exceptions
On Sun, Jan 11, 2015 at 9:33 AM, David Long dave.l...@linaro.org wrote:
From: Sandeepa Prabhu sandeepa.pra...@linaro.org
Add support for AArch64 instruction simulation in kprobes.
Kprobes needs simulation of instructions that cannot be stepped
from different memory location, e.g.: those
On Sun, Jan 11, 2015 at 9:33 AM, David Long dave.l...@linaro.org wrote:
From: David A. Long dave.l...@linaro.org
Certain instructions are hard to execute correctly out-of-line (as in
kprobes). Test functions are added to insn.[hc] to identify these. The
instructions include any that use
On Monday 12 January 2015 11:00 PM, Will Deacon wrote:
On Fri, Jan 09, 2015 at 05:13:29PM +, Pratyush Anand wrote:
On Friday 09 January 2015 09:16 PM, Will Deacon wrote:
On Thu, Jan 08, 2015 at 05:28:37PM +, Pratyush Anand wrote:
On Thursday 08 January 2015 09:53 PM, Will Deacon
On Mon, Jan 12, 2015 at 7:39 PM, Steve Capper steve.cap...@linaro.org wrote:
On Sat, Jan 10, 2015 at 11:03:15PM -0500, David Long wrote:
From: David A. Long dave.l...@linaro.org
This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
first
seen in October 2013. This
On Friday 02 January 2015 10:53 PM, Oleg Nesterov wrote:
Hi Pratyush,
I'll try to actually read this patch (and the whole series) later, just
a couple of quick questions for now.
On 12/31, Pratyush Anand wrote:
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
On Friday 02 January 2015 11:13 PM, Oleg Nesterov wrote:
On 12/31, Pratyush Anand wrote:
Both ARM and ARM64 handle uprobe exceptions through their own hooks.So
nothing to be done in arch_uprobe_exception_notify except to return
NOTIFY_DONE. Implement this as weak default function and remove
On Friday 02 January 2015 11:49 PM, Oleg Nesterov wrote:
On 01/02, Oleg Nesterov wrote:
On 12/31, Pratyush Anand wrote:
Re-factor flush_ptrace_access to reuse vma independent part.
But for what? The changelog should explain this.
Signed-off-by: Pratyush Anand pan...@redhat.com
On Monday 05 January 2015 12:10 AM, Oleg Nesterov wrote:
On 01/04, Pratyush Anand wrote:
On Friday 02 January 2015 10:53 PM, Oleg Nesterov wrote:
But the main question is: why do we need add/find_ss_context ?? Please
explain.
See arch/arm64/kernel/debug-monitors.c: call_step_hook
Unlike
On Thursday 08 January 2015 11:06 PM, Will Deacon wrote:
On Thu, Jan 08, 2015 at 05:33:08PM +, Pratyush Anand wrote:
On Thursday 08 January 2015 10:25 PM, Will Deacon wrote:
On Wed, Dec 31, 2014 at 03:21:18PM +, Pratyush Anand wrote:
Most of the stuff of kprobes-arm64.c can also
On Thursday 08 January 2015 10:33 PM, Will Deacon wrote:
On Wed, Dec 31, 2014 at 03:21:24PM +, Pratyush Anand wrote:
This patch adds support for uprobe on ARM64 architecture.
Unit test for following has been done so far and they have been found
working
1. Normal instruction, which can
On Thursday 08 January 2015 10:25 PM, Will Deacon wrote:
On Wed, Dec 31, 2014 at 03:21:17PM +, Pratyush Anand wrote:
Its better to keep all BRK opcodes used by kprobes and uprobes at one
place. Therefore move these defines to asm/insn.h.
Signed-off-by: Pratyush Anand pan...@redhat.com
On Thursday 08 January 2015 10:25 PM, Will Deacon wrote:
On Wed, Dec 31, 2014 at 03:21:18PM +, Pratyush Anand wrote:
Most of the stuff of kprobes-arm64.c can also be used by uprobes.c. So
move all those part to common code area. In the process rename kprobe to
probe whereever possible
On Thursday 08 January 2015 10:31 PM, Will Deacon wrote:
On Fri, Jan 02, 2015 at 06:05:23PM +, Oleg Nesterov wrote:
Let me repeat once again that I know absolutely nothing about arm* ;)
On 12/31, Pratyush Anand wrote:
uprobe registers a handler at step_hook. So, single_step_handler now
or
ftrace_disable_ftrace_graph_caller consecutively two times, then it will
return error, which will cause generic ftrace code to raise a warn.
This patch will fixes the issue described here.
Signed-off-by: Pratyush Anand pan...@redhat.com
Cc: Steven Rostedt rost...@goodmis.org
---
kernel/trace/ftrace.c | 21
On Saturday 07 March 2015 02:59 AM, Steven Rostedt wrote:
if (ftrace_start_up)
ftrace_run_update_code(FTRACE_UPDATE_CALLS);
Hmm, I guess you forgot to delete the above if statement (that gets
replaced by the if statement before it).
No need to send another patch, I
Hi Akashi,
On Thursday 26 March 2015 01:58 PM, AKASHI Takahiro wrote:
This patch set enables kdump (crash dump kernel) support on arm64 on top of
Geoff's kexec patchset.
In this version, there are some arm64-specific usage/constraints:
1) mem= boot parameter must be specified on crash dump
On Thursday 02 April 2015 04:57 AM, AKASHI Takahiro wrote:
Please try my latest kexec-tools in my linaro repo (branch name is
kdump/v0.11)
and let me know the result.
Thanks a lot.. Just fetched your repo and found v.0.11.
With this crash kernel loaded successfully, if I do not use initrd.
On Thursday 02 April 2015 11:07 AM, AKASHI Takahiro wrote:
Pratyush,
On 04/02/2015 01:58 PM, Pratyush Anand wrote:
On Thursday 02 April 2015 04:57 AM, AKASHI Takahiro wrote:
Please try my latest kexec-tools in my linaro repo (branch name is
kdump/v0.11)
and let me know the result
Hi Kishon,
Correcting Mohit's ID
On Mon, May 4, 2015 at 9:54 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
I'm planning to add power management (suspend/resume) support for DRA7xx and
have a query.
The pci_pm_suspend_noirq callback being a bus pm_ops gets invoked late i.e
after
From: Pratyush Anand pratyush.an...@gmail.com
Mohit's email-id doesn't exist anymore as he has left the
company. Replace ST's id with mohit.kumar.dh...@gmail.com.
Cc: Mohit Kumar mohit.kumar.dh...@gmail.com
Signed-off-by: Pratyush Anand pratyush.an...@gmail.com
---
.mailmap
From: Pratyush Anand pratyush.an...@gmail.com
pratyush.an...@st.com email-id doesn't exist anymore as I have left
the company. Replace ST's id with pratyush.an...@gmail.com.
Signed-off-by: Pratyush Anand pratyush.an...@gmail.com
---
.mailmap | 1
From: Pratyush Anand pratyush.an...@gmail.com
Signed-off-by: Pratyush Anand pratyush.an...@gmail.com
---
.mailmap | 1 +
Documentation/ABI/testing/configfs-spear-pcie-gadget | 2 +-
Documentation/ABI/testing/sysfs-bus-usb-lvstest | 12
From: Pratyush Anand pratyush.an...@gmail.com
Cc: Mohit Kumar mohit.kumar.dh...@gmail.com
Signed-off-by: Pratyush Anand pratyush.an...@gmail.com
---
.mailmap | 1 +
drivers/pci/host/pcie-spear13xx.c | 2 +-
drivers/phy/phy-spear1310-miphy.c | 2 +-
drivers/phy/phy
Hi Oleg,
On Monday 04 May 2015 06:19 PM, Oleg Nesterov wrote:
+bool __weak arch_uretprobe_is_alive(struct arch_uretprobe *auret, struct
pt_regs *regs)
+{
+ return true;
+}
IIUC, then this function should return false when both auret and regs
are corresponding to same retprobe, else we
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