On Thu, Oct 11, 2012 at 7:07 AM, Laurent Pinchart
laurent.pinch...@ideasonboard.com wrote:
On Wednesday 05 September 2012 15:27:24 Daniel Vetter wrote:
On Wed, Sep 05, 2012 at 01:53:44AM +, Liu, Chuansheng wrote:
This patch is for introducing the irq thread support in drm_irq.
Why we
On Fri, Nov 9, 2012 at 10:00 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Fri, Nov 09, 2012 at 09:18:58AM -0600, Rob Clark wrote:
On Fri, Nov 9, 2012 at 7:59 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
[...]
+static int regs_open(struct inode *inode, struct
From: Rob Clark r...@ti.com
A new atomic modeset/pageflip ioctl being developed in DRM requires
get_user() to work for 64bit types (in addition to just put_user()).
Signed-off-by: Rob Clark r...@ti.com
---
arch/arm/include/asm/uaccess.h | 25 -
arch/arm/lib/getuser.S
On Mon, Nov 12, 2012 at 4:46 AM, Will Deacon will.dea...@arm.com wrote:
On Fri, Nov 09, 2012 at 09:17:33PM +, Rob Clark wrote:
From: Rob Clark r...@ti.com
A new atomic modeset/pageflip ioctl being developed in DRM requires
get_user() to work for 64bit types (in addition to just put_user
On Mon, Nov 12, 2012 at 8:38 AM, Will Deacon will.dea...@arm.com wrote:
On Mon, Nov 12, 2012 at 01:46:57PM +, Rob Clark wrote:
On Mon, Nov 12, 2012 at 4:46 AM, Will Deacon will.dea...@arm.com wrote:
On Fri, Nov 09, 2012 at 09:17:33PM +, Rob Clark wrote:
@@ -122,22 +124,35 @@ extern
On Mon, Nov 12, 2012 at 1:27 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Fri, Nov 09, 2012 at 03:17:33PM -0600, Rob Clark wrote:
From: Rob Clark r...@ti.com
A new atomic modeset/pageflip ioctl being developed in DRM requires
get_user() to work for 64bit types (in addition
On Mon, Nov 12, 2012 at 5:08 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Mon, Nov 12, 2012 at 01:58:32PM -0600, Rob Clark wrote:
On Mon, Nov 12, 2012 at 1:27 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Fri, Nov 09, 2012 at 03:17:33PM -0600, Rob Clark wrote
On Mon, Nov 12, 2012 at 5:53 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Mon, Nov 12, 2012 at 05:33:41PM -0600, Rob Clark wrote:
I'm sort of thinking maybe we want to change 'switch (sizeof(*(__p)))'
with 'switch (sizeof(typeof(x)))' in case someone ignores the compiler
From: Rob Clark r...@ti.com
A new atomic modeset/pageflip ioctl being developed in DRM requires
get_user() to work for 64bit types (in addition to just put_user()).
v1: original
v2: pass correct size to check_uaccess, and better handling of narrowing
double word read with __get_user_xb
From: Rob Clark r...@ti.com
A dma-fence can be attached to a buffer which is being filled or consumed
by hw, to allow userspace to pass the buffer without waiting to another
device. For example, userspace can call page_flip ioctl to display the
next frame of graphics after kicking the GPU
On Fri, Jul 13, 2012 at 12:35 PM, Tom Cooksey tom.cook...@arm.com wrote:
My other thought is around atomicity. Could this be extended to
(safely) allow for hardware devices which might want to access
multiple buffers simultaneously? I think it probably can with
some tweaks to the interface? An
On Fri, Jul 13, 2012 at 4:44 PM, Maarten Lankhorst
maarten.lankho...@canonical.com wrote:
Hey,
Op 13-07-12 20:52, Rob Clark schreef:
On Fri, Jul 13, 2012 at 12:35 PM, Tom Cooksey tom.cook...@arm.com wrote:
My other thought is around atomicity. Could this be extended to
(safely) allow
From: Rob Clark r...@ti.com
Re-sending first patch, with a wider audience. Apparently I didn't
spam enough inboxes the first time.
And, at Daniel Vetter's suggestion, adding some helper functions in
dma-buf to get the most restrictive parameters of all the attached
devices.
Rob Clark (2
From: Rob Clark r...@ti.com
For devices which have constraints about maximum number of segments
in an sglist. For example, a device which could only deal with
contiguous buffers would set max_segment_count to 1.
The initial motivation is for devices sharing buffers via dma-buf,
to allow
From: Rob Clark r...@ti.com
Add some helpers to iterate through all attachers and get the most
restrictive segment size/count/boundary.
Signed-off-by: Rob Clark r...@ti.com
---
drivers/base/dma-buf.c | 63 +++
include/linux/dma-buf.h | 19
On Mon, Mar 4, 2013 at 1:46 PM, Tony Lindgren t...@atomide.com wrote:
drivers/gpu/drm/tilcdc/tilcdc_slave.o:(.data+0x54): multiple definition of
`__mod_of_device_table'
drivers/gpu/drm/tilcdc/tilcdc_tfp410.o:(.data+0x54): first defined here
drivers/gpu/drm/tilcdc/tilcdc_panel.o:(.data+0x54):
On Sat, Apr 13, 2013 at 5:45 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Sat, Apr 13, 2013 at 08:54:22AM -0400, Rob Clark wrote:
On Mon, Mar 4, 2013 at 1:46 PM, Tony Lindgren t...@atomide.com wrote:
drivers/gpu/drm/tilcdc/tilcdc_slave.o:(.data+0x54): multiple definition
On 01/25/2013 05:40 PM, Peter Huewe wrote:
Found with coccicheck.
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.
Signed-off-by: Peter Huewe peterhu...@gmx.de
Signed-off-by: Rob Clark r...@ti.com
---
drivers/staging/omapdrm/omap_gem.c |4
On Tue, Jan 15, 2013 at 6:33 AM, Maarten Lankhorst
m.b.lankho...@gmail.com wrote:
Hi Maarten,
This is a nice looking extension to avoid re-implementing a mutex in
TTM/reservation code.. ofc, probably someone more familiar with mutex
code should probably review, but probably a bit of
On Wed, Jan 30, 2013 at 5:08 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Jan 30, 2013 at 2:07 AM, Rob Clark robdcl...@gmail.com wrote:
==
Basic problem statement:
- --- -
GPU's do operations that commonly involve many buffers. Those buffers
can
On Wed, Jan 30, 2013 at 5:52 AM, Rob Clark robdcl...@gmail.com wrote:
On Wed, Jan 30, 2013 at 5:08 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Jan 30, 2013 at 2:07 AM, Rob Clark robdcl...@gmail.com wrote:
==
Basic problem statement:
- --- -
GPU's
-off-by: Arnd Bergmann a...@arndb.de
Cc: Rob Clark r...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
drivers/staging/omapdrm/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/omapdrm/Kconfig b/drivers/staging/omapdrm/Kconfig
index b724a41
On 01/21/2013 11:26 AM, Rob Clark wrote:
On 01/21/2013 11:16 AM, Arnd Bergmann wrote:
The omapdrm driver is incorrectly flagged to allow building
on non-omap platforms, when ARCH_MULTIPLATFORM is set.
This does not work, because it unconditionally selects
the OMAP2_DSS symbol that only works
On 01/21/2013 11:41 AM, Arnd Bergmann wrote:
On Monday 21 January 2013, Rob Clark wrote:
Are you sure OMAP2_DSS requires ARCH_OMAP2PLUS? I don't see this, and
it at least used to not depend on ARCH_OMAP2PLUS. If it does now, I
think the correct fix would be to remove the dependency
On 01/22/2013 10:53 AM, Greg Kroah-Hartman wrote:
On Mon, Jan 21, 2013 at 12:39:31PM -0600, Rob Clark wrote:
On 01/21/2013 11:41 AM, Arnd Bergmann wrote:
On Monday 21 January 2013, Rob Clark wrote:
Are you sure OMAP2_DSS requires ARCH_OMAP2PLUS? I don't see this, and
it at least used
On 01/22/2013 11:47 AM, Arnd Bergmann wrote:
On Tuesday 22 January 2013, Greg Kroah-Hartman wrote:
Ie. I'd prefer to re-enable omapdss on multi-plat rather than
disabling omapdrm. With changes in drm core, it is a bit of a pain
to compile test all the arm drivers by doing N different builds,
On Tue, Jan 22, 2013 at 11:03 AM, Koen Kooi k...@dominion.thruhere.net wrote:
Op 22 jan. 2013, om 17:51 heeft Afzal Mohammed af...@ti.com het volgende
geschreven:
Hi,
This series adds DT support to da8xx-fb driver (device found on
DaVinci and AM335x SoC's). It does certain cleanup's in
At least core omapdss does not have any build dependencies on
ARCH_OMAP2PLUS, and adding this dependency in the Kconfig breaks omapdrm
for ARCH_MULTIPLATFORM builds.
Signed-off-by: Rob Clark robdcl...@gmail.com
---
drivers/video/omap2/Kconfig | 7 ++-
1 file changed, 6 insertions(+), 1
On Wed, Jan 23, 2013 at 6:27 AM, Mohammed, Afzal af...@ti.com wrote:
Hi,
On Wed, Jan 23, 2013 at 00:15:09, Rob Clark wrote:
Wouldn't it be better to delete da8xx-fb.* and switch to Rob Clarks DRM
based driver for this IP block?
we probably can't delete da8xx-fb, but I think it would
Hmm, maybe DRM_GEM_CMA_HELPER should depend on ARM (or !PPC)? Or
maybe there is an alternative fxn to use on other archs?
In truth, it is fine to make TILCDC depend on ARM, as it wouldn't be
used on any other platform (today.. until TI comes up with some crazy
chip w/ some TI DSP plus display
On Wed, Sep 5, 2012 at 8:27 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Sep 05, 2012 at 01:53:44AM +, Liu, Chuansheng wrote:
This patch is for introducing the irq thread support in drm_irq.
Why we need irq thread in drm_irq code?
In our GPU system, the gpu interrupt handler need some
/dma-fence.c
new file mode 100644
index 000..93448e4
--- /dev/null
+++ b/drivers/base/dma-fence.c
@@ -0,0 +1,268 @@
+/*
+ * Fence mechanism for dma-buf to allow for asynchronous dma access
+ *
+ * Copyright (C) 2012 Texas Instruments
+ * Author: Rob Clark rob.cl...@linaro.org
back to when it was a user
configurable option, rather than something select'd by drivers using
dmabuf, and we just never went back to clean up. Let's drop the
fallbacks.
Reviewed-by: Rob Clark rob.cl...@linaro.org
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
On Sat, Aug 11, 2012 at 2:22 PM, Daniel Vetter dan...@ffwll.ch wrote:
+
+/**
+ * dma_fence_wait - wait for a fence to be signaled
+ *
+ * @fence: [in]The fence to wait on
+ * @intr:[in]if true, do an interruptible wait
+ * @timeout: [in]absolute time for timeout, in
From: Rob Clark r...@ti.com
A dma-fence can be attached to a buffer which is being filled or consumed
by hw, to allow userspace to pass the buffer without waiting to another
device. For example, userspace can call page_flip ioctl to display the
next frame of graphics after kicking the GPU
oh, btw, this should be an [RFC]
On Wed, Jul 11, 2012 at 5:29 PM, Rob Clark rob.cl...@linaro.org wrote:
From: Rob Clark r...@ti.com
A dma-fence can be attached to a buffer which is being filled or consumed
by hw, to allow userspace to pass the buffer without waiting to another
device
On Wed, Jul 11, 2012 at 6:49 PM, Maarten Lankhorst
m.b.lankho...@gmail.com wrote:
Op 12-07-12 00:29, Rob Clark schreef:
From: Rob Clark r...@ti.com
A dma-fence can be attached to a buffer which is being filled or consumed
by hw, to allow userspace to pass the buffer without waiting to another
From: Rob Clark r...@ti.com
For devices which have constraints about maximum number of segments
in an sglist. For example, a device which could only deal with
contiguous buffers would set max_segment_count to 1.
The initial motivation is for devices sharing buffers via dma-buf,
to allow
to the cleanup of moving
dma_mask/coherent_dma_mask into dma_parms, I'll do this first.
So anyways, don't consider this patch yet for inclusion, I'll make an
updated one based on dma_parms..
BR,
-R
On Thu, Jul 19, 2012 at 11:23 AM, Rob Clark rob.cl...@linaro.org wrote:
From: Rob Clark r
On Mon, Nov 26, 2012 at 7:19 AM, Terje Bergstrom tbergst...@nvidia.com wrote:
+struct tegra_drm_submit_args {
+ void *context;
Just a quick comment..
You shouldn't really use ptr here, but instead use a 64bit type so
that you don't run into issues later for armv8/64bit. Same comment
be
able to do something better when reservations land
Signed-off-by: Rob Clark r...@ti.com
Cc: Aaron Plattner aplatt...@nvidia.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
Documentation/dma-buf-sharing.txt | 6 +-
drivers/base/dma-buf.c| 43
On Thu, Dec 20, 2012 at 10:50 AM, Rob Clark robdcl...@gmail.com wrote:
On Thu, Dec 20, 2012 at 7:14 AM, Daniel Vetter daniel.vet...@ffwll.ch wrote:
All drivers which implement this need to have some sort of refcount to
allow concurrent vmap usage. Hence implement this in the dma-buf core
On Thu, Nov 15, 2012 at 3:19 AM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 13 November 2012, Russell King - ARM Linux wrote:
You're missing something; that is one of the greatest powers of open
source. The many eyes (and minds) effect. Someone out there probably
has a solution to
On Thu, Nov 15, 2012 at 7:39 AM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 15 November 2012, Rob Clark wrote:
On Thu, Nov 15, 2012 at 3:19 AM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 13 November 2012, Russell King - ARM Linux wrote:
You're missing something; that is one
From: Rob Clark r...@ti.com
A new atomic modeset/pageflip ioctl being developed in DRM requires
get_user() to work for 64bit types (in addition to just put_user()).
v1: original
v2: pass correct size to check_uaccess, and better handling of narrowing
double word read with __get_user_xb
On 01/15/2013 01:46 PM, Cong Ding wrote:
There is a memory leakage in variable sg if it goes to error.
Signed-off-by: Cong Ding ding...@gmail.com
Signed-off-by: Rob Clark r...@ti.com
---
drivers/staging/omapdrm/omap_gem_dmabuf.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions
On Tue, Aug 6, 2013 at 7:31 AM, Tom Cooksey tom.cook...@arm.com wrote:
So in some respects, there is a constraint on how buffers which will
be drawn to using the GPU are allocated. I don't really like the idea
of teaching the display controller DRM driver about the GPU buffer
constraints,
On Tue, Aug 6, 2013 at 8:18 AM, Lucas Stach l.st...@pengutronix.de wrote:
Am Dienstag, den 06.08.2013, 12:31 +0100 schrieb Tom Cooksey:
Hi Rob,
+lkml
On Fri, Jul 26, 2013 at 11:58 AM, Tom Cooksey tom.cook...@arm.com
wrote:
* It abuses flags parameter of DRM_IOCTL_MODE_CREATE_DUMB
On Tue, Aug 6, 2013 at 10:03 AM, Tom Cooksey tom.cook...@arm.com wrote:
Hi Rob,
We may also then have additional constraints when sharing buffers
between the display HW and video decode or even camera ISP HW.
Programmatically describing buffer allocation constraints is very
difficult
On Tue, Aug 6, 2013 at 10:36 AM, Lucas Stach l.st...@pengutronix.de wrote:
Am Dienstag, den 06.08.2013, 10:14 -0400 schrieb Rob Clark:
On Tue, Aug 6, 2013 at 8:18 AM, Lucas Stach l.st...@pengutronix.de wrote:
Am Dienstag, den 06.08.2013, 12:31 +0100 schrieb Tom Cooksey:
Hi Rob,
+lkml
On Tue, Aug 6, 2013 at 1:38 PM, Tom Cooksey tom.cook...@arm.com wrote:
... This is the purpose of the attach step,
so you know all the devices involved in sharing up front before
allocating the backing pages. (Or in the worst case, if you have a
late attacher you at least know when no
On Wed, Aug 7, 2013 at 12:23 AM, John Stultz john.stu...@linaro.org wrote:
On Tue, Aug 6, 2013 at 5:15 AM, Rob Clark robdcl...@gmail.com wrote:
well, let's divide things up into two categories:
1) the arrangement and format of pixels.. ie. what userspace would
need to know if it mmap's
On Wed, Aug 7, 2013 at 1:33 PM, Tom Cooksey tom.cook...@arm.com wrote:
Didn't you say that programmatically describing device placement
constraints was an unbounded problem? I guess we would have to
accept that it's not possible to describe all possible constraints
and instead find a
On Thu, Aug 22, 2013 at 2:53 AM, Jean-Francois Moine moin...@free.fr wrote:
On Wed, 21 Aug 2013 23:36:05 +0100
Russell King - ARM Linux li...@arm.linux.org.uk wrote:
AFAIK, the TI boards have no pin-swapped, nor has the Cubox (there is
no need to set the bit CFG_GRA_SWAPRB of the register
should probably hit this same scenario.
Better to not assume too much about the state of the tda when the
driver is loaded, so I think this patch is a good idea.
Signed-off-by: Rob Clark robdcl...@gmail.com
BR,
-R
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body
On Thu, Aug 15, 2013 at 7:16 AM, Maarten Lankhorst
maarten.lankho...@canonical.com wrote:
Op 12-08-13 17:43, Rob Clark schreef:
On Mon, Jul 29, 2013 at 10:05 AM, Maarten Lankhorst
maarten.lankho...@canonical.com wrote:
+
[snip]
+/**
+ * fence_add_callback - add a callback to be called when
().
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
good catch, thanks
Signed-off-by: Rob Clark robdcl...@gmail.com
---
drivers/gpu/drm/msm/msm_gem.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
...@trendmicro.com.cn
Thanks
Reviewed-by: Rob Clark robdcl...@gmail.com
---
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
index 9b794c9..ab546c9 100644
--- a/drivers/gpu/drm
On Wed, Sep 11, 2013 at 10:09 AM, Wei Yongjun weiyj...@gmail.com wrote:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
The dereference to 'pdata' should be moved below the NULL test.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
Acked-by: Rob Clark robdcl...@gmail.com
hmm, looks like I cargo-cult'd the same into msm.
I guess in i915 (and ttm) case, the issue arises due to need for CPU
access to buffer via GTT? In which case I should be safe to drop the
set_need_resched() as well? (Since CPU always has direct access to the
pages.) Or am I missing something
On Mon, Sep 16, 2013 at 5:19 PM, Thomas Meyer tho...@m3y3r.de wrote:
The variable priv-kms is not initialized yet.
Found by scripts/coccinelle/tests/odd_ptr_err.cocci.
PTR_ERR should access the value just tested by IS_ERR.
Signed-off-by: Thomas Meyer tho...@m3y3r.de
thanks, I've got it
oh, hmm.. are you importing buffers from i915? It looks like this part:
- if (obj-base.import_attach) {
- drm_free_large(obj-pages);
- obj-pages = NULL;
- return;
- }
should not have been removed from udl_gem_put_pages()..
BR,
-R
On Mon, Nov 25, 2013 at 8:17 AM, tho...@m3y3r.de wrote:
Hi,
On Sat, Nov 30, 2013 at 3:33 AM, Thomas Meyer tho...@m3y3r.de wrote:
Am Montag, den 25.11.2013, 08:23 -0500 schrieb Rob Clark:
oh, hmm.. are you importing buffers from i915? It looks like this part:
My computer has an i915 graphic card and I use an USB docking station,
that has
-by: Rob Clark robdcl...@gmail.com
+ dma_buf_poll_cb(NULL, dcb-cb);
+ }
+ }
+
+ if ((events POLLOUT) resv-fence_shared_count 0) {
+ struct dma_buf_poll_cb_t *dcb = dmabuf-cb_shared;
+ int i
can have a
common get_prime_res_obj fxn for everyone using GEM?
Anyways, that only matters within drivers/gpu/drm so easy enough to
change it later.. so for the drm/fence/reservation/dmabuf bits:
Reviewed-by: Rob Clark robdcl...@gmail.com
+
+ return dma_buf_export(obj
On Mon, Feb 17, 2014 at 10:58 AM, Maarten Lankhorst
maarten.lankho...@canonical.com wrote:
Signed-off-by: Maarten Lankhorst maarten.lankho...@canonical.com
Reviewed-by: Rob Clark robdcl...@gmail.com
---
include/linux/reservation.h | 18 +-
1 file changed, 17 insertions
the original patch by Rob Clark.
v1: Original
v2: Renamed from bikeshed to seqno, moved into dma-fence.c since
not much was left of the file. Lots of documentation added.
v3: Use fence_ops instead of custom callbacks. Moved to own file
to avoid circular dependency between dma-buf.h
:
Add trace events.
Import changes required by android syncpoints.
v17:
Use wake_up_state instead of try_to_wake_up. (Colin Cross)
Fix up commit description for seqno_fence. (Rob Clark)
Signed-off-by: Maarten Lankhorst maarten.lankho...@canonical.com
Reviewed-by: Rob Clark robdcl
that doesn't support this mechanism. It is useful to expose
this for graphics cards that have an op to support this.
Some cards like i915 can export those, but don't have an option to wait,
so they need the software fallback.
I extended the original patch by Rob Clark.
v1: Original
v2: Renamed
On Mon, Feb 17, 2014 at 12:36 PM, Christian König
deathsim...@vodafone.de wrote:
Am 17.02.2014 18:27, schrieb Rob Clark:
On Mon, Feb 17, 2014 at 11:56 AM, Christian König
deathsim...@vodafone.de wrote:
Am 17.02.2014 16:56, schrieb Maarten Lankhorst:
This type of fence can be used
On Tue, Feb 11, 2014 at 10:39 AM, Paul Bolle pebo...@tiscali.nl wrote:
Rob,
Commit 55459968176f (drm/msm: add a330/apq8x74) added preprocessor
checks for CONFIG_MSM_OCMEM. But I couldn't find a Kconfig symbol
MSM_OCMEM (nor a preprocessor define for a macro of that name). Why were
those
so dropping ARCH_MSM will work properly for the new ARCH_QCOM multiplatform
build.
Signed-off-by: Kumar Gala ga...@codeaurora.org
Acked-by: Rob Clark robdcl...@gmail.com
---
David/Rob,
If you can ack this I'll send it via linux-qcom/arm-soc tree's
thanks
- k
drivers/gpu/drm/msm
On Thu, Jun 13, 2013 at 6:31 AM, Paul Bolle pebo...@tiscali.nl wrote:
On Wed, 2013-03-13 at 20:48 +0100, Paul Bolle wrote:
Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
Untested. Perhaps the first test that people with access to the relevant
hardware might do, is to test _before applying
of the
others are.
Thanks Arnd
Acked-By: Rob Clark robdcl...@gmail.com
Cc: Rob Clark robdcl...@gmail.com
Cc: Dave Airlie airl...@linux.ie
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Arnd Bergmann a...@arndb.de
---
drivers/gpu/drm/tilcdc/tilcdc_panel.c | 1 -
drivers/gpu/drm
On Mon, May 20, 2013 at 6:53 AM, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
On 05/19/2013 10:45 PM, Russell King - ARM Linux wrote:
On Sun, May 19, 2013 at 06:49:22PM +0200, Sebastian Hesselbarth wrote:
This adds an irq handler for HPD to the tda998x slave encoder driver
to
On Wed, Sep 25, 2013 at 10:49 AM, Joerg Roedel j...@8bytes.org wrote:
The function msm_iommu_get_ctx() is needed buy the MSM-GPU
driver with and wiithout IOMMU compiled in. Make the
function available when no IOMMU driver is there.
For this one,
Reviewed-by: Rob Clark robdcl...@gmail.com
On Wed, Jun 4, 2014 at 1:49 PM, Greg Kroah-Hartman
gre...@linuxfoundation.org wrote:
On Wed, Jun 04, 2014 at 03:28:33PM +0200, Thierry Reding wrote:
On Wed, Jun 04, 2014 at 04:57:07PM +0530, Sumit Semwal wrote:
Hi Greg,
On 30 May 2014 21:38, Greg Kroah-Hartman gre...@linuxfoundation.org
On Thu, Jun 5, 2014 at 3:24 AM, Geert Uytterhoeven ge...@linux-m68k.org wrote:
On Thu, Jun 5, 2014 at 2:05 AM, Rob Clark robdcl...@gmail.com wrote:
On Wed, Jun 4, 2014 at 6:54 AM, Matwey V. Kornilov mat...@sai.msu.ru wrote:
From e7147352639fd8f92b1cc85cff9bc5046c7a2130 Mon Sep 17 00:00:00 2001
On Thu, Jun 5, 2014 at 11:48 AM, Greg Kroah-Hartman
gre...@linuxfoundation.org wrote:
On Thu, Jun 05, 2014 at 07:51:10AM -0400, Rob Clark wrote:
On Wed, Jun 4, 2014 at 1:49 PM, Greg Kroah-Hartman
gre...@linuxfoundation.org wrote:
On Wed, Jun 04, 2014 at 03:28:33PM +0200, Thierry Reding wrote
On Mon, Jun 9, 2014 at 1:56 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 06/06/14 07:03, Stephane Viau wrote:
The clock driver usually complains when a clock is being prepared
before setting its rate. It is the case here for core_clk which
needs to be set at 19.2 MHz before we attempt a
On Thu, May 29, 2014 at 2:37 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
TVout hardware block is responsible to dispatch the data flow coming
from compositor block to any of the output (HDMI or Analog TV).
It control when output are start/stop and configure according the
require
On Thu, May 29, 2014 at 2:36 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
This series of patches add the support of DRM/KMS drivers for
STMicroelectronics
chipsets stih416 and stih407.
version 4:
- Remove depency between TVout it subdevices HDMI and HDA
-
On Thu, May 29, 2014 at 2:37 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
Compositor control all the input sub-device (VID, GDP)
and the mixer(s).
It is the main entry point for composition.
Layer interface is used to control the abstracted layers.
Add debug in mixer, GDP and
On Thu, May 29, 2014 at 2:37 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
Mixer hardware IP is responsible of mixing the different inputs layers.
Z-order is managed by the mixer.
We could 2 mixers: one for main path and one for auxillary path
Mixers are part of Compositor
On Thu, May 29, 2014 at 2:37 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
Generic Display Pipeline are one of the compositor input sub-devices.
GDP are dedicated to graphic input like RGB plans.
GDP is part of Compositor hardware block which will be introduce later.
A sti_layer
On Thu, May 29, 2014 at 2:37 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
Make the link between all the hardware drivers and DRM/KMS interface.
Create the driver itself and make it register all the sub-components.
Use GEM CMA helpers for buffer allocation.
Signed-off-by: Benjamin
On Wed, Jun 11, 2014 at 2:37 PM, Rob Clark robdcl...@gmail.com wrote:
On Thu, May 29, 2014 at 2:36 AM, Benjamin Gaignard
benjamin.gaign...@linaro.org wrote:
This series of patches add the support of DRM/KMS drivers for
STMicroelectronics
chipsets stih416 and stih407.
version 4
On Mon, Jun 16, 2014 at 2:20 PM, Stephane Viau sv...@codeaurora.org wrote:
This changes activates the iommu support for MDP5, through the
platform config structure.
Iommu support is also slightly modified in order to make sure
that MDP iommu is properly cleaned up if a probe deferral is
On Sat, Jun 14, 2014 at 6:24 PM, Fabian Frederick f...@skynet.be wrote:
use mm.h definition
Cc: David Airlie airl...@linux.ie
Cc: Rob Clark robdcl...@gmail.com
Signed-off-by: Fabian Frederick f...@skynet.be
Thanks, I've got this queued up
BR,
-R
---
drivers/gpu/drm/msm/msm_iommu.c | 2
:
drivers/gpu/drm/msm/msm_drv.h:153:5: note: expected 'uint32_t *' but
argument is of type 'dma_addr_t *'
int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
^
Signed-off-by: Matwey V. Kornilov mat...@sai.msu.ru
Reviewed-by: Rob Clark robdcl...@gmail.com
---
drivers/gpu
msm_iommu_get_ctx() was mainly for dealing
with secure playback (?))
BR,
-R
Cc: Rob Clark robdcl...@gmail.com
Signed-off-by: Joerg Roedel j...@8bytes.org
---
drivers/gpu/drm/msm/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig
On Wed, Jan 8, 2014 at 8:35 AM, Joerg Roedel j...@8bytes.org wrote:
On Wed, Jan 08, 2014 at 08:23:49AM -0500, Rob Clark wrote:
On Tue, Jan 7, 2014 at 5:53 PM, Joerg Roedel j...@8bytes.org wrote:
On Tue, Jan 07, 2014 at 11:47:26PM +0100, Joerg Roedel wrote:
The DRM driver for MSM depends
On Sat, Dec 14, 2013 at 7:47 AM, Thomas Hellstrom tho...@shipmail.org wrote:
On 12/14/2013 01:37 PM, Thierry Reding wrote:
On Thu, Dec 12, 2013 at 11:30:23PM +0100, Daniel Vetter wrote:
On Thu, Dec 12, 2013 at 8:34 PM, Thomas Hellstrom thellst...@vmware.com
wrote:
On 12/12/2013 03:36 PM,
On Mon, Dec 30, 2013 at 4:15 PM, Stephen Boyd sb...@codeaurora.org wrote:
This file doesn't use the clk_reset() API that is exposed in
mach-msm's mach/clk.h file. Remove the include so that this
driver can be compiled as part of the multi-platform kernel.
Thanks!
Signed-off-by: Rob Clark
On Mon, Dec 30, 2013 at 8:12 PM, Rob Clark robdcl...@gmail.com wrote:
On Mon, Dec 30, 2013 at 4:15 PM, Stephen Boyd sb...@codeaurora.org wrote:
This file doesn't use the clk_reset() API that is exposed in
mach-msm's mach/clk.h file. Remove the include so that this
driver can be compiled
On Fri, Aug 9, 2013 at 12:15 PM, Tom Cooksey tom.cook...@arm.com wrote:
Turning to DRM/KMS, it seems the supported formats of a plane can be
queried using drm_mode_get_plane. However, there doesn't seem to be a
way to query the supported formats of a crtc? If display HW only
supports
/most of the
earlier versions of this too)
Reviewed-by: Rob Clark robdcl...@gmail.com
---
Documentation/DocBook/device-drivers.tmpl |2
drivers/base/Kconfig | 10 +
drivers/base/Makefile |2
drivers/base/fence.c | 286
restoration of the mode and framebuffer data.
Signed-off-by: Darren Etheridge detheri...@ti.com
Reviewed-by: Rob Clark robdcl...@gmail.com
---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm
On Mon, Mar 3, 2014 at 2:08 PM, Felipe Balbi ba...@ti.com wrote:
From: Darren Etheridge detheri...@ti.com
1680x1050 appears to also be within the bandwidth capabilities
of the device and memory infrastructure.
For this one, is 1680x1050 possible on all devices w/ tilcdc (like 1st
gen
On Fri, Apr 11, 2014 at 5:15 PM, Thomas Hellstrom thellst...@vmware.com wrote:
On 04/11/2014 10:31 PM, David Herrmann wrote:
Hi
On Fri, Apr 11, 2014 at 2:42 PM, Thomas Hellstrom thellst...@vmware.com
wrote:
as was discussed a while ago, there are some serious security flaws with
the
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