with patch wrangling and pull request submissions.
Signed-off-by: Jason Cooper ja...@lakedaemon.net
Agreed :)
Acked-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a0cbf3..7a45039 100644
to -stable?
Please apply with following commit msg (or request a proper v2):
This fixes a typo which left twsi config3 option enabled.
and
Acked-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Sebastian
--
To unsubscribe from this list: send the line unsubscribe linux-kernel
On 10/14/2013 09:02 PM, Jason Cooper wrote:
On Mon, Oct 14, 2013 at 08:43:49PM +0200, Sebastian Hesselbarth wrote:
...
You know a good way to determine how far it should go back to -stable?
$ git blame -L 338,338 drivers/pinctrl/mvebu/pinctrl-dove.c
c9f95ced drivers/pinctrl/pinctrl-dove.c
On 10/08/2013 02:24 PM, Sebastian Hesselbarth wrote:
This adds known facts and rumors about the Marvell Berlin (88DE3xxx) SoC
family to the Marvell SoC documentation.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Reviewed-by: Jason Cooper ja...@lakedaemon.net
Reviewed
On 10/08/2013 02:24 PM, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
(88DE3100) and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has
nodes for cpus, some clocks, l2 cache controller, local timer, apb timers,
uart, and interrupt
On 10/15/2013 01:13 AM, Sebastian Hesselbarth wrote:
On 10/08/2013 02:24 PM, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
(88DE3100) and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has
nodes for cpus, some clocks, l2 cache
On 10/15/2013 05:10 AM, Jisheng Zhang wrote:
Hi Sebastian,
On Mon, 14 Oct 2013 16:09:07 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
On 10/08/2013 02:24 PM, Sebastian Hesselbarth wrote:
This adds known facts and rumors about the Marvell Berlin (88DE3xxx) SoC
family
Globalscale Guruplug has AW-GH381 WiFi/BT on sdio which is always
present and cannot be detected in any way. Therefore, mark the node
as non-removable instead of broken-cd. While at it, also put a note
about connected WiFi/BT chip above.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba
SDIO controllers found on Marvell Kirkwood 6281/6282 SoCs require
pins to be muxed by pinctrl. As there is only one sane pinctrl
setting for this, provide default pinctrl properties to the controller
nodes.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
I am not sending
. Although, not directly related with the described issue, reverse
irq bit handling back to original order by replacing ffs() with fls().
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Thomas Gleixner t...@linutronix.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew
didn't expect any.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Nicolas Pitre n...@fluxnic.net
Cc: Chris Ball c...@laptop.org
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: linux
indicate that none should
have been fired.
Third patch silences a card detect mechanism related dev_notice to
dev_dbg to not bother users with that.
All patches are based on v3.12. I suggest to take irqchip patch though
mvebu branch, while mmc related patches should go though mmc tree.
Sebastian
mvsdio reports method of card detection with dev_notice, while for
removable cards it may be sane, for non-removable cards it is not.
Also, as the user cannot do anything about it, silence the message
by reducing it from dev_notice to dev_dbg.
Signed-off-by: Sebastian Hesselbarth
On 11/16/2013 12:48 AM, Stephen Boyd wrote:
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface.
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Signed-off-by: Stephen Boyd sb...@codeaurora.org
Network PHYs consume a noticable amount of power. This adds phy_resume
on port start and phy_suspend on port stop to save this power if the
port is down anyway. While at it, also properly start/stop the phy.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S
This adds helper functions to resume and suspend a given phy_device
by calling the corresponding driver callbacks if available.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: net...@vger.kernel.org
Cc: linux-arm-ker
This ensures PHYs are resumed on attach and suspended on detach.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: net...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
drivers/net
Marvell PHYs support generic PHY suspend/resume, so provide those
callbacks to all marvell specific drivers.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: net...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc
Network PHYs consume a noticable amount of power. This adds phy_resume
on start_dev and phy_suspend on stop_dev to save this power if the
port is down anyway.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: net
Since phy_attach ensures PHYs are resumed, we can now suspend all
PHYs that have no attached netdev after initcalls.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: net...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Network PHYs consume a noticable amount of power. This adds phy_resume
on slave_open and phy_suspend on slave_stop to save this power if the
port is down anyway.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: net
, down 5218 mW 4718 mW -500 mW - 9.6%
1 port, link, up
1 port, no link, down 4842 mW 4722 mW -120 mW - 2.5%
1 port, no link, up
1 port, no link, down 4356 mW 4290 mW - 66 mW - 1.5%
Sebastian Hesselbarth (7):
net: phy: marvell: provide genphy suspend/resume
net: phy: provide
On 11/20/2013 09:58 PM, Florian Fainelli wrote:
2013/11/20 Sebastian Hesselbarth sebastian.hesselba...@gmail.com:
Since phy_attach ensures PHYs are resumed, we can now suspend all
PHYs that have no attached netdev after initcalls.
I do like the idea, but I think you might want to make sure
On 11/21/2013 12:40 AM, Rob Herring wrote:
On Wed, Nov 20, 2013 at 3:47 PM, delicious quinoa
delicious.qui...@gmail.com wrote:
On Thu, Nov 7, 2013 at 6:33 AM, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
On 11/06/13 23:49, Alan Tull wrote:
[snip]
BTW, what if we get rid
specific to generic while given matches can be in any order.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
v1-v2:
- Allow checks against nodes with no compatible (Reported by Rob Herring)
- Add some comments
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob
On 12/03/2013 09:57 PM, Leigh Brown wrote:
Hi Russell and Nicolas,
Apologies for taking so long to respond to this thread.
On 2013-12-03 12:40, Russell King - ARM Linux wrote:
On Tue, Dec 03, 2013 at 07:23:46AM -0500, Jason Cooper wrote:
On Mon, Dec 02, 2013 at 04:15:54PM +0100, Nicolas
, of_match_node always hits the first match that
equals _any_ of the above compatible strings. With this patch, it
hits the matches _in order_ of the compatible strings.
Is this correct or am I missing something?
Thierry?
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
On 12/04/2013 12:20 AM, Leigh Brown wrote:
On 2013-12-03 22:45, Sebastian Hesselbarth wrote:
On 12/03/2013 09:57 PM, Leigh Brown wrote:
[...]
Nicolas' patch should fix the issue, but I prefer the following as it is
more
correct, as it only adjusts the timeout when calling
wait_event_timeout
On 12/04/2013 12:38 AM, Leigh Brown wrote:
On 2013-12-03 23:17, Sebastian Hesselbarth wrote:
On 12/04/2013 12:20 AM, Leigh Brown wrote:
On 2013-12-03 22:45, Sebastian Hesselbarth wrote:
On 12/03/2013 09:57 PM, Leigh Brown wrote:
[...]
Nicolas' patch should fix the issue, but I prefer
Since phy_attach ensures PHYs are resumed, we can now suspend all
PHYs that have no attached netdev after initcalls.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
RFCv1-RFCv2:
- only check for phydev-attached_dev and let phy_suspend decide on
performing
When phydev is going to HALTED state, we can try to suspend it to
safe more power. phy_suspend helper will check if PHY can be suspended,
so just call it when entering HALTED state.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
RFCv1-RFCv2:
- initial
When using phydev, it should be phy_start/phy_stop'ed properly. This
driver doesn't do that, so add the corresponding calls to port_start/
stop respectively.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
RFCv1-RFCv2:
- initial, derived from netdev specific
if WOL is
disabled. Moreover, the phy state machine calls phy_suspend on entering
HALTED state.
Again, a branch with RFCv2 applied to v3.13-rc2 can also be found at
https://github.com/shesselba/linux-dove.git topic/ethphy-power-rfc-v2
[1] http://lwn.net/Articles/574426/
Sebastian Hesselbarth (6
This ensures PHYs are resumed on attach and suspended on detach.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
RFCv1-RFCv2:
- none
Cc: David Miller da...@davemloft.net
Cc: Florian Fainelli f.faine...@gmail.com
Cc: Mugunthan V N mugunthan...@ti.com
Cc: net
Marvell PHYs support generic PHY suspend/resume, so provide those
callbacks to all marvell specific drivers.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
RFCv1-RFCv2:
- none
Cc: David Miller da...@davemloft.net
Cc: Florian Fainelli f.faine...@gmail.com
Cc
This adds helper functions to resume and suspend a given phy_device
by calling the corresponding driver callbacks if available.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
RFCv1-RFCv2:
- only suspend if WOL is not enabled
- remove EXPORT_SYMBOL
On 03/12/2014 11:35 AM, Alexandre Belloni wrote:
On 12/03/2014 at 12:06:02 +0100, Antoine Ténart wrote :
This serie adds the initial support for the Marvell BG2-Q DMP (part of the
Berlin family). SoC has nodes for cpu, l2 cache controller, interrupt
controllers, local timer, apb timers and
On 03/12/2014 12:22 PM, Alexandre Belloni wrote:
On 12/03/2014 at 12:06:03 +0100, Antoine Ténart wrote :
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
Documentation/arm/Marvell/README
On 03/12/2014 11:06 AM, Antoine Ténart wrote:
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
Missed some comments on the nodes below.
[...]
diff --git a/arch/arm/boot/dts/berlin2q.dtsi
On 03/12/2014 11:06 AM, Antoine Ténart wrote:
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/berlin2q-dmp.dts | 32
2 files changed, 34 insertions(+), 1 deletion(-)
create
On 03/13/2014 10:08 AM, Alexandre Belloni wrote:
On 13/03/2014 at 09:56:48 +, Sebastian Hesselbarth wrote :
On 03/12/2014 12:22 PM, Alexandre Belloni wrote:
The 25MHz crystal is on the board, please move it to the board dts.
If you can confirm that sysmgr clock comes directly from
On 03/13/2014 02:21 AM, Ben Hutchings wrote:
On Wed, 2014-03-12 at 00:02 +0100, Sebastian Hesselbarth wrote:
phy_ethtool_get_wol is a helper to get current WOL settings from
a phy device. When using this helper on a PHY without .get_wol
callback, struct ethtool_wolinfo is never set-up correctly
On 03/13/2014 08:38 PM, David Miller wrote:
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Date: Wed, 12 Mar 2014 00:02:55 +0100
phy_ethtool_get_wol is a helper to get current WOL settings from
a phy device. When using this helper on a PHY without .get_wol
callback, struct
Callers of phy_ethtool_get_wol are supposed to provide a properly
cleared struct ethtool_wolinfo. Therefore, fix phy_suspend to clear
it before passing it to phy_ethtool_get_wol.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David Miller da...@davemloft.net
Cc
On 03/13/2014 03:06 PM, Antoine Ténart wrote:
Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
timer, apb timers and uarts for now.
Signed-off-by: Antoine Ténart
On 03/14/2014 10:48 AM, Antoine Ténart wrote:
On 14/03/2014 10:31, Sebastian Hesselbarth wrote:
On 03/13/2014 03:06 PM, Antoine Ténart wrote:
+clocks {
+#address-cells = 0;
+#size-cells = 0;
+
+smclk: sysmgr-clock {
+compatible = fixed-clock
On 03/14/2014 12:32 PM, Alexandre Belloni wrote:
On 14/03/2014 at 10:31:55 +0100, Sebastian Hesselbarth wrote :
On 03/13/2014 03:06 PM, Antoine Ténart wrote:
+ local-timer@ad0600 {
+ compatible = arm,cortex-a9-twd-timer;
+ reg
On 03/13/2014 08:38 PM, David Miller wrote:
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Date: Wed, 12 Mar 2014 00:02:55 +0100
[...]
To fix this, always zero relevant fields of struct ethtool_wolinfo
regardless of .get_wol callback availability.
[...]
I'm starting to see
On 03/17/2014 04:06 PM, Antoine Ténart wrote:
Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
timer, apb timers and uarts for now.
Signed-off-by: Antoine Ténart
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
v3-v4:
- use generic mpp helpers (Suggested
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later. While at it, also make use of globally defined
MPP macros.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
. The new buffer is then used while assigning
controls to pinctrl groups later.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Andrew Lunn and...@lunn.ch
Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Cc: Linus Walleij linus.wall...@linaro.org
Cc
With every SoC always providing its own get/set callbacks, we can now
remove the generic ones, remove the obsolete base address, and always
use the provided callbacks.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Andrew Lunn and...@lunn.ch
Tested-by: Thomas
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Andrew Lunn and...@lunn.ch
---
Changelog:
v3-v4:
- use
Dove has pins that can be switched between normal and pmu functions.
Rework pmu_mpp callbacks to reuse default mpp ctrl helpers.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
v3-v4:
- directly use generic mpp helpers instead of normal dove mpp functions
Cc
Passing a NULL name for pin ranges will auto-generate standard names
for each pin. With common pinctrl driver now checking NULL name correctly,
consolidate mpp pins 0-15.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason
The way that mvebu pinctrl is designed, requesting mpp registers
in common pinctrl driver does not allow SoC specific drivers to
access this resource.
Move resource allocation in each SoC pinctrl driver and enable
already provided mpp_{set,get} callbacks.
Signed-off-by: Sebastian Hesselbarth
-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
v3-v4:
- also take care of new Armada 375 pinctrl driver
- use generic mpp helpers (Suggested by Thomas Petazzoni)
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn
update the comment about mvebu_mpp_ctrl.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc
-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changelog:
v3-v4:
- also take care of new Armada 38x pinctrl driver
- use generic mpp helpers (Suggested by Thomas Petazzoni)
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn
This adds some defines and helper functions for the common mpp reg
layout to mvebu pinctrl include.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Tested-by: Andrew Lunn and...@lunn.ch
---
Changelog:
v3-v4
With the introduction of a global name buffer, we can now remove
the allocation and preparation of per-control name buffers.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Andrew Lunn and...@lunn.ch
Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
The only valuable information a special callback can derive from
mvebu_mpp_ctrl passed to it, is the pin id. Instead of passing
the struct, pass the pid directly.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Andrew Lunn and...@lunn.ch
Tested-by: Thomas Petazzoni
still applies, Thomas gave his
Tested-by for Armada XP on v3.
[1] http://www.spinics.net/lists/arm-kernel/msg303496.html
[2] http://lkml.org/lkml/2014/1/27/562
[3] http://lkml.org/lkml/2014/2/12/427
[4] http://www.spinics.net/lists/arm-kernel/msg306409.html
Sebastian Hesselbarth (13):
pinctrl: mvebu
We treat unnamed controls as generic mvebu mpp register controls but
we identify them by not being special controls. Flip the logic and
use the name pointer as identification instead. While at it, add some
comments explaining the not so obvious treatment.
Signed-off-by: Sebastian Hesselbarth
On 02/23/2014 04:40 PM, Jason Cooper wrote:
Linus, Sebastian,
On Sun, Feb 23, 2014 at 03:20:58PM +0100, Sebastian Hesselbarth wrote:
...
Also, in the meantime, pinctrl driver stubs for new Armada 375/38x have
been posted [4]. Compared to v3, this patch set now also takes care of
the new
.
Therefore, we add a boolean module parameter suspend_halted with
default value of true. Disabling that parameter prevents PHYs from
being suspended when entering halted state.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Reported-by: Andrew Lunn and...@lunn.ch
---
Andrew
On 02/23/2014 11:06 PM, Jason Cooper wrote:
On Sun, Feb 23, 2014 at 03:20:58PM +0100, Sebastian Hesselbarth wrote:
This patch set restructures the common pinctrl driver part of mvebu
to allow SoC specific controls to handle their own resources. Currently,
the common driver maps a single
Now that we have a regmap for global registers, get rid of the last
remaining hardcoded physical addresses. While at it, also remove
DOVE_ prefix from those macros.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Linus
-dove.git unstable/dove-pinctrl-for-3.15_v1
[1] http://www.spinics.net/lists/arm-kernel/msg303496.html
[2] http://www.spinics.net/lists/arm-kernel/msg306409.html
[3] http://lkml.org/lkml/2014/2/23/43
Sebastian Hesselbarth (10):
devicetree: bindings: add missing Marvell Dove SoC documentation
Marvell Dove SoC binding was not documented, yet. Add the documentation
and also describe Global Configuration register node in it.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland
to encourage users to update
their DTBs.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Gregory Clement
We share global config registers by syscon node, add it to dove.dtsi.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Ian Campbell ijc+devicet...@hellion.org.uk
Dove pinctrl binding now requires three different reg properties. This
updates corresponding binding and example accordingly. While at it, also
document reg property as required for the other MVEBU SoC pinctrl nodes.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Rob
Now that we have an ioremapped mpp4 register, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Linus Walleij linus.wall
binding usage to encourage
users to update their DTBs.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc
Now that we have ioremapped pmu_mpp registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Linus Walleij linus.wall
Dove pinctrl uses additional registers to control MPPs. This patch first
increases existing pinctrl reg property by one register, and then adds
two new ranges for MPP4 and PMU MPP registers.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Rob Herring robh
Now that we have ioremapped mpp base registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Linus Walleij linus.wall
On 02/24/14 11:17, Linus Walleij wrote:
On Mon, Feb 24, 2014 at 9:42 AM, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
This is a patches separated from one sent earlier [1] with just the
removal of any hard-coded reg addresses from Dove pinctrl stub.
OK let's queue
On 02/25/2014 12:05 AM, David Miller wrote:
From: Florian Fainelli f.faine...@gmail.com
Date: Mon, 24 Feb 2014 10:20:10 -0800
Hi Sebastian,
2014-02-23 8:58 GMT-08:00 Sebastian Hesselbarth
sebastian.hesselba...@gmail.com:
commit 1211ce53077164e0d34641d0ca5fb4d4a7574498
(net: phy: resume
On 02/25/14 16:16, Jason Cooper wrote:
On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper ja...@lakedaemon.net wrote:
I've now created mvebu/pinctrl-dove for this series. It's based on
v3.14-rc1, and depends on mvebu/pinctrl (which
[Cooked down Cc list to relevant people and added Ezequiel who agreed
to test on Armada 375/38x.]
On 02/25/2014 04:43 PM, Jason Cooper wrote:
On Tue, Feb 25, 2014 at 04:30:45PM +0100, Sebastian Hesselbarth wrote:
On 02/25/14 16:16, Jason Cooper wrote:
On Tue, Feb 25, 2014 at 10:36:54AM +0100
On 02/25/2014 09:04 PM, Jason Cooper wrote:
Sebastian,
On Tue, Feb 25, 2014 at 08:23:35PM +0100, Sebastian Hesselbarth wrote:
[Cooked down Cc list to relevant people and added Ezequiel who agreed
to test on Armada 375/38x.]
On 02/25/2014 04:43 PM, Jason Cooper wrote:
On Tue, Feb 25, 2014
On 02/24/2014 08:15 PM, Andrew Lunn wrote:
On Sun, Feb 23, 2014 at 05:58:39PM +0100, Sebastian Hesselbarth wrote:
commit 1211ce53077164e0d34641d0ca5fb4d4a7574498
(net: phy: resume/suspend PHYs on attach/detach)
introduced a feature to suspend PHYs when entering halted state.
Unfortunately
This adds a DT node for the system-controller found on Marvell Dove
SoCs.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Ian Campbell ijc+devicet
for a irqchip
driver fix when SPARSE_IRQ is set, the pinctrl branches remove hard-coded
addresses from Dove's pinctrl driver.
An unstable branch with above dependencies met, is available at
https://github.com/shesselba/linux-dove.git unstable/dove-mvebu-for-3.15_v1
Sebastian Hesselbarth (4):
ARM
With Marvell Dove now being part of the multi_v7 family, add some Dove
specific drivers to multi_v7 defconfig.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Russell King li...@arm.linux.org.uk
Cc: Olof Johansson o...@lixom.net
Cc: Kevin Hilman khil...@linaro.org
Cc
With all the DT support preparation done, we are able to move Dove
to MVEBU easily. Legacy non-DT mach-dove is left untouched to rot
for a while before removal. Also, convert SATA PHY Kconfig entry,
which is DT-only.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Rob
DT-enabled Dove will move over from ARCH_DOVE in mach-dove to MACH_DOVE in
mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while, add a new
DT-only MACH_DOVE to mmc, thermal, wdt, and asoc Kconfigs.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Chris Ball ch
On 02/27/2014 10:40 PM, Jason Cooper wrote:
On Thu, Feb 27, 2014 at 10:28:04PM +0100, Sebastian Hesselbarth wrote:
With all the DT support preparation done, we are able to move Dove
to MVEBU easily. Legacy non-DT mach-dove is left untouched to rot
for a while before removal. Also, convert SATA
On 02/27/2014 10:45 PM, Jason Cooper wrote:
On Thu, Feb 27, 2014 at 10:28:01PM +0100, Sebastian Hesselbarth wrote:
Thanks to DT conversion effort, Marvell Dove with DT support is now
ready to leave mach-dove and hop into mach-mvebu. As discussed with
MVEBU maintainers, we first add dove.c now
With all the DT support preparation done, we are able to move Dove
to MVEBU easily. Legacy non-DT mach-dove is left untouched to rot
for a while before removal. Also, convert SATA PHY Kconfig entry,
which is DT-only.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
. As non-DT ARCH_DOVE will stay to rot for a while, add a new
DT-only MACH_DOVE to mmc, thermal, wdt, and asoc Kconfigs.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Chris Ball ch...@printf.net
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin eduardo.valen
On 02/28/2014 05:34 PM, Jason Cooper wrote:
On Fri, Feb 28, 2014 at 10:53:10AM +0900, Mark Brown wrote:
On Thu, Feb 27, 2014 at 10:28:03PM +0100, Sebastian Hesselbarth wrote:
DT-enabled Dove will move over from ARCH_DOVE in mach-dove to MACH_DOVE in
mach-mvebu. As non-DT ARCH_DOVE will stay
DT-enabled Dove will move over from ARCH_DOVE in mach-dove to MACH_DOVE in
mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while, add a new
DT-only MACH_DOVE Kconfig.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Kishon,
Mark Brown requested to take
DT-enabled Dove will move over from ARCH_DOVE in mach-dove to MACH_DOVE in
mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while, add a new
DT-only MACH_DOVE Kconfig.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Chris,
Mark Brown requested to take
DT-enabled Dove will move over from ARCH_DOVE in mach-dove to MACH_DOVE in
mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while, add a new
DT-only MACH_DOVE Kconfig.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Wim Van Sebroeck w...@iguana.be
---
Wim
DT-enabled Dove will move over from ARCH_DOVE in mach-dove to MACH_DOVE in
mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while, add a new
DT-only MACH_DOVE Kconfig.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Mark, as requested, this is the ASoC only patch
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