On Mon, Sep 14, 2015 at 02:45:28PM +0800, Alison Wang wrote:
> This patch adds dma-coherent property for eTSEC nodes, so
> coherent DMA operations are supported.
>
> Signed-off-by: Alison Wang
Applied, thanks.
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On Tue, Sep 15, 2015 at 05:07:10PM +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Add system STANDBY implement for ls1021 platform.
>
> Signed-off-by: Chenhui Zhao
> Signed-off-by: Wang Dongsheng
On Tue, Sep 15, 2015 at 06:01:01PM +0800, Shengjiu Wang wrote:
> As spdif driver will register SPDIF clock to regmap, regmap will do
> clk_prepare in init function, so SPDIF clock is prepared in probe, then its
> root clock (pll clock) is prepared also, which cause the arm can't enter
> low power
On Wed, Sep 16, 2015 at 04:20:43PM +0800, Yuan Yao wrote:
> The INA220 monitors both shunt drop and supply voltage.
>
> Signed-off-by: Yuan Yao
For sake of consistency, the subject prefix of dts patches that I
collect should be like "ARM: dts: ...". I changed prefix and
On Thu, Sep 24, 2015 at 09:28:31AM +, Wang Dongsheng wrote:
> > > Add system STANDBY implement for ls1021 platform.
> > >
> > > Signed-off-by: Chenhui Zhao
> > > Signed-off-by: Wang Dongsheng
> > > ---
> > > *v2*:
> > > - Remove PSCI
On Thu, Sep 24, 2015 at 01:43:24PM +0800, Shengjiu Wang wrote:
> On Wed, Sep 23, 2015 at 08:33:41AM -0700, Shawn Guo wrote:
> > On Tue, Sep 15, 2015 at 06:01:01PM +0800, Shengjiu Wang wrote:
> > > As spdif driver will register SPDIF clock to regmap, regmap will do
> &g
alc_rate returned
> > a bad result. The multiplication is made before the division to compute a
> > correct value.
> >
> > Signed-off-by: Victorien Vedrine <victorien.vedr...@ophrys.net>
Acked-by: Shawn Guo <shawn...@kernel.org>
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On Wed, Sep 16, 2015 at 06:40:32PM +0100, e...@felipetonello.com wrote:
> From: "Felipe F. Tonello"
>
> This fixes a duplicated pin control causing this error:
>
> imx6q-pinctrl 20e.iomuxc: pin MX6Q_PAD_GPIO_1 already
> requested by regulators:regulator@2; cannot
On Mon, Sep 07, 2015 at 01:51:35PM +0530, Sanchayan Maity wrote:
> Add clock support for Vybrid On-Chip One Time Programmable
> (OCOTP) controller.
>
> While the OCOTP block does not require explicit clock gating,
> for programming the OCOTP timing register the clock rate of
> ipg clock is
On Tue, Sep 08, 2015 at 03:01:07PM +, Shenwei Wang wrote:
> > > arch/arm/mach-imx/Kconfig| 1 +
> > > arch/arm/mach-imx/Makefile | 2 +
> > > arch/arm/mach-imx/common.h | 4 +
> > > arch/arm/mach-imx/pm-imx7.c | 917
> > +++
>
On Thu, Nov 26, 2015 at 03:57:03PM +0800, Xinwei Kong wrote:
> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
> use this I2C IP of Synopsys Designware for HiKey board.
>
> Signed-off-by: Xinwei Kong
> ---
>
On Thu, Nov 26, 2015 at 11:33:50AM +, Sudeep Holla wrote:
>
>
> On 23/11/15 05:37, Shawn Guo wrote:
> >On Wed, Oct 21, 2015 at 11:10:08AM +0100, Sudeep Holla wrote:
> >>Though the keyboard and other driver will continue to support the legacy
> >>"gp
On Thu, Nov 26, 2015 at 10:39:30AM +0800, Shengjiu Wang wrote:
> Audio IP need the spba clock, but original clock name "dma" is not
> accurate, so change it to name "spba". The audio driver has been
> using the new name "spba", the binding document has been updated.
>
> Signed-off-by: Shengjiu
On Sat, Nov 28, 2015 at 04:27:34PM +, Colin King wrote:
> From: Colin Ian King
>
> Minor issue, fix spelling mistake, nonexistant -> nonexistent
>
> Signed-off-by: Colin Ian King
Applied, thanks.
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On Wed, Dec 02, 2015 at 02:29:09PM +0800, Xinwei Kong wrote:
> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
> use this I2C IP of Synopsys Designware for HiKey board.
>
> Signed-off-by: Xinwei Kong
> ---
>
On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote:
> Linux on Vybrid used several different L2 latencies so far, none
> of them seem to be the right ones. According to the application note
> AN4947 ("Understanding Vybrid Architecture"), the tag portion runs
> on CPU clock and is inside
On Wed, Nov 25, 2015 at 02:46:07PM +0800, Meng Yi wrote:
> Signed-off-by: Alison Wang
> Signed-off-by: Xiubo Li
> Signed-off-by: Jianwei Wang
> ---
> arch/arm/boot/dts/ls1021a-twr.dts | 11 +++
> 1 file
On Sat, Oct 17, 2015 at 09:05:20PM -0700, Stefan Agner wrote:
> The Synchronous Audio Interface (SAI) instances are clocked by
> independent clocks: The bus clock and the audio clock (as shown in
> Figure 51-1 in the Vybrid Reference Manual). The clock gates in
> CCGR0/CCGR1 for SAI0 through SAI3
On Wed, Nov 25, 2015 at 02:46:06PM +0800, Meng Yi wrote:
> Signed-off-by: Alison Wang
> Signed-off-by: Xiubo Li
> Signed-off-by: Jianwei Wang
Forgot to mention that you missed adding your own SoB. Added when
by: Chen Feng <puck.c...@hisilicon.com>
Reviewed-by: Shawn Guo <shawn...@kernel.org>
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On Wed, Dec 02, 2015 at 10:16:37AM +0100, linux-kernel-...@beckhoff.com wrote:
> From: Patrick Brünn
>
> To obtain exact pixel clocks, allow the DI clock selectors to influence
> the PLLs that they are derived from.
>
> Commit 4591b13289b5 ("ARM: i.MX6: ipu_di_sel clocks
On Mon, Dec 07, 2015 at 02:48:04PM +0100, linux-kernel-...@beckhoff.com wrote:
> From: Patrick Brünn
>
> On Tue, Dec 1, 2015 at 20:52:25 PST, shawn...@kernel.org wrote:
> > On Thu, Nov 26, 2015 at 11:59:15AM +0100, linux-kernel-...@beckhoff.com
> > wrote:
> >>
On Wed, Dec 02, 2015 at 10:35:22PM +0100, Alexandre Belloni wrote:
> The backlight PWM is actually pwm4.
>
> Signed-off-by: Alexandre Belloni
Applied, thanks.
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On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote:
> Linux on Vybrid used several different L2 latencies so far, none
> of them seem to be the right ones. According to the application note
> AN4947 ("Understanding Vybrid Architecture"), the tag portion runs
> on CPU clock and is inside
On Wed, Dec 02, 2015 at 10:35:22PM +0100, Alexandre Belloni wrote:
> The backlight PWM is actually pwm4.
>
> Signed-off-by: Alexandre Belloni
Applied, thanks.
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On Fri, Dec 11, 2015 at 12:08:11PM -0500, Damien Riegel wrote:
> Damien Riegel (3):
> of: add vendor prefix for Technologic Systems
> of: documentation: add bindings documentation for TS-4800
> ARM: dts: TS-4800: add basic device tree
Applied all, thanks.
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On Mon, Dec 14, 2015 at 11:07:50AM +0800, Shawn Guo wrote:
> On Wed, Dec 09, 2015 at 04:15:55PM +0800, Bai Ping wrote:
> > The 'assigned-clock-parents' and 'assigned-clock-rates' list
> > should corresponding to the 'assigned-clocks' property clock list.
> >
> > S
On Wed, Dec 02, 2015 at 02:11:46PM -0800, Stefan Agner wrote:
> Split PWM pins into separate pinctrl nodes to allow overrides which
> select pins individually. This is useful for carrier boards which use
> only one pin for PWM and would like to use the other pin for a
> different purpose.
>
>
On Sat, Dec 12, 2015 at 04:27:40PM +, Jonathan Cameron wrote:
> On 08/12/15 10:26, Haibo Chen wrote:
> > Add imx7d ADC support.
> >
> > Signed-off-by: Haibo Chen
> The driver is now working its way in the direction of linux-next via
> Greg KHs tree. I'm happy to
On Wed, Dec 09, 2015 at 04:15:55PM +0800, Bai Ping wrote:
> The 'assigned-clock-parents' and 'assigned-clock-rates' list
> should corresponding to the 'assigned-clocks' property clock list.
>
> Signed-off-by: Bai Ping
Applied, thanks.
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On Wed, Dec 02, 2015 at 02:11:47PM -0800, Stefan Agner wrote:
> Add Colibri standard pinmux for FlexCAN controller instances. CAN
> is not a standard Colibri feature, but the datasheet predefines
> pins which provide CAN (compatible across some modules). Hence,
> add the pinmux on module level.
>
On Tue, Dec 08, 2015 at 11:41:38AM -0500, Damien Riegel wrote:
> This device tree adds support for TS-4800 by Technologic Systems. This
> board is based on MX51-babbage, but there are some subtle differences in
> the pins used, and there is an additional FPGA that is memory-mapped.
>
> More
On Fri, Dec 11, 2015 at 01:36:26PM +, Mans Rullgard wrote:
> Add auart4 2-pin configuration on auart0 rts/cts pads.
>
> Signed-off-by: Mans Rullgard
Applied, thanks.
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On Fri, Dec 18, 2015 at 12:00:32PM -0500, Damien Riegel wrote:
> This commit adds LCD support for the TS-4800. The panel is an Okaya
> RS800480T-7X0WQ and the timings have been extracted from Technologic
> Systems' tree.
>
> Signed-off-by: Damien Riegel
> ---
On Sun, Dec 13, 2015 at 06:53:35PM -0800, Stefan Agner wrote:
> On 2015-12-13 18:18, Shawn Guo wrote:
> > On Wed, Dec 02, 2015 at 02:11:46PM -0800, Stefan Agner wrote:
> >> Split PWM pins into separate pinctrl nodes to allow overrides which
> >> select pins individually.
On Mon, Dec 21, 2015 at 01:40:59PM -0500, Damien Riegel wrote:
> > > @@ -30,6 +30,60 @@
> > > clock-frequency = <24576000>;
> > > };
> > > };
> > > +
> > > + regulators {
> > > + compatible = "simple-bus";
> > > + #address-cells = <1>;
> > > +
On Thu, Dec 17, 2015 at 04:16:52PM -0500, Damien Riegel wrote:
> These pins are actually not routed for UARTs, they should not be
> reserved.
>
> Signed-off-by: Damien Riegel
Applied both, thanks.
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On Wed, Nov 25, 2015 at 05:49:02PM +0800, Xinwei Kong wrote:
> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
> use this I2C IP of Synopsys Designware for HiKey board.
>
> Signed-off-by: Xinwei Kong
> Signed-off-by: Chen Feng
On Sun, Oct 25, 2015 at 11:20:56PM +0530, Afzal Mohammed wrote:
> Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via
> Cortex-A5 running Linux using Stefan Agner's "m4boot"
> utility.
>
> Signed-off-by: Afzal Mohammed
Applied,
On Wed, Nov 25, 2015 at 12:06:53AM +0800, Bai Ping wrote:
> Add 'is_prepared' callback function for pllv3 type clk to make sure when
> the system is bootup, the unused clk is in a known state to match the
> prepare count info.
>
> Signed-off-by: Bai Ping
> Reviewed-by:
On Sun, Nov 15, 2015 at 11:38:04AM +0100, Michael Trimarchi wrote:
> OSC can be used as USB hub source clock. An example we can route to
> CLK2_P imx6 pin.
>
> This show a usage example:
>
> [...]
> usb_hub: usb-hub {
> compatible = "smsc,usb3503a";
> clocks = <
On Tue, Nov 24, 2015 at 01:00:53PM -0500, Damien Riegel wrote:
> This device tree adds support for TS-4800 by Technologic Systems. This
> board is based on MX51-babbage, but there are some subtle differences in
> the pins used, and there is an additional FPGA that is memory-mapped.
>
> More
d binding.
>
> This patch replaces all the legacy wakeup properties with the unified
> "wakeup-source" property in order to avoid any futher copy-paste
> duplication.
>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Sascha Hauer <ker...@pengutronix.de>
> S
On Sun, Oct 18, 2015 at 11:18:48AM +0530, Sanchayan Maity wrote:
> Something seems to have gone wrong during the merging of the device
> tree changes with the following patch
>
> "ARM: dts: add property for maximum ADC clock frequencies"
>
> The property "fsl,adck-max-frequency" instead of being
On Sat, Oct 17, 2015 at 09:05:20PM -0700, Stefan Agner wrote:
> The Synchronous Audio Interface (SAI) instances are clocked by
> independent clocks: The bus clock and the audio clock (as shown in
> Figure 51-1 in the Vybrid Reference Manual). The clock gates in
> CCGR0/CCGR1 for SAI0 through SAI3
On Sat, Oct 17, 2015 at 09:05:21PM -0700, Stefan Agner wrote:
> So far, only the bus clock has been assigned, but in reality the
> SAI IP has for clock inputs. The driver has been updated to
s/for/four
Will fix it up when applying.
Shawn
> make use of the additional clock inputs by
On Tue, Nov 03, 2015 at 02:06:09AM +0800, Bai Ping wrote:
> Add 'is_prepared' callback function for pllv3 type clk to make sure when
> the system is bootup, the unused clk is in a known state to match the
> prepare count info.
>
> Signed-off-by: Bai Ping
Please resend the
On Sun, Oct 25, 2015 at 11:20:56PM +0530, Afzal Mohammed wrote:
> Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via
> Cortex-A5 running Linux using Stefan Agner's "m4boot"
> utility.
>
> Signed-off-by: Afzal Mohammed
Stefan,
Are
On Wed, Nov 18, 2015 at 10:54:39PM -0500, Cory Tusar wrote:
> Per the Vybrid Reference Manual (section 3.8.6.1), dspi0 has 6 chip
> select signals associated with it, while dspi1 has only 4.
>
> Signed-off-by: Cory Tusar
Applied, thanks.
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On Wed, Nov 18, 2015 at 10:54:40PM -0500, Cory Tusar wrote:
> Extend the existing Vybrid DSPI devicetree implementation to also
> describe the dspi2 and dspi3 functional blocks.
>
> Signed-off-by: Cory Tusar
Applied, thanks.
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On Thu, Jun 09, 2016 at 10:46:49AM -0400, Damien Riegel wrote:
> Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
> generated by IPs in the FPGA. The SoC is notified that an interrupt
> occurred through a GPIO.
>
> Signed-off-by: Damien Riegel
On Thu, Apr 21, 2016 at 01:26:15AM +0800, Peng Fan wrote:
> Add clocks property for ocotp node.
>
> Signed-off-by: Peng Fan <van.free...@gmail.com>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Sascha Hauer <ker...@pengutronix.de>
> Cc: Rob Herring <robh..
On Tue, Jun 7, 2016 at 11:55 PM, Laura Abbott wrote:
> You could try backporting the ZONE_CMA patches
> http://article.gmane.org/gmane.linux.kernel.mm/152016 . The primary problem
> there was CMA utilization but there was some discussion about migration
> success as well
Hi,
I'm using a separate CMA region than the system default one for
a particular device to avoid fragmentation. It does help. But under
certain circumstance (memory shortage), it seems some of the pages in
the region will be used by system. The really bad thing is that when
a CMA allocation
On Wed, Jun 08, 2016 at 10:33:33PM +0800, Dong Aisheng wrote:
> From: Anson Huang
>
> DRAM PLL is a audio/video type PLL, need to correct
> it to get correct ops of PLL.
>
> Signed-off-by: Anson Huang
> Signed-off-by: Dong Aisheng
On Wed, Jun 08, 2016 at 10:33:35PM +0800, Dong Aisheng wrote:
> fix gpt2 clock names
>
> Signed-off-by: Dong Aisheng
> ---
> drivers/clk/imx/clk-imx6ul.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6ul.c
On Wed, Jun 08, 2016 at 10:33:36PM +0800, Dong Aisheng wrote:
> pllx_bypass_src mux shouldn't be the parent of pllx clock
> since it's only valid when when pllx BYPASS bit is set.
> Thus it is actually one parent of pllx_bypass only.
>
> Instead, pllx parent should be fixed to osc according to
>
On Sun, Jun 12, 2016 at 08:19:47PM +0800, Dong Aisheng wrote:
> You probably may need to change the patch title after merge.
> clk: imx: fix pll clock parents
Right, thanks for the reminding.
Shawn
On Sun, Jun 12, 2016 at 08:13:03PM +0800, Dong Aisheng wrote:
> I understand your point.
> How about using power_bit and powerup_set?
> * @power_bit: pll power bit offset
I'm fine with the name, but the comment should be fixed, since we are
actually using it as a bit mask instead of offset.
On Wed, Jun 08, 2016 at 10:33:34PM +0800, Dong Aisheng wrote:
> There's a powerdown bit already, so let's change the name of
> powerup_set bit to power_invert to reflects the power polarity
> to make it less confusing.
>
> Signed-off-by: Dong Aisheng
> ---
>
On Sun, Jun 12, 2016 at 10:56:38PM +0800, Dong Aisheng wrote:
> Hi Shawn,
>
> On Wed, Jun 8, 2016 at 10:33 PM, Dong Aisheng wrote:
> > After commit f53947456f98 ("ARM: clk: imx: update pllv3 to support imx7"),
> > the former used BM_PLL_POWER bit is not correct anymore for
On Mon, May 23, 2016 at 05:16:25PM +0200, Jean Guyomarc'h wrote:
> The compatible device tree node that is searched for is imx6q-iomuxc-gpr
> but was misspelled imx6q-iomux-gpr in the error handling message.
>
> Signed-off-by: Jean Guyomarc'h
Applied, thanks.
On Tue, May 17, 2016 at 04:16:29PM -0400, Damien Riegel wrote:
> Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
> generated by IPs in the FPGA. The SoC is notified that an interrupt
> occurred through a GPIO.
>
> Signed-off-by: Damien Riegel
On Tue, May 17, 2016 at 04:16:30PM -0400, Damien Riegel wrote:
> This enables support for the CAN controller located in the FPGA.
>
> Signed-off-by: Damien Riegel
> ---
> arch/arm/boot/dts/imx51-ts4800.dts | 10 ++
> 1 file changed, 10 insertions(+)
>
On Tue, Jun 07, 2016 at 07:37:09PM -0700, Stefan Agner wrote:
> + {
> + status = "okay";
> + display = <>;
Please put 'status' at the bottom of property list.
> +
> + display0: lcd-display {
> + bits-per-pixel = <16>;
> + bus-width = <18>;
> +
> +
On Tue, Jun 07, 2016 at 07:37:07PM -0700, Stefan Agner wrote:
> The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and
> 7Dual. The i.MX 7Solo implements a subset of features available on
> i.MX 7Dual, hence create imx7s.dtsi as the base device tree. The
> i.MX 7Dual's additional
On Thu, Jun 09, 2016 at 08:40:33PM +0530, Bhuvanchandra DV wrote:
> From: Stefan Agner
>
> In order to allow wake support in STOP sleep mode, clocks are
> needed. Use imx_clk_gate2_cgr to disable automatic clock gating
> in low power mode STOP. This allows to enable wake by UART
On Tue, Jun 07, 2016 at 08:29:26AM -0700, Andrey Smirnov wrote:
> Signed-off-by: Andrey Smirnov
> ---
> arch/arm/include/asm/hardware/cache-l2x0.h | 7 +++
I need Russell's ACK on this file.
Shawn
> arch/arm/mach-imx/system.c | 5 -
> 2 files
On Fri, Jun 10, 2016 at 11:53:43AM +0530, Rajesh Bhagat wrote:
> Adds dis_rxdet_inp3_quirk property to USB3 nodes of ls1021a, ls2080a
> and ls1043a platform.
>
> Rajesh Bhagat (3):
> arm: dts: ls1021a: Add dis_rxdet_inp3_quirk property to USB3 node
> arm: dts: ls2080a: Add
On Wed, Jun 08, 2016 at 10:33:31PM +0800, Dong Aisheng wrote:
> From: Anson Huang
>
> The audio/video PLL's rate calculation is as below in RM:
>
> Fref * (DIV_SELECT + NUM / DENOM), in origin clk-pllv3's
> code, below code is used:
>
> (parent_rate * div) + ((parent_rate
On Wed, Jun 08, 2016 at 10:33:32PM +0800, Dong Aisheng wrote:
> From: Anson Huang
>
> DRAM root clk should be either from pll dram main clk
> or dram alt root clk.
>
> Signed-off-by: Anson Huang
> Signed-off-by: Dong Aisheng
On Sat, Jun 18, 2016 at 06:09:26PM -0700, Andrey Smirnov wrote:
> Andrey Smirnov (5):
> i.MX: system.c: Convert goto to if statement
> i.MX: system.c: Remove redundant errata 752271 code
> i.MX: system.c: Replace magic numbers
> i.MX: system.c: Tweak prefetch settings for performance
>
On Thu, Jun 16, 2016 at 06:35:03PM -0500, Li Yang wrote:
> Adds the cache nodes and next-level-cache property for the
> cacheinfo to work.
>
> Signed-off-by: Li Yang
Applied both, thanks.
On Sat, Jun 18, 2016 at 09:20:05PM -0700, Stefan Agner wrote:
> On 2016-06-11 18:35, Shawn Guo wrote:
> > On Tue, Jun 07, 2016 at 07:37:07PM -0700, Stefan Agner wrote:
> >> The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and
> >> 7Dual. The i.MX 7Solo impl
On Mon, Jun 13, 2016 at 08:24:52PM +0800, Dong Aisheng wrote:
> The powerdown bit is a bit confused, let's change it to power_bit
> to relfect both powerdown and powerup case according to different
> plls.
>
> Signed-off-by: Dong Aisheng
Applied, thanks.
On Mon, Jun 13, 2016 at 03:38:30PM +0800, Dong Aisheng wrote:
> fix gpt2 clock names
>
> Signed-off-by: Dong Aisheng
Applied, thanks.
On Tue, Jun 14, 2016 at 06:29:50PM -0700, Andrey Smirnov wrote:
> Signed-off-by: Andrey Smirnov
> ---
> arch/arm/include/asm/hardware/cache-l2x0.h | 1 +
As Uwe already pointed out, it's not necessary to change this file.
> arch/arm/mach-imx/system.c |
On Tue, Jun 14, 2016 at 04:24:04PM +0800, Po Liu wrote:
> NXP some platforms aer interrupt was not MSI/MSI-X/INTx
> but using interrupt line independently. This patch add a "aer"
> interrupt-names for aer interrupt.
>
> Signed-off-by: Po Liu
> ---
> changes for v3:
> -
On Tue, Jun 21, 2016 at 04:50:53PM +0200, and...@inversepath.com wrote:
> From: Andrej Rosano
>
> Add support for Inverse Path USB armory board, an open source
> flash-drive sized computer based on NXP i.MX53 SoC.
>
> https://inversepath.com/usbarmory
>
> Signed-off-by:
On Fri, Jun 24, 2016 at 12:49:55PM +0200, Arnd Bergmann wrote:
> I noticed that i.MX still uses the traditional cpu_is_* functions to
> tell the difference between various SoC families, but every single
> user of those can be replaced with a simpler way, so we can just
> remove it all.
>
> Please
On Sun, Jun 26, 2016 at 01:47:50AM -0700, Stefan Agner wrote:
> Stefan Agner (5):
> ARM: imx: add support for i.MX 7Solo
> ARM: dts: imx7d: use imx7s.dtsi as base device tree
> ARM: dts: imx7d: recreate imx7d.dtsi with i.MX 7Dual specifics
> ARM: dts: imx7d: move input header into base
On Wed, Jan 27, 2016 at 04:31:48PM -0800, Stefan Agner wrote:
> Hi Shawn,
>
> The rest of the patchset has been applied during rc phase of v4.4, I
> guess this one was scheduled for the next release (v4.5). However, I
> just realized that this seemed to have slipped through...
Sorry, Stefan. If
On Wed, Jan 06, 2016 at 04:06:43PM +0800, Richard Zhu wrote:
> From: Richard Zhu
>
> - add mu driver support, the irq and 4bytes msg of
> the mu module are as the interaction channel
> between A# core and the M4 core on imx amp platforms.
> - register one notify in isr
On Wed, Dec 23, 2015 at 09:30:10PM +0100, Carlos Soto wrote:
> Set LCDC base clock (per_7) parent clock to UPLL clock.
> This is needed to allow finer resolution in pixelclock
>
> Signed-off-by: Carlos Soto
> ---
> drivers/clk/imx/clk-imx25.c |6 ++
> 1 file
On Thu, Jan 28, 2016 at 02:17:21AM +, Richard Zhu wrote:
> > arch/arm/mach-imx/Kconfig | 12 ++
> > arch/arm/mach-imx/Makefile| 2 +
> > arch/arm/mach-imx/imx_rpmsg.c | 364
> > ++
> > arch/arm/mach-imx/mu.c| 217
On Sat, Jan 09, 2016 at 12:29:53PM +0530, Bhuvanchandra DV wrote:
> Use pwm-backlight driver 'enable-gpios' property for backlight on/off
> control.
>
> Signed-off-by: Bhuvanchandra DV
> ---
> arch/arm/boot/dts/vf-colibri.dtsi | 9 +
> 1 file changed, 9
y Jui <r...@broadcom.com>
> Cc: Lee Jones <l...@kernel.org>
> Cc: Krzysztof Halasa <khal...@piap.pl>
> Cc: Kukjin Kim <kg...@kernel.org>
> Cc: Rob Herring <r...@kernel.org>
> Cc: Shawn Guo <shawn...@kernel.org>
...
> arch/arm/mach-imx/imx27-dt.c
On Wed, Jan 27, 2016 at 12:27:47PM +0800, Kefeng Wang wrote:
> Use helper of_platform_default_populate() in linux/of_platform
> when possible, instead of calling of_platform_populate() with
> the default match table.
>
> Cc: Signed-off-by: Huang Shijie <b32...@freescale.co
On Sun, Jan 24, 2016 at 11:48:22PM +0100, Marcel Ziswiler wrote:
> From: Petr Štetiar
>
> Signed-off-by: Marcel Ziswiler
> Signed-off-by: Petr Štetiar
> Reviewed-by: Stefan Agner
> ---
>
> Changes in v4:
> -
On Sun, Jan 24, 2016 at 11:48:23PM +0100, Marcel Ziswiler wrote:
> From: Petr Štetiar
>
> Signed-off-by: Marcel Ziswiler
> Signed-off-by: Petr Štetiar
> Reviewed-by: Stefan Agner
Copy my Linaro mailbox is
On Sat, Jan 09, 2016 at 12:29:53PM +0530, Bhuvanchandra DV wrote:
> Use pwm-backlight driver 'enable-gpios' property for backlight on/off
> control.
>
> Signed-off-by: Bhuvanchandra DV
Applied, thanks.
On Wed, Jan 13, 2016 at 12:45:12PM -0800, Joshua Clayton wrote:
> Uniwest evi is a portable electrical eddy current non-destructive
> testing device.
>
> Signed-off-by: Joshua Clayton
> ---
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index
On Wed, Jan 13, 2016 at 12:45:11PM -0800, Joshua Clayton wrote:
> United Western Technologies Corp, known primarily as UniWest,
> is a manufacturer of eddy current and ultrasonic testing equipment.
>
> Signed-off-by: Joshua Clayton
> ---
>
On Wed, Jan 20, 2016 at 02:09:19PM +0100, Lothar Waßmann wrote:
> Signed-off-by: Lothar Waßmann
> ---
> arch/arm/boot/dts/imx53-tx53.dtsi | 40
> ++-
> 1 file changed, 31 insertions(+), 9 deletions(-)
>
> diff --git
On Sun, Jan 31, 2016 at 12:42:35AM +0100, Maciej S. Szmigiero wrote:
> Add sound support in UDOO board DT file.
>
> Signed-off-by: Maciej S. Szmigiero
Applied, thanks.
On Thu, Jan 28, 2016 at 04:33:26PM +0800, Yuan Yao wrote:
> From: Yuan Yao
>
> Signed-off-by: Yuan Yao
> ---
> Add in v1:
> Can merge, but the function depend on the patch:
> https://patchwork.kernel.org/patch/8118251/
Please send me dts patch only after the
On Wed, Jan 20, 2016 at 02:09:18PM +0100, Lothar Waßmann wrote:
> ARM: dts: imx53: fix LVDS data-mapping and data-width
> ARM: dts: imx53: add display timing for NL12880BC20
> ARM: dts: imx53-tx53: set correct mclk frequency
Applied these 3, thanks.
On Fri, Jan 29, 2016 at 04:04:48PM -0800, Stefan Agner wrote:
> Add alias for FEC ethernet on Vybrid to allow bootloaders (like U-Boot)
> patch-in the MAC address using this alias.
>
> Signed-off-by: Stefan Agner
Applied, thanks.
On Wed, Jan 20, 2016 at 01:30:15PM +0100, Lothar Waßmann wrote:
> The reference clock for the SGTL5000 is generated by a 26MHz crystal
> oscillator on the Ka-Ro electronics STK5 eval kits. Use the correct
> frequency setting in DTB.
>
> Signed-off-by: Lothar Waßmann
On Mon, Jan 25, 2016 at 05:40:43PM +0530, Vinod Koul wrote:
> On Wed, Jan 20, 2016 at 01:57:01PM +0100, Lothar Waßmann wrote:
> > The mxs-dma unit is also available on i.MX6UL. Make it possible to
> > select it in Kconfig.
>
> It should be dmaengine:xxx
>
> With that
>
> Acked-by: Vinod Koul
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