mode.
Patch is based on next of git://git.linaro.org/people/ulf.hansson/mmc
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v2:
- Fix typo of dev_info msg
- remove unused dmach from declaration of dw_mci_dma_slave
drivers/mmc/host/Kconfig| 24 +-
drivers/mmc/host
在 2015/8/8 5:32, Joachim Eastwood 写道:
Hi Shawn,
On 6 August 2015 at 08:44, Shawn Lin shawn@rock-chips.com wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch
在 2015/8/13 6:05, Ralf Baechle 写道:
On Thu, Aug 06, 2015 at 02:45:15PM +0800, Shawn Lin wrote:
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn
Hi Ulf,
On 2015/8/12 13:07, Michal Simek wrote:
+linux-mmc
On 08/11/2015 04:53 PM, Michal Simek wrote:
On 08/11/2015 09:46 AM, Shawn Lin wrote:
This patch adds the compatible string in sdhci-of-arasan.c to
support sdhci-arasan5.1 version of controller. No documented
controller IP version
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Joachim Eastwood manab...@gmail.com
---
Changes in v6: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Vineet Gupta vgu...@synopsys.com
---
Changes in v6: None
for reducing code size
Changes in v3:
- choose transfer mode at runtime
- remove all CONFIG_MMC_DW_IDMAC config option
- add supports-idmac property for some platforms
Changes in v2:
- Fix typo of dev_info msg
- remove unused dmach from declaration of dw_mci_dma_slave
Shawn Lin (10):
mmc: dw_mmc
with idmac mode.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7:
- rebased on Ulf's next
- combine condition state
- elaborate more about DMA_INTERFACE
- define some macro for DMA_INERFACE value
- spilt HCON ops' changes into another patch
Changes in v6:
- add trans_mode condition
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Govindraj Raja govindraj.r...@imgtec.com
Acked-by: Ralf
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Vineet Gupta vgu...@synopsys.com
---
Changes in v7: None
This patch add some macros for HCON register operations
to make code more readable.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/mmc/host/dw_mmc.c | 6
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Wei Xu xuw...@hisilicon.com
---
Changes in v7: None
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Joachim Eastwood manab...@gmail.com
---
Changes in v7: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
On 2015/8/24 18:01, Heiko Stuebner wrote:
Hi Shawn,
Am Montag, 24. August 2015, 16:27:43 schrieb Shawn Lin:
mmc host controller's IO input/output timing is unpredictable if
bootloader execute tuning for HS200 mode. It might make kernel failed
to initialize mmc card in identification mode
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com/jh80chung/dw-mmc.git
tags/dw-mmc-for-ulf-v4.2 ：）
On 08/20/2015 05:43 PM, Shawn Lin wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external
On 2015/8/21 15:38, Jaehoon Chung wrote:
On 08/21/2015 04:27 PM, Shawn Lin wrote:
On 2015/8/21 14:35, Jaehoon Chung wrote:
On 08/21/2015 03:30 PM, Shawn Lin wrote:
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com
On 2015/8/21 14:35, Jaehoon Chung wrote:
On 08/21/2015 03:30 PM, Shawn Lin wrote:
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com/jh80chung/dw-mmc.git
tags/dw-mmc-for-ulf-v4.2 ：）
Oh..I will rebase to Ulf's next
在 2015/8/15 6:13, Heiko Stübner 写道:
Hi Shawn,
Am Freitag, 14. August 2015, 16:34:35 schrieb Shawn Lin:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops
在 2015/8/17 5:10, Doug Anderson 写道:
Heiko,
On Fri, Aug 14, 2015 at 3:13 PM, Heiko Stübner he...@sntech.de wrote:
Hi Shawn,
Am Freitag, 14. August 2015, 16:34:35 schrieb Shawn Lin:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x
)) {
brq-sbc.opcode = MMC_SET_BLOCK_COUNT;
brq-sbc.arg = brq-data.blocks |
(do_rel_wr ? (1 31) : 0) |
(do_data_tag ? (1 29) : 0);
brq-sbc.flags = MMC_RSP_R1 | MMC_CMD_AC;
brq-mrq.sbc = brq-sbc;
}
Thanks.
Shawn
memset(brq, 0, sizeof(struct mmc_blk_request));
brq-mrq.cmd = brq-cmd;
--
Shawn Lin
to that of identification mode in kernel stage. Anyway, we
can't force all bootloaders to disable tuning phase and degree setting
before into kernel. Simply disable it in rockchip_clk_register_mmc.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
drivers/clk/rockchip/clk-mmc-phase.c | 20
to that of identification mode in kernel stage. Anyway, we
can't force all bootloaders to disable tuning phase and degree setting
before into kernel. Simply disable it in rockchip_clk_register_mmc.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
drivers/clk/rockchip/clk-mmc-phase.c | 20
CONFIG_MMC_DW_IDMAC config option
- add supports-idmac property for some platforms
Changes in v2:
- Fix typo of dev_info msg
- remove unused dmach from declaration of dw_mci_dma_slave
Shawn Lin (9):
mmc: dw_mmc: Add external dma interface support
Documentation: synopsys-dw-mshc: add bindings for idmac
with idmac mode.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v6:
- add trans_mode condition for IDMAC initialization
suggested by Heiko
- re-test my patch on rk3188 platform and update commit msg
- update performance of pio vs edmac in cover letter
Changes in v5:
- add the title
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Wei Xu xuw...@hisilicon.com
---
Changes in v6: None
Changes
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Govindraj Raja govindraj.r...@imgtec.com
Acked-by: Ralf
of min, to fix warning message:
min() should probably be min_t(int, cnt, host-part_buf_count)
- fix missing a blank line after declarations
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v2:
- Keep consistency of comments
- Rebase on https://patchwork.kernel.org/patch/6672581
On 2015-8-3 12:07, Jaehoon Chung wrote:
Hi, Shawn.
On 07/28/2015 12:06 PM, Shawn Lin wrote:
This patch fixes the following issues reported by checkpatch.pl:
- use -EINVAL instead of -ENOSYS, to fix warning message:
ENOSYS means 'invalid syscall nr' and nothing else
- split lines whose
On 2015/8/3 19:17, Heiko Stübner wrote:
Hi Shawn,
Am Montag, 3. August 2015, 11:27:19 schrieb Shawn Lin:
DesignWare MMC Controller can support two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops
-by: Shawn Lin shawn@rock-chips.com
---
Changes in v1:
- Remove redundant SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN for arasan, sdhci-5.1
since
SDHCI will check host-max_clk == 0 and let driver get it from
host-ops-get_max_clock.
Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 2
-by: Shawn Lin shawn@rock-chips.com
---
Changes in v1:
- Remove redundant SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN for arasan, sdhci-5.1
since
SDHCI will check host-max_clk == 0 and let driver get it from
host-ops-get_max_clock.
Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 2
On 2015/8/11 13:06, Michal Simek wrote:
On 08/11/2015 03:34 AM, Shawn Lin wrote:
This patch adds the quirks and compatible string in sdhci-of-arasan.c
to support sdhci-arasan5.1 version of controller. No documented controller
IP version is found in the TRM, so we use ths version of command
在 2015/8/6 15:08, Krzysztof Kozlowski 写道:
On 06.08.2015 15:44, Shawn Lin wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support
- reuse some code for reducing code size
Changes in v3:
- choose transfer mode at runtime
- remove all CONFIG_MMC_DW_IDMAC config option
- add supports-idmac property for some platforms
Changes in v2:
- Fix typo of dev_info msg
- remove unused dmach from declaration of dw_mci_dma_slave
Shawn Lin (9
with idmac mode.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4:
- remove host-trans_mode and use host-use_dma to indicate
transfer mode.
- remove all bt-bindings' changes since we don't need new properities.
- check transfer mode at runtime by reading HCON reg
- spilt defconfig
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 25
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
with idmac mode.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v5:
- add the title of cover letter
- fix typo of comment
- add macro for reading HCON register
- add Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com for
exynos_defconfig patch
- add Acked-by: Vineet Gupta vgu
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Govindraj Raja govindraj.r...@imgtec.com
Acked-by: Ralf
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/mmc/synopsys-dw
, sizeof(struct mmc_blk_request));
brq-mrq.cmd = brq-cmd;
--
Shawn Lin
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ
in v2:
- Fix typo of dev_info msg
- remove unused dmach from declaration of dw_mci_dma_slave
Shawn Lin (9):
mmc: dw_mmc: Add external dma interface support
Documentation: synopsys-dw-mshc: add bindings for idmac and edmac
mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC
arc
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Wei Xu xuw...@hisilicon.com
---
Changes in v5: None
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Joachim Eastwood manab...@gmail.com
---
Changes in v5: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Vineet Gupta vgu...@synopsys.com
---
Changes in v5: None
在 2015/8/11 2:03, Alim Akhtar 写道:
Hi Shawn
On Thu, Aug 6, 2015 at 12:14 PM, Shawn Lin shawn@rock-chips.com wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch
This patch adds the quirks and compatible string in sdhci-of-arasan.c
to support sdhci-arasan5.1 version of controller.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 2 +-
drivers/mmc/host/sdhci-of-arasan.c | 4
.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 2 +-
drivers/mmc/host/sdhci-of-arasan.c | 4
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
On 2015/8/11 9:14, Shawn Lin wrote:
This patch adds the quirks and compatible string in sdhci-of-arasan.c
to support sdhci-arasan5.1 version of controller.
Sorry for wrong send-email ops, pls ignore this patch :(
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Documentation
blocks
- remove else statement to fix warning massage:
else is not generally useful after a break or return
- put open brace { on the previous line to fix warning massage:
that open brace { should be on the previous line
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
drivers/mmc/card
For some mass production of kingston eMMCs which adopt Phison's
firmware will meet an unrecoverable data conrruption occasionally
if performing trim due to a firmware bug confirmed by vendor. We
found it on Intel-C3230RK platform. So we add fixup of broken trim
for it.
Signed-off-by: Shawn Lin
Chung
On 08/06/2015 03:44 PM, Shawn Lin wrote:
Add external dma support for Synopsys MSHC
Synopsys DesignWare mobile storage host controller supports three
types of transfer mode: pio, internal dma and external dma. However,
dw_mmc can only supports pio and internal dma now. Thus some platforms
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
On 2015/7/27 23:19, Lars-Peter Clausen wrote:
On 07/27/2015 10:04 AM, Shawn Lin wrote:
This patch adds the interface to get quirks from dts, and
there is no need to assign different quirks by condition statement
of arasan IP version.
Signed-off-by: Shawn Lin shawn@rock-chips.com
On 2015/7/27 16:23, Michal Simek wrote:
On 07/27/2015 10:04 AM, Shawn Lin wrote:
This patch adds the interface to get quirks from dts, and
there is no need to assign different quirks by condition statement
of arasan IP version.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
drivers
of min, to fix warning message:
min() should probably be min_t(int, cnt, host-part_buf_count)
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
drivers/mmc/host/dw_mmc.c | 85 ++-
1 file changed, 54 insertions(+), 31 deletions(-)
diff --git a/drivers
This patch adds the interface to get quirks from dts, and
there is no need to assign different quirks by condition statement
of arasan IP version.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
drivers/mmc/host/sdhci-of-arasan.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
to that of identification mode in kernel stage. Anyway, we
can't force all bootloaders to reset tuning phase and degree setting
before into kernel. Simply reset it in rockchip_clk_register_mmc.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v2:
- rename to rockchip_clk_mmc_reset
- simplifying
This patch add hw_reset for dw_mmc to implement hw reset
procedure. It's useful for mmc core to recover emmc devices
if emmc runs into unexpected state. Add MMC_CAP_HW_RESET
capability to dw_mmc extension driver directly if it needs hw_reset.
Signed-off-by: Shawn Lin <shawn@rock-chips.
ention
Shawn Lin (2):
mmc: dw_mmc: add hw_reset support
mmc: dw_mmc: add hw_reset extension hook
drivers/mmc/host/dw_mmc.c | 33 +
drivers/mmc/host/dw_mmc.h | 6 ++
2 files changed, 39 insertions(+)
--
2.3.7
--
To unsubscribe from this list: send th
This patch implement hw_reset function for DesignWare
MMC controller. By adding this feature, mmc blk can
do some basic recovery if emmc device cannot work any
more for unknown reasons.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
drivers/mmc/host/dw_mmc.
On 2015/10/22 17:48, Ulf Hansson wrote:
On 22 October 2015 at 08:19, Shawn Lin <shawn@rock-chips.com> wrote:
This patch add hw_reset for dw_mmc to implement hw reset
procedure. It's useful for mmc core to recover emmc devices
if emmc runs into unexpected state. Add MMC_CAP_HW
On 2015/10/22 17:44, Michal Simek wrote:
On 10/22/2015 11:06 AM, Shawn Lin wrote:
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also power-off phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
Serise-chan
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also power-off phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
Serise-changes: 4
- remove ifdef for PM callback statement
- fix missing pm_runtime_set_active
-
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PHY here if CONFIG_PM_SLEEP is enabled.
Currently, it's just mandatory for arasan,sdhci-5.1.
Signed-off-by: Shawn Lin <shawn@rock-chips.
This patch adds phys and phy-names for sdhci-of-arasan as required
properties for arasan,sdhci-5.1, and details the example as well.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
Changes in v2:
- Keep phy as a mandatory requirement for arasan,sdhci-5.1
.../devicetree/bindin
在 2015/10/23 20:07, Jaehoon Chung 写道:
Hi, Shawn.
On 10/22/2015 03:19 PM, Shawn Lin wrote:
This patch implement hw_reset function for DesignWare
MMC controller. By adding this feature, mmc blk can
do some basic recovery if emmc device cannot work any
more for unknown reasons.
Are there any
On 2015/10/22 20:08, Ulf Hansson wrote:
On 22 October 2015 at 11:06, Shawn Lin <shawn@rock-chips.com> wrote:
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also power-off phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin <shawn
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PHY here if CONFIG_PM_SLEEP is enabled.
Currently, it's just mandatory for arasan,sdhci-5.1.
Signed-off-by: Shawn Lin <shawn@rock-chips.
This patch adds phys and phy-names for sdhci-of-arasan as required
properties for arasan,sdhci-5.1, and details the example as well.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
Changes in v2:
- Keep phy as a mandatory requirement for arasan,sdhci-5.1
.../devicetree/bindin
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also power-off phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
Serise-changes: 4
- remove ifdef for PM callback statement
- fix missing pm_runtime_set_active
-
This patch use clk_prepare_enable and clk_disable_unprepare for
system PM callback instead of directly use clk_enable and clk_disable
without clk_prepare/unprepare.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
Changes in v2: None
drivers/mmc/host/sdhci-of-arasan.
Lars and Vinod.
--
Best Regards
Shawn Lin
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On 2015/10/16 20:35, Ulf Hansson wrote:
On 11 September 2015 at 10:54, Shawn Lin <shawn@rock-chips.com> wrote:
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PHY here if CONFIG_PM
wer, but what about
the phy? Can you power off it in runtime suspend?
yes, we can power off it in runtime suspend. So we can append some
patches later to introduce runtime pm for sdhci-of-arasan?
[...]
Kind regards
Uffe
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Shawn Lin
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Best Regards
Shawn Lin
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On 2015/10/15 12:08, Vinod Koul wrote:
On Thu, Oct 15, 2015 at 09:35:12AM +0800, Shawn Lin wrote:
From: Boojin Kim <boojin@samsung.com>
Please fix the subsystem name in this series. Its dmaengine:...
Git log should tell you the acceptable style for a subsystem
On 2015/10/15 12:05, Vinod Koul wrote:
On Thu, Oct 15, 2015 at 09:36:38AM +0800, Shawn Lin wrote:
+int snd_dmaengine_pcm_get_caps(struct device *dev, struct dma_slave_caps *caps)
+{
+ struct snd_soc_platform *platform;
+ struct dmaengine_pcm *pcm;
+ int ret = -ENODEV
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also suspend phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
Changes in v2: None
drivers/mmc/host/sdhci-of-arasan.
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PHY here if CONFIG_PM_SLEEP is enabled.
Currently, it's just mandatory for arasan,sdhci-5.1.
Signed-off-by: Shawn Lin <shawn@rock-chips.
This patch adds phys and phy-names for sdhci-of-arasan as required
properties for arasan,sdhci-5.1, and details the example as well.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
Changes in v2:
- Keep phy as a mandatory requirement for arasan,sdhci-5.1
.../devicetree/bindin
On 2015/10/20 15:30, Michal Simek wrote:
Hi,
On 10/20/2015 09:05 AM, Shawn Lin wrote:
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PHY here if CONFIG_PM_SLEEP is enabled.
Currently, it's
On 2015/10/20 16:39, Ulf Hansson wrote:
+ Kishon
On 20 October 2015 at 09:05, Shawn Lin <shawn@rock-chips.com> wrote:
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PH
On 2015/10/20 16:03, Michal Simek wrote:
Hi,
On 10/20/2015 09:05 AM, Shawn Lin wrote:
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also suspend phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin <shawn@rock-chips.com>
---
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