pages as they become dirty (usually 1 page at a time).
Fix is to ensure there is no underflow while doing the math.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Puneet Kumar puneets...@chromium.org
---
mm/page-writeback.c | 17 +
1 files changed, 13 insertions
add apkm's suggestion
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On Thu, Nov 8, 2012 at 4:42 PM, Sonny Rao sonny...@chromium.org wrote:
add apkm's suggestion
Oops, sorry, will add akpm's suggestion and re-post
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More majordomo info
pages as they become dirty (usually 1 page at a time).
Fix is to ensure there is no underflow while doing the math.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Puneet Kumar puneets...@chromium.org
---
v2: added apkm's suggestion to make the highmem calculation better
mm/page
pages as they become dirty (usually 1 page at a time).
Fix is to ensure there is no underflow while doing the math.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Puneet Kumar puneets...@chromium.org
---
v2: added apkm's suggestion to make the highmem calculation better
v3: added
of either highmem
or global dirtyable memory.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Puneet Kumar puneets...@chromium.org
Acked-by: Johannes Weiner han...@cmpxchg.org
CC: sta...@vger.kernel.org
---
v2: added apkm's suggestion to make the highmem calculation better
v3: added
On Fri, Feb 11, 2005 at 11:40:21PM +0300, Alex Tomas wrote:
Good day all,
I've updated the patchset against 2.6.10. A bunch of bugs have been
fixed and mballoc now behaves smarter a bit. Extents and mballoc
patches collects some stats they print upon umount. NOTE: they must
not be used
On Sun, Jul 24, 2005 at 03:07:30AM +0200, bert hubert wrote:
It is with distinct lack of pride that I release version 0.1 of diskstat
'Geeks in Black Thorn', a tool that allows you to generate the kinds of
graphs as presented in my OLS talk 'On faster application startup times:
Cache stuffing,
On Tue, Jul 26, 2005 at 11:39:11AM -0700, Badari Pulavarty wrote:
On Tue, 2005-07-26 at 11:11 -0700, Andrew Morton wrote:
Badari Pulavarty [EMAIL PROTECTED] wrote:
After KS OLS discussions about memory pressure, I wanted to re-do
iSCSI testing with dds to see if we are throttling
On Mon, Jun 27, 2005 at 12:42:44PM -0700, Chen, Kenneth W wrote:
Christoph Lameter wrote on Monday, June 27, 2005 12:23 PM
On Mon, 27 Jun 2005, Chen, Kenneth W wrote:
I don't recall seeing tree_lock to be a problem for DSS workload either.
I have seen the tree_lock being a problem a
On Tue, Jul 05, 2005 at 08:31:40AM -0700, Martin J. Bligh wrote:
On Mon, 27 Jun 2005, Chen, Kenneth W wrote:
I don't recall seeing tree_lock to be a problem for DSS workload
either.
I have seen the tree_lock being a problem a number of times with large
scale NUMA type
On Fri, Jul 01, 2005 at 05:05:11PM +0300, Al Boldi wrote:
Jens Axboe wrote: {
On Fri, Jul 01 2005, David Masover wrote:
Chris Wedgwood wrote:
On Wed, Jun 29, 2005 at 07:53:09AM +0300, Al Boldi wrote:
What I found were 4 things in the dest dir:
1. Missing Dirs,Files. That's OK.
2.
On Tue, Jul 05, 2005 at 08:25:11PM +0300, Al Boldi wrote:
Sonny Rao wrote: {
On Wed, Jun 29, 2005 at 07:53:09AM +0300, Al Boldi wrote:
What I found were 4 things in the dest dir:
1. Missing Dirs,Files. That's OK.
2. Files of size 0. That's acceptable.
3. Corrupted Files. That's
On Thu, Mar 10, 2005 at 03:23:49AM +0530, Dipankar Sarma wrote:
On Wed, Mar 09, 2005 at 01:29:23PM -0800, Badari Pulavarty wrote:
On Wed, 2005-03-09 at 13:27, Dipankar Sarma wrote:
On Wed, Mar 09, 2005 at 10:55:58AM -0800, Badari Pulavarty wrote:
Hi,
We have a 8-way P-III, 16GB
On Tue, Jan 15, 2013 at 4:09 PM, Andrew Morton
a...@linux-foundation.org wrote:
On Fri, 11 Jan 2013 13:43:27 +0900
Minchan Kim minc...@kernel.org wrote:
Hi Andrew,
On Thu, Jan 10, 2013 at 01:58:28PM -0800, Andrew Morton wrote:
On Thu, 10 Jan 2013 11:23:06 +0900
Minchan Kim
On Tue, Jan 15, 2013 at 4:50 PM, Andrew Morton
a...@linux-foundation.org wrote:
On Tue, 15 Jan 2013 16:32:38 -0800
Sonny Rao sonny...@google.com wrote:
It's for saving the power to increase batter life.
It might well have that effect, dunno. That wasn't my intent. Testing
needed
On Tue, Jan 15, 2013 at 8:47 PM, Minchan Kim minc...@kernel.org wrote:
On Tue, Jan 15, 2013 at 05:21:15PM -0800, Sonny Rao wrote:
On Tue, Jan 15, 2013 at 4:50 PM, Andrew Morton
a...@linux-foundation.org wrote:
On Tue, 15 Jan 2013 16:32:38 -0800
Sonny Rao sonny...@google.com wrote:
It's
On Tue, Aug 09, 2005 at 09:44:56AM -0500, Phil Dier wrote:
Hi,
I have 2 identical dual 2.8ghz xeon machines with 4gb ram, using
software raid 10 with lvm layered on top, formatted with JFS (though
at this point any filesystem with online resizing support will do). I
have the boxes stable
:01.0: 1:0222 Initial FLOGI timeout
lpfc 0001:d8:01.0: 1:0127 ELS timeout Data: x400 xfe x8a x23
Is this a known issue ?
Let me know if you need patches tested, thanks.
Sonny Rao
IBM LTC Performance
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Sonny
-Original Message-
From: Sonny Rao [mailto:[EMAIL PROTECTED]
Sent: Thursday, August 11, 2005 4:00 PM
To: Smart, James
Cc: linux-kernel@vger.kernel.org; linux-scsi@vger.kernel.org
Subject: lpfc driver in 2.6.13-rc6 broken on ppc64 ?
Hi, I am having problems using
On Fri, Aug 12, 2005 at 12:35:05PM -0500, Phil Dier wrote:
On Fri, 12 Aug 2005 12:07:21 +1000
Neil Brown [EMAIL PROTECTED] wrote:
You could possibly put something like
struct bio_vec *from;
int i;
bio_for_each_segment(from, bio, i)
On Mon, Aug 01, 2005 at 12:27:42AM -0500, Paul Mackerras wrote:
From: Mike Kravetz [EMAIL PROTECTED]
If CONFIG_NUMA is set, some POWER 4 systems will fail to boot. This is
because of special processing needed to handle invalid node IDs (0x)
on POWER 4. My previous patch to handle
Hi,
I have a system based on the Nforce2 chipset which uses the amd7xx
driver for it's IDE support, and I noticed that one of the drives was
performing very slowly. I looked into it a bit more and it seems the
drive was operating as UDMA33 instead of UDMA100 for some reason.
The affected drive
On Wed, Jul 13, 2005 at 12:42:15PM -0700, randy_dunlap wrote:
On Wed, 13 Jul 2005 09:54:10 -0500 Miles Lane wrote:
On 7/13/05, Dave Airlie [EMAIL PROTECTED] wrote:
Thanks Dave,
I switched to the i915 kernel driver and still got the OOPS.
I also continue to get the overlapping
On Mon, Aug 08, 2005 at 10:44:04AM -0700, Andrew Morton wrote:
Sonny Rao [EMAIL PROTECTED] wrote:
On Wed, Jul 13, 2005 at 12:42:15PM -0700, randy_dunlap wrote:
On Wed, 13 Jul 2005 09:54:10 -0500 Miles Lane wrote:
On 7/13/05, Dave Airlie [EMAIL PROTECTED] wrote:
Thanks Dave
On Tue, Aug 09, 2005 at 09:09:57AM +1000, Keith Owens wrote:
On Mon, 8 Aug 2005 10:44:04 -0700,
Andrew Morton [EMAIL PROTECTED] wrote:
Sonny Rao [EMAIL PROTECTED] wrote:
Modules linked in: cpufreq_userspace cpufreq_stats freq_table
cpufreq_powersave
cpufreq_ondemand
On Mon, Sep 05, 2005 at 01:45:28AM -0700, Linus Torvalds wrote:
On Mon, 5 Sep 2005, Rolf Eike Beer wrote:
The problem appeared between 2.6.12-git3 and 2.6.12-git4.
Just for reference, that's git ID's
, and is incorrectly trying to enforce the max frequency
policy even when we are trying to change the policy. It is also not
clear why this driver is looking at the user policy since it is
primarily supposed to enforce thermal policy, not user set policy.
Signed-off-by: Sonny Rao sonny...@chromium.org
, Sonny Rao sonny...@chromium.org wrote:
The cpu_thermal generic thermal management code has a bug where once
max cpu frequency has been lowered in sysfs (scaling_max_freq) it is
not possible to raise the max back up later. The bug is that the
notifer gets called by __cpufreq_set_policy
of either highmem
or global dirtyable memory.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Puneet Kumar puneets...@chromium.org
Acked-by: Johannes Weiner han...@cmpxchg.org
CC: sta...@vger.kernel.org
---
v2: added apkm's suggestion to make the highmem calculation better
v3: added
On Mon, Nov 19, 2012 at 10:41 AM, Sonny Rao sonny...@chromium.org wrote:
The system uses global_dirtyable_memory() to calculate
number of dirtyable pages/pages that can be allocated
to the page cache. A bug causes an underflow thus making
the page count look like a big unsigned number
On Mon, Apr 29, 2013 at 3:08 PM, Pierre-Loup A. Griffais
pgriff...@valvesoftware.com wrote:
On 04/29/2013 03:03 PM, Linus Torvalds wrote:
On Mon, Apr 29, 2013 at 2:53 PM, Pierre-Loup A. Griffais
pgriff...@valvesoftware.com wrote:
Other than this particular concern, what's the high-level
Hi, I've seen a regression in kernels since 3.7 on x86 devices where
the kernel turns the system fans on to max speed after resuming from
ram. Other people have noticed it as well, for example see
https://bugzilla.redhat.com/show_bug.cgi?id=895276
For example on the Samsung 550 Chromebook, we
On Tue, May 14, 2013 at 9:29 PM, Zhang Rui rui.zh...@intel.com wrote:
On Wed, 2013-05-15 at 12:26 +0800, Zhang Rui wrote:
please
On Tue, 2013-05-14 at 21:18 -0700, Sonny Rao wrote:
Hi, I've seen a regression in kernels since 3.7 on x86 devices where
the kernel turns the system fans
On Tue, May 14, 2013 at 9:34 PM, Sonny Rao sonny...@chromium.org wrote:
On Tue, May 14, 2013 at 9:29 PM, Zhang Rui rui.zh...@intel.com wrote:
On Wed, 2013-05-15 at 12:26 +0800, Zhang Rui wrote:
please
On Tue, 2013-05-14 at 21:18 -0700, Sonny Rao wrote:
Hi, I've seen a regression in kernels
On Tue, May 14, 2013 at 9:56 PM, Sonny Rao sonny...@chromium.org wrote:
On Tue, May 14, 2013 at 9:34 PM, Sonny Rao sonny...@chromium.org wrote:
On Tue, May 14, 2013 at 9:29 PM, Zhang Rui rui.zh...@intel.com wrote:
On Wed, 2013-05-15 at 12:26 +0800, Zhang Rui wrote:
please
On Tue, 2013-05-14
.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
tools/perf/util/header.c | 4
1 file changed, 4 insertions(+)
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index 26441d0..085ef76 100644
--- a/tools/perf/util/header.c
+++ b/tools/perf/util/header.c
@@ -2582,6 +2582,10 @@ int
On Thu, Sep 26, 2013 at 6:34 AM, David Ahern dsah...@gmail.com wrote:
On 9/25/13 11:20 PM, Sonny Rao wrote:
We recently ran into a corrupt perf data file which mostly looked okay
but the section size for data was set to 0. This caused perf report to
get into an infinite loop
...@gmail.com
Cc: Sonny Rao sonny...@chromium.org
Signed-off-by: David Ahern dsah...@gmail.com
Signed-off-by: Namhyung Kim namhy...@kernel.org
worked ok for me. Sonny can you verify?
Yes, it works for me as well, thanks!
David
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, Sonny Rao wrote:
Based on a suggestion from John Stultz.
This adds a dynamic clock device which can be used with clock_gettime
to sample the clock source used for time stamping trace events in the
kernel. The only use for this clock source is to associate user space
events with kernel
On Wed, Dec 11, 2013 at 5:49 PM, Steven Rostedt rost...@goodmis.org wrote:
On Wed, 11 Dec 2013 17:17:30 -0800
Sonny Rao sonny...@chromium.org wrote:
On Wed, Dec 11, 2013 at 11:30 AM, Stephane Eranian eran...@google.com
wrote:
Sonny,
Your patch has a couple of problems for me
. It is explicitly not
supposed to be used as a generic time source and won't necessarily be
consistent between kernels.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
drivers/char/Kconfig | 8
drivers/char/Makefile | 1 +
drivers/char/trace_clock.c | 99
[sorry for HTML spam, resending]
Hi, we have the problem today that cpu based performance counters don't work
when we're using the big.LITTLE switcher on Exynos 5420, and it doesn't look
like code exists to deal with this in the switcher.
As it stands right now, if you put an A-15 or A-7 PMU
On Mon, May 5, 2014 at 7:52 PM, Nicolas Pitre nicolas.pi...@linaro.org wrote:
On Mon, 5 May 2014, Sonny Rao wrote:
Hi, we have the problem today that cpu based performance counters don't
work when we're using the big.LITTLE switcher on Exynos 5420, and it
doesn't look like code exists to deal
On Sun, Jul 27, 2014 at 9:46 PM, Stephen Rothwell s...@canb.auug.org.au wrote:
Hi Ulf,
After merging the mmc-uh tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/mmc/host/dw_mmc.c: In function 'dw_mci_reset':
drivers/mmc/host/dw_mmc.c:2262:3: error: implicit
On Tue, Aug 12, 2014 at 3:07 PM, Heiko Stübner he...@sntech.de wrote:
Am Dienstag, 12. August 2014, 14:06:11 schrieb Doug Anderson:
Heiko,
On Wed, Aug 6, 2014 at 10:09 AM, Doug Anderson diand...@chromium.org
wrote:
This adds support for the sdmmc and emmc ports on the rk3288 using the
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Acked-by: Seungwon Jeon tgih@samsung.com
Signed
On Mon, Aug 18, 2014 at 10:09 AM, Doug Anderson diand...@chromium.org wrote:
The rk3288 SoC has an option to switch all of the PWMs in the system
between the old IP block and the new IP block. The new IP block is
working and tested and the suggested PWM to use, so setup the SoC to
use it and
in sequential read throughput.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host
On Wed, Oct 15, 2014 at 10:23 AM, Kever Yang kever.y...@rock-chips.com wrote:
From: Heiko Stuebner he...@sntech.de
The pmu register space is - like the GRF - shared by quite some peripherals.
On the rk3188 and rk3288 even parts of the pinctrl are living there.
Therefore we normally shouldn't
On Fri, Oct 17, 2014 at 1:26 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Sonny.
On 10/17/2014 01:58 AM, Sonny Rao wrote:
We've already got a reset of DMA after it's done. Add one before we
start DMA too. This fixes a data corruption on Rockchip SoCs which
will get bad data when
timers, so if a system is trying to use physical timers, it will
function properly.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
arch/arm/include/asm/arch_timer.h| 9 +
arch/arm64/include/asm/arch_timer.h | 10 ++
drivers/clocksource/arm_arch_timer.c | 30
On Wed, Aug 27, 2014 at 2:19 PM, Olof Johansson o...@lixom.net wrote:
On Wed, Aug 27, 2014 at 2:03 PM, Sonny Rao sonny...@chromium.org wrote:
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false. It restores the
arch_counter_get_cntpct() function
On Thu, Aug 28, 2014 at 2:35 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Aug 28, 2014 at 04:33:31AM +0100, Doug Anderson wrote:
Hi,
On Wed, Aug 27, 2014 at 7:58 PM, Olof Johansson o...@lixom.net wrote:
On Wed, Aug 27, 2014 at 5:56 PM, Stephen Boyd sb...@codeaurora.org wrote:
On
(clocksource: arch_timer: use virtual counters)
Cc: sta...@vger.kernel.org
Signed-off-by: Sonny Rao sonny...@chromium.org
Acked-by: Olof Johansson o...@lixom.net
---
v2: Add fixes tag to commit message, cc stable, copy Doug's
description of the systems which need this in commit message.
---
arch/arm
On Thu, Sep 11, 2014 at 6:17 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/11/14 17:14, Sonny Rao wrote:
On Thu, Sep 11, 2014 at 4:56 PM, Stephen Boyd sb...@codeaurora.org wrote:
Where does this platform jump to when a CPU comes up? Is it
rockchip_secondary_startup()? I wonder
-by: Doug Anderson diand...@chromium.org
Signed-off-by: Sonny Rao sonny...@chromium.org
---
Changes in v2:
- Add #ifdef CONFIG_ARM as per Will Deacon
Changes in v3:
- change property name to arm,cntvoff-not-fw-configured and specify
that the value of CNTHCTL.PL1PC(T)EN must still be the reset value
Anderson diand...@chromium.org
Signed-off-by: Sonny Rao sonny...@chromium.org
Reviewed-by: Mark Rutland mark.rutl...@arm.com
---
Changes in v2:
- Add #ifdef CONFIG_ARM as per Will Deacon
Changes in v3:
- change property name to arm,cntvoff-not-fw-configured and specify
that the value
managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.
Fixes: 0d651e4e65e9 (clocksource: arch_timer: use virtual counters)
Cc: sta...@vger.kernel.org
Signed-off-by: Sonny Rao sonny...@chromium.org
Acked-by: Olof Johansson o...@lixom.net
We can get into an infinite loop if the I2S_CLR register fails to
clear due to a missing break statement, so add that.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
sound/soc/rockchip/rockchip_i2s.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/sound/soc/rockchip
The parent should be spdif_8ch_pre not spdif_8ch_src, which doesn't
exist and looks to be a typo. The TRM also confirms this.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk
in sequential read throughput.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 69f0cc6..2b5401e 100644
managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.
Fixes: 0d651e4e65e9 (clocksource: arch_timer: use virtual counters)
Cc: sta...@vger.kernel.org
Signed-off-by: Sonny Rao sonny...@chromium.org
Acked-by: Olof Johansson o...@lixom.net
On Fri, Sep 19, 2014 at 6:30 AM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Fri, Sep 19, 2014 at 02:22:10PM +0100, Christopher Covington wrote:
On 09/19/2014 01:56 AM, Peter Maydell wrote:
On 17 September 2014 06:25, Christopher Covington c...@codeaurora.org
wrote:
On 09/16/2014
need to claim the clock which is driving the codec so that when we enable
clock gating, we continue to clock the codec when needed. I make this an
optional clock since there might be some applications where we don't need it
but can still use the I2S block.
Signed-off-by: Sonny Rao sonny
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
drivers/clk/rockchip/clk-rk3288.c | 3 ++-
include/dt-bindings/clock/rk3288-cru.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff
On Thu, Nov 20, 2014 at 12:49 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
On Wed, Oct 08, 2014 at 12:38:57AM -0700, Sonny Rao wrote:
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false. It restores the
arch_counter_get_cntpct
On Wed, Sep 10, 2014 at 10:52 AM, Doug Anderson diand...@chromium.org wrote:
Mark,
On Wed, Sep 10, 2014 at 10:27 AM, Mark Rutland mark.rutl...@arm.com wrote:
Hi Sonny,
On Wed, Aug 27, 2014 at 10:03:39PM +0100, Sonny Rao wrote:
This is a bug fix for using physical arch timers when
On Fri, Aug 29, 2014 at 3:04 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Aug 29, 2014 at 01:10:49AM +0100, Sonny Rao wrote:
On Thu, Aug 28, 2014 at 2:35 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Aug 28, 2014 at 04:33:31AM +0100, Doug Anderson wrote:
Hi,
On Wed, Aug 27
On Sun, Nov 23, 2014 at 4:07 PM, Heiko Stübner he...@sntech.de wrote:
Hi Sonny,
Am Dienstag, 18. November 2014, 23:15:19 schrieb Sonny Rao:
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao sonny...@chromium.org
...@arm.com wrote:
On Wed, Oct 08, 2014 at 08:38:57AM +0100, Sonny Rao wrote:
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false. It restores the
arch_counter_get_cntpct() function after removal in
0d651e4e clocksource: arch_timer: use virtual
managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.
Fixes: 0d651e4e65e9 (clocksource: arch_timer: use virtual counters)
Cc: sta...@vger.kernel.org
Signed-off-by: Sonny Rao sonny...@chromium.org
Acked-by: Olof Johansson o...@lixom.net
On Mon, Sep 15, 2014 at 1:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14 04:10, Catalin Marinas wrote:
On Fri, Sep 12, 2014 at 07:59:29PM +0100, Stephen Boyd wrote:
On 09/12/14 05:14, Marc Zyngier wrote:
We surely can handle the UNDEF and do something there. We just can't do
On Mon, Sep 15, 2014 at 2:49 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14 14:47, Sonny Rao wrote:
On Mon, Sep 15, 2014 at 1:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14 04:10, Catalin Marinas wrote:
On Fri, Sep 12, 2014 at 07:59:29PM +0100, Stephen Boyd wrote:
On 09
On Mon, Sep 15, 2014 at 2:52 PM, Sonny Rao sonny...@chromium.org wrote:
On Mon, Sep 15, 2014 at 2:49 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14 14:47, Sonny Rao wrote:
On Mon, Sep 15, 2014 at 1:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14 04:10, Catalin Marinas
On Mon, Sep 15, 2014 at 3:51 PM, Christopher Covington
c...@codeaurora.org wrote:
Hi Sonny,
On 09/15/2014 06:04 PM, Sonny Rao wrote:
On Mon, Sep 15, 2014 at 2:52 PM, Sonny Rao sonny...@chromium.org wrote:
On Mon, Sep 15, 2014 at 2:49 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14
On Tue, Sep 16, 2014 at 3:44 AM, Kever Yang kever.y...@rock-chips.com wrote:
This patch add basic rk3288 smp support, cpu 1~3 are in wfe state
when get into kernel.
Signed-off-by: Heiko Stuebner he...@sntech.de
Signed-off-by: Kever Yang kever.y...@rock-chips.com
---
Changes in v2:
- use
On Wed, Sep 17, 2014 at 6:25 AM, Christopher Covington
c...@codeaurora.org wrote:
On 09/16/2014 05:24 PM, Christopher Covington wrote:
On 09/16/2014 05:09 PM, Christopher Covington wrote:
ARM Linux currently has the most features available to it in hypervisor
(HYP) mode, so switch to it when
-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Sonny Rao sonny...@chromium.org
---
Changes in v3:
- Wording changes to bindings and patch desc as per Will Deacon
Changes in v2:
- Add #ifdef CONFIG_ARM as per Will Deacon
Documentation/devicetree/bindings/arm/arch_timer.txt | 6
.
On Thu, Sep 11, 2014 at 11:18:15PM +0100, Sonny Rao wrote:
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false. It restores the
arch_counter_get_cntpct() function after removal in
0d651e4e clocksource: arch_timer: use virtual counters
Given
does initialize the cpu registers properly at boot and
cpu-hotplug can remove this property from the device tree.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
arch/arm/boot/dts/rk3288.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts
On Wed, Nov 26, 2014 at 3:32 PM, Heiko Stübner he...@sntech.de wrote:
Am Dienstag, 18. November 2014, 23:15:19 schrieb Sonny Rao:
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao sonny...@chromium.org
applied to my clk
On Wed, Dec 3, 2014 at 11:20 AM, Mark Brown broo...@kernel.org wrote:
On Wed, Dec 03, 2014 at 03:18:38PM +0800, Jianqun Xu wrote:
From: Sonny Rao sonny...@chromium.org
We need to claim the clock which is driving the codec so that when we enable
clock gating, we continue to clock the codec
On Wed, Dec 3, 2014 at 12:03 PM, Mark Brown broo...@kernel.org wrote:
On Wed, Dec 03, 2014 at 11:38:13AM -0800, Sonny Rao wrote:
On Wed, Dec 3, 2014 at 11:20 AM, Mark Brown broo...@kernel.org wrote:
I would expect that the clock for the CODEC should be managed by the
CODEC if at all
On Wed, Dec 3, 2014 at 3:22 PM, Dylan Reid dgr...@chromium.org wrote:
On Wed, Dec 3, 2014 at 3:03 PM, Sonny Rao sonny...@chromium.org wrote:
On Wed, Dec 3, 2014 at 12:03 PM, Mark Brown broo...@kernel.org wrote:
On Wed, Dec 03, 2014 at 11:38:13AM -0800, Sonny Rao wrote:
On Wed, Dec 3, 2014
On Wed, Dec 10, 2014 at 12:56 PM, Mark Salter msal...@redhat.com wrote:
Using Linus' tree from this morning, I am hitting:
[0.00] BUG: failure at
./arch/arm64/include/asm/arch_timer.h:112/arch_counter_get_cntpct!
This is triggered by commit 0b46b8a718 (clocksource: arch_timer:
On Wed, Jan 14, 2015 at 10:36 AM, Doug Anderson diand...@chromium.org wrote:
Sonny,
Chris, it looks like you swapped the set and the clear of this bit,
and you're relying on the fact that the i2c transaction takes a
certain amount of time after the RTC_GET_TIME BIT is set. I'm not
sure how
On Tue, Jan 13, 2015 at 6:43 PM, Chris Zhong z...@rock-chips.com wrote:
After we set the GET_TIME bit, the rtc time couldn't be read immediately,
we should wait up to 31.25 us, about one cycle of 32khz. Otherwise reading
RTC time will return a old time. If clear the GET_TIME bit after setting,
This uncore is the same as the Haswell desktop part but uses a
different PCI ID.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
b
This keeps all the related PCI IDs together in the driver where they
are used.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 6 +-
include/linux/pci_ids.h | 4
2 files changed, 5 insertions(+), 5
On Tue, Apr 21, 2015 at 12:21 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Tue, Apr 21, 2015 at 2:09 PM, Sonny Rao sonny...@chromium.org wrote:
This keeps all the related PCI IDs together in the driver where they
are used.
Signed-off-by: Sonny Rao sonny...@chromium.org
Acked-by: Bjorn
This keeps all the related PCI IDs together in the driver where they
are used.
Signed-off-by: Sonny Rao sonny...@chromium.org
Acked-by: Bjorn Helgaas bhelg...@google.com
---
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 6 +-
include/linux/pci_ids.h | 4
uncore_imc/data_reads/,uncore_imc/data_writes/
sleep 10
Signed-off-by: Stephane Eranian eran...@google.com
Tested-by: Sonny Rao sonny...@chromium.org
---
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index c635b8b..a03f964 100644
This uncore is the same as the Haswell desktop part but uses a
different PCI ID.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 5 +
include/linux/pci_ids.h | 1 +
2 files changed, 6 insertions(+)
diff --git
On Mon, Apr 20, 2015 at 12:34 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Apr 20, 2015 at 1:58 PM, Stephane Eranian eran...@google.com wrote:
On Mon, Apr 20, 2015 at 11:56 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Mon, Apr 20, 2015 at 1:42 PM, Sonny Rao sonny...@chromium.org
This adds the dts node for the PMU with the correct PMUIRQ interrupts
for each core.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index
On Thu, Aug 27, 2015 at 5:36 PM, Shawn Lin wrote:
>
> The purpose of the DMAFLUSHP instruction:
> - Tell the peripheral to clear its status and control registers.
> - Send a message to the peripheral to resend its level status.
>
> There are 3 timings described in PL330
thrd->lstenq = idx;
> thrd->req[idx].desc = desc;
> - _setup_req(0, thrd, idx, );
> + _setup_req(pl330, 0, thrd, idx, );
>
> ret = 0;
>
> @@ -2784,6 +2815,7 @@ pl330_probe(struct amba_device *adev, const struct
> amba_id *id)
>
330_prep_slave_sg(struct dma_chan *chan, struct
> scatterlist *sgl,
> }
>
> desc->rqcfg.brst_size = pch->burst_sz;
> - desc->rqcfg.brst_len = 1;
> + desc->rqcfg.brst_len = pch->burst_len;
>
xt
> @@ -15,6 +15,7 @@ Optional properties:
> cells in the dmas property of client device.
>- dma-channels: contains the total number of DMA channels supported by the
> DMAC
>- dma-requests: contains the total number of DMA requests supported by the
> DMAC
> + - a
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