When the context is deactivated, the link_type is set to 0xff, which
triggers a warning message, and results in a wrong link status, as
the LSI is ignored.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/net/usb/sierra_net.c | 14 +++---
1 file chan
erent link type.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
v2: Do not overwrite protocol field in rx_fixup
Example LSI LINK UP indication:
00 ed 78 00 04 01 00 e9 0a 14 00 54 00 65 00 6c ..xT.e.l
0010 00 65 00 6b 00 6f 00 6d 00 2e 00 64 00 65 48 03
, APN internet.telekom, IPv4v6 PDP type. Both
IPv4 and IPv6 connections work.
v2: Do not overwrite protocol field in rx_fixup
Stefan Brüns (2):
sierra_net: Add support for IPv6 and Dual-Stack Link Sense Indications
sierra_net: Skip validating irrelevant fields for IDLE LSIs
drivers/net/usb
When the context is deactivated, the link_type is set to 0xff, which
triggers a warning message, and results in a wrong link status, as
the LSI is ignored.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/net/usb/sierra_net.c | 14 +++---
1 file chan
, APN internet.telekom, IPv4v6 PDP type.
Stefan Brüns (2):
sierra_net: Add support for IPv6 and Dual-Stack Link Sense Indications
sierra_net: Skip validating irrelevant fields for IDLE LSIs
drivers/net/usb/sierra_net.c | 92 ++--
1 file changed, 63
erent link type.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Example LSI LINK UP indication:
00 ed 78 00 04 01 00 e9 0a 14 00 54 00 65 00 6c ..xT.e.l
0010 00 65 00 6b 00 6f 00 6d 00 2e 00 64 00 65 48 03 .e.k.o.m...d.eH.
0020 c8 be d1 00 62 00 00 00 2c 8
The USB control messages require DMA to work. We cannot pass
a stack-allocated buffer, as it is not warranted that the
stack would be into a DMA enabled area.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/usb/dvb-usb/dvb-usb-firmware.
When the context is deactivated, the link_type is set to 0xff, which
triggers a warning message, and results in a wrong link status, as
the LSI is ignored.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/net/usb/sierra_net.c | 14 +++---
1 file chan
, APN internet.telekom, IPv4v6 PDP type. Both
IPv4 and IPv6 connections work.
v2: Do not overwrite protocol field in rx_fixup
v3: Remove leftover struct ethhdr *eth declaration
Stefan Brüns (2):
sierra_net: Add support for IPv6 and Dual-Stack Link Sense Indications
sierra_net: Skip validating
erent link type.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
v2: Do not overwrite protocol field in rx_fixup
v3: Remove leftover struct ethhdr *eth declaration
Example LSI LINK UP indication:
00 ed 78 00 04 01 00 e9 0a 14 00 54 00 65 00 6c ..xT.e.l
0010 0
elf, avoid calling
it using the dvb_usb_generic_read wrapper function.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/usb/dvb-usb/cxusb.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/media/usb/dvb-usb/cxusb.c
b/drive
The Si2141 needs two distinct commands for powerup/reset, otherwise it
will not respond to chip revision requests. It also needs a firmware
to run properly.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/tuners/si2157.c | 23 +--
d
Add handling for new revision, requiring new firmware.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/dvb-frontends/si2168.c | 4
drivers/media/dvb-frontends/si2168_priv.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/media/dvb-fro
Mygica T230 DVB-T/T2/C USB stick support. It uses the same FX2/Si2168
bridge/demodulator combo as the other devices supported by the driver,
but uses the Si2141 tuner.
Several DVB-T (MPEG2) and DVB-T2 (H.265) channels were tested, as well as
the included remote control.
Signed-off-by: Stefan
The required command sequence for the new tuner (Si2141) was traced from the
current Windows driver and verified with a small python script/libusb.
The changes to the Si2168 and dvbsky driver are mostly additions of the
required IDs and some glue code.
Stefan Brüns (3):
[media] si2157: Add
Mygica T230 DVB-T/T2/C USB stick support. It uses the same FX2/Si2168
bridge/demodulator combo as the T230, but uses the Si2141 tuner.
Factor out the common code and pass the tuner type and if port as
parameter, to avoid duplicating the initialization code.
Signed-off-by: Stefan Brüns <stefan.
The required command sequence for the new tuner (Si2141) was traced from the
current Windows driver and verified with a small python script/libusb.
The changes to the Si2168 and cxusb driver are mostly addition of the
required IDs and some glue code.
Stefan Brüns (3):
[media] si2157: Add
Add handling for new revision, requiring new firmware.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/dvb-frontends/si2168.c | 4
drivers/media/dvb-frontends/si2168_priv.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/media/dvb-fro
The Si2141 needs two distinct commands for powerup/reset, otherwise it
will not respond to chip revision requests. It also needs a firmware
to run properly.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/tuners/si2157.c | 23 +--
d
The buffer allocation for the firmware data was changed in
commit 43fab9793c1f ("dvb-usb: don't use stack for firmware load"),
but the same applies for the reset value.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
This patch replaces the earlier submis
The Si2141 needs two distinct commands for powerup/reset, otherwise it
will not respond to chip revision requests. It also needs a firmware
to run properly.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/tuners/si2157.c | 23 +--
d
Mygica T230 DVB-T/T2/C USB stick support. It uses the same FX2/Si2168
bridge/demodulator combo as the other devices supported by the driver,
but uses the Si2141 tuner.
Several DVB-T (MPEG2) and DVB-T2 (H.265) channels were tested, as well as
the include remote control.
Signed-off-by: Stefan Brüns
Add handling for new revision, requiring new firmware.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/media/dvb-frontends/si2168.c | 4
drivers/media/dvb-frontends/si2168_priv.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/media/dvb-fro
The required command sequence for the new tuner (Si2141) was traced from the
current Windows driver and verified with a small python script/libusb.
The changes to the Si2168 and dvbsky driver are mostly additions of the
required IDs and some glue code.
Stefan Brüns (3):
[media] si2157: Add
for the INA219.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 179 ++-
1 file changed, 158 insertions(+), 21 deletions(-)
diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c
index 326323
), and sets the config register accordingly.
Stefan Brüns (2):
iio: adc: Fix integration time/averaging for INA219/220
iio: adc: Allow setting Shunt Voltage PGA gain and Bus Voltage range
drivers/iio/adc/ina2xx-adc.c | 344 ---
1 file changed, 322 insertions
Reducing shunt and bus voltage range improves the accuracy, so allow
altering the default settings.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 165 ++-
1 file changed, 164 insertions(+), 1 de
The A64 SPI controller is compatible to the H3/H5 controller, i.e. same
registers and same queue depth.
The Pine64 exposes both controllers on the PI-2 and Euler connectors.
Tested/verified with logic analyser and spidev_test using MOSI/MISO loopback.
Stefan Brüns (2):
arm64: allwinner: a64
The A64 SPI controllers are register compatible to the h3/h5 SPI
controllers.
The A64 has two SPI controllers, each with a single chip select.
The handles for the DMA channels (23/24 for SPI0/SPI1) are omitted,
as the A64 DMA support is currently missing.
Signed-off-by: Stefan Brüns <stefan.
The two spi channels/controllers are available on the PI-2 resp. Euler
connector, enable both. Contrary to the Pi, the A64 SOC only supports
one chip select, so the second chipselect is not available (though
it can be emulated using gpio chipselect).
Signed-off-by: Stefan Brüns <stefan.
The ina2xx driver appeared in the Linux kernel version 4.5, but provided
no documentation. Contrary to other uses of resistance in IIO, ina2xx uses
microohms instead of ohms in the sysfs attribute.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Documentation/ABI/testing/sys
use of ohms for resistance in IIO, thus is added as
ina2xx specific documentation.
Stefan Brüns (2):
iio: Documentation: Add missing documentation for power attribute
iio: Documentation: Add ina2xx shunt_resistor attribute documentation
Documentation/ABI/testing/sysfs-bus-iio| 9
Commit c43a102e67db ("iio: ina2xx: add support for TI INA2xx Power Monitors")
introduced the in_powerY_raw attribute, but omitted the corresponding
documentation.
The description is correct for the INA2xx and the MAX9611 IIO drivers.
Signed-off-by: Stefan Brüns <stefan.bru...@r
comparing with
buffer_us.
Fixes: 18edac2e22f4 ("iio: adc: Fix integration time/averaging for INA219/220")
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/ad
for the INA219.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 204 ++-
1 file changed, 182 insertions(+), 22 deletions(-)
diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c
index bba10a
Flags for shared channel attributes should be set on all channels of a
channel set. I.e. SAMP_FREQUENCY and OVERSAMPLING_RATIO are set on the
in_voltage{0,1} channels, thus should be set on in_power, in_current.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/i
/
averaging from INA219/220
- changed Patch v1 1/2 (now 2/3, feedback by Jonathan Cameron):
* Use correct flags for all channels/chips
* Improve readability of chip/channel handling in if statement
- dropped Patch v1 2/2 for now
- added Patch v2 3/3
Stefan Brüns (3):
iio: adc: ina2xx
While the INA226 has a conversion ready flag (CVRF) in the R/W Mask/Enable
register with read-to-clear semantics, the corresponding bit of the INA219
(CNVR) is part of the bus voltage register. The flag is cleared by reading
the power register.
Signed-off-by: Stefan Brüns <stefan.bru...@r
The following two patches fix some trivial issues, no functional
changes:
Stefan Brüns (2):
iio: Documentation: Remove (partially) duplicate line
iio: adc: Fix bad GENMASK use, typos, whitespace
Documentation/ABI/testing/sysfs-bus-iio-meas-spec | 1 -
drivers/iio/adc/ina2xx-adc.c
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Documentation/ABI/testing/sysfs-bus-iio-meas-spec | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/ABI/testing/sysfs-bus-iio-meas-spec
b/Documentation/ABI/testing/sysfs-bus-iio-meas-spec
index 1a6265
uot;Mask/Enable") for the register number define.
Fix bad indentation for channel attributes.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/iio/adc/ina2xx-adc.c b/dr
The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with
a width of 1, 2, 4 or 8 bytes.
The register value for the the width is log2-encoded, change the
conversion function to provide the correct value for width == 8.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
ovided in config or devicetree
Stefan Brüns (10):
dmaengine: sun6i: Correct setting of clock autogating register for
A83T/H3
dmaengine: sun6i: Correct burst length field offsets for H3
dmaengine: sun6i: Restructure code to allow extension for new SoCs
dmaengine: sun6i: Enable additio
these out of the
conversion to distinct operations.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/dma/sun6i-dma.c | 66 -
1 file changed, 38 insertions(+), 28 deletions(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma
Instead of reading the value from the register on each query, store the
set value.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/light/vl6180.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/iio/light/vl6180.c b/drive
This improves code uniformity (range checks for als_gain are also done
in the setter). Also unmangle rounding and calculation of register value.
The calculated integration time it_ms is required in the next patch of
the series.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
The reported scale was only correct for the default settings of 100 ms
integration time and gain 1.
This aligns the reported scale with the behaviour of any other IIO driver
and the documented ABI, but may require userspace changes if someone uses
non-default settings.
Signed-off-by: Stefan
the register values. Use the saved values
to report the correct scale value.
v2: removed redundant parenthesis, add missing spaces
Stefan Brüns (4):
iio: light: vl6180: Move range check to integration time setter,
cleanup
iio: light: vl6180: Avoid readback of integration time register
iio: light
Instead of manually iterating the array of allowed gain values, use
find_closest. Storing the current gain setting avoids accessing the
hardware on each query.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
v2: add missing spaces
drivers/iio/light/vl6180.
of BIT(), not BIT(log2), as it must be able
to encode a width of 3 bytes.
The corollary is, it is not possible to encode either a width of 32 or
64 bytes, as the field has a size of 32 bits, and only a subset of the
controller capabilities can be exposed.
Signed-off-by: Stefan Brüns <stefan.bru...@r
The driver would happily accept buswidth of 16/32/64 bytes and program
garbage to its registers.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/dma/edma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
The A64 SoC has the same dma engine as the H3 (sun8i), with a
reduced amount of physical channels. To allow future reuse of the
compatible, leave the channel count etc. in the config data blank
and retrieve it from the devicetree.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
with a sparse port mapping.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/dma/sun6i-dma.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 245a147f718f..b5ecc9
layout defined maximum
of 32 is used.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
.../devicetree/bindings/dma/sun6i-dma.txt | 26 ++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt
b/Documen
The spi controller nodes omit the dma controller/channel references, add
it.
This does not yet enable DMA for SPI transfers, as the spi-sun6i driver
lacks support for DMA, but always uses PIO to the FIFO.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
arch/arm64/bo
it in the controller config structure.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/dma/sun6i-dma.c | 31 ++-
1 file changed, 26 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index bcd496
The A64 SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals. The last used DRQ port is 27.
Add a device node for it.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +++
1 file c
-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/dma/sun6i-dma.c | 36 +++-
1 file changed, 27 insertions(+), 9 deletions(-)
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 45bcd5271d94..a6fc066a0ac6 100644
--- a/drivers/dma/sun6i-dma.c
Preparatory patch: If the same compatible is used for different SoCs which
have a common register layout, but different number of channels, the
channel count can no longer be stored in the config. Store it in the
device structure instead.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
Instead of reading the value from the register on each query, store the
set value.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/light/vl6180.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/iio/light/vl6180.c b/drive
Instead of manually iterating the array of allowed gain values, use
find_closest. Storing the current gain setting avoids accessing the
hardware on each query.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/light/vl6180.
The reported scale was only correct for the default settings of 100 ms
integration time and gain 1.
This aligns the reported scale with the behaviour of any other IIO driver
and the documented ABI, but may require userspace changes if someone uses
non-default settings.
Signed-off-by: Stefan
This improves code uniformity (range checks for als_gain are also done
in the setter). Also unmangle rounding and calculation of register value.
The calculated integration time it_ms is required in the next patch of
the series.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
the register values. Use the saved values
to report the correct scale value.
Stefan Brüns (4):
iio: light: vl6180: Move range check to integration time setter,
cleanup
iio: light: vl6180: Avoid readback of integration time register
iio: light: vl6180: Cleanup als_gain lookup, avoid register readback
with a sparse port mapping.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v5:
- Rebase on slave-dma/next tree
Changes in v4:
- remove range checks for dma-channels/dma-requests DT properties
Changes
with the eMMC controller, as the MISO pin is
also used for the HS400 eMMC data strobe. This is only a concern if the board
uses eMMC (does not apply to the Pine64) *and* is using HS400 mode. The same
pin conflict exists for the H5.
Stefan Brüns (2):
arm64: allwinner: a64: add SPI nodes
arm64: allwinner
The A64 SPI controllers are register compatible to the h3/h5 SPI
controllers.
The A64 has two SPI controllers, each with a single chip select.
The handles for the DMA channels (23/24 for SPI0/SPI1) are omitted,
as the A64 DMA controller node is currently missing.
Signed-off-by: Stefan Brüns
The two spi channels/controllers are available on the PI-2 resp. Euler
connector, enable both. Contrary to the Pi, the A64 SOC only supports
one chip select, so the second chipselect is not available (though
it can be emulated using gpio chipselect).
Signed-off-by: Stefan Brüns <stefan.
Some small fixes for dmaengine documentation.
Stefan Brüns (2):
dmaengine: List all allowed values for src/dst_addr_width in kernel
doc
dmaengine: Mark struct dma_slave_caps kernel-doc correctly, clarify
include/linux/dmaengine.h | 30 +-
1 file changed, 17
Commit 93c6ee94c140 ("dma: Support for 3 bytes word size") and
commit 534a729866f9 ("dmaengine: Add 16 bytes, 32 bytes and 64 bytes
bus widths") added additional values for the allowed word size, but
omitted these from the struct dma_slave_config documentation.
Signed-
mentations, and cleanup
wording of the description.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
include/linux/dmaengine.h | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
in
The A64 SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals. The last used DRQ port is 27.
Add a device node for it.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v3:
- Drop leading 0 from dma controller unit name
Changes
layout defined maximum
of 32 is used.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v3:
- Drop leading 0 from unit name in DT example
Changes in v2: None
.../devicetree/bindings/dma/sun6i-dma.txt
The A64 SoC has the same dma engine as the H3 (sun8i), with a
reduced amount of physical channels. To allow future reuse of the
compatible, leave the channel count etc. in the config data blank
and retrieve it from the devicetree.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
these out of the
conversion to distinct operations.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v3: None
Changes in v2:
- Store burst lengths in config instead of device structure
drivers/dma/sun6
The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with
a width of 1, 2, 4 or 8 bytes.
The register value for the the width is log2-encoded, change the
conversion function to provide the correct value for width == 8.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Preparatory patch: If the same compatible is used for different SoCs which
have a common register layout, but different number of channels, the
channel count can no longer be stored in the config. Store it in the
device structure instead.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v3: None
Changes in v2:
- Use controller specific callback for burst length setting
drivers/dma/sun6i-dma.c | 36 +++-
1 file changed, 2
with a sparse port mapping.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v3: None
Changes in v2:
- Set default number of dma-request if not provided in config or devicetree
drivers/dma/sun6i-dma.c | 37 -
1 file changed, 36 inse
ing
- Store burst lengths in config instead of device structure
- Store burst widths in config
- Set default number of dma-request if not provided in config or devicetree
Stefan Brüns (10):
dmaengine: sun6i: Correct setting of clock autogating register for
A83T/H3
dmaengine: sun6i: Correct b
Instead of manually iterating the array of allowed gain values, use
find_closest. Storing the current gain setting avoids accessing the
hardware on each query.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v3: None
Changes in v2:
- Add missing spaces
drive
This improves code uniformity (range checks for als_gain are also done
in the setter). Also unmangle rounding and calculation of register value.
The calculated integration time it_ms is required in the next patch of
the series.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
it in the controller config structure.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v3:
- Check for callback instead of using a no-op callback
Changes in v2:
- Use callback for autogating instead
The spi controller nodes omit the dma controller/channel references, add
it.
This does not yet enable DMA for SPI transfers, as the spi-sun6i driver
lacks support for DMA, but always uses PIO to the FIFO.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v3: None
C
a uniform API to
userspace.
As the gain settings are incorporated into the raw values by the sensor
itself, adjusting of the scale attributes is not necessary.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c
Lower bits of the INA219/220 bus voltage register are conversion
status flags, properly mask the value.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/i
the default value nor
a value set from the devicetree.
Minor change: Fix comment, 1mA is 10^-3A.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
drivers/iio/adc/ina2xx-adc.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/iio/adc/
.
The third patch adds support for the INA219/220 specific bus voltage range
and shunt voltage PGA.
Stefan Brüns (3):
iio: adc: ina2xx: Mask flag bits in bus voltage register
iio: adc: ina2xx: Adhere to documented ABI, use Ohm instead of uOhm
iio: adc: ina2xx: Allow setting Shunt Voltage
The spi controller nodes omit the dma controller/channel references, add
it.
This does not yet enable DMA for SPI transfers, as the spi-sun6i driver
lacks support for DMA, but always uses PIO to the FIFO.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v4: None
C
The A64 SoC has the same dma engine as the H3 (sun8i), with a
reduced amount of physical channels. To allow future reuse of the
compatible, leave the channel count etc. in the config data blank
and retrieve it from the devicetree.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
layout defined maximum
of 32 is used.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v4: None
Changes in v3:
- Drop leading 0 from unit name in DT example
Changes in v2: None
.../devicetree/bindings/dma/s
The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with
a width of 1, 2, 4 or 8 bytes.
The register value for the the width is log2-encoded, change the
conversion function to provide the correct value for width == 8.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
with a sparse port mapping.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v4:
- remove range checks for dma-channels/dma-requests DT properties
Changes in v3: None
Changes in v2:
- Set default number of
Unit-names must not start with a leading 0.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v4:
- Split minor fix in devicetree example from patch 6/10
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/dma/sun6i-dma.txt | 2 +-
1 file c
The A64 SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals. The last used DRQ port is 27.
Add a device node for it.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
---
Changes in v4: None
Changes in v3:
- Drop leading 0 from dma controlle
Preparatory patch: If the same compatible is used for different SoCs which
have a common register layout, but different number of channels, the
channel count can no longer be stored in the config. Store it in the
device structure instead.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen
e controller specific callback for burst length setting
- Store burst lengths in config instead of device structure
- Store burst widths in config
- Set default number of dma-request if not provided in config or devicetree
Stefan Brüns (11):
dmaengine: sun6i: Correct setting of clock autog
it in the controller config structure.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v4:
- Correct callback function signature, pass pointer to controller
- sun6i_dma_dev refers to sun6i_dma_con
-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v4:
- Pass reference to config instead of config itself
- Fix config initialization
Changes in v3: None
Changes in v2:
- Use controller specific callback for burst le
these out of the
conversion to distinct operations.
Signed-off-by: Stefan Brüns <stefan.bru...@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
Changes in v4:
- Fix config initialization
Changes in v3: None
Changes in v2:
- Store burst lengths in config inste
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