, pcie4
pcie2 x1 (option1): pcie0
pcie2 x1 (option2): pcie2
usb3 port 0:pcie0
usb3 port 1 (option 1): pcie1
usb3 port 1 (option 2): sata0
sata: sata0
Acked-by: Stephen Warren
I didn't check the actual lists of values, but it sounds about right
from memory
, pcie4
pcie2 x1 (option1): pcie0
pcie2 x1 (option2): pcie2
usb3 port 0:pcie0
usb3 port 1 (option 1): pcie1
usb3 port 1 (option 2): sata0
sata: sata0
Acked-by: Stephen Warren <swar...@nvidia.com>
I didn't check the actual lists of values, but it sounds
On 10/21/2015 06:15 AM, Thierry Reding wrote:
On Mon, Oct 19, 2015 at 05:30:42PM -0600, Stephen Warren wrote:
From: Stephen Warren
Convert the binding to provide a PHY per lane, rather than a PHY per
"pad" block in the hardware. This will allow the driver to easily know
which lane
On 10/21/2015 06:15 AM, Thierry Reding wrote:
On Mon, Oct 19, 2015 at 05:30:42PM -0600, Stephen Warren wrote:
From: Stephen Warren <swar...@nvidia.com>
Convert the binding to provide a PHY per lane, rather than a PHY per
"pad" block in the hardware. This will allow the drive
On 10/20/2015 12:02 PM, Jon Hunter wrote:
On 20/10/15 17:08, Stephen Warren wrote:
On 10/20/2015 05:28 AM, Jon Hunter wrote:
On 16/10/15 17:17, Stephen Warren wrote:
On 10/16/2015 03:24 AM, Jon Hunter wrote:
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the
Tegra124
On 10/20/2015 05:28 AM, Jon Hunter wrote:
On 16/10/15 17:17, Stephen Warren wrote:
On 10/16/2015 03:24 AM, Jon Hunter wrote:
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the
Tegra124
documentation implies that all functions (pcie, usb3 and sata) can be
muxed onto to all lanes
On 10/20/2015 04:10 AM, Jon Hunter wrote:
On 20/10/15 00:30, Stephen Warren wrote:
From: Stephen Warren
Convert the binding to provide a PHY per lane, rather than a PHY per
"pad" block in the hardware. This will allow the driver to easily know
which lanes are used by clients, and
On 10/20/2015 12:02 PM, Jon Hunter wrote:
On 20/10/15 17:08, Stephen Warren wrote:
On 10/20/2015 05:28 AM, Jon Hunter wrote:
On 16/10/15 17:17, Stephen Warren wrote:
On 10/16/2015 03:24 AM, Jon Hunter wrote:
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the
Tegra124
On 10/20/2015 04:10 AM, Jon Hunter wrote:
On 20/10/15 00:30, Stephen Warren wrote:
From: Stephen Warren <swar...@nvidia.com>
Convert the binding to provide a PHY per lane, rather than a PHY per
"pad" block in the hardware. This will allow the driver to easily know
whic
On 10/20/2015 05:28 AM, Jon Hunter wrote:
On 16/10/15 17:17, Stephen Warren wrote:
On 10/16/2015 03:24 AM, Jon Hunter wrote:
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the
Tegra124
documentation implies that all functions (pcie, usb3 and sata) can be
muxed onto to all lanes
From: Stephen Warren
Convert the binding to provide a PHY per lane, rather than a PHY per
"pad" block in the hardware. This will allow the driver to easily know
which lanes are used by clients, and thus only enable those lanes, and
generally better aligns with the fact the ha
On 10/19/2015 08:56 AM, Kishon Vijay Abraham I wrote:
Hi,
On Saturday 17 October 2015 12:47 AM, Stephen Warren wrote:
Kishon,
I wanted to confirm a few aspects about the PHY subsystem in Linux, and
also the DT representation of PHYs. Mainly I'd like to understand
whether an individual PHY
On 10/19/2015 05:22 AM, Jon Hunter wrote:
On 16/10/15 17:09, Stephen Warren wrote:
On 10/16/2015 01:35 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation
From: Stephen Warren <swar...@nvidia.com>
Convert the binding to provide a PHY per lane, rather than a PHY per
"pad" block in the hardware. This will allow the driver to easily know
which lanes are used by clients, and thus only enable those lanes, and
generally better alig
On 10/19/2015 08:56 AM, Kishon Vijay Abraham I wrote:
Hi,
On Saturday 17 October 2015 12:47 AM, Stephen Warren wrote:
Kishon,
I wanted to confirm a few aspects about the PHY subsystem in Linux, and
also the DT representation of PHYs. Mainly I'd like to understand
whether an individual PHY
On 10/19/2015 05:22 AM, Jon Hunter wrote:
On 16/10/15 17:09, Stephen Warren wrote:
On 10/16/2015 01:35 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation
Kishon,
I wanted to confirm a few aspects about the PHY subsystem in Linux, and
also the DT representation of PHYs. Mainly I'd like to understand
whether an individual PHY represents a single "lane" of traffic, or the
whole set of lanes related to a particular IO controller or "port" of an
On 10/16/2015 03:24 AM, Jon Hunter wrote:
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the Tegra124
documentation implies that all functions (pcie, usb3 and sata) can be
muxed onto to all lanes (pcie lanes 0-4 and sata lane 0). However, it has
been confirmed that this is not the
On 10/16/2015 01:35 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation/devicetree/bindings/dma/tegra210-adma.txt
+Required properties:
+-
Kishon,
I wanted to confirm a few aspects about the PHY subsystem in Linux, and
also the DT representation of PHYs. Mainly I'd like to understand
whether an individual PHY represents a single "lane" of traffic, or the
whole set of lanes related to a particular IO controller or "port" of an
On 10/16/2015 01:35 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation/devicetree/bindings/dma/tegra210-adma.txt
+Required properties:
+-
On 10/16/2015 03:24 AM, Jon Hunter wrote:
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the Tegra124
documentation implies that all functions (pcie, usb3 and sata) can be
muxed onto to all lanes (pcie lanes 0-4 and sata lane 0). However, it has
been confirmed that this is not the
On 10/11/2015 06:39 AM, Stefan Wahren wrote:
Am 09.10.2015 um 23:27 schrieb Eric Anholt:
This is a respin of the Raspberry Pi KMS series. Now that we've got a
real clock driver, I can actually set new video modes. Also in this
version, most of the custom DT stuff from before is gone, thanks
On 10/12/2015 07:55 AM, Jon Hunter wrote:
On 09/10/15 16:26, Stephen Warren wrote:
On 10/09/2015 04:20 AM, Jon Hunter wrote:
On 08/10/15 15:27, Stephen Warren wrote:
On 10/08/2015 03:58 AM, Jon Hunter wrote:
[snip]
That's fine. From my perspective I don't have a strong objection either
On 10/12/2015 07:55 AM, Jon Hunter wrote:
On 09/10/15 16:26, Stephen Warren wrote:
On 10/09/2015 04:20 AM, Jon Hunter wrote:
On 08/10/15 15:27, Stephen Warren wrote:
On 10/08/2015 03:58 AM, Jon Hunter wrote:
[snip]
That's fine. From my perspective I don't have a strong objection either
On 10/11/2015 06:39 AM, Stefan Wahren wrote:
Am 09.10.2015 um 23:27 schrieb Eric Anholt:
This is a respin of the Raspberry Pi KMS series. Now that we've got a
real clock driver, I can actually set new video modes. Also in this
version, most of the custom DT stuff from before is gone, thanks
On 10/09/2015 04:20 AM, Jon Hunter wrote:
On 08/10/15 15:27, Stephen Warren wrote:
On 10/08/2015 03:58 AM, Jon Hunter wrote:
[snip]
That's fine. From my perspective I don't have a strong objection either
way, however, I can see that given that the name indicates rx or tx
On 10/09/2015 04:20 AM, Jon Hunter wrote:
On 08/10/15 15:27, Stephen Warren wrote:
On 10/08/2015 03:58 AM, Jon Hunter wrote:
[snip]
That's fine. From my perspective I don't have a strong objection either
way, however, I can see that given that the name indicates rx or tx
ackwards compatibility with old device tree files.
Acked-by: Stephen Warren
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On 10/08/2015 03:58 AM, Jon Hunter wrote:
On 07/10/15 20:36, Stephen Warren wrote:
On 10/07/2015 10:19 AM, Jon Hunter wrote:
On 07/10/15 17:09, Stephen Warren wrote:
On 10/07/2015 02:43 AM, Jon Hunter wrote:
On 07/10/15 00:04, Stephen Warren wrote:
On 10/05/2015 06:10 AM, Jon Hunter
On 10/08/2015 03:58 AM, Jon Hunter wrote:
On 07/10/15 20:36, Stephen Warren wrote:
On 10/07/2015 10:19 AM, Jon Hunter wrote:
On 07/10/15 17:09, Stephen Warren wrote:
On 10/07/2015 02:43 AM, Jon Hunter wrote:
On 07/10/15 00:04, Stephen Warren wrote:
On 10/05/2015 06:10 AM, Jon Hunter
ackwards compatibility with old device tree files.
Acked-by: Stephen Warren <swar...@wwwdotorg.org>
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Please read the FAQ at http://www.tux.org/lkml/
On 10/07/2015 10:19 AM, Jon Hunter wrote:
On 07/10/15 17:09, Stephen Warren wrote:
On 10/07/2015 02:43 AM, Jon Hunter wrote:
On 07/10/15 00:04, Stephen Warren wrote:
On 10/05/2015 06:10 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller
On 10/07/2015 02:43 AM, Jon Hunter wrote:
On 07/10/15 00:04, Stephen Warren wrote:
On 10/05/2015 06:10 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation
On 10/07/2015 09:26 AM, Jon Hunter wrote:
On 06/10/15 23:57, Stephen Warren wrote:
On 10/06/2015 03:16 AM, Jon Hunter wrote:
On 05/10/15 14:12, Mark Rutland wrote:
On Mon, Oct 05, 2015 at 01:10:06PM +0100, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
On 10/07/2015 10:19 AM, Jon Hunter wrote:
On 07/10/15 17:09, Stephen Warren wrote:
On 10/07/2015 02:43 AM, Jon Hunter wrote:
On 07/10/15 00:04, Stephen Warren wrote:
On 10/05/2015 06:10 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller
On 10/07/2015 09:26 AM, Jon Hunter wrote:
On 06/10/15 23:57, Stephen Warren wrote:
On 10/06/2015 03:16 AM, Jon Hunter wrote:
On 05/10/15 14:12, Mark Rutland wrote:
On Mon, Oct 05, 2015 at 01:10:06PM +0100, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
On 10/07/2015 02:43 AM, Jon Hunter wrote:
On 07/10/15 00:04, Stephen Warren wrote:
On 10/05/2015 06:10 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation
On 10/06/2015 07:25 PM, Eric Anholt wrote:
> This adds support for enabling, disabling, and setting the rate of the
> audio domain clocks. It will be necessary for setting the pixel clock
> for HDMI in the VC4 driver and let us write a cpufreq driver. It will
> also improve compatibility with
On 10/05/2015 06:10 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation/devicetree/bindings/dma/tegra210-adma.txt
+- #dma-cells : Must be <2>. The first cell
On 10/06/2015 03:16 AM, Jon Hunter wrote:
On 05/10/15 14:12, Mark Rutland wrote:
On Mon, Oct 05, 2015 at 01:10:06PM +0100, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
Signed-off-by: Jon Hunter
---
On 10/06/2015 07:25 PM, Eric Anholt wrote:
> This adds support for enabling, disabling, and setting the rate of the
> audio domain clocks. It will be necessary for setting the pixel clock
> for HDMI in the VC4 driver and let us write a cpufreq driver. It will
> also improve compatibility with
On 10/06/2015 03:16 AM, Jon Hunter wrote:
On 05/10/15 14:12, Mark Rutland wrote:
On Mon, Oct 05, 2015 at 01:10:06PM +0100, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
Signed-off-by: Jon Hunter
---
On 10/05/2015 06:10 AM, Jon Hunter wrote:
Add device-tree binding documentation for the Tegra210 Audio DMA
controller.
diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt
b/Documentation/devicetree/bindings/dma/tegra210-adma.txt
+- #dma-cells : Must be <2>. The first cell
On 09/28/2015 01:26 PM, Eric Anholt wrote:
Stephen Warren writes:
On 09/10/2015 03:22 PM, Eric Anholt wrote:
These will be used for enabling UART1, SPI1, and SPI2.
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
+ aux_clocks: aux-clocks
On 09/28/2015 01:26 PM, Eric Anholt wrote:
Stephen Warren <swar...@wwwdotorg.org> writes:
On 09/10/2015 03:22 PM, Eric Anholt wrote:
These will be used for enabling UART1, SPI1, and SPI2.
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm283
On 09/10/2015 03:22 PM, Eric Anholt wrote:
> These will be used for enabling UART1, SPI1, and SPI2.
> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
> + aux_clocks: aux-clocks@0x7e215004 {
> + compatible = "brcm,bcm2835-aux-clock";
>
On 09/10/2015 03:22 PM, Eric Anholt wrote:
> These will be used for enabling UART1, SPI1, and SPI2.
Patches 1, 3,
Acked-by: Stephen Warren
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On 09/10/2015 03:22 PM, Eric Anholt wrote:
> There are a pair of SPI masters and a mini UART that were last minute
> additions. As a result, they didn't get integrated in the same way as
> the other gates off of the VPU clock in CPRMAN.
> diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c
>
now have a correct
> clock rate if the user configures the boot-time core clock speed using
> config.txt.
Acked-by: Stephen Warren
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On 09/10/2015 02:58 PM, Eric Anholt wrote:
> Previously we've only supported a few fixed clocks based on
> assumptions about how the firmware sets up the clocks, but this
> binding will let us control the actual (audio power domain) clock
> manager.
Patches 1 and 2,
Acked-by: St
On 09/10/2015 02:58 PM, Eric Anholt wrote:
> This adds support for enabling, disabling, and setting the rate of the
> audio domain clocks. It will be necessary for setting the pixel clock
> for HDMI in the VC4 driver and let us write a cpufreq driver. It will
> also improve compatibility with
On 09/10/2015 03:22 PM, Eric Anholt wrote:
> There are a pair of SPI masters and a mini UART that were last minute
> additions. As a result, they didn't get integrated in the same way as
> the other gates off of the VPU clock in CPRMAN.
> diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c
>
On 09/10/2015 03:22 PM, Eric Anholt wrote:
> These will be used for enabling UART1, SPI1, and SPI2.
Patches 1, 3,
Acked-by: Stephen Warren <swar...@wwwdotorg.org>
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On 09/10/2015 02:58 PM, Eric Anholt wrote:
> This adds support for enabling, disabling, and setting the rate of the
> audio domain clocks. It will be necessary for setting the pixel clock
> for HDMI in the VC4 driver and let us write a cpufreq driver. It will
> also improve compatibility with
now have a correct
> clock rate if the user configures the boot-time core clock speed using
> config.txt.
Acked-by: Stephen Warren <swar...@wwwdotorg.org>
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On 09/10/2015 03:22 PM, Eric Anholt wrote:
> These will be used for enabling UART1, SPI1, and SPI2.
> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
> + aux_clocks: aux-clocks@0x7e215004 {
> + compatible = "brcm,bcm2835-aux-clock";
>
On 09/10/2015 02:58 PM, Eric Anholt wrote:
> Previously we've only supported a few fixed clocks based on
> assumptions about how the firmware sets up the clocks, but this
> binding will let us control the actual (audio power domain) clock
> manager.
Patches 1 and 2,
Acked-by: Stephen
On 09/17/2015 11:21 AM, Andrew F. Davis wrote:
>
>
> On 09/17/2015 12:20 PM, Rob Herring wrote:
>> On Thu, Sep 17, 2015 at 10:53 AM, Andrew F. Davis wrote:
>>> On 09/16/2015 08:26 PM, Rob Herring wrote:
On Wed, Sep 16, 2015 at 4:07 PM, Andrew F. Davis wrote:
>
> Hello all,
On 09/17/2015 11:21 AM, Andrew F. Davis wrote:
>
>
> On 09/17/2015 12:20 PM, Rob Herring wrote:
>> On Thu, Sep 17, 2015 at 10:53 AM, Andrew F. Davis wrote:
>>> On 09/16/2015 08:26 PM, Rob Herring wrote:
On Wed, Sep 16, 2015 at 4:07 PM, Andrew F. Davis wrote:
On 09/04/2015 01:26 AM, Martin Sperl wrote:
>
>> On 26.08.2015, at 03:44, Stephen Warren wrote:
>>
>> On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
>>
>>> +Example:
>>> +
>>> +aux_enable: aux_enable@0x7e215004 {
>>> +
On 08/28/2015 11:27 AM, Simon Glass wrote:
> Hi Rob,
>
> On 25 August 2015 at 10:22, Rob Herring wrote:
>> On Sat, Aug 15, 2015 at 8:46 AM, Simon Glass wrote:
>>> Hi Rob,
>>>
>>> On 14 August 2015 at 14:29, Rob Herring wrote:
On Fri, Aug 14, 2015 at 1:34 PM, Simon Glass wrote:
>
On 08/28/2015 11:27 AM, Simon Glass wrote:
> Hi Rob,
>
> On 25 August 2015 at 10:22, Rob Herring wrote:
>> On Sat, Aug 15, 2015 at 8:46 AM, Simon Glass wrote:
>>> Hi Rob,
>>>
>>> On 14 August 2015 at 14:29, Rob Herring wrote:
On 09/04/2015 01:26 AM, Martin Sperl wrote:
>
>> On 26.08.2015, at 03:44, Stephen Warren <swar...@wwwdotorg.org> wrote:
>>
>> On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
>>
>>> +Example:
>>> +
>>> +aux_enable: aux_enable@0x7e2
On 08/18/2015 03:54 PM, Eric Anholt wrote:
> VC4 is the GPU (display and 3D) present on the 2835.
This patch and patch 1 seem OK to me, although I'll withhold any ack
until the DT binding design discussion with Rob has been resolved. I
haven't looked at the OF graph bindings he mentioned so have
On 08/18/2015 03:54 PM, Eric Anholt wrote:
> We need to use it for getting video modes over HDMI.
This patch,
Acked-by: Stephen Warren
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On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
> From: Martin Sperl
Patch description?
> arch/arm/configs/bcm2835_defconfig |1 +
> drivers/spi/Kconfig| 12 +
> drivers/spi/Makefile |1 +
> drivers/spi/spi-bcm2835aux.c | 506
>
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
> From: Martin Sperl
>
> The bcm2835 SOC contains 3 auxiliar devices (spi1, spi2 and uart1)
> that all are enabled via a shared register.
>
> To serialize access to this shared register this soc-driver
> is created that implements:
>
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
> From: Martin Sperl
Patch description?
> diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
> b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
> +Required properties:
> +- compatible: Should be
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
> From: Martin Sperl
Patch description?
> diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
> b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
> +Required properties:
> +- compatible: Should be
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
From: Martin Sperl ker...@martin.sperl.org
Patch description?
diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
+Required properties:
+-
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
From: Martin Sperl ker...@martin.sperl.org
Patch description?
diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
+Required properties:
+-
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
From: Martin Sperl ker...@martin.sperl.org
The bcm2835 SOC contains 3 auxiliar devices (spi1, spi2 and uart1)
that all are enabled via a shared register.
To serialize access to this shared register this soc-driver
is created that
On 08/24/2015 02:40 AM, ker...@martin.sperl.org wrote:
From: Martin Sperl ker...@martin.sperl.org
Patch description?
arch/arm/configs/bcm2835_defconfig |1 +
drivers/spi/Kconfig| 12 +
drivers/spi/Makefile |1 +
drivers/spi/spi-bcm2835aux.c |
On 08/18/2015 03:54 PM, Eric Anholt wrote:
VC4 is the GPU (display and 3D) present on the 2835.
This patch and patch 1 seem OK to me, although I'll withhold any ack
until the DT binding design discussion with Rob has been resolved. I
haven't looked at the OF graph bindings he mentioned so have
On 08/18/2015 03:54 PM, Eric Anholt wrote:
We need to use it for getting video modes over HDMI.
This patch,
Acked-by: Stephen Warren swar...@wwwdotorg.org
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On 08/12/2015 06:56 PM, Eric Anholt wrote:
> Signed-off-by: Eric Anholt
Patch description?
> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
> arm-pmu {
> compatible = "arm,arm1176-pmu";
> };
> +
> +
On 08/12/2015 06:56 PM, Eric Anholt wrote:
> We need to use it for getting video modes over HDMI.
> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
> + i2c2: i2c@7e805000 {
> + compatible = "brcm,bcm2835-i2c";
> +
On 08/12/2015 06:56 PM, Eric Anholt wrote:
> This is the start of a full VC4 driver. Right now this just supports
> configuring the display using a pre-existing video mode (because
> changing the pixel clock isn't available yet, and doesn't work when it
> is). However, this is enough for fbcon
On 08/12/2015 06:56 PM, Eric Anholt wrote:
> diff --git a/MAINTAINERS b/MAINTAINERS
> +DRM DRIVERS FOR VC4
> +M: Eric Anholt
> +T: git git://github.com/anholt/linux
> +S: Maintained
> +F: drivers/gpu/drm/vc4/*
S: Supported
?
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On 08/12/2015 06:56 PM, Eric Anholt wrote:
> Signed-off-by: Eric Anholt
This one definitely needs a patch description, since someone might not
know what a VC4 is, and "git log" won't show the text from the binding
doc itself. I'd suggest adding the initial paragraph of the binding doc
as the
On 08/13/2015 05:05 PM, Eric Anholt wrote:
> Unfortunately, the clock manager's registers are not accessible by the
> ARM, so we have to request that the firmware modify our clocks for us.
>
> This driver only registers the clocks at the point they are requested
> by a client driver. This is
but just a background note: DT node names
usually contain a device type not a device identity, so "clocks" not
"firmware-clocks" would be typical.
This patch,
Acked-by: Stephen Warren
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On 08/12/2015 07:21 AM, Simon Glass wrote:
> Hi Lucas,
>
> On 11 August 2015 at 11:05, Lucas Stach wrote:
>> Hi Simon,
>>
>> why did you send this to the Tegra ML?
>>
>> Am Dienstag, den 11.08.2015, 08:25 -0600 schrieb Simon Glass:
>>> This updates the device tree from the kernel version to
On 08/12/2015 06:56 PM, Eric Anholt wrote:
diff --git a/MAINTAINERS b/MAINTAINERS
+DRM DRIVERS FOR VC4
+M: Eric Anholt e...@anholt.net
+T: git git://github.com/anholt/linux
+S: Maintained
+F: drivers/gpu/drm/vc4/*
S: Supported
?
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On 08/12/2015 06:56 PM, Eric Anholt wrote:
Signed-off-by: Eric Anholt e...@anholt.net
This one definitely needs a patch description, since someone might not
know what a VC4 is, and git log won't show the text from the binding
doc itself. I'd suggest adding the initial paragraph of the binding
On 08/12/2015 06:56 PM, Eric Anholt wrote:
Signed-off-by: Eric Anholt e...@anholt.net
Patch description?
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
arm-pmu {
compatible = arm,arm1176-pmu;
};
+
+
On 08/12/2015 06:56 PM, Eric Anholt wrote:
We need to use it for getting video modes over HDMI.
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
+ i2c2: i2c@7e805000 {
+ compatible = brcm,bcm2835-i2c;
+ reg =
: DT node names
usually contain a device type not a device identity, so clocks not
firmware-clocks would be typical.
This patch,
Acked-by: Stephen Warren swar...@wwwdotorg.org
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On 08/12/2015 07:21 AM, Simon Glass wrote:
Hi Lucas,
On 11 August 2015 at 11:05, Lucas Stach d...@lynxeye.de wrote:
Hi Simon,
why did you send this to the Tegra ML?
Am Dienstag, den 11.08.2015, 08:25 -0600 schrieb Simon Glass:
This updates the device tree from the kernel version to
On 08/13/2015 05:05 PM, Eric Anholt wrote:
Unfortunately, the clock manager's registers are not accessible by the
ARM, so we have to request that the firmware modify our clocks for us.
This driver only registers the clocks at the point they are requested
by a client driver. This is
On 08/12/2015 06:56 PM, Eric Anholt wrote:
This is the start of a full VC4 driver. Right now this just supports
configuring the display using a pre-existing video mode (because
changing the pixel clock isn't available yet, and doesn't work when it
is). However, this is enough for fbcon and
On 08/11/2015 11:05 AM, Lucas Stach wrote:
Hi Simon,
why did you send this to the Tegra ML?
At my request, so that the DT changes could be reviewed by the kernel DT
reviewers and added to the copy of the DT files in the kernel source
tree if approved.
My assertion is that DT content
On 08/11/2015 11:05 AM, Lucas Stach wrote:
Hi Simon,
why did you send this to the Tegra ML?
At my request, so that the DT changes could be reviewed by the kernel DT
reviewers and added to the copy of the DT files in the kernel source
tree if approved.
My assertion is that DT content
he common clock binding:
>>>> +Documentation/devicetree/bindings/clock/clock-bindings.txt
>>>> +
>>>> +Required properties:
>>>> +- compatible: Should be "raspberrypi,bcm2835-firmware-clocks"
>>>> +
>>>>
in
+include/dt-bindings/clk/raspberrypi.h.
+
+- raspberrypi,firmware: Phandle to the firmware driver node.
I think 'firmware' is a candidate for a generic phandle name.
Stephen Warren asked in the last version that I change it from
firmware to raspberrypi,firmware, which made sense to me since
On 07/22/2015 12:17 PM, Eric Anholt wrote:
> Stephen Warren writes:
>
>> On 07/13/2015 07:35 PM, Eric Anholt wrote:
>>> The BCM2836 (Raspberry Pi 2) uses two levels of interrupt
>>> handling with the CPU-local interrupts being the root, so we
>>> need to re
On 07/22/2015 08:07 AM, Noralf Trønnes wrote:
>
> Den 18.06.2015 04:26, skrev Stephen Warren:
>> On 06/12/2015 11:26 AM, Noralf Trønnes wrote:
>>> Add a duplicate irq range with an offset on the hwirq's so the
>>> driver can detect that enable_fiq() is used.
>>
On 07/22/2015 08:07 AM, Noralf Trønnes wrote:
Den 18.06.2015 04:26, skrev Stephen Warren:
On 06/12/2015 11:26 AM, Noralf Trønnes wrote:
Add a duplicate irq range with an offset on the hwirq's so the
driver can detect that enable_fiq() is used.
Tested with downstream dwc_otg USB controller
On 07/22/2015 12:17 PM, Eric Anholt wrote:
Stephen Warren swar...@wwwdotorg.org writes:
On 07/13/2015 07:35 PM, Eric Anholt wrote:
The BCM2836 (Raspberry Pi 2) uses two levels of interrupt
handling with the CPU-local interrupts being the root, so we
need to register ours as chained off
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