On 04/04/2013 03:05 AM, Prashant Gaikwad wrote:
Use common of_clk_init() function for clocks initialization.
Signed-off-by: Prashant Gaikwad pgaik...@nvidia.com
---
Stephen, if T114 clock series is not going to make in 3.10 then I would
like Mike to take this patch. If T114 clock series
On 04/03/2013 01:47 PM, Linus Walleij wrote:
From: Laurent Meunier laurent.meun...@st.com
This update adds a debugfs interface to modify a pin configuration
for a given state in the pinctrl map. This allows to modify the
configuration for a non-active state, typically sleep state.
This
On 04/03/2013 08:45 AM, Thierry Reding wrote:
Move the PCIe driver from arch/arm/mach-tegra into the drivers/pci/host
directory. The motivation is to collect various host controller drivers
in the same location in order to facilitate refactoring.
The Tegra PCIe driver has been largely
On 04/04/2013 03:28 PM, Stephen Warren wrote:
On 04/03/2013 08:45 AM, Thierry Reding wrote:
Move the PCIe driver from arch/arm/mach-tegra into the drivers/pci/host
directory. The motivation is to collect various host controller drivers
in the same location in order to facilitate refactoring
On 04/04/2013 03:05 AM, Prashant Gaikwad wrote:
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.
I've applied this, split into the two patches I just posted.
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On 04/03/2013 08:40 AM, Peter De Schrijver wrote:
This is the nineth version of the Tegra114 clockframework. It is based on the
next-20130320-fixed branch of ...
I have applied this series to Tegra's for-3.10/clk branch, with patch
10/14 replaced by v9b.
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On 04/04/2013 05:17 PM, Rob Herring wrote:
On 04/03/2013 06:34 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
The recent dtc+cpp support allows header files and C pre-processor
defines/macros to be used when compiling device tree files. These
headers will typically define
/swarren/linux-tegra.git
tegra-for-3.10-dtc-cpp-chroot-std-headers
for you to fetch changes up to 4be505d4fc7a07371a2b658469ca1dda3ca3:
ARM: dt: create a DT header for the GIC
Stephen Warren (7):
kbuild: create
On 04/05/2013 01:37 PM, Simon Glass wrote:
HI Wolfram,
On Wed, Apr 3, 2013 at 12:19 PM, Wolfram Sang w...@the-dreams.de wrote:
Doug,
Separately from a discussion of the technical merits, I'd say that
this patch is needed because the Embedded Controller (EC) on the ARM
Chromebook shipped
On 04/08/2013 06:01 AM, Mark Brown wrote:
On Mon, Apr 08, 2013 at 12:24:22PM +0200, Paul Bolle wrote:
0) This patch ended up as mainline commit
bc8ce4afd7ee7e1421c935d24b1f879f82afdd4e, which is part of
v3.9-rc6.
Numbering your paragraphs and using full commit IDs like this
doesn't help
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
- Enable pcie root port 2 for cardhu
- Make private data structure for each SOC
- Add required tegra3 clocks and regulators
- Add tegra3 specific code in enable controller
- Modify clock tree to get
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
- Enable pcie root port 2 for cardhu
- Make private data structure for each SOC
- Add required tegra3 clocks and regulators
- Add tegra3 specific code in enable controller
- Modify clock tree to get
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
Your s-o-b line should be below the patch description, not above it.
Please see Documentation/SubmittingPatches.
I also don't see a --- line between the patch description and diffstat.
How are you
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
- Add PCIe node entry for cardhu
- Enable only root port 2
- Initialize regulators required for tegra30
Initialize isn't correct; this change makes no changes to any regulator;
it simply includes the
On 04/08/2013 03:48 PM, Al Viro wrote:
On Mon, Apr 08, 2013 at 10:23:27PM +0100, Al Viro wrote:
On Mon, Apr 08, 2013 at 03:52:08PM -0500, Nathan Zimmer wrote:
Further digging seems to indicate 9984d7394618df9, the one right
after the commit I previously identified.
Not sure what I did wrong
On 04/08/2013 05:06 PM, Al Viro wrote:
On Mon, Apr 08, 2013 at 03:45:31PM -0700, Doug Anderson wrote:
Hi,
On Mon, Apr 8, 2013 at 3:17 PM, Stephen Warren swar...@wwwdotorg.org wrote:
Anyway, I've just pushed a splitup of that commit (carved in 3 pieces)
into vfs.git#pipe-splitup; could you
On 04/09/2013 02:30 AM, Peter De Schrijver wrote:
On Mon, Apr 08, 2013 at 08:27:00PM +0200, Stephen Warren wrote:
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
Your s-o-b line should be below the patch description, not above it.
Please see
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
- Enable pcie root port 2 for cardhu
- Make private data structure for each SOC
- Add required tegra3 clocks and regulators
- Add tegra3 specific code in enable controller
- Modify clock tree to get
On 04/10/2013 05:48 AM, Laxman Dewangan wrote:
Nvidia Tegra114 has the new spi controller whose driver
is not compatible with older SoCs. The new driver is added
for Tegra114 spi controller.
These 2, and the other 2 KBC patches you posted, all look reasonable.
They'll have to wait until 3.11
On 04/05/2013 12:03 AM, Thierry Reding wrote:
On Thu, Apr 04, 2013 at 03:30:01PM -0600, Stephen Warren wrote:
On 04/04/2013 03:28 PM, Stephen Warren wrote:
On 04/03/2013 08:45 AM, Thierry Reding wrote:
Move the PCIe driver from arch/arm/mach-tegra into the
drivers/pci/host directory
On 04/05/2013 01:37 AM, Thierry Reding wrote:
On Thu, Apr 04, 2013 at 03:28:54PM -0600, Stephen Warren wrote:
[...]
diff --git
a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+Required properties
On 04/10/2013 10:46 PM, Li Haifeng wrote:
2013/4/10 Stephen Warren swar...@wwwdotorg.org:
On 04/10/2013 03:35 AM, Li Haifeng wrote:
Hi, everyone.
Recently, I try to run kdump on pandaboard ES with omap4460. After
load capture kernel by kexec -l and execute kexec -e, the serial
port output
On 04/12/2013 04:45 AM, Will Deacon wrote:
...
Back to the SMP point: Stephen, did you ever get anywhere with that
disable_nonboot_cpus thread from a few months back? I'm still keen to get
that working, and I *thought* we had a potential solution...
No, I've been side-tracked on too many other
On 04/12/2013 08:58 AM, Jay Agarwal wrote:
err = regulator_disable(pcie-pex_clk_supply);
if (err 0)
- dev_err(pcie-dev, failed to disable pex-clk regulator:
%d\n,
+ dev_warn(pcie-dev, failed to disable pex-clk regulator:
%d\n,
err);
err
On 04/12/2013 10:43 AM, Jay Agarwal wrote:
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
- Enable pcie root port 2 for cardhu
- Make private data structure for each SOC
- Add required tegra3 clocks and regulators
- Add tegra3 specific code in
On 04/12/2013 11:06 AM, Jay Agarwal wrote:
On 04/12/2013 10:43 AM, Jay Agarwal wrote:
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
Signed-off-by: Jay Agarwal jagar...@nvidia.com
- Enable pcie root port 2 for cardhu
- Make private data structure for each SOC
- Add required tegra3 clocks and
On 04/12/2013 01:40 AM, Vineet Gupta wrote:
On 04/09/2013 07:40 PM, Vineet Gupta wrote:
On 04/04/2013 11:06 PM, Stephen Warren wrote:
+.SECONDARY: $(obj)/%.dtb.S
+
$(obj)/%.dtb.S: $(obj)/%.dtb
$(call cmd,dt_S_dtb)
and no longer see make rm'ing the .dtb.S file. So, the .SECONDARY
On 03/28/2013 11:34 AM, Richard GENOUD wrote:
On [mer., 27.03.2013 17:55:45], Stephen Warren wrote:
On 03/25/2013 08:47 AM, Richard Genoud wrote:
If a new state is applied, the groups configured in the old state but
not in the new state are disabled.
If something goes wrong and the new state
On 03/28/2013 11:11 AM, Bibek Basu wrote:
From: Pritesh Raithatha praitha...@nvidia.com
This patch adds suspend and resume callbacks to the pinctrl-tegra driver.
Based on work by:
Pritesh Raithatha praitha...@nvidia.com
Those two lines are somewhat implied by the fact the commit's git
On 03/21/2013 12:23 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
The current use-case for fixdep is: a source file is run through a single
processing step, which creates a single dependency file as a side-effect,
which fixdep transforms into the file used by the kernel
On 03/28/2013 04:01 PM, Mike Turquette wrote:
Quoting Colin Cross (2013-03-21 17:06:25)
On Thu, Mar 21, 2013 at 3:36 PM, Mike Turquette mturque...@linaro.org
wrote:
To my knowledge, devfreq performs one task: implements an algorithm
(typically one that loops/polls) and applies this heuristic
On 03/29/2013 03:03 AM, Richard Genoud wrote:
As Stephen Warren pointed out, pinctrl_free_setting() was called instead
of pinmux_disable_setting() on error.
In this error code, we want to call pinmux_disable_setting() where
pinmux_enable_setting() was called.
And when pinconf_apply_setting
On 03/29/2013 03:03 AM, Richard Genoud wrote:
Instead of just enabling the settings that were disabled in the 1st
loop, it's simpler to recall pinctrl_select_state with the old state.
Reviewed-by: Stephen Warren swar...@nvidia.com
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On 03/28/2013 01:54 PM, Olof Johansson wrote:
On Thu, Mar 28, 2013 at 08:33:23PM +0100, Pavel Machek wrote:
On Thu 2013-03-28 08:49:20, Stephen Warren wrote:
On 03/28/2013 03:29 AM, Pavel Machek wrote:
...
There's change that makes it pretty much impossible to build dtbs
reliably between
74 characters.
b) Prefix all the lines you're quoting with so that we can
differentiate the text you quoted from the text you wrote. If you need
to write [BB] to differentiate those pieces of text, something is
wrong. Thanks.
I've tried to fix these below in my reply.
Stephen Warren wrote
is.
Aside from that, this patch,
Reviewed-by: Stephen Warren swar...@nvidia.com
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Please read the FAQ at http
= {
...
+ .of_xlate = wmt_gpio_of_xlate,
Aside from that, this patch,
Reviewed-by: Stephen Warren swar...@nvidia.com
Although I didn't review pinctrl-*.c other than pinctrl-wmt.c, since
they're just big tables of data. Oh, except that the following could
probably be moved inside wmt_pinctrl_probe
On 04/01/2013 12:59 PM, Tony Prisk wrote:
On 02/04/13 06:06, Stephen Warren wrote:
On 03/28/2013 12:10 AM, Tony Prisk wrote:
This patch adds support for the GPIO/pinmux controller found on the VIA
VT8500 and Wondermedia WM8xxx-series SoCs.
Each pin within the controller is capable
On 04/01/2013 04:27 PM, Sylwester Nawrocki wrote:
On 03/28/2013 06:43 AM, Kishon Vijay Abraham I wrote:
diff --git a/Documentation/devicetree/bindings/phy/phy-bindings.txt
+example2:
+phys: phy {
+compatible = xxx;
+reg =...;
+.
+.
+phys =phys 1;
+.
+.
+};
On 03/28/2013 12:12 AM, Lubomir Rintel wrote:
This adds a device tree binding for random number generator present on
Broadcom
BCM2835 SoC, used in Raspberry Pi and Roku 2 devices.
FYI, I intend to apply this patch to the bcm2835 tree whenever the RNG
driver itself is applied to the hw_random
On 04/02/2013 03:01 AM, Linus Walleij wrote:
On Thu, Mar 28, 2013 at 3:55 PM, Stephen Warren swar...@nvidia.com wrote:
On 03/27/2013 11:59 PM, Laxman Dewangan wrote:
On Wednesday 27 March 2013 06:30 PM, Linus Walleij wrote:
On Thu, Mar 21, 2013 at 3:30 PM, Laxman Dewangan
ldewan...@nvidia.com
On 04/02/2013 01:12 AM, Venu Byravarasu wrote:
gre...@linuxfoundation.org wrote at Tuesday, March 05, 2013 6:04 AM:
On Mon, Mar 04, 2013 at 09:55:44AM -0700, Stephen Warren wrote:
On 03/04/2013 12:55 AM, Venu Byravarasu wrote:
Stephen Warren wrote at Thursday, February 28, 2013 11:47 PM
On 04/02/2013 02:37 AM, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 28 March 2013 09:15 PM, Stephen Warren wrote:
On 03/27/2013 11:43 PM, Kishon Vijay Abraham I wrote:
The PHY framework provides a set of APIs for the PHY drivers to
create/destroy a PHY and APIs for the PHY users to obtain
On 04/01/2013 03:45 PM, Rhyland Klein wrote:
This patch adds support for supplies to register a list of char *'s
which represent the list of supplies which supply them. This is the
opposite as the supplied_to list.
This patch resolves the concerns I had before, so,
Reviewed-by: Stephen Warren
On 04/01/2013 10:40 PM, Tony Prisk wrote:
Sorry - got Linus W's email address wrong in first send.
v4 changes:
Changed as requested by Stephen Warren:
Corrected the range checking in of_property_read_u32_index().
Fix configs[0] assignment in wmt_pctl_dt_node_to_map_pull().
Move
On 03/28/2013 12:12 AM, Lubomir Rintel wrote:
This adds a device tree binding for random number generator present on
Broadcom
BCM2835 SoC, used in Raspberry Pi and Roku 2 devices.
Applied to bcm2835's for-3.10/dt tree, with some slight fixups to the
patch subject and description
On 03/24/2013 08:41 AM, Lubomir Rintel wrote:
This enables a driver for random number generator present on Broadcom BCM2835
SoC,
used in Raspberry Pi and Roku 2 devices.
Squashed into bcm2835's for-3.10/defconfig branch.
(Lubomir: defconfig updates get squashed to avoid too many patches
On 04/03/2013 01:14 AM, Vineet Gupta wrote:
forgot to CC linux-arch
On 04/03/2013 12:42 PM, Vineet Gupta wrote:
Currently, for every ARC kernel build I see the following:
---8-
DTBarch/arc/boot/dts/angel4.dtb.S
AS arch/arc/boot/dts/angel4.dtb.o
On 04/03/2013 08:09 AM, Linus Walleij wrote:
On Thu, Mar 28, 2013 at 6:48 PM, Stephen Warren swar...@wwwdotorg.org wrote:
Why can't we just use the device suspend/resume functions rather than
global (syscore) suspend/resume functions? Presumably this is to ensure
that all other drivers
On 04/03/2013 08:40 AM, Peter De Schrijver wrote:
The device tree binding models Tegra114 CAR (Clock And Reset) as a single
monolithic clock provider.
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
On 04/03/2013 08:40 AM, Peter De Schrijver wrote:
This is the nineth version of the Tegra114 clockframework. It is based on the
next-20130320-fixed branch of
git://nv-tegra.nvidia.com/user/swarren/linux-2.6.git,
That's not a particularly useful base; these patches won't be applied to
On 04/03/2013 08:40 AM, Peter De Schrijver wrote:
Signed-off-by: Peter De Schrijver pdeschrij...@nvidia.com
I see this patch does depend on my clk: tegra: defer application of
init table, although my patch was based on top of this series so needs
to be adjusted to remove the Tegra114 portions so
On 04/03/2013 11:52 AM, Stephen Warren wrote:
On 04/03/2013 08:40 AM, Peter De Schrijver wrote:
This is the nineth version of the Tegra114 clockframework. It is based on the
next-20130320-fixed branch of
git://nv-tegra.nvidia.com/user/swarren/linux-2.6.git,
... [it depends on]
http
On 04/03/2013 02:41 AM, Venu Byravarasu wrote:
The existing Tegra USB bindings have a few issues:
...
This patch fixes the binding definition to resolve these issues.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
On 04/03/2013 02:41 AM, Venu Byravarasu wrote:
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain
On 04/03/2013 02:41 AM, Venu Byravarasu wrote:
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain
On 03/19/2013 02:10 PM, Stephen Warren wrote:
On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
Check return values from all GPIO APIs and handle errors accordingly.
Remove clk_disable_unprepare which is no more needed.
The call to clk_disable_unprepare is incorrect in the current code
On 04/03/2013 02:41 AM, Venu Byravarasu wrote:
Check return values from all GPIO APIs and handle errors accordingly.
Remove clk_disable_unprepare which is no more needed.
checkpatch fails:
WARNING: line over 80 characters
#27: FILE: drivers/usb/phy/phy-tegra-usb.c:547:
+
On 03/19/2013 01:53 PM, Stephen Warren wrote:
On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove
On 03/19/2013 01:51 PM, Stephen Warren wrote:
On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
As part of this series, apart from patch containing changes to register TEGRA
USB PHY driver as platform driver, prepared below patches:
1. Re-arranging adding new DT properties.
2. Getting various
as requested by Stephen Warren:
Redid the kfree(maps) code as devm_kzalloc would cause issues. We now kzalloc
maps all at once, and configs as required. A call to wmt_pctl_dt_free_map()
is
used to kfree the allocated blocks if we fail early.
This v5 series:
Acked-by: Linus Walleij linus.wall
to their control
bank/bit so that if new pins are added, the existing numbering is maintained.
All currently supported SoCs are included: VT8500, WM8505, WM8650, WM8750 and
WM8850.
Signed-off-by: Tony Prisk li...@prisktech.co.nz
Reviewed-by: Stephen Warren swar...@nvidia.com
At a quick glance
On 04/03/2013 12:27 PM, Stephen Warren wrote:
On 04/03/2013 11:52 AM, Stephen Warren wrote:
On 04/03/2013 08:40 AM, Peter De Schrijver wrote:
This is the nineth version of the Tegra114 clockframework. It is based on
the
next-20130320-fixed branch of
git://nv-tegra.nvidia.com/user/swarren
From: Stephen Warren swar...@nvidia.com
Replace cmd_dtc with cmd_dtc_cpp, and delete the latter.
Previously, a special file extension (.dtsp) was required to trigger
the C pre-processor to run on device tree files. This was ugly. Now that
previous changes have enhanced cmd_dtc_cpp to collect
From: Stephen Warren swar...@nvidia.com
Many GPIO device tree bindings use the same flags. Create a header to
define those.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
v2: No change.
v1: Moved header. Added include guard.
(this patch was previously posted separately, hence
From: Stephen Warren swar...@nvidia.com
The ARM GIC binding defines a few custom cells and flags for its IRQ
specifier. Provide names for those.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
v2: No change.
v1: Moved header. Added include guard.
(this patch was previously posted
From: Stephen Warren swar...@nvidia.com
The recent dtc+cpp support allows header files and C pre-processor
defines/macros to be used when compiling device tree files. These
headers will typically define various constants that are part of the
device tree bindings.
The original patch which set up
From: Stephen Warren swar...@nvidia.com
Many IRQ device tree bindings use the same flags. Create a header to
define those.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
v2: No change.
v1: Moved header. Added include guard.
(this patch was previously posted separately, hence
From: Stephen Warren swar...@nvidia.com
Prior to this change, when compiling *.dts to *.dtb, the dependency
output from dtc would be used, and when compiling *.dtsp to *.dtb, the
dependency output from gcc -E alone would be used, despite dtc also
being invoked (on a temporary file
From: Stephen Warren swar...@nvidia.com
The current use-case for fixdep is: a source file is run through a single
processing step, which creates a single dependency file as a side-effect,
which fixdep transforms into the file used by the kernel build process.
In order to transparently run the C
On 04/03/2013 06:53 AM, Kishon Vijay Abraham I wrote:
Added a generic PHY framework that provides a set of APIs for the PHY drivers
to create/destroy a PHY and APIs for the PHY users to obtain a reference to
the PHY with or without using phandle. To obtain a reference to the PHY
without using
On 04/03/2013 06:53 AM, Kishon Vijay Abraham I wrote:
The PHY framework provides a set of APIs for the PHY drivers to
create/destroy a PHY and APIs for the PHY users to obtain a reference to the
PHY with or without using phandle. To obtain a reference to the PHY without
using phandle, the
On 03/07/2013 06:17 AM, Ian Lartey wrote:
From: Graeme Gregory g...@slimlogic.co.uk
Add the various binding files for the palmas family of chips. There is a
top level MFD binding then a seperate binding for IP blocks on chips.
Sorry for the slow review. Thanks for the binding docs. I
On 03/13/2013 01:25 PM, Rhyland Klein wrote:
On 3/12/2013 7:10 PM, Stephen Warren wrote:
On 03/12/2013 04:08 PM, Rhyland Klein wrote:
This change adds the binding documentation for the tps65090-charger.
diff --git
a/Documentation/devicetree/bindings/power_supply/tps65090.txt
b/Documentation
On 03/14/2013 03:28 AM, Bill Huang wrote:
On Thu, 2013-03-14 at 17:21 +0800, Peter De Schrijver wrote:
On Thu, Mar 14, 2013 at 03:15:11AM +0100, Bill Huang wrote:
I don't think deferring will work either, considering the usage of DVFS,
device voltage is tightly coupled with frequency, when
On 03/14/2013 04:58 AM, Bill Huang wrote:
Hook up pm_power_off to palmas power off routine if there is DT
property ti,system-power-controller defined, so platform which is
powered by this regulator can be powered off properly.
diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
+
On 03/14/2013 07:20 PM, Bill Huang wrote:
On Fri, 2013-03-15 at 01:54 +0800, Stephen Warren wrote:
On 03/14/2013 03:28 AM, Bill Huang wrote:
On Thu, 2013-03-14 at 17:21 +0800, Peter De Schrijver wrote:
On Thu, Mar 14, 2013 at 03:15:11AM +0100, Bill Huang wrote:
I don't think deferring
to me.
Acked-by: Stephen Warren swar...@nvidia.com
I assume Russell will want this to go through his patch tracker.
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On 03/15/2013 10:38 AM, gre...@linuxfoundation.org wrote:
On Sat, Feb 02, 2013 at 10:22:16AM +0530, Sachin Kamat wrote:
On Friday, 1 February 2013, Stephen Warren swar...@wwwdotorg.org wrote:
On 02/01/2013 02:49 AM, Sachin Kamat wrote:
On 1 February 2013 09:54, Stephen Warren swar
On 03/14/2013 11:51 PM, Bill Huang wrote:
On Fri, 2013-03-15 at 13:19 +0800, Stephen Warren wrote:
On 03/14/2013 04:58 AM, Bill Huang wrote:
Hook up pm_power_off to palmas power off routine if there is DT
property ti,system-power-controller defined, so platform which is
powered
On 03/14/2013 01:40 AM, Danny Huang wrote:
Add speedo-based process identifictaion for Tegra114.
Based on the work by:
Alex Frid af...@nvidia.com
This code is surprisingly quite a bit simpler than the existing
tegra30_speedo.c. Are you sure it's complete?
diff --git
On 03/13/2013 02:02 PM, Stephen Warren wrote:
On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace
On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
NVIDIA's Tegra114 has 6 spi controllers. These controllers are
redesign on T114 with different register interface.
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
+ reg = 0x7000d400 0x200;
...
+
On 03/15/2013 12:42 PM, Laxman Dewangan wrote:
On Friday 15 March 2013 11:56 PM, Stephen Warren wrote:
On 03/13/2013 02:02 PM, Stephen Warren wrote:
On 03/13/2013 01:49 PM, Laxman Dewangan wrote:
Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver
the patch to a...@kernel.org to enable this.
Reviewed-by: Stephen Warren swar...@nvidia.com
Thanks.
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On 03/13/2013 06:48 PM, Danny Huang wrote:
Expose Tegra chip ID and revision in /sys/devices/soc for user mode
usage
Applied to Tegra's for-3.10/soc branch.
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On 03/14/2013 03:12 AM, Hiroshi Doyu wrote:
Make this depend on CONFIG_PM.
Applied to Tegra's for-3.10/fixes branch.
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check for return value of this function. If this function
success then only access register otherwise return to caller with
error.
Wolfram,
Reviewed-by: Stephen Warren swar...@nvidia.com
This is probably suitable for Cc: stable.
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On 03/15/2013 06:33 AM, Ulf Hansson wrote:
On 15 March 2013 13:06, Bill Huang bilhu...@nvidia.com wrote:
On Fri, 2013-03-15 at 18:08 +0800, Ulf Hansson wrote:
...
Some prerequisites; I think am in favor of using the clk API to
trigger DVFS changes and then I agree on that clk_prepare|unprepare
On 03/15/2013 11:45 AM, Russell King - ARM Linux wrote:
On Thu, Mar 14, 2013 at 02:31:04AM -0700, Bill Huang wrote:
Add the below two notifier events so drivers which are interested in
knowing the clock status can act accordingly. This is extremely useful
in some of the DVFS (Dynamic Voltage
there.
Otherwise, this sounds plausible, so,
Reviewed-by: Stephen Warren swar...@nvidia.com
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On 03/17/2013 10:04 PM, Stephen Rothwell wrote:
Hi Stephen,
Today's linux-next merge of the bcm2835 tree got a conflict in
arch/arm/Kconfig between commit 15bc1fe67f66 (ARM: cns3xxx:
enable multiplatform support) from the arm-soc tree and commit
f1ac922dec7e (ARM: bcm2835: convert to
On 03/17/2013 10:31 PM, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the tegra tree got a conflict in
drivers/clocksource/tegra20_timer.c between commit 1d16cfb3aeba
(clocksource: tegra20: use the device_node pointer passed to
init) from the arm-soc tree and commit
On 03/18/2013 09:13 AM, Shawn Guo wrote:
On Wed, Mar 06, 2013 at 11:22:57AM -0700, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
The recent dtc+cpp support allows header files and C pre-processor
defines/macros to be used when compiling device tree files. These
headers
On 03/03/2013 06:14 PM, Mark Brown wrote:
Currently the value parsing operations both return the parsed value and
modify the passed buffer. This precludes their use in places like the cache
code so split out the in place modification into a new parse_inplace()
operation.
Mark,
This change
On 03/19/2013 02:58 AM, Laxman Dewangan wrote:
Palmas device have three different i2c addresses. The device creates
the two new dummy i2c clients for accessing the register by using
primary client adapter. This new dummy i2c client have their of_node
as NULL.
The dummy i2c client is used
On 03/19/2013 10:52 AM, Mark Brown wrote:
On Tue, Mar 19, 2013 at 09:44:24AM -0600, Stephen Warren wrote:
It seems like part of the solution here is to modify the
i2c_client object itself so that it can directly support devices
that have multiple I2C addresses; instead of 1 i2c_client
On 03/18/2013 03:35 AM, Laxman Dewangan wrote:
Add documentation for device tree binding of NVIDIA's Tegra i2c
controller driver.
Describing all compatible values used for diffenent Tegra SoCs
in details in this documentation.
I have applied this to Tegra's for-3.10/dt branch. I fixed a
On 03/18/2013 05:17 AM, Danny Huang wrote:
Add speedo-based process identifictaion for Tegra114.
I have applied this to Tegra's for-3.10/soc branch, with one addition below:
diff --git a/arch/arm/mach-tegra/tegra114_speedo.c
b/arch/arm/mach-tegra/tegra114_speedo.c
+#include linux/kernel.h
On 03/18/2013 03:06 PM, Greg Kroah-Hartman wrote:
3.8-stable review patch. If anyone has any objections, please let me know.
This patch causes reboot/shutdown to fail on Tegra-based systems in 3.9-rc3.
I reported this at:
http://www.spinics.net/lists/linux-usb/msg82518.html
although there's
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