taking care of those constraints.
Disable devfreq for now on those GPUs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Thanks for the clarification in the commit message.
Reviewed-by: Steven Price
---
(no changes since v9)
Changes in v9:
- Explain why devfreq needs
On 13/01/2021 06:07, Nicolas Boichat wrote:
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
LGTM
Reviewed-by: Steven Price
---
(no changes since v7)
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts
% threshold more easily (AFAICT kbase
uses the default 90/5 thresholds), but this seems like a reasonable
change for now.
Reviewed-by: Steven Price
Thanks,
Steve
[1] When I get some time I need to rework the "queue jobs on the
hardware"[2] patch I posted ages ago. Last time it actua
On 22/01/2021 10:11, Lukasz Luba wrote:
On 1/21/21 5:15 PM, Daniel Lezcano wrote:
On 21/01/2021 18:04, Lukasz Luba wrote:
The simple_ondemand devfreq governor uses two thresholds to decide about
the frequency change: upthreshold, downdifferential. These two tunable
change the behavior of the
On 22/01/2021 10:00, Lukasz Luba wrote:
On 1/22/21 8:21 AM, Steven Price wrote:
On 21/01/2021 17:04, Lukasz Luba wrote:
The simple_ondemand devfreq governor uses two thresholds to decide about
the frequency change: upthreshold, downdifferential. These two tunable
change the behavior
On 05/01/2021 00:11, Nicolas Boichat wrote:
GPUs with more than a single regulator (e.g. G-57 on MT8183) will
require platform-specific handling, disable devfreq for now.
Can you explain what actually goes wrong here? AFAICT the existing code
does support controlling multiple regulators - but
-enabled guest
* Rebased on v5.11-rc1
* RFC patch for new MTE tag copy ioctl
[1] https://lore.kernel.org/r/20210108161254.53674-1-steven.pr...@arm.com
[2] https://lore.kernel.org/r/20201127152113.13099-1-steven.pr...@arm.com
Steven Price (3):
arm64: kvm: Save/restore MTE registers
arm64: kvm
Define the new system registers that MTE introduces and context switch
them. The MTE feature is still hidden from the ID register as it isn't
supported in a VM yet.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_host.h | 4 ++
arch/arm64/include/asm/kvm_mte.h
to easily read/write the
tags from guest memory, allowing the VMM's mapping to be non-PROT_MTE
while the VMM can still read/write the tags for the purpose of
migration.
Signed-off-by: Steven Price
---
arch/arm64/include/uapi/asm/kvm.h | 13 +++
arch/arm64/kvm/arm.c | 59
are correctly saved/restored across swap.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/kvm_host.h| 3 +++
arch/arm64/include/asm/pgtable.h | 2 +-
arch/arm64/kernel/mte.c | 36 +---
arch/arm64/kvm/arm.c
On 02/10/2020 15:30, Andrew Jones wrote:
On Fri, Sep 25, 2020 at 10:36:07AM +0100, Steven Price wrote:
Add a new VM feature 'KVM_ARM_CAP_MTE' which enables memory tagging
for a VM. This exposes the feature to the guest and automatically tags
memory pages touched by the VM as PG_mte_tagged
On 02/10/2020 15:36, Andrew Jones wrote:
On Fri, Sep 25, 2020 at 10:36:05AM +0100, Steven Price wrote:
Version 3 of adding MTE support for KVM guests. See the previous (v2)
posting for background:
https://lore.kernel.org/r/20200904160018.29481-1-steven.price%40arm.com
These patches add
On 21/09/2020 14:10, Qinglang Miao wrote:
Simplify the return expression.
Signed-off-by: Qinglang Miao
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panfrost
On 21/09/2020 14:10, Qinglang Miao wrote:
Simplify the return expression.
Signed-off-by: Qinglang Miao
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_device.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panfrost
On 01/10/2020 12:25, Daniel Vetter wrote:
On Thu, Oct 1, 2020 at 12:58 PM Steven Price wrote:
On 21/09/2020 14:10, Qinglang Miao wrote:
Simplify the return expression.
Signed-off-by: Qinglang Miao
Reviewed-by: Steven Price
As committer/maintainer for this please indicate whether
: Add initial panfrost driver")
Suggested-by: Steven Price
Signed-off-by: Christian Hewitt
Reviewed-by: Steven Price
I'll push this to drm-misc-next-fixes so it should coincide with the
Bifrost support already in drm-misc-next.
Steve
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 4 ++-
f permit this.
Signed-off-by: Neil Armstrong
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++
drivers/gpu/drm/panfrost/panfrost_gpu.c| 4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h
b/drivers/gpu/drm/
On 16/09/2020 16:01, Neil Armstrong wrote:
This adds the required GPU quirks, including the quirk in the PWR registers at
the GPU
reset time and the IOMMU quirk for shareability issues observed on G52 in
Amlogic G12B SoCs.
Signed-off-by: Neil Armstrong
Reviewed-by: Steven Price
the SoC is not
publicly documented we do not know what does these
values, but they permit having a fully functional GPU running with Panfrost.
Signed-off-by: Neil Armstrong
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 11 +++
drivers/gpu/drm/panfrost/panfro
On 11/08/2020 05:42, Chinwen Chang wrote:
smaps_rollup will try to grab mmap_lock and go through the whole vma
list until it finishes the iterating. When encountering large processes,
the mmap_lock will be held for a longer time, which may block other
write requests like mmap and munmap from
On 13/08/2020 03:13, Chinwen Chang wrote:
Add new API to query if someone wants to acquire mmap_lock
for write attempts.
Using this instead of rwsem_is_contended makes it more tolerant
of future changes to the lock type.
Signed-off-by: Chinwen Chang
Reviewed-by: Steven Price
-by: Chinwen Chang
Reviewed-by: Steven Price
---
fs/proc/task_mmu.c | 56 +-
1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index dbda449..23b3a447 100644
--- a/fs/proc/task_mmu.c
+++ b/fs
On 07/09/2020 16:28, Dr. David Alan Gilbert wrote:
(cc'ing in Eric Auger)
* Steven Price (steven.pr...@arm.com) wrote:
Arm's Memory Tagging Extension (MTE) adds 4 bits of tag data to every 16
bytes of memory in the system. This along with stashing a tag within the
high bit of virtual addresses
On 08/09/2020 16:18, Neil Armstrong wrote:
The T820, G31 & G52 GPUs integratewd by Amlogic in the respective GXM, G12A/SM1
& G12B
SoCs needs a quirk in the PWR registers at the GPU reset time.
Since the documentation of the GPU cores are not public, we do not know what
does these
values, but
Subject: s/BROKEN_NS/BROKEN_SH/
Steve
On 08/09/2020 16:18, Neil Armstrong wrote:
The coherency integration of the IOMMU in the Mali-G52 found in the Amlogic
G12B SoCs
is broken and leads to constant and random faults from the IOMMU.
Disabling shareability completely fixes the issue.
On 08/09/2020 16:18, Neil Armstrong wrote:
The T820, G31 & G52 GPUs integratewd by Amlogic in the respective GXM, G12A/SM1
& G12B
SoCs needs a quirk in the PWR registers at the GPU reset time.
This adds a callback in the device compatible struct of permit this.
Signed-off-by: Neil Armstrong
On 08/09/2020 16:18, Neil Armstrong wrote:
Add a pgtbl_quirks entry in the compatible specific table to permit specyfying
IOMMU
quirks for platforms.
Signed-off-by: Neil Armstrong
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++
drivers/gpu/drm
that the
regsiters are always programmed just before the cores are powered.
Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver")
Signed-off-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drive
On 09/09/2020 16:25, Andrew Jones wrote:
On Fri, Sep 04, 2020 at 05:00:16PM +0100, Steven Price wrote:
Arm's Memory Tagging Extension (MTE) adds 4 bits of tag data to every 16
bytes of memory in the system. This along with stashing a tag within the
high bit of virtual addresses allows runtime
Rajagopalan
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Anshuman Khandual
Cc: Mark Rutland
Cc: Logan Gunthorpe
Cc: David Hildenbrand
Cc: Andrew Morton
Cc: Steven Price
---
arch/arm64/mm/mmu.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/mm/mmu.c
On 09/09/2020 16:48, Andrew Jones wrote:
On Fri, Sep 04, 2020 at 05:00:18PM +0100, Steven Price wrote:
Add a new VCPU features 'KVM_ARM_VCPU_MTE' which enables memory tagging
on a VCPU. When enabled on any VCPU in the virtual machine this causes
all pages that are faulted into the VM to have
On 10/09/2020 07:29, Andrew Jones wrote:
On Wed, Sep 09, 2020 at 05:04:15PM +0100, Steven Price wrote:
On 09/09/2020 16:25, Andrew Jones wrote:
On Fri, Sep 04, 2020 at 05:00:16PM +0100, Steven Price wrote:
2. Automatically promotes (normal host) memory given to the guest to be
tag
On 21/09/2020 08:52, Neil Armstrong wrote:
Hi Steven, Rob,
Should I send a v3 with the commit log fixes ?
No need, I've fixed it up and pushed to drm-misc-next.
Thanks,
Steve
On 10/09/2020 01:33, Richard Henderson wrote:
On 9/4/20 9:00 AM, Steven Price wrote:
3. Doesn't provide any new methods for the VMM to access the tags on
memory.
...
(3) may be problematic and I'd welcome input from those familiar with
VMMs. User space cannot access tags unless
On 10/09/2020 14:56, Andrew Jones wrote:
On Thu, Sep 10, 2020 at 10:21:04AM +0100, Steven Price wrote:
On 10/09/2020 07:29, Andrew Jones wrote:
But if userspace created the memslots with memory already set with
PROT_MTE, then this wouldn't be necessary, right? And, as long as
there's still
On 09/09/2020 13:29, Steven Price wrote:
The GPU 'CONFIG' registers used to work around hardware issues are
cleared on reset so need to be programmed every time the GPU is reset.
However panfrost_device_reset() failed to do this.
To avoid this in future instead move the call
On 01/01/2021 16:54, Yangtao Li wrote:
Use devm_pm_opp_* API to simplify code, and remove opp_table
from panfrost_devfreq.
Signed-off-by: Yangtao Li
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 34 ++---
drivers/gpu/drm/panfrost
On 16/12/2020 07:31, Haibo Xu wrote:
[...]
Hi Steve,
Hi Haibo
I have finished verifying the POC on a FVP setup, and the MTE test case can
be migrated from one VM to another successfully. Since the test case is very
simple which just maps one page with MTE enabled and does some memory
access,
On 18/11/2020 17:05, Andrew Jones wrote:
On Wed, Nov 18, 2020 at 04:50:01PM +, Catalin Marinas wrote:
On Wed, Nov 18, 2020 at 04:01:20PM +, Steven Price wrote:
On 17/11/2020 16:07, Catalin Marinas wrote:
On Mon, Oct 26, 2020 at 03:57:27PM +, Steven Price wrote:
diff --git a/arch
On 18/11/2020 17:02, Catalin Marinas wrote:
On Wed, Nov 18, 2020 at 04:01:18PM +, Steven Price wrote:
On 17/11/2020 19:20, Marc Zyngier wrote:
On 2020-10-26 15:57, Steven Price wrote:
diff --git a/arch/arm64/include/asm/sysreg.h
b/arch/arm64/include/asm/sysreg.h
index d52c1b3ce589
Define the new system registers that MTE introduces and context switch
them. The MTE feature is still hidden from the ID register as it isn't
supported in a VM yet.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_host.h | 4
arch/arm64/include/asm/sysreg.h
across swap.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/kvm_host.h| 4
arch/arm64/kvm/arm.c | 9 +
arch/arm64/kvm/mmu.c | 6 ++
arch/arm64/kvm/sys_regs.c| 6 +-
include/uapi
requirement is too strict.
Steven Price (2):
arm64: kvm: Save/restore MTE registers
arm64: kvm: Introduce MTE VCPU feature
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/kvm_host.h | 8
arch/arm64/include/asm/sysreg.h| 3 ++-
arch
On 19/11/2020 15:45, Peter Maydell wrote:
On Thu, 19 Nov 2020 at 15:39, Steven Price wrote:
This series adds support for Arm's Memory Tagging Extension (MTE) to
KVM, allowing KVM guests to make use of it. This builds on the existing
user space support already in v5.10-rc1, see [1
On 19/11/2020 16:24, Catalin Marinas wrote:
On Thu, Nov 19, 2020 at 12:45:52PM +, Steven Price wrote:
On 18/11/2020 17:05, Andrew Jones wrote:
On Wed, Nov 18, 2020 at 04:50:01PM +, Catalin Marinas wrote:
On Wed, Nov 18, 2020 at 04:01:20PM +, Steven Price wrote:
On 17/11/2020 16
On 19/11/2020 19:11, Marc Zyngier wrote:
On 2020-11-19 18:42, Andrew Jones wrote:
On Thu, Nov 19, 2020 at 03:45:40PM +, Peter Maydell wrote:
On Thu, 19 Nov 2020 at 15:39, Steven Price wrote:
> This series adds support for Arm's Memory Tagging Extension (MTE) to
> KVM, allowing KVM
On 20/11/2020 09:56, Marc Zyngier wrote:
On 2020-11-20 09:50, Steven Price wrote:
On 19/11/2020 19:11, Marc Zyngier wrote:
Does this sound reasonable?
I'll clean up the set_pte_at() change and post a v6 later today.
Please hold on. I still haven't reviewed your v5, nor have I had time
are correctly saved/restored across swap.
Signed-off-by: Steven Price
Reviewed-by: Andrew Jones
---
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/kvm_host.h| 3 +++
arch/arm64/kvm/arm.c | 9 +
arch/arm64/kvm/mmu.c | 20
to expose the KVM_CAP before everything is
ready.
Steven Price (2):
arm64: kvm: Save/restore MTE registers
arm64: kvm: Introduce MTE VCPU feature
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/kvm_host.h | 7 +++
arch/arm64/include/asm/sysreg.h
Define the new system registers that MTE introduces and context switch
them. The MTE feature is still hidden from the ID register as it isn't
supported in a VM yet.
Signed-off-by: Steven Price
Reviewed-by: Andrew Jones
---
arch/arm64/include/asm/kvm_host.h | 4
arch/arm64
using pm_runtime_set_suspended(). And also
include this on the error path in panfrost_probe().
Fixes: aebe8c22a912 ("drm/panfrost: Fix possible suspend in panfrost_remove")
Signed-off-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 5 +++--
1 file changed, 3 insert
:
On 2020-10-26 15:57, Steven Price wrote:
Define the new system registers that MTE introduces and context switch
them. The MTE feature is still hidden from the ID register as it isn't
supported in a VM yet.
Signed-off-by: Steven Price
Reviewed-by: Andrew Jones
---
arch/arm64/include/asm
On 17/11/2020 16:07, Catalin Marinas wrote:
Hi Steven,
On Mon, Oct 26, 2020 at 03:57:27PM +, Steven Price wrote:
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index 19aacc7d64de..38fe25310ca1 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -862,6 +862,26
On 17/11/2020 19:35, Marc Zyngier wrote:
Hi Steven,
On 2020-10-26 15:57, Steven Price wrote:
Add a new VM feature 'KVM_ARM_CAP_MTE' which enables memory tagging
for a VM. This exposes the feature to the guest and automatically tags
memory pages touched by the VM as PG_mte_tagged (and clears
On 30/11/2020 15:42, Naresh Kamboju wrote:
Linux next tag 20201130 arm64 build failed due to below error,
- gcc-9, gcc-10 and clang-10 build FAIL
- gcc-8 build PASS.
make --silent --keep-going --jobs=8
O=/home/tuxbuild/.cache/tuxmake/builds/2/tmp ARCH=arm64
On 01/12/2020 12:19, Anshuman Khandual wrote:
This adds validation tests for dirtiness after write protect conversion for
each page table level. There are two new separate test types involved here.
The first test ensures that a given page table entry does not become dirty
after pxx_wrprotect().
On 03/12/2020 16:09, Mark Rutland wrote:
On Fri, Nov 27, 2020 at 03:21:11PM +, Steven Price wrote:
It's been a week, and I think the comments on v5 made it clear that
enforcing PROT_MTE requirements on the VMM was probably the wrong
approach. So since I've got swap working correctly without
gets macro replaced without requiring
the mm_struct i.e __is_defined(__PAGETABLE_PMD_FOLDED).
Cc: Andrew Morton
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Catalin Marinas
Signed-off-by: Anshuman Khandual
Reviewed-by: Steven Price
---
mm/debug_vm_pgtable.c | 47
On 27/11/2020 09:44, Qinglang Miao wrote:
pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to putting operation will result in a
reference leak here.
A new function pm_runtime_resume_and_get is introduced in
[0] to keep usage counter balanced. So We fix the
memory
PROT_MTE. Instead KVM will set the PG_mte_tagged flag automatically
if not present.
* Fixed swap behaviour vs v4 by always checking for saved MTE tags for
user entries in set_pte_at().
[2] https://lore.kernel.org/r/20201119153901.53705-1-steven.price%40arm.com
Steven Price (2
are correctly saved/restored across swap.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/kvm_host.h| 4
arch/arm64/include/asm/pgtable.h | 2 +-
arch/arm64/kernel/mte.c | 18 +-
arch/arm64/kvm/arm.c
Define the new system registers that MTE introduces and context switch
them. The MTE feature is still hidden from the ID register as it isn't
supported in a VM yet.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_host.h | 4
arch/arm64/include/asm/sysreg.h
On 06/11/2020 07:03, Viresh Kumar wrote:
The dev_pm_opp_put_*() APIs now accepts a NULL opp_table pointer and so
there is no need for us to carry the extra check. Drop them.
Signed-off-by: Viresh Kumar
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 6
On 03/09/2019 09:47, Andrew Jones wrote:
> On Fri, Aug 30, 2019 at 09:42:55AM +0100, Steven Price wrote:
>> Enable paravirtualization features when running under a hypervisor
>> supporting the PV_TIME_ST hypercall.
>>
>> For each (v)CPU, we ask the hypervisor for the l
On 23/08/2019 12:45, Zenghui Yu wrote:
> Hi Steven,
>
> On 2019/8/21 23:36, Steven Price wrote:
>> Enable paravirtualization features when running under a hypervisor
>> supporting the PV_TIME_ST hypercall.
>>
>> For each (v)CPU, we ask the hypervisor for the l
ow.
>>
>> So what is the plan forward? Probably a little late for 5.3,
>> so queue it up in -mm for 5.4 and deal with the conflicts in at least
>> hmm? Queue it up in the hmm tree even if it doesn't 100% fit?
>
> Did we make a decision on this? Due to travel & LPC I'd like to
> finalize the hmm tree next week.
I was planning on rebasing my series on this and posting it for 5.4 - I
hadn't actually realised this hasn't been picked up yet. I haven't had
much time to look at this recently.
FWIW you can add for the series:
Acked-by: Steven Price
Steve
On 31/07/2019 10:27, Sven Schnelle wrote:
> Hi Steven,
>
> On Mon, Jul 29, 2019 at 12:32:25PM +0100, Steven Price wrote:
>>
>> parisc is more interesting and I'm not sure if this is necessarily
>> correct. I originally proposed a patch with the line "For parisc,
Currently a kvm_device_ops structure cannot be const without triggering
compiler warnings. However the structure doesn't need to be written to
and, by marking it const, it can be read-only in memory. Add some more
const keywords to allow this.
Signed-off-by: Steven Price
---
include/linux
reads the stolen
value from the shared page for a VCPU. We guarantee single-copy
atomicity using READ_ONCE which means we can also read the stolen
time for another VCPU than the currently running one while it is
potentially being updated by the hypervisor.
Signed-off-by: Steven Price
---
arch
of memory available at this location.
The address is given in terms of the physical address visible to
the guest and must be page aligned. The guest will discover the address
via a hypercall.
Signed-off-by: Steven Price
---
arch/arm/include/asm/kvm_host.h | 4 ++
arch/arm64/include/asm/kvm_host.h
On 06/08/2019 22:36, Stephen Boyd wrote:
> Quoting Sasha Levin (2019-08-06 13:47:52)
>> On Tue, Aug 06, 2019 at 10:59:40AM -0700, Stephen Boyd wrote:
>>> This reverts commit 25511676362d8f7d4b8805730a3d29484ceab1ec in the 4.19
>>> stable trees. From what I can tell this commit doesn't do anything
On 07/08/2019 00:58, Andrew Morton wrote:
> On Wed, 31 Jul 2019 16:46:01 +0100 Steven Price wrote:
>
>> Make use of the new functionality in walk_page_range to remove the
>> arch page walking code and use the generic code to walk the page tables.
>>
>> The effecti
On 05/08/2019 17:40, Christophe de Dinechin wrote:
>
> Steven Price writes:
>
>> Introduce a paravirtualization interface for KVM/arm64 based on the
>> "Arm Paravirtualized Time for Arm-Base Systems" specification DEN 0057A.
>>
>> This only adds the
On 03/08/2019 18:34, Marc Zyngier wrote:
> On Sat, 3 Aug 2019 13:51:13 +0100
> Marc Zyngier wrote:
>
> [forgot that one]
>
>> On Fri, 2 Aug 2019 15:50:14 +0100
>> Steven Price wrote:
>
> [...]
>
>>> +static int __init kvm_pvtime_init(void
On 07/08/2019 15:28, Christophe de Dinechin wrote:
>
>
>> On 7 Aug 2019, at 15:21, Steven Price > <mailto:steven.pr...@arm.com>> wrote:
>>
>> On 05/08/2019 17:40, Christophe de Dinechin wrote:
>>>
>>> Steven Price writes:
>>>
&g
On 08/07/2019 16:43, Sudeep Holla wrote:
> In preparation to adding support for other two types of messages that
> SCMI specification mentions, let's replace the term 'command' with the
> correct term 'message'.
>
> As per the specification the messages are of 3 types:
> commands(synchronous or
ing macros
is implicitly relying on the page size/number of levels being the same as
the kernel. So it is safe to reuse this for p?d_leaf() as it is an
architectural restriction.
CC: Catalin Marinas
CC: Will Deacon
Signed-off-by: Steven Price
---
arch/arm64/include/asm/pgtable.h | 2 ++
1 f
. So simply
provide the generic pmd_leaf() name.
CC: Russell King
CC: linux-arm-ker...@lists.infradead.org
Signed-off-by: Steven Price
---
arch/arm/include/asm/pgtable-2level.h | 1 +
arch/arm/include/asm/pgtable-3level.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/include/asm
or execute bit
set on it.
CC: Palmer Dabbelt
CC: Albert Ou
CC: linux-ri...@lists.infradead.org
Signed-off-by: Steven Price
---
arch/riscv/include/asm/pgtable-64.h | 7 +++
arch/riscv/include/asm/pgtable.h| 7 +++
2 files changed, 14 insertions(+)
diff --git a/arch/riscv/include/asm
...@vger.kernel.org
Signed-off-by: Steven Price
---
arch/mips/include/asm/pgtable-64.h | 8
1 file changed, 8 insertions(+)
diff --git a/arch/mips/include/asm/pgtable-64.h
b/arch/mips/include/asm/pgtable-64.h
index 93a9dce31f25..2bdbf8652b5f 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch
() is needed.
CC: Vineet Gupta
CC: linux-snps-...@lists.infradead.org
Signed-off-by: Steven Price
---
arch/arc/include/asm/pgtable.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index 1d87c18a2976..8c425cf796db 100644
--- a/arch
ting arm64/x86 to that instead.
* Rebased to v5.3-rc1
Steven Price (21):
arc: mm: Add p?d_leaf() definitions
arm: mm: Add p?d_leaf() definitions
arm64: mm: Add p?d_leaf() definitions
mips: mm: Add p?d_leaf() definitions
powerpc: mm: Add p?d_leaf() definitions
riscv: mm: Add p?d_leaf() definiti
-by: Steven Price
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 30 ++--
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h
b/arch/powerpc/include/asm/book3s/64/pgtable.h
index 8308f32e9782..84270666355c 100644
--- a/arch
that are suitable where there cannot be leaf
pages that that level.
Signed-off-by: Steven Price
---
include/asm-generic/pgtable.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 75d9d68a6de7..46275896ca66
add macros to
provide the generic p?d_leaf() names for the generic code.
Signed-off-by: Steven Price
---
arch/x86/include/asm/pgtable.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 0bc530c4eb13..6986a451619e 100644
r.
Remove the requirement to have a vma except when trying to split huge
pages.
Signed-off-by: Steven Price
---
mm/pagewalk.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/mm/pagewalk.c b/mm/pagewalk.c
index 98373a9f88b8..1cbef99e9258 10064
provided, so
add macros to provide the p?d_leaf names required by the generic code.
CC: "David S. Miller"
CC: sparcli...@vger.kernel.org
Signed-off-by: Steven Price
---
arch/sparc/include/asm/pgtable_64.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/sparc/include/asm/pg
ll entries, not
just transparent huge pages.
Signed-off-by: Steven Price
---
include/linux/mm.h | 15 +--
mm/pagewalk.c | 27 ---
2 files changed, 25 insertions(+), 17 deletions(-)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 0334ca97c584.
' that the page table holes are at.
Signed-off-by: Steven Price
---
arch/x86/mm/dump_pagetables.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index ab67822fd2f4..95728027dd3b 100644
--- a/arch/x86/mm
implemented as static
inline functions. Add a macro to provide the p?d_leaf names for the
generic code to use.
CC: Martin Schwidefsky
CC: Heiko Carstens
CC: linux-s...@vger.kernel.org
Signed-off-by: Steven Price
---
arch/s390/include/asm/pgtable.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
-by: Steven Price
---
arch/x86/mm/dump_pagetables.c | 69 ++-
1 file changed, 35 insertions(+), 34 deletions(-)
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 95728027dd3b..fe21b57f629f 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch
It is useful to be able to skip parts of the page table tree even when
walking without VMAs. Add test_p?d callbacks similar to test_walk but
which are called just before a table at that level is walked. If the
callback returns non-zero then the entire table is skipped.
Signed-off-by: Steven Price
Add a generic version of page table dumping that architectures can
opt-in to
Signed-off-by: Steven Price
---
include/linux/ptdump.h | 19 +
mm/Kconfig.debug | 21 ++
mm/Makefile| 1 +
mm/ptdump.c| 161 +
4 files
Signed-off-by: Steven Price
---
arch/x86/include/asm/pgtable.h | 2 +-
arch/x86/mm/dump_pagetables.c | 4 ++--
arch/x86/platform/efi/efi_32.c | 2 +-
arch/x86/platform/efi/efi_64.c | 4 ++--
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/i
page tables. This fake_mm structure is
initialised with the minimum necessary for the generic page walk code.
Signed-off-by: Steven Price
---
arch/x86/mm/dump_pagetables.c | 36 ---
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/arch/x86/mm
callbacks
which can decide to skip an entire tree of entries
Signed-off-by: Steven Price
---
arch/x86/Kconfig | 1 +
arch/x86/Kconfig.debug| 20 +--
arch/x86/mm/Makefile | 4 +-
arch/x86/mm/dump_pagetables.c | 285 +++---
4 files changed, 64
Now walk_page_range() can walk kernel page tables, we can switch the
arm64 ptdump code over to using it, simplifying the code.
Signed-off-by: Steven Price
---
arch/arm64/Kconfig | 1 +
arch/arm64/Kconfig.debug | 19 +
arch/arm64/include/asm/ptdump.h| 8
To enable x86 to use the generic walk_page_range() function, the
callers of ptdump_walk_pgd_level_debugfs() need to pass in the mm_struct.
This means that ptdump_walk_pgd_level_core() is now always passed a
valid pgd, so drop the support for pgd==NULL.
Signed-off-by: Steven Price
---
arch/x86
On 22/07/2019 22:47, Paul Burton wrote:
> Hi Steven,
>
> On Mon, Jul 22, 2019 at 04:41:53PM +0100, Steven Price wrote:
>> walk_page_range() is going to be allowed to walk page tables other than
>> those of user space. For this it needs to know when it has reached a
>&g
On 23/07/2019 07:39, Anshuman Khandual wrote:
> Hello Steven,
>
> On 07/22/2019 09:11 PM, Steven Price wrote:
>> This is a slight reworking and extension of my previous patch set
>> (Convert x86 & arm64 to use generic page walk), but I've continued the
>> version n
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