+CC Michal, linux-arch as it potentially affects other arches !
Hi,
On 05/04/2017 01:53 AM, nore...@ellerman.id.au wrote:
> FAILED linux-next/axs101_defconfig/arcompact Thu May 04, 18:53
>
> http://kisskb.ellerman.id.au/kisskb/buildresult/13022475/
>
> Commit: Add linux-next specific files fo
Hi,
Can we please backport upstream ecd43afdbe72017aefe48080631eb625e177ef4d
("ARCv2:
save r30 on kernel entry as gcc uses it for code-gen") to 4.2 to 4.9 kernels.
While the issue cites gcc, it is general deficiency of kernel as userspace
programs can modify r30 register in hand/inline assembly
On 04/27/2017 11:42 AM, Jose Abreu wrote:
> Hi Vineet,
>
>
> On 27-04-2017 00:31, Vineet Gupta wrote:
>> On 04/26/2017 01:55 AM, Jose Abreu wrote:
>>> Hi Vineet,
>>>
>>>
>>> On 24-04-2017 18:36, Vineet Gupta wrote:
>>>> On 04/21/20
On 04/26/2017 01:55 AM, Jose Abreu wrote:
> Hi Vineet,
>
>
> On 24-04-2017 18:36, Vineet Gupta wrote:
>> On 04/21/2017 03:15 AM, Jose Abreu wrote:
>>> This patch adds the necessary DT bindings to get HDMI audio
>>> output in ARC AXS10x SDP. The bindings for I2S
700)
Last minute fixes for ARC
- Build error in Mellanox nps platform
- addressing lack of saving FPU regs in releavnt configs
Noam Camus (1):
ARC: [plat-eznps] Fix build error
Vineet Gupta (1):
AR
for 4.12 ?
-Vineet
>
> Signed-off-by: Jose Abreu
> Acked-by: Alexey Brodkin
> Cc: Carlos Palminha
> Cc: Alexey Brodkin
> Cc: Rob Herring
> Cc: Vineet Gupta
> Cc: devicet...@vger.kernel.org
> Cc: linux-snps-...@lists.infradead.org
> Cc: linux-kernel@vge
On 03/29/2017 05:27 PM, Linus Torvalds wrote:
> On Wed, Mar 29, 2017 at 5:02 PM, Vineet Gupta
> wrote:
>>
>> I guess I can in next day or two - but mind you the inline version for ARC
>> is kind
>> of special vs. other arches. We have this "manual"
On 03/29/2017 04:42 PM, Al Viro wrote:
> On Wed, Mar 29, 2017 at 02:14:22PM -0700, Vineet Gupta wrote:
>
>>> BTW, I wonder if inlining all of the copy_{to,from}_user() is actually a
>>> win.
>>
>> Just to be clear, your series was doing this for everyon
On 03/29/2017 01:29 PM, Al Viro wrote:
> On Wed, Mar 29, 2017 at 01:08:12PM -0700, Vineet Gupta wrote:
>
>> Hi Al,
>>
>> Thx for taking this up. It seems ARC was missing INLINE_COPY* switch likely
>> due to
>> existing 2 variants (inline/out-of-line) we alr
these two are up to respective maintainers.
>
> Other things not there:
> * unification of strncpy_from_user() and friends. Probably next
> cycle.
> * anything to do with uaccess_begin/unsafe accesses/uaccess_end
> stuff. Definitely next cycle.
>
> I'm not
me.
>
> Signed-off-by: Alexey Brodkin
> Cc: Vineet Gupta
> Cc: Ruud Derwig
> Cc: sta...@vger.kernel.org
Added to for-curr.
Thx,
-Vineet
nly the IRQF_TIMER
> flag is a valid parameter to be passed to the request_percpu_irq function.
>
> Signed-off-by: Daniel Lezcano
Acked-by: Vineet Gupta# for arch/arc, arc_timer bits
appings in runtime.
>
> Signed-off-by: Alexey Brodkin
> Cc: Vineet Gupta
> Cc: Ruud Derwig
> Cc: sta...@vger.kernel.org
> ---
> arch/arc/boot/dts/vdk_axs10x_mb.dtsi | 20 +---
> 1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a
+CC Ingo, tglx
Hi Till,
On 03/13/2017 03:14 PM, Till Smejkal wrote:
> Introduce a different type of address spaces which are first class citizens
> in the OS. That means that the kernel now handles two types of AS, those
> which are closely coupled with a process and those which aren't. While the
(it gets
> optimized away anyway).
Acked-by: Vineet Gupta# Boot tested on ARC
Thx,
-Vineet
On 03/03/2017 03:29 AM, Vlad Zakharov wrote:
> This patch series replaces reading device tree with getting CPU
> clock frequency via clock driver in show_cpuinfo function.
>
> In order to achieve this we also add cpu nodes to device tree which
> describes SMP system and add "clocks" properties to
On 02/22/2017 02:36 AM, Vlad Zakharov wrote:
> We were reading clock rate directly from device tree "clock-frequency"
> property of corresponding clock node in show_cpuinfo function.
>
> Such approach is correct only in case cpu is always clocked by
> "fixed-clock". If we use clock driver that all
On 02/22/2017 02:36 AM, Vlad Zakharov wrote:
> We were reading clock rate directly from device tree "clock-frequency"
> property of corresponding clock node in show_cpuinfo function.
>
> Such approach is correct only in case cpu is always clocked by
> "fixed-clock". If we use clock driver that all
tes [Alexey]
Alexey Brodkin (3):
arc: vdk: Disable halt on reset
arc: vdk: Add support of MMC controller
arc: vdk: Add support of UIO
Vineet Gupta (3):
ARC: [intc-*]: confine NR_CPU_IRQS to intc code
AR
Hi Daniel,
Sorry for delayed response, was away from Linux for a bit :-(
On 02/02/2017 06:27 AM, Daniel Lezcano wrote:
> On Wed, Feb 01, 2017 at 04:50:15PM -0800, Vineet Gupta wrote:
>> So far we didn't allow CPU private 64-bit RTC timer to register in SMP
>> as the individ
On 02/07/2017 03:04 PM, Yuriy Kolerov wrote:
> The kernel emits a lot of warnings about unexpected IRQs when
> an appropriate driver is not presented. It happens because all
> interrupts in the core controller are enabled by default after
> reset. It would be wise to keep all interrupts masked by d
Reported-by: Jo-Philipp Wich
Fixes: 9aed02feae57bf7 ("ARC: [arcompact] handle unaligned access delay slot")
Cc: linux-kernel@vger.kernel.org
Cc: linux-snps-...@lists.infradead.org
Cc: sta...@vger.kernel.org
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/unaligned.c | 2 +-
1 file
A typical SMP system expects cache coherency. Initial NPS platform
support was slated to be SMP w/o cache coherency.
However it seems the platform now selects that option, so there is no
point in keeping it around.
Signed-off-by: Vineet Gupta
---
This time with Noam's fixed email ad
A typical SMP system expects cache coherency. Initial NPS platform
support was slated to be SMP w/o cache coherency.
However it seems the platform now selects that option, so there is no
point in keeping it around.
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig| 6 --
arch
A typical SMP system expects cache coherency. Initial NPS platform
support was slated to be SMP w/o cache coherency.
However it seems the platform now selects that option, so there is no
point in keeping it around.
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig| 6 --
arch
SMP and rely on higher rating of
GFRC to take over in general SMP case. We leave the pr_warn to notify
the user.
Cc: John Stultz
Cc: Thomas Gleixner
Cc: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
drivers/clocksource/arc_timer.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff
On 01/31/2017 03:45 AM, Yuriy Kolerov wrote:
> A summary:
>
> * Use build registers for getting numbers of interrupts both for
> core interrupt controller and for IDU interrupt controller.
> * Set a default priority for all core interrupt to prevent
> unexpected switching of banks of r
On 02/01/2017 09:52 AM, Alexey Brodkin wrote:
>> The whole point of adding this to defconfig is to override the default from
>> Kconfig ?
> Not anymore :)
>
> Since commit c4c9a040ecb7 ("clocksource: import ARC timer driver"),
> see
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.gi
On 02/01/2017 09:14 AM, Alexey Brodkin wrote:
>>> -# CONFIG_ARC_TIMERS_64BIT is not set
>>
>> Are you sure abut this part. Ater the timers driver rework, this would
>> enable GFRC
>> for SMP builds and AFAIKR there were some issues with time with GFRC + nSIM
>> etc..
>
> Not anymore :)
>
> Prob
On 02/01/2017 09:16 AM, Alexey Brodkin wrote:
> Hi Vineet,
>
> On Wed, 2017-02-01 at 09:13 -0800, Vineet Gupta wrote:
>> On 02/01/2017 08:43 AM, Alexey Brodkin wrote:
>>> This series improves ARC VDK support in upstream Linux kernel by:
>>> 1) Removal of UP
On 02/01/2017 08:43 AM, Alexey Brodkin wrote:
> This series improves ARC VDK support in upstream Linux kernel by:
> 1) Removal of UP configuration which is no longer supported by ARC VDK.
> Instead SMP platform with all but master cores halted is used to mimic
> UP system.
Is this missing
On 02/01/2017 08:42 AM, Alexey Brodkin wrote:
> In recent VDKs ARC cores are configured as "run on reset"
> which made existing kernel configuration outdated to effect that
> slave cores never start execution of the code keeping only master
> online.
>
> With that fix we're again in sync with VDK
On 01/31/2017 03:45 AM, Yuriy Kolerov wrote:
> When you set a value of ARC_NUMBER_OF_INTERRUPTS option
> it affects only a size of the interrupts table but macros
> for number of virtual interrupts (NR_IRQS) and for number
> of hardware interrupts (NR_CPU_IRQS) remain unchanged.
> Moreover usage of
On 01/31/2017 03:45 AM, Yuriy Kolerov wrote:
> Also add new macro ARC_REG_STATUS32 for the address of STATUS32
> auxiliary register. It is better to use it instead of magic numbers.
>
> Signed-off-by: Yuriy Kolerov
> ---
> arch/arc/include/asm/arcregs.h | 11 +++
> arch/arc/kernel/intc-a
On 01/31/2017 03:45 AM, Yuriy Kolerov wrote:
> After reset all interrupts in the core interrupt controller has
> the highest priority P0. If the platform supports Fast IRQs and
> has more than 1 banks of registers then CPU automatically switch
> banks of registers when P0 interrupt comes.
>
> The
On 01/31/2017 03:45 AM, Yuriy Kolerov wrote:
> This enhancement allows to mask all available common interrupts
> in IDU interrupt controller in boot time since the kernel can
> discover a number of them from the build register. Also now there
> is no need to specify in device tree a list of used co
On 01/31/2017 03:45 AM, Yuriy Kolerov wrote:
> Also add new macro ARC_REG_STATUS32 for the address of STATUS32
> auxiliary register. It is better to use it instead of magic numbers.
>
> Signed-off-by: Yuriy Kolerov
Applied to for-next.
Thx,
-Vineet
On 01/27/2017 04:01 PM, Yuriy Kolerov wrote:
> Signed-off-by: Yuriy Kolerov
Please squash this with patch 5/6 !
> ---
> arch/arc/include/asm/irq.h | 1 +
> arch/arc/kernel/intc-arcv2.c | 2 +-
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arc/include/asm/irq.h b/arc
On 01/27/2017 04:01 PM, Yuriy Kolerov wrote:
> When you set a value of ARC_NUMBER_OF_INTERRUPTS option
> it affects only a size of the interrupts table but macros
> for number of virtual interrupts (NR_IRQS) and for number
> of hardware interrupts (NR_CPU_IRQS) remain unchanged.
> Moreover usage of
On 01/27/2017 04:01 PM, Yuriy Kolerov wrote:
> This structure is necessary for retrieving of supported
> number of common interrupts in IDU interrupt controller.
>
> Signed-off-by: Yuriy Kolerov
> ---
> include/soc/arc/mcip.h | 17 +
> 1 file changed, 17 insertions(+)
>
> diff -
On 01/27/2017 04:01 PM, Yuriy Kolerov wrote:
> Also add new macro ARC_REG_STATUS32 for the address of STATUS32
> auxiliary register. It is better to use it instead of magic numbers.
>
> Signed-off-by: Yuriy Kolerov
> ---
> arch/arc/include/asm/arcregs.h | 26 ++
> arch/ar
for 4.10-rc6
- Fix for unaligned access emulation corner case
- fix for udelay loop inline asm regression
- Fix irq affinity finally for AXS103 board [Yuriy]
- Final fixes for setting IO-coherency sanely in SMP
----
Vineet Gupta
On 01/25/2017 10:39 AM, Alexey Brodkin wrote:
>> Also I wonder if, other version of the stmmac worked on this platform
>> before.
> It did work and still works. The only problem is we're getting
> a lot of noise now about bogus link status change. That's because
> this info is now in pr_info() comp
dule.h that we don't really need to compile this file.
> Since the file does have some EXPORT_SYMBOL, we add export.h include.
>
> Cc: Vineet Gupta
> Cc: linux-snps-...@lists.infradead.org
> Signed-off-by: Paul Gortmaker
Acked-by: Vineet Gupta
Thx,
-Vineet
es [Yuriv]
- Fix module build when unwinder is turned off
- IO Coherency Programming model updates
- Other miscll
--------
Vineet Gupta (8):
ARC: mmu: clarify the MMUv3 programming model
ARCv2: save r30 on kernel entry as gcc us
On 01/18/2017 03:57 AM, Alexey Brodkin wrote:
> In case of allnoconfig HAVE_MOD_ARCH_SPECIFIC=no
> because ARC_DW2_UNWIND=no as well.
>
> This enables default "struct mod_arch_specific" from
> ./include/asm-generic/module.h which clashes with ARC's one.
>
> Before e514943bbfe1 ("ARC: module: Fix !C
On 01/17/2017 02:14 PM, Vineet Gupta wrote:
>> Has this one passed checkpatch? Above "{" on the same line as function name
>> and closing one merged with the previous line look strange.
> Nope - I didn't :-(
> I will fix it. Thx for spotting this.
>
Is there
On 01/17/2017 01:41 PM, Alexey Brodkin wrote:
>
> Has this one passed checkpatch? Above "{" on the same line as function name
> and closing one merged with the previous line look strange.
Nope - I didn't :-(
I will fix it. Thx for spotting this.
>> + */
>> +if (mp.dbg)
>> +as
On 01/17/2017 12:58 PM, Alexey Brodkin wrote:
>>
>> +static void arc_default_smp_wait_to_boot(int cpu) {
>> +while (wake_flag != cpu)
>> +;
>> +
>> +wake_flag = 0;
>
> Why don't we convert "wake_flag" into bit-field so each core uses its special
> bit.
> It is IMHO beneficial
in early boot duting which other cores need NOT perturb the
coherency unit, thus need a mechanism that doesn't rely on polling
memory.
This just adds infrastructure for next patch which will add the hardware
support (MCIP Inter Core Debug Unit).
Signed-off-by: Vineet Gupta
---
arch/arc/in
o duplicate the jump part.
In terms of implementation this requires some restructuring of the early
boot code in head.S as Master now jumps to BSS setup explicitly,
vs. falling thru into it before.
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/head.S | 14 +++---
arch/arc/kernel/smp.c
the non masters at right time.
Vineet Gupta (4):
ARC: smp-boot: waiting API for run-from-reset need not jump to entry
point
ARC: smp-boot: run-on-reset: add callback to allow non masters to wait
ARCv2: smp: MCIP: remove debug aid to halt all cores when one halts
ARCv2: smp-boot: MCIP
d when the non masters self halt.
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/mcip.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index f39142acc89e..933382e0edd0 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -101
.
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/mcip.h | 1 +
arch/arc/kernel/mcip.c | 31 +++
2 files changed, 32 insertions(+)
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index c8fbe4114bad..a6ae4363c388 100644
--- a/arch/arc
Cc:
Fixes: d65283f7b695b5 ("ARC: module: elide loop to save reference to .eh_frame")
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/module.h | 4 ++--
arch/arc/kernel/module.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arc/include/asm/mo
On 12/28/2016 12:46 AM, Yuriy Kolerov wrote:
> It is necessary to use hwirq instead of virq when you communicate
> with an interrupt controller since there is no guaranty that virq
> numbers match hwirq numbers.
>
> Signed-off-by: Yuriy Kolerov
Applied to for-curr.
Thx,
-vineet
On 12/28/2016 12:46 AM, Yuriy Kolerov wrote:
> It is necessary to call entry/exit functions for parent interrupt
> controllers for proper masking/unmasking of interrupt lines.
>
> Signed-off-by: Yuriy Kolerov
Applied to for-curr.
Thx,
-vineet
On 12/28/2016 12:47 AM, Yuriy Kolerov wrote:
> Ignore value of interrupt distribution mode for common interrupts in
> IDU since setting of affinity using value from Device Tree is deprecated
> in ARC. Originally it is done in idu_irq_xlate() function and it is
> semantically wrong and does not guar
On 12/21/2016 03:40 AM, Alexey Brodkin wrote:
> This enables misaligned access handling even in kernel mode.
> Some wireless drivers (ath9k-htc and mt7601u) use misaligned accesses
> here and there and to cope with that without fixing stuff in the drivers
> we're just gracefully handling it on ARC.
nd round of ARC udpates for 4.10rc1
- Fix for aliasing VIPT dcache in old ARC700 cores
- micro-optimization in ARC700 ProtV handler
- Enable SG_CHAIN [Vladimir]
- ARC HS38 core intc default to prio 1
----
Vineet Gupta (5):
On 12/22/2016 06:09 AM, Alexey Brodkin wrote:
> CONFIG_ARC_ICCM_SZ in menuconfig is specified in kB while
> "cpu->Xccm.sz" contains value in bytes thus direct comparison fails
> leading to boot-time panic like that:
> --->8-
> IDENTITY: ARCVER [0x52]
On 12/22/2016 06:09 AM, Alexey Brodkin wrote:
> It turned out current implementation of CCM support doesn't work at all.
> There're 2 isseus:
> * Data/code which is supposed to be in DCCM or ICCM accordingly gets
>merged in common .data and .text sections so CCMs won't be used
> * Kerenl will
On 12/22/2016 06:09 AM, Alexey Brodkin wrote:
> If Linux kernel is compiled with "-ffunction-sections" each function is
> placed in
> its own section named ".text.function_name". This is required for
> discarding of not-used functions during final linkage. But in the end
> all ".text.XXX" sections
On 12/15/2016 10:12 AM, Alexey Brodkin wrote:
> Stand-alone nSIM platform has the only peripheral which is serial port.
> That means support of networking and mice makes no sense for it.
>
> Moreover removal of networking alone gives us 2 nice benefits:
> 1. Build happens faster
> On my machi
zed warning
Noam Camus (3):
soc: Support for NPS HW scheduling
clocksource: update "fn" at CLOCKSOURCE_OF_DECLARE() of nps400 timer
clocksource: Add clockevent support to NPS400 driver
Vineet Gupta (9):
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: tim
for NPS HW scheduling
clocksource: update "fn" at CLOCKSOURCE_OF_DECLARE() of nps400 timer
clocksource: Add clockevent support to NPS400 driver
Vineet Gupta (9):
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether ha
On 12/09/2016 01:59 AM, Yuriy Kolerov wrote:
> Ignore value of interrupt distribution mode for common interrupts in
> IDU since setting of affinity using value from Device Tree is deprecated
> in ARC. Originally it is done in idu_irq_xlate() function and it is
> semantically wrong and does not guar
Hi Yuriy,
On 12/09/2016 01:59 AM, Yuriy Kolerov wrote:
> By default the kernel sets a value for default affinity which may
> not correspond to the real bitmap of potentially online CPUs. E.g.
> for ARC HS processors with 2 cores the default value of affinity in
> the kernel may be 0xF and it is wr
On 12/07/2016 07:36 AM, Alexey Brodkin wrote:
> We used to think that ARC cores in SMP SoC start
> consequentially, i.e. core0 -> core1 -> core2 -> core4.
>
> Moreover we treat core0 as a master core which does some
> low-level initialization before allowing other cores to
> start doing real stuff.
+CC PeterZ, Andy
On 12/07/2016 07:36 AM, Alexey Brodkin wrote:
> We used to think that ARC cores in SMP SoC start
> consequentially, i.e. core0 -> core1 -> core2 -> core4.
>
> Moreover we treat core0 as a master core which does some
> low-level initialization before allowing other cores to
> start
On 11/30/2016 06:21 AM, Yuriy Kolerov wrote:
>> On Tue 29-11-16 18:29:06, Yuriy Kolerov wrote:
>>> > > Despite the fact that subtraction of unsigned integers is a defined
>>> > > behaviour however such operations can lead to unexpected results. Thus
>>> > > it is better to check both left and right
ncy by default
- Using a different inline asm constraint for Zero Overhead loops
----
Vineet Gupta (2):
ARC: Don't use "+l" inline asm constraint
ARC: mm: IOC: Don't enable IOC by default
Yuriy Kolerov (1
Hi Yuriy,
Indeed good find. My nits and not-quite-nits below :-)
On 11/27/2016 08:07 PM, Yuriy Kolerov wrote:
> Originally pfn_pte(pfn, prot) macro had this definition:
>
> __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
>
> The value of pfn (Page Frame Number) is shifted to the left to get
On 11/22/2016 03:22 AM, Marc Zyngier wrote:
>> 2. The kernel will not call idu_irq_set_affinity() for IDU interrupt
>> > controller in some cases. It happens when the top interrupt
>> > controller does not support setting of the affinity and does not even
>> > support propagating of it (e.g. a GPIO
On 11/22/2016 06:34 AM, Arnd Bergmann wrote:
> We get a harmless false-positive warning with the newly added nps
> clocksource driver:
>
> drivers/clocksource/timer-nps.c: In function 'nps_setup_clocksource':
> drivers/clocksource/timer-nps.c:102:6: error: 'nps_timer1_freq' may be used
> uninitial
There are more ARC Linux HAPS users than Zebu ones.
Same kernel would work fine on both, even with embedded DT, assuming the FPGA
bitfile configuration is same
Suggested-by: Francois Bedard
Signed-off-by: Vineet Gupta
---
arch/arc/boot/dts/{zebu_hs.dts => haps_hs.dts}
On 11/15/2016 10:31 PM, Noam Camus wrote:
> From: Noam Camus
>
> Change log
> ---
> V6 --> V7
> Apply several comments made by Daniel Lezcano:
> 1) Remove CLOCK_EVT_FEAT_PERIODIC support. This way it is
> pure oneshot driver. This simplifies driver so that:
> nps_clkevent_add_thread()
> nps_cl
On 11/15/2016 09:23 AM, Daniel Lezcano wrote:
> On Tue, Nov 15, 2016 at 09:16:44AM -0800, Vineet Gupta wrote:
>> On 11/15/2016 02:30 AM, Daniel Lezcano wrote:
>>>> Thx Daniel. So I suppose for 4.10, I will get these merged,
>>>>> including the
>>&g
On 11/15/2016 02:30 AM, Daniel Lezcano wrote:
>> Thx Daniel. So I suppose for 4.10, I will get these merged,
>> > including the
>> > driver/clocksource bits. OK ?
> Hi Vineet,
>
> I just want to clarify. Do you want the entire series to go through my
> tree ? Or through your tree ?
I'
On 11/11/2016 03:11 PM, Daniel Lezcano wrote:
> On Fri, Nov 11, 2016 at 01:38:52PM -0800, Vineet Gupta wrote:
>> This adds support for
>>
>> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
>>from @CNT to @LIMIT, before optionally triggering an
... don't rely on cpuinfo populated in arc boot code. This paves way for
moving this code in drivers/clocksource/
And while at it, convert the WARN() to pr_warn() as sugested by Daniel
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 18 +-
1 file changed, 13 inser
ARC timers use aux registers for programming and this paves way for
moving ARC timer drivers into drivers/clocksource
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 85 +-
arch/arc/include/asm/mcip.h| 2 +-
include/soc/arc/aux.h
to allow future git mv of the driver into drivers/clocksource
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/setup.c | 11 +++
arch/arc/kernel/time.c | 9 -
2 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arc/kernel/setup.c b
... which allows for use in drivers/clocksource later
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 9 +
arch/arc/kernel/time.c | 18 +++---
include/soc/arc/timers.h | 38 ++
3 files changed, 42 insertions
The original distinction was done as they were developed at different
times and primarily because they are specific to UP (RTC) and SMP (GFRC).
But given that driver handles that at runtime, (i.e. not allowing
RTC as clocksource in SMP), we can simplify things a bit.
Signed-off-by: Vineet Gupta
Also remove the dependency on ARCv2, to increase compile coverage for
!ARCV2 builds
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/time.c | 2 +-
arch/arc/plat-axs10x/axs10x.c
serves as clockevent for all ARC linux builds.
TIMER1 is used for clocksource in arc700 builds.
- CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
ARC HS38 cores. These are independnet IP blocks with different
programming model respectively.
Signed-off-by: Vineet Gupta
adead.org/pipermail/linux-snps-arc/2016-October/001676.html
Vineet Gupta (8):
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
ARC: time: move time_init() out of the driver
ARC: timer: Build gfrc, rtc under same opt
A standard "C" shift will be handled appropriately by the compiler
depending on the endian for the build. So we don't need the
explicit distinction in code
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 30 --
1 file changed, 8 insertions(+
aud for early console
Vineet Gupta (3):
ARC: change return value of userspace cmpxchg assist syscall
ARC: timer: rtc: implement read loop in "C" vs. inline asm
Revert "ARC: build: retire old toggles"
Yuriy Kolerov (2):
ARC: IRQ: Do not use hwirq as virq
On 11/10/2016 02:49 AM, Daniel Lezcano wrote:
> On Thu, Nov 03, 2016 at 04:33:35PM -0700, Vineet Gupta wrote:
>> This adds support for
>>
>> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
>>from @CNT to @LIMIT, before optionally triggering an
+CC MarcZ
Hi Marc,
I have a question below
On 11/04/2016 05:17 AM, Yuriy Kolerov wrote:
> Ignore value of interrupt distribution mode for common interrupts in
> IDU since setting an affinity using value from Device Tree is deprecated
> in ARC. Originially it is done in idu_irq_xlate function and
On 11/07/2016 11:08 PM, Yuriy Kolerov wrote:
> The first patch fixes misuse of IRQ numbers. In some places of the
> Linux kernel for ARC hardware IRQ numbers are used as virtual IRQ
> numbers and obviously it is wrong.
>
> The second patch forces the kernel to set a simple distribution mode
> for c
On 11/07/2016 11:08 PM, Yuriy Kolerov wrote:
> At first smp_ipi_irq_setup() takes a cpu number and a hwirq number for
> the per core local interrupt line in the root interrupt controller and
> registers an appropriate IPI handler per cpu. However this function tries
> to bind a handler to the hwirq
On 11/03/2016 04:33 PM, Vineet Gupta wrote:
> Hi,
>
> This series addresses the long pending move of ARC timer code into
> drivers/clocksource/.
>
> Thx,
> -Vineet
>
> v2 -> v3
>
> - Fixed a bunch of typos in changelogs[D
Hi Noam,
I'm planning to merge this valid patch. Please look at arc mailing list for more
context !
Can you please check if this doesn't break ur platform and/or requires a fixup.
Thx,
-Vineet
On 11/07/2016 11:08 PM, Yuriy Kolerov wrote:
> At first smp_ipi_irq_setup() takes a cpu number and a
On 11/03/2016 05:23 AM, Yuriy Kolerov wrote:
> Multicore ARC configurations use IDU (Interrupt Distribution Unit) for
> distributing of common interrupts. In fact IDU is a interrupt controller
> on top of main per core interrupt controller.
>
> All common IRQs are physically and linearly mapped to
ARC timers use aux registers for programming and this paves way for
moving ARC timer drivers into drivers/clocksource
Reviewed-by: kbuild test robot
Signed-off-by: Vineet Gupta
---
v3 -> v4
- rolled back update of nps header to use the new aux header as that
requires prior fixing.
---
a
ARC timers use aux registers for programming and this paves way for
moving ARC timer drivers into drivers/clocksource
Reviewed-by: kbuild test robot
Signed-off-by: Vineet Gupta
---
v3 -> v4
- rolled back update of nps header to use the new aux header as that
requires prior fixing.
---
a
On 11/06/2016 11:34 PM, Noam Camus wrote:
> From: Noam Camus
>
> Generic IRQ mechanism is already acknowledge the IPI IRQ.
> Doing this once more time in IPI handler is not needed.
Changelog can be improved !
Generic IRQ mechanism can't ack the irq. The NPQ irqchip driver does this for
all
irqs
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