On Sun, 2012-10-28 at 00:49 +0900, Akinobu Mita wrote:
Use memchr_inv() to check the specified page is filled with zero.
Applied Thanks
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(OMAP), x86_32, x86_64 but not for
ppc
for sure.
I though patch 1 was part of the series Mark was supposed to apply.
Anyway both look fine to me so:
Both Acked-By: Vinod Koul vinod.k...@linux.intel.com
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On Tue, 2012-09-25 at 16:37 +0300, Andy Shevchenko wrote:
Perhaps these F: lines instead
F:include/linux/dw_dmac.h
F:drivers/dma/dw_dmac*
Might be. There is another idea to move them under drivers/dma/dw/
folder. So, Viresh, what do you think is better?
I think that a good
On Thu, 2012-09-27 at 10:31 +0300, Andy Shevchenko wrote:
+
+#include linux/module.h
+#include linux/pci.h
+#include linux/platform_device.h
+#include linux/dw_dmac.h
+
+static struct dw_dma_platform_data pdata = {
+ .is_private = 1,
+ .chan_allocation_order =
On Fri, 2012-09-21 at 14:37 -0400, Matt Porter wrote:
On Fri, Sep 21, 2012 at 08:42:47AM -0700, Tony Lindgren wrote:
Can't we come up with a version of dma_request_slave_channel that works
both ways for now:
mcspi_dma-dma_rx =
dma_request_slave_channel_compat(mask,
On Fri, 2012-09-21 at 19:47 +0100, Russell King - ARM Linux wrote:
On Fri, Sep 21, 2012 at 10:45:29PM +0530, S, Venkatraman wrote:
On Thu, Sep 20, 2012 at 8:13 PM, Matt Porter mpor...@ti.com wrote:
The EDMA DMAC has a hardware limitation that prevents supporting
scatter gather lists with
On Wed, 2012-09-26 at 12:11 +0530, Inderpal Singh wrote:
If we fail pl330_remove while some client is queued, the force unload
will fail and the
force unload will lose its purpose.
How about conditionally DMA_TERMINATE_ALL and free resources like
below ?
Why would you want to remove the
On Thu, 2012-09-27 at 12:43 +0300, Andy Shevchenko wrote:
On Thu, 2012-09-27 at 14:14 +0530, Vinod Koul wrote:
+static int __devinit dw_pci_probe(struct pci_dev *pdev,
+ const struct pci_device_id *id)
+{
...
+
+ pd = platform_device_alloc(dw_dmac
On Fri, 2012-09-21 at 15:05 +0300, Andy Shevchenko wrote:
Here is a patchset that allows to adapt the driver to the hardware
configuration during probe time. The hardware should have the specific
optional
parameters enabled. Otherwise the driver will consider values stored in the
platform
On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
Not all of the controllers support the 64 bit data width. Make it configurable
via platform data. The driver will try to get a value from the component
parameters, otherwise it will use the platform data.
What was this gen against, I
On Thu, 2012-09-27 at 15:41 +0530, viresh kumar wrote:
On Thu, Sep 27, 2012 at 3:31 PM, Vinod Koul vinod.k...@linux.intel.com
wrote:
Let me try again.
what does it take to do platform and PCI driver for this:
1. make dma h/w access (read/write) platform independent. which you have
On Thu, 2012-09-27 at 15:36 +0530, Vinod Koul wrote:
On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
Not all of the controllers support the 64 bit data width. Make it
configurable
via platform data. The driver will try to get a value from the component
parameters, otherwise
On Thu, 2012-09-27 at 07:41 +, Arnd Bergmann wrote:
On Thursday 27 September 2012, viresh kumar wrote:
I believe there is no common initialization part here, because PCI device
in any
case would be calling probe of platform device. :)
Looking at the driver more closely now. Right
On Thu, 2012-09-27 at 17:00 +0300, Andy Shevchenko wrote:
On Thu, Sep 27, 2012 at 1:06 PM, Vinod Koul vinod.k...@linux.intel.com
wrote:
On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
Not all of the controllers support the 64 bit data width. Make it
configurable
via platform
On Thu, 2012-10-04 at 08:26 +, Koul, Vinod wrote:
(Dropping stable Cc; Olof/Arnd or Vinod, is it possible you could add
that into the patch description when applying this?)
Reported-by: Stephen Warren swar...@nvidia.com
Acked-by: Stephen Warren swar...@nvidia.com
Should
help in doing that.
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Please read the FAQ at http://www.tux.org/lkml/
the
dma_transaction_type enum be used directly along with dma_cap_mask_t?
Some of the capabilities above are not there in dma_caps_t like DMA_SG.
Also DMA_INTERRUPT and DMA_PRIVATE would not make much sense here.
BUT would help to keep things simpler if have one definition which
includes all.
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On Tue, 2012-10-23 at 13:01 -0700, Kees Cook wrote:
This config item has not carried much meaning for a while now and is
almost always enabled by default. As agreed during the Linux kernel
summit, remove it.
CC: Vinod Koul vinod.k...@intel.com
CC: Dan Williams d...@fb.com
Signed-off
-slots_2d[slot].ysr = d-y;
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-node);
+ kfree(desc);
+ }
+
pi = pdmac-pif;
pl330_del(pi);
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)
+ return -EBUSY;
+ }
+
while (!list_empty(pdmac-desc_pool)) {
Did you get this code executed?
I think No.
The dmaengine holds the reference to channels, so if they are in use and
not freed by client your remove wont be called. So this check is
redundant
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Vinod Koul
, NULL);
list_for_each_entry_safe(pch, _p, pdmac-ddma.channels,
Ok with this one :)
Tried applying but didn't work out. You would need to regenerate this
one.
Thanks
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-start, resource_size(res));
+ kfree(pdmac-peripherals);
kfree(pdmac);
return 0;
This looks fine, but if you use devm_ functions then you dont need to do
all this.
Can you do that conversion instead?
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);
+
dma_async_device_unregister(pdmac-ddma);
amba_set_drvdata(adev, NULL);
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Please read
);
-}
-
-module_init(pch_dma_init);
-module_exit(pch_dma_exit);
+module_pci_driver(pch_dma_driver);
MODULE_DESCRIPTION(Intel EG20T PCH / LAPIS Semicon ML7213/ML7223/ML7831 IOH
DMA controller driver);
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will be there for
platform devices in other systems.
Also next version of this h/w on our systems is bringing subtle changes
so having them separate seemed to me a better idea.
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as DMA_PRIVATE
DMA: PL330: Set the capability of pdm0 and pdm1 as DMA_PRIVATE
Ulf Hansson (1):
dma/ste_dma40: Fixup clock usage during probe
Vinod Koul (3):
Merge branch 'for-3.7' into next
Merge branch 'fixes_for-3.6' into next
spi: davici - make davinci select edma
Wei
On Mon, 2012-10-08 at 23:36 -0400, Chris Ball wrote:
Hi Linus,
On Mon, Oct 08 2012, Chris Ball wrote:
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
tags/mmc-merge-for-3.7-rc1
to receive the MMC merge for 3.7. There are currently two conflicts
due
dependency
dmaengine: dw_dmac: amend description and indentation
drivers/dma/Kconfig|1 -
drivers/dma/dw_dmac.c | 33 ++---
drivers/dma/dw_dmac_regs.h |2 ++
3 files changed, 16 insertions(+), 20 deletions(-)
Applied thanks
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.
But why are you doing force removal of driver even when client is
holding a reference to you.
What happens when client finally tries to free the channel?
What is the problem you are trying to solve?
Let me know your view.
[1] https://patchwork.kernel.org/patch/1503171/
--
Vinod Koul
in
linux-next. But i feel
the order of patches is bad.
Yes looks like I forgot to sort the mbox series :(
since all patches were applied nicely, and they seem fairly independent
of each other it should cause issue. Let me know if you wnat me to redo
my -next.
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Intel Corp
independent
of each other it should cause issue. Let me know if you wnat me to redo
my -next.
yes. The ARCH specific patch 3/3 uses a routine created in 2/3. So they have
to be in right order for git bisect to work.
Done, it should reflect now.
Sorry for the mess.
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Intel Corp
-dma: fix missing unlock on error in imxdma_xfer_desc()
drivers/dma/imx-dma.c |4 +++-
drivers/dma/sirf-dma.c |4 ++--
2 files changed, 5 insertions(+), 3 deletions(-)
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Intel Corp.
signature.asc
Description: This is a digitally signed message part
On Sat, 2012-10-27 at 15:50 +0530, Inderpal Singh wrote:
Hi Vinod,
On 26 October 2012 10:15, Vinod Koul vk...@infradead.org wrote:
On Thu, 2012-10-25 at 16:53 +0530, Inderpal Singh wrote:
This code will get executed only in case of force removal of the
module which was discussed
On Sun, 2012-10-28 at 00:49 +0900, Akinobu Mita wrote:
Use memchr_inv() to check the specified page is filled with zero.
Signed-off-by: Akinobu Mita akinobu.m...@gmail.com
Cc: Vinod Koul vinod.k...@intel.com
Cc: Dan Williams d...@fb.com
---
Looks fine to me, need Dan;s ack before applying
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On Fri, 2012-10-26 at 23:35 +0900, Akinobu Mita wrote:
Use for_each_set_bit() to implement for_each_dma_cap_mask() and
remove unused first_dma_cap() and next_dma_cap().
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vchan-desc_free callback is
set
as pl08x_desc_free() for amba-pl08x driver.
Applied thanks
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and the unsupported number of source buffers are passed to the
device. But most drivers don't check it, so unexpected results will happen.
This makes an appropriate adjustment for these module parameters before use.
Applied thanks
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On Sun, 2012-10-28 at 01:05 -0700, Joe Perches wrote:
dev_level calls take less code than dev_printk(KERN_LEVEL
and reducing object size is good.
Coalesce formats for easier grep.
Applied thanks
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On Thu, 2012-10-18 at 13:32 +0800, Huang Shijie wrote:
From: Huang Shijie shij...@gmail.com
[1] Why add these new DMA control commands?
In mx6q, the gpmi-nand driver is the only user of the APBH-DMA. The dma
clock
is enabled when we have successfully requested a DMA channel. So
On Mon, 2012-07-02 at 13:16 +1000, Stephen Rothwell wrote:
Hi Vinod,
Today's linux-next merge of the slave-dma tree got conflicts in
drivers/dma/Kconfig and drivers/dma/Makefile between commit 06dba53e6fcf
(dmaengine: add OMAP DMA engine driver) from the arm tree and commit
c6da0ba8dfc8
On Mon, 2012-07-02 at 10:02 -0600, Stephen Warren wrote:
On 07/02/2012 02:22 AM, Laxman Dewangan wrote:
In cyclic mode of DMA, the byte transferred can be more
than the requested size and in this case, calculating
residuals based on the current position of DMA transfer to
bytes requested
On Mon, 2012-07-02 at 13:52 +0530, Laxman Dewangan wrote:
Rename the compatible name and driver name to match with
tegra dts file and as per clock driver.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
Applied both, Thanks
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On Mon, 2012-07-02 at 22:28 +0200, Guennadi Liakhovetski wrote:
Hi Vinod
On Thu, 28 Jun 2012, Guennadi Liakhovetski wrote:
Hi Vinod
On Fri, 25 May 2012, Guennadi Liakhovetski wrote:
Hi Vinod
On Fri, 25 May 2012, Vinod Koul wrote:
[snip]
Let me know if you plan
On Fri, 2012-07-13 at 11:09 +0530, Laxman Dewangan wrote:
On Friday 13 July 2012 08:45 AM, Vinod Koul wrote:
On Mon, 2012-07-02 at 10:02 -0600, Stephen Warren wrote:
On 07/02/2012 02:22 AM, Laxman Dewangan wrote:
In cyclic mode of DMA, the byte transferred can be more
than the requested
On Mon, 2012-07-02 at 22:28 +0200, Guennadi Liakhovetski wrote:
Let me know if you plan to fixing them or I will queue these up for 3.6
Please, queue these patches for the next merge window, we will work on
improving the driver after this split.
It's been a month since this
On Thu, 2012-07-05 at 12:29 +0200, Guennadi Liakhovetski wrote:
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index a79f10a..4e83f3e 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -27,10 +27,10 @@ struct sh_dmae_slave {
* a certain peripheral
*/
On Thu, 2012-07-05 at 12:29 +0200, Guennadi Liakhovetski wrote:
This patch extends the sh dmaengine driver to support the preferred channel
selection and configuration method, instead of using the private field
from struct dma_chan. We add a standard filter function to be used by
slave drivers
On Fri, 2012-07-13 at 11:09 +0300, Andy Shevchenko wrote:
Applied 1 2 only, Thanks
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Please
On Mon, 2012-07-16 at 08:37 +0200, Guennadi Liakhovetski wrote:
On Mon, 16 Jul 2012, Vinod Koul wrote:
On Thu, 2012-07-05 at 12:29 +0200, Guennadi Liakhovetski wrote:
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index a79f10a..4e83f3e 100644
--- a/include/linux
On Mon, 2012-07-16 at 09:13 +0200, Guennadi Liakhovetski wrote:
They tell the driver how the channel has to be configured to
support this
specific client. They are values of two specific registers. In
fact, CHCR
means exactly that - CHannel Control Register.
what exactly does the
On Mon, 2012-07-16 at 10:47 +0200, Guennadi Liakhovetski wrote:
I want to know what does ccr and mid_rid mean to dmac here?
CHCR contains a few fields, some enable various interrupt sources, some
specify repeat- and renew-modes, others yet specify transfer size, source
and destination
On Mon, 2012-07-16 at 12:01 +0200, Guennadi Liakhovetski wrote:
On Mon, 16 Jul 2012, Vinod Koul wrote:
On Mon, 2012-07-16 at 10:47 +0200, Guennadi Liakhovetski wrote:
I want to know what does ccr and mid_rid mean to dmac here?
CHCR contains a few fields, some enable various
On Mon, 2012-07-16 at 12:55 +0200, Guennadi Liakhovetski wrote:
On Mon, 16 Jul 2012, Vinod Koul wrote:
On Mon, 2012-07-16 at 12:01 +0200, Guennadi Liakhovetski wrote:
On Mon, 16 Jul 2012, Vinod Koul wrote:
On Mon, 2012-07-16 at 10:47 +0200, Guennadi Liakhovetski wrote:
I want
On Mon, 2012-07-16 at 14:47 +0200, Guennadi Liakhovetski wrote:
Yes, that's right - these values have to be written to DMAC channel
configuration registers, so, we do not have to change anything, those
values can remain DMAC parameters and be passed to it directly from
platform
On Thu, 2012-07-05 at 12:29 +0200, Guennadi Liakhovetski wrote:
This patch series supersedes the one from yesterday with the same title.
The 4 patches from v1 are all unchanged, v2 just prepends them with 3 more
preparatory patches. From the original series description:
Here's an attempt
On Wed, 2012-07-18 at 14:26 +0530, Laxman Dewangan wrote:
Enable the DMA clock when registering DMA driver and
disable clock when removing the DMA driver.
The failure was observed on Tegra20 based system by
Stephen Warren. However, it is working fine on tegra30
based system and probably
On Fri, 2012-07-20 at 11:34 +0530, Laxman Dewangan wrote:
On Friday 20 July 2012 11:32 AM, Vinod Koul wrote:
On Wed, 2012-07-18 at 14:26 +0530, Laxman Dewangan wrote:
Enable the DMA clock when registering DMA driver and
disable clock when removing the DMA driver.
The failure
On Wed, 2012-07-18 at 09:51 -0700, Joe Perches wrote:
Use a more current logging style.
Add pr_fmt to prefix dmaengine: to messages.
Convert printk(KERN_ERR to pr_err(.
Convert embedded function name use to %s: , __func__
Align arguments.
Applied thanks
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On Tue, Apr 09, 2013 at 02:05:42PM +0300, Andy Shevchenko wrote:
There is a patch series which introduces ACPI DMA helpers in similar way like
we have for DeviceTree.
In addition it applies this to the first user, namely dw_dmac driver.
Applied w/o 3 5.2 they failed, can you pls rebase and
On Thu, Apr 11, 2013 at 12:19:46AM +0200, Guennadi Liakhovetski wrote:
This patch adds Device Tree support to the shdma driver. No special DT
properties are used, only standard DMA DT bindings are implemented. Since
shdma controllers reside on SoCs, their configuration is SoC-specific and
On Wed, Apr 10, 2013 at 04:44:14PM -0700, Dave Jiang wrote:
These are the updated patches from first submission series and rebased against
vinod's slave-dma git tree for-linus branch.
Patches 1 4 have been updated after discussion with Dan. Patch 5 was acked
by
Dan but requires additional
-by: Vinod Koul vinod.k...@intel.com
---
Linus,
We have identified a race condition on the Atmel ARM-based AT91 DMA controller
driver that leads to hitting a BUG_ON() directive.
This error, only triggered after the inclusion of a patch that reduces the
softirq latency, is affecting several AT91
On Tue, Apr 16, 2013 at 08:11:57PM +0200, Rafael J. Wysocki wrote:
On Tuesday, April 16, 2013 03:14:47 PM Andy Shevchenko wrote:
On Mon, 2013-04-15 at 22:06 +0530, Vinod Koul wrote:
On Tue, Apr 09, 2013 at 02:05:42PM +0300, Andy Shevchenko wrote:
There is a patch series which introduces
On Tue, Apr 09, 2013 at 09:19:31AM +0200, Peter Ujfalusi wrote:
On 04/09/2013 08:52 AM, Santosh Shilimkar wrote:
I suggest Peter resend the patch with also Grant + Linus W cc:d so
they can queue it unless there are other related patches pending
somewhere else.
Am curious on your
On Tue, Mar 26, 2013 at 03:42:29PM -0700, Dave Jiang wrote:
The following series adds support for the Intel Atom S1200 product family
ioatdma. This ioatdma also implements a set of version v3.3 features such as
16
sources PQ, descriptor write back error status, and does not have many of the
On Sat, Mar 30, 2013 at 09:38:54AM +0100, Lars-Peter Clausen wrote:
On 03/29/2013 10:49 PM, Vinod Koul wrote:
On Mon, Mar 25, 2013 at 02:16:51PM +0100, Lars-Peter Clausen wrote:
This patch adds a new generic of dma xlate callback function which will
match a
channel by its id.
how
On Tue, Apr 09, 2013 at 05:53:59PM -0700, Dan Williams wrote:
On Tue, Apr 9, 2013 at 12:28 AM, Vinod Koul vinod.k...@intel.com wrote:
Are you okay with the series. Merge window is very close...
Hi Vinod, thanks for the ping.
Chatted with Dave patches 1-3 and 5-8, and 10 are reviewed
On Tue, Apr 09, 2013 at 04:33:06PM +0200, Peter Ujfalusi wrote:
cyclic DMA is only used by audio which needs DMA to be started without a
delay.
If the DMA for audio is started using the tasklet we experience random
channel switch (to be more precise: channel shift).
Reported-by: Peter
On Wed, Apr 10, 2013 at 10:30:59AM +0530, Vinod Koul wrote:
On Tue, Apr 09, 2013 at 05:53:59PM -0700, Dan Williams wrote:
On Tue, Apr 9, 2013 at 12:28 AM, Vinod Koul vinod.k...@intel.com wrote:
Are you okay with the series. Merge window is very close...
Hi Vinod, thanks for the ping
Hi Linus,
Please pull the following two patches to recive the fixes for slave-dmaengine
The first one fixes issue in pl330 to check for DT compatible and second one
fixes omap-dma to start without delay
The following changes since commit 07961ac7c0ee8b546658717034fe692fd12eefa9:
are available
?
http://o.cs.uvic.ca:20810/perl/cid.pl?cid=765024697807ad1e1cac332aa891253ca4a339da
It shows the same for linus's merge!
http://o.cs.uvic.ca:20810/perl/cid.pl?cid=cfb63bafdb87bbcdc5d6dbbca623d3f69475f118
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On Wed, Mar 27, 2013 at 10:57:57AM +0200, Andy Shevchenko wrote:
+ * @dev: struct device to get DMA request from
+ * @index: index of FixedDMA descriptor for @dev
+ *
+ * Returns pointer to appropriate dma channel on success or NULL on error.
+ */
+struct dma_chan
On Wed, Mar 27, 2013 at 10:57:59AM +0200, Andy Shevchenko wrote:
Since we have CSRT only to get additional DMA controller resources, let's get
rid of drivers/acpi/csrt.c and move its logic inside ACPI DMA helpers code.
Signed-off-by: Andy Shevchenko andriy.shevche...@linux.intel.com
On Mon, Mar 25, 2013 at 02:16:51PM +0100, Lars-Peter Clausen wrote:
This patch adds a new generic of dma xlate callback function which will match
a
channel by its id.
how will the client know which id to request?
Signed-off-by: Lars-Peter Clausen l...@metafoo.de
---
On Mon, Mar 25, 2013 at 01:23:52PM +0100, Lars-Peter Clausen wrote:
The 'mask' parameter is not modified in __dma_request_channel and really
shouldn't be. Make this explicit by making the parameter const.
Signed-off-by: Lars-Peter Clausen l...@metafoo.de
Applied thanks.
I manually fixed a
On Mon, Mar 25, 2013 at 02:24:22PM +0100, Lars-Peter Clausen wrote:
list_for_each_entry is able to handle empty lists just fine, there is no need
to make sure that the list is non empty.
Signed-off-by: Lars-Peter Clausen l...@metafoo.de
Applied thanks
---
drivers/dma/of-dma.c | 5 -
1
Hi Linus,
Please pull the following two patches to recive the fixes for slave-dmaengine.
The first one is for making slave_id value correct for dw_dmac and send one
fixes the endieness in DT parsing
The following changes since commit 8bb9660418e05bb1845ac1a2428444d78e322cc7:
are available in
On Tue, Mar 26, 2013 at 04:53:53PM +0200, Andy Shevchenko wrote:
It includes few cleanups when used with DT. Patch 4/4 is a modified version of
the [1].
Applied 1, 2, 4 2.2
Thanks
~Vinod
[1] http://www.spinics.net/lists/arm-kernel/msg225366.html
Since v1:
- address Arnd's comments
-
On Tue, Apr 02, 2013 at 12:57:11PM +1100, Stephen Rothwell wrote:
Hi Vinod,
After merging the slave-dma tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/linux/netdevice.h:38:0,
from arch/x86/net/bpf_jit_comp.c:12:
On Tue, Apr 02, 2013 at 12:44:36PM +0200, Lars-Peter Clausen wrote:
On 04/02/2013 11:12 AM, PADMAVATHI VENNA wrote:
Use the generic of_dma_xlate_by_chan_id xlate callback instead of a custom
implementation.
Hi Padma,
Can you please fix your MUA to
1) not break the message ids
2) reply inline
On Sun, Mar 31, 2013 at 06:17:59PM +0200, Anatolij Gustschin wrote:
Add generic DMA bindings and register the DMA controller
to DT DMA helpers.
I need someone who understands DT better than me to comment/ack...
Arnd...?
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
On Wed, Nov 28, 2012 at 03:46:08AM +0530, Jiang, Dave wrote:
The existing code set a value in the PCI_CHANERRMSK_INT register
for a workaround to address a pre-silicon bug on the Intel 5520 IO hub that
has been fixed when the hardware was released. There is no need for this
code.
On Mon, Mar 04, 2013 at 11:09:24AM +0200, Andy Shevchenko wrote:
The first approach to get dmatest module more flexible and easier to play
with.
The amount of patches could be reduced, but I would like to get a comments
first on smaller pieces. The entire series creates dmatest.txt file in
On Tue, Feb 19, 2013 at 10:33:53PM +0200, maxin.j...@gmail.com wrote:
From: Maxin B. John maxin.j...@enea.com
Fix this compiler warning:
warning: 'td_remove' defined but not used [-Wunused-function]
Signed-off-by: Maxin B. John maxin.j...@enea.com
Applied, thanks
---
On Mon, Mar 04, 2013 at 02:36:27PM +0530, Sachin Kamat wrote:
Use the newly introduced devm_ioremap_resource() instead of
devm_request_and_ioremap() which provides more consistent error handling.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Reviewed-by: Thierry Reding
On Wed, Mar 06, 2013 at 02:56:05PM -0500, Matt Porter wrote:
Add a dmaengine API to retrieve slave SG transfer limits.
The API is optionally implemented by dmaengine drivers and when
unimplemented will return a NULL pointer. A client driver using
this API provides the required dma channel,
On Wed, Mar 06, 2013 at 02:56:04PM -0500, Matt Porter wrote:
Changes since v3:
- Change api name to dma_get_slave_sg_limits() to avoid
confusion with h/w caps which are static.
Changes since v2:
- Change to a separate slave sg specific api. Drop the
generic
On Mon, Mar 11, 2013 at 04:30:26PM -0600, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver.
Signed-off-by: Stephen Warren swar...@nvidia.com
Applied thanks
On Tue, Mar 12, 2013 at 08:53:37PM -0300, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Since commit 84c1e63c12 (dma: Remove erroneous __exit and __exit_p()
references)
the following section mismatch happens:
WARNING: drivers/built-in.o(.text+0x20f94): Section
On Sun, Feb 24, 2013 at 04:36:09PM +0100, Markus Pargmann wrote:
No DMA of-function alters the name, so this patch changes the name arguments
to be constant. Most drivers will probably request DMA channels using a
constant name.
Signed-off-by: Markus Pargmann m...@pengutronix.de
Applied
On Mon, Feb 25, 2013 at 04:46:26AM +0530, Syam Sidhardhan wrote:
kfree on NULL pointer is a no-op.
Signed-off-by: Syam Sidhardhan s.s...@samsung.com
Applied thanks
---
drivers/dma/imx-dma.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/dma/imx-dma.c
On Fri, Mar 15, 2013 at 02:18:20PM +0530, Viresh Kumar wrote:
In of_dma_controller_register() routine we are calling of_get_property() as an
parameter to be32_to_cpup(). In case the property doesn't exist we will get a
crash.
This patch changes this code to check if we got a valid property
On Mon, Mar 18, 2013 at 01:30:29PM +, Arnd Bergmann wrote:
On Monday 18 March 2013, Shevchenko, Andriy wrote:
Hello!
It seems the one (as I think good) question was left unanswered:
http://www.spinics.net/lists/arm-kernel/msg186120.html
What is your opinions, comments?
I'm
On Thu, Mar 21, 2013 at 03:48:50PM +0530, Viresh Kumar wrote:
On 21 March 2013 15:16, Vinod Koul vinod.k...@intel.com wrote:
On Fri, Mar 15, 2013 at 02:18:20PM +0530, Viresh Kumar wrote:
In of_dma_controller_register() routine we are calling of_get_property()
as an
parameter
On Thu, Mar 21, 2013 at 11:49:17AM +0200, Andy Shevchenko wrote:
When we pause the channel after transfer is completed we might stuck in the
dwc_chan_pause() because the FIFO_EMPTY flag will never be asserted. To avoid
the endless loop we introduce a timeout here (*). The proper solution is to
On Tue, Feb 12, 2013 at 11:25 AM, Tomoya MORINAGA tomoya.r...@gmail.com
wrote:
pdc_desc_get() is called from pd_prep_slave_sg, and the function is
called from interrupt context(e.g. Uart driver pch_uart.c).
In fact, I saw kernel error message.
So, GFP_ATOMIC must be used not GFP_NOIO.
On Wed, Feb 20, 2013 at 01:52:17PM +0200, Andy Shevchenko wrote:
On some hardware configurations we have got the request line with the offset.
The patch introduces convert_slave_id() helper for that cases. The request
line
base is came from the driver data provided by the platform_device_id
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