On Thu, Jan 10, 2013 at 01:41:04PM -0500, Matt Porter wrote:
> The edma_slave_config() implementation depends on the
> direction field such that it will not properly configure
> a slave channel when called without direction set.
>
> This fixes the implementation so that the slave config
> is copie
On Thu, Jan 10, 2013 at 02:07:03PM -0500, Matt Porter wrote:
> The call is implemented as follows:
>
> struct dmaengine_chan_caps
> *dma_get_channel_caps(struct dma_chan *chan,
> enum dma_transfer_direction dir);
>
> The dma transfer direction parameter may
On Thu, Jan 10, 2013 at 02:07:04PM -0500, Matt Porter wrote:
> +/* struct dmaengine_chan_caps - expose capability of a channel
> + * Note: each channel can have same or different capabilities
> + *
> + * This primarily classifies capabilities into
> + * a) APIs/ops supported
> + * b) channel physic
On Thu, Jan 10, 2013 at 02:07:05PM -0500, Matt Porter wrote:
> Implement device_channel_caps().
>
> EDMA has a finite set of PaRAM slots available for linking
> a multi-segment SG transfer. In order to prevent any one
> channel from consuming all PaRAM slots to fulfill a large SG
> transfer, the d
On Tue, Jan 15, 2013 at 01:19:48AM +0100, Cong Ding wrote:
> the pointer cfg is dereferenced in line 594, so it's no reason to check null
> again in line 620.
>
> Signed-off-by: Cong Ding
> ---
> drivers/dma/mmp_pdma.c |6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --
On Tue, Jan 15, 2013 at 01:23:48AM +0100, Cong Ding wrote:
> the variable chan is dereferenced in line 635, so it is no reason to check
> null again in line 641.
>
> Signed-off-by: Cong Ding
> ---
> drivers/dma/sh/shdma-base.c |3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/driver
On Sun, Jan 20, 2013 at 11:37:35AM -0500, Matt Porter wrote:
> On Sun, Jan 20, 2013 at 12:37:34PM +0000, Vinod Koul wrote:
> > On Thu, Jan 10, 2013 at 02:07:03PM -0500, Matt Porter wrote:
> > > The call is implemented as follows:
> > >
> &g
On Sun, Jan 20, 2013 at 11:51:08AM -0500, Matt Porter wrote:
> The explanation in the cover letter mentions that dmaengine_slave_config() is
> required to be called prior to dmaengine_get_channel_caps(). If we
> switch to the alternative API, then that would go away including the
> dependency on di
On Wed, Jan 16, 2013 at 03:48:50PM +0200, Andy Shevchenko wrote:
> Currently descriptors are allocated from normal cacheable memory and that
> slows
> down filling the descriptors, as we need to call cache_coherency routines
> afterwards. It would be better to allocate memory for these descriptors
On Thu, Jan 17, 2013 at 01:35:47PM +0530, Viresh Kumar wrote:
> On Thu, Jan 17, 2013 at 1:33 PM, Andy Shevchenko
> wrote:
> > The driver assumes that hardware has two AHB masters which might not be
> > always
> > true. In such cases we must not exceed number of the AHB masters present in
> > the
On Fri, Jan 18, 2013 at 02:14:15PM +0200, Andy Shevchenko wrote:
> The proper place for the main logic of the soft LLP mode is
> dwc_scan_descriptors. It prevents to get the transfer unexpectedly aborted in
> case the user calls dwc_tx_status.
>
> Signed-off-by: Andy Shevchenko
Applied, Thanks
-
On Mon, Jan 21, 2013 at 11:00:44AM +0200, Andy Shevchenko wrote:
> Currently the driver returns full length of the active descriptor which is
> wrong. We have to go throught the active descriptor and sum up the length of
> unsent children in the chain along with the actual data in the DMA channel
w
On Mon, Jan 21, 2013 at 11:45:51AM +0200, Andy Shevchenko wrote:
> > > + return 0;
> > hmmm, why not use BLOCK_TS value. That way you dont need to look at
> > direction
> > and along with burst can easily calculate residue...
>
> Do you mean to read CTL hi/lo and do
>
> desc->len - ctlhi.block_t
Hi Linus
Please consider pull to receive few fixes on slave dmanengine.
There are trivial fixes in imx-dma, tegra-dma & ioat driver
The following changes since commit d1c3ed669a2d452cacfb48c2d171a1f364dae2ed:
Linus Torvalds (1):
Linux 3.8-rc2
are available in the git repository at:
On Wed, Feb 13, 2013 at 12:26:23PM +0100, Cong Ding wrote:
> > > > You need to send this to whomever is working on DMA bindings.
> > > Thank you bob, I added Vinod the the receiver list.
> > I have moved the of/dma.c to dma/of-dma.c, can you regenerate this patch and
> > resend to me
> Sorry Vinod,
On Thu, Feb 14, 2013 at 10:41:09AM +0200, Andy Shevchenko wrote:
> In some cases we got the device without dma_mask configured. We have to apply
> the default value to avoid crashes during memory mapping.
>
> Signed-off-by: Andy Shevchenko
> Acked-by: Viresh Kumar
Applied, thanks
> ---
> Since
On Tue, Feb 12, 2013 at 09:02:36PM +0200, Mika Westerberg wrote:
> > Okay, who parses the CSRT table and how is this presented to OS.
>
> ACPI code, found under drivers/acpi/csrt.c handles this. Note that this
> code is heading 3.9 so it is not in mainline yet but available in
> linux-pm.git/linux
On Thu, Feb 14, 2013 at 11:16:10AM +0100, Cong Ding wrote:
> The memory allocated to ofdma might be a leakage when error occurs.
>
> Signed-off-by: Cong Ding
Applied, thanks
--
~Vinod
> ---
> drivers/dma/of-dma.c |1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/dma/of-dma.c
On Thu, Feb 14, 2013 at 10:03:10AM +0100, Fabio Baltieri wrote:
> Fix dma_tc_handle() to call d40_desc_remove() and d40_desc_done() only
> for non-cyclic transfers, as this was breaking ux500_pcm since
> introduced in:
>
> d49278e dmaengine: dma40: Add support to split up large elements
>
> Repor
On Thu, Feb 14, 2013 at 11:00:14AM +0200, Andy Shevchenko wrote:
> This is a patcset of independent fixes of the DMAC drivers. They are simple
> and
> being understandable in their context.
all applied, thanks
--
~Vinod
>
> Since v1:
> - address all comments
> - add ACKs
> - rebase on top of
On Fri, Feb 15, 2013 at 02:18:59PM -0800, Dan Williams wrote:
> On Fri, Feb 15, 2013 at 1:53 PM, Stephen Warren wrote:
> > From: Stephen Warren
> >
> > Tegra only supports, and always enables, device tree. Remove all ifdefs
> > and runtime checks for DT support from the driver.
> >
> > Signed-off
On Wed, Jan 09, 2013 at 08:04:28PM +0200, Mika Westerberg wrote:
>
> If the platform device is not yet created (like it might be when it is
> enumerated from ACPI for example), the probe fails completely. Certainly
> not the situation we want.
>
> Calling platform_driver_register() handles both c
On Thu, Jan 10, 2013 at 02:04:53PM +0530, Viresh Kumar wrote:
> On 9 January 2013 21:08, Vinod Koul wrote:
> >> >> subsys_initcall(dw_init);
> > Viresh, Linus
> >
> > We had this discussion sometime back. pl022 use dma and we need DMA before
> > SPI.
&g
On Thu, Jan 10, 2013 at 10:52:55AM +0200, Andy Shevchenko wrote:
> Recend to Vinod for review.
>
> Since v1:
> - is_slave_xfer renamed to is_slave_direction
> - changelog fixed for "dma: dw_dmac: clear suspend bit during termination"
> - typo fixed in the changelog of "dw_dmac: backlink to dw_d
On Mon, Dec 10, 2012 at 11:25:17PM +0100, Davide Ciminaghi wrote:
> On Mon, Dec 10, 2012 at 10:44:09PM +0100, Linus Walleij wrote:
> > On Mon, Dec 10, 2012 at 2:42 PM, Davide Ciminaghi
> > wrote:
> >
> > > From: Alessandro Rubini
> > >
> > > The header is used by drivers/dma/amba-pl08x.c, which
On Thu, 2012-09-27 at 10:31 +0300, Andy Shevchenko wrote:
> +
> +#include
> +#include
> +#include
> +#include
> +
> +static struct dw_dma_platform_data pdata = {
> + .is_private = 1,
> + .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
> + .chan_priority = CHAN_PRIORITY_ASCENDING
On Fri, 2012-09-21 at 14:37 -0400, Matt Porter wrote:
> On Fri, Sep 21, 2012 at 08:42:47AM -0700, Tony Lindgren wrote:
> >
> > Can't we come up with a version of dma_request_slave_channel that works
> > both ways for now:
> >
> > mcspi_dma->dma_rx =
> > dma_request_slave_channel_c
On Fri, 2012-09-21 at 19:47 +0100, Russell King - ARM Linux wrote:
> On Fri, Sep 21, 2012 at 10:45:29PM +0530, S, Venkatraman wrote:
> > On Thu, Sep 20, 2012 at 8:13 PM, Matt Porter wrote:
> > > The EDMA DMAC has a hardware limitation that prevents supporting
> > > scatter gather lists with any nu
On Wed, 2012-09-26 at 12:11 +0530, Inderpal Singh wrote:
> If we fail pl330_remove while some client is queued, the force unload
> will fail and the
> force unload will lose its purpose.
> How about conditionally DMA_TERMINATE_ALL and free resources like
> below ?
Why would you want to remove the
On Thu, 2012-09-27 at 12:43 +0300, Andy Shevchenko wrote:
> On Thu, 2012-09-27 at 14:14 +0530, Vinod Koul wrote:
> > > +static int __devinit dw_pci_probe(struct pci_dev *pdev,
> > > + const struct pci_device_id *id)
> > >
On Fri, 2012-09-21 at 15:05 +0300, Andy Shevchenko wrote:
> Here is a patchset that allows to adapt the driver to the hardware
> configuration during probe time. The hardware should have the specific
> optional
> parameters enabled. Otherwise the driver will consider values stored in the
> platfor
On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
> Not all of the controllers support the 64 bit data width. Make it configurable
> via platform data. The driver will try to get a value from the component
> parameters, otherwise it will use the platform data.
>
What was this gen against,
On Thu, 2012-09-27 at 15:41 +0530, viresh kumar wrote:
> On Thu, Sep 27, 2012 at 3:31 PM, Vinod Koul
> wrote:
> > Let me try again.
> >
> > what does it take to do platform and PCI driver for this:
> > 1. make dma h/w access (read/write) platform independent. w
On Thu, 2012-09-27 at 15:36 +0530, Vinod Koul wrote:
> On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
> > Not all of the controllers support the 64 bit data width. Make it
> > configurable
> > via platform data. The driver will try to get a value from the com
On Thu, 2012-09-27 at 07:41 +, Arnd Bergmann wrote:
> On Thursday 27 September 2012, viresh kumar wrote:
> > I believe there is no common initialization part here, because PCI device
> > in any
> > case would be calling probe of platform device. :)
>
> Looking at the driver more closely now.
On Thu, 2012-09-27 at 17:00 +0300, Andy Shevchenko wrote:
> On Thu, Sep 27, 2012 at 1:06 PM, Vinod Koul
> wrote:
> > On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
> >> Not all of the controllers support the 64 bit data width. Make it
> >> configurab
On Mon, 2012-10-01 at 12:04 +0300, Andy Shevchenko wrote:
> On Thu, 2012-09-27 at 16:03 +0530, Vinod Koul wrote:
> > On Thu, 2012-09-27 at 15:36 +0530, Vinod Koul wrote:
> > > On Tue, 2012-09-25 at 14:39 +0300, Andy Shevchenko wrote:
> > > > Not all of the contr
On Sat, Jan 05, 2013 at 05:36:08PM +0530, Laxman Dewangan wrote:
> NVIDIA's Tegra114 has APB DMA controller which supports channel wise
> pause control. The global pause is used for clock gating and hence
> DMA registers are not accessible if DMAs are globally disabled.
>
> Add support for use of
On Mon, Jan 07, 2013 at 11:26:37AM +1100, Stephen Rothwell wrote:
> After merging the slave-dma tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
Hi Stephen,
I rebased the tree last night and messed up at two places. Viresh helped to fix
one. I have pushed the fixed tree now
those, but I've rebased everything
> on top of v3.8-rc2 to avoid a (trivial) file rename conflict.
>
> Vinod, these should probably end up in the arm-soc tree so they can receive
> some testing from drivers using it. Can I have your Acked-by for this?
Sure the patchse
this shape as well without lots of pieces spread out all over
> the place.
Sure the change look fine and mostly seems to be code reorg and cleanup.
Perhpas the below diffstat could have helped in review if it showed file move
Acked-by: Vinod Koul
>
> Linus Walleij (8):
> dma: coh901318:
On Tue, Jan 08, 2013 at 09:35:57AM +1100, Stephen Rothwell wrote:
> Hi Vinod,
>
> In commit 548860697046 ("dmaengine: dw_dmac: Enhance device tree
> support") (which was changed since yesterday :-(),
Yes due to build conflict I redid the rebase of my tree.
> an instance of
> __devinit has been ad
On Mon, Jan 07, 2013 at 02:43:08PM -0800, Greg Kroah-Hartman wrote:
> On Tue, Jan 08, 2013 at 09:35:57AM +1100, Stephen Rothwell wrote:
> > Hi Vinod,
> >
> > In commit 548860697046 ("dmaengine: dw_dmac: Enhance device tree
> > support") (which was changed since yesterday :-(), an instance of
> > _
On Tue, Jan 08, 2013 at 10:19:12AM +0530, Viresh Kumar wrote:
> @Vinod: I hope you can edit this patch yourself?
Done, I have removed this and another instance
--
~Vinod
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
On Tue, Jan 08, 2013 at 01:09:19PM +0800, Gary Zhang wrote:
> SDMA uses firmware to expand some features for modules.
> add SDMA firmware for i.mx6 series,
Did you read firmware/README.AddingFirmware
Pls send this to Ben/David.
--
~Vinod
>
> Signed-off-by: Gary Zhang
> ---
> firmware/Makefil
On Sun, Jan 06, 2013 at 09:52:01PM +0530, Laxman Dewangan wrote:
> This patch series add the channel wise pause control on dma driver and then
> add support for Tegra114 SoCs.
>
> The orginal change was in single patch and based on review comment, trying to
> split
> the change to have more meani
On Mon, Jan 07, 2013 at 11:48:39PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Fix the following warnings when building with W=1 option:
>
> drivers/dma/mxs-dma.c: In function 'mxs_dma_alloc_chan_resources':
> drivers/dma/mxs-dma.c:368:25: warning: comparison between signed and unsigne
On Fri, Jan 04, 2013 at 04:37:44PM +0100, javier Martin wrote:
> On 30 October 2012 16:58, Javier Martin
> wrote:
> > HW chaining is currently broken in imx-dma. It can be easily reproduced
> > doing
> > intensive accesses to a external MMC card and checking how the file system
> > is corrupted.
On Mon, Jan 07, 2013 at 02:54:54PM +0200, Andy Shevchenko wrote:
> Hi, Vinod.
>
> I noticed you missed the 3.8 merge window and I can't see any of my
> recent patches [1] in your next branch. So, what is your plan regarding
> to them?
Yes i missed quite a few due to my travel, but now am back :)
On Wed, Jan 09, 2013 at 03:26:22PM +0530, Laxman Dewangan wrote:
> The flag parameter is added in the cyclic transfer request.
> Use the flag option of:
> - DMA_PREP_INTERRUPT for enabling interrupt.
> - DMA_CTRL_ACK for deciding whether ack is requred or not for
> descriptor.
>
> Signed-off-by:
On Wed, Jan 09, 2013 at 10:17:00AM +0200, Andy Shevchenko wrote:
> If we don't yet have the platform device for the driver when it is being
> loaded
> we fail to probe the driver. So instead of calling probe() directly we call
> platform_driver_register(). It will call the probe() immediately if w
On Wed, Jan 09, 2013 at 10:17:02AM +0200, Andy Shevchenko wrote:
> This function helps to distinguish the slave type of transfer by checking the
> direction parameter.
>
> Signed-off-by: Andy Shevchenko
> Reviewed-by: Viresh Kumar
> Reviewed-by: Mika Westerberg
> Reviewed-by: Linus Walleij
> C
On Wed, Jan 09, 2013 at 10:17:15AM +0200, Andy Shevchenko wrote:
> From: Heikki Krogerus
>
> The DMA transfer could not be established if previously it was paused and
> terminated. In that case the channel's suspend bit remains set that prevents
> to
> transfer anything until channel is resumed.
On Wed, Jan 09, 2013 at 10:17:10AM +0200, Andy Shevchenko wrote:
> The same information could be exctracted from the struct dma_chan.
typo... ^^
> The patch introduces helper function dwc_get_data_width() as well.
>
> Signed-off-by: Andy Shevchenko
> Acked-by: Vire
On Wed, Jan 09, 2013 at 04:58:02PM +0200, Andy Shevchenko wrote:
> On Wed, Jan 9, 2013 at 4:19 PM, Viresh Kumar wrote:
> > n 9 January 2013 19:20, Vinod Koul wrote:
> >>> +static inline bool is_slave_xfer(enum dma_transfer_direction direction)
> >>>
On Wed, Jan 09, 2013 at 05:02:39PM +0200, Andy Shevchenko wrote:
> On Wed, Jan 9, 2013 at 4:24 PM, Vinod Koul wrote:
> > On Wed, Jan 09, 2013 at 10:17:10AM +0200, Andy Shevchenko wrote:
> >> The same information could be exctracted from the struct
On Wed, Jan 09, 2013 at 04:56:45PM +0200, Andy Shevchenko wrote:
> On Wed, Jan 9, 2013 at 3:47 PM, Vinod Koul wrote:
> > On Wed, Jan 09, 2013 at 10:17:00AM +0200, Andy Shevchenko wrote:
> >> If we don't yet have the platform device for the driver when it is being
>
On Wed, Jan 09, 2013 at 10:16:59AM +0200, Andy Shevchenko wrote:
> There is a patchset against dw_dmac driver. It has been resent for Vinod to
> review after he returned back from vacation and holidays. That's why there is
> no Cc list.
Applied these:
21fe3c5 dma: dw_dmac: add dwc_chan_pause and dw
On Fri, Sep 16, 2016 at 09:34:44AM +0100, Peter Griffin wrote:
> Hi Vinod & Stephen,
>
> On Fri, 16 Sep 2016, Stephen Rothwell wrote:
>
> > Hi Vinod,
> >
> > After merging the slave-dma tree, today's linux-next build (arm
> > multi_v7_defconfig build) failed like this:
>
> FYI Patch 17 of 19 in
On Fri, Sep 16, 2016 at 11:33:20AM +0300, Peter Ujfalusi wrote:
> The DMAengine driver for omap-dma use three function calls from the
> plat-omap legacy driver. When the DMAengine driver is built when ARCH_OMAP
> is not set, the compilation will fail due to missing symbols.
> Add empty inline funct
On Fri, Sep 16, 2016 at 11:33:23AM +0300, Peter Ujfalusi wrote:
> Fixes compiler warning on 64bit architectures.
Would be good to give the warning message here
>
> Signed-off-by: Peter Ujfalusi
> ---
> drivers/dma/ti-dma-crossbar.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletion
On Wed, Sep 21, 2016 at 09:21:32AM +0530, Vinod Koul wrote:
> On Fri, Sep 16, 2016 at 11:33:20AM +0300, Peter Ujfalusi wrote:
> > The DMAengine driver for omap-dma use three function calls from the
> > plat-omap legacy driver. When the DMAengine driver is built when ARCH_OMAP
>
On Mon, Jun 13, 2016 at 08:04:12AM -0700, Randy Dunlap wrote:
> On 06/12/16 21:22, Vinod Koul wrote:
> > On Thu, Jun 09, 2016 at 05:01:38PM -0700, Randy Dunlap wrote:
> >> From: Randy Dunlap
> >>
> >> kconfig tools generate the following warning
On Tue, Jun 07, 2016 at 07:21:15PM +0530, Kedareswara rao Appana wrote:
> The AXI DMA is a soft ip, which can be programmed to support
> 32 bit addressing or greater than 32 bit addressing.
>
> When the AXI DMA ip is configured for 32 bit address space
> in simple dma mode the buffer address is sp
On Thu, Jun 16, 2016 at 07:19:38AM +, Appana Durga Kedareswara Rao wrote:
> Hi Vinod,
>
> Thanks for the review...
>
> >
> > On Tue, Jun 14, 2016 at 08:18:09AM +, Appana Durga Kedareswara Rao
> > wrote:
> > > > > Yes it is HW capability. It can be either in simple mode or SG
> > >
On Fri, Jun 10, 2016 at 02:42:32PM +0530, Kedareswara rao Appana wrote:
> This patch adds support for AXI DMA multi-channel dma mode
> Multichannel mode enables DMA to connect to multiple masters
> And slaves on the streaming side.
> In Multichannel mode AXI DMA supports 2D transfers.
Funny format
On Wed, Jun 08, 2016 at 09:51:57AM +0100, Jon Hunter wrote:
> Hi Peter,
>
> On 07/06/16 18:38, Peter Griffin wrote:
> > There is no point calculating the residue if there is
> > no txstate to store the value.
> >
> > Signed-off-by: Peter Griffin
> > ---
> > drivers/dma/tegra20-apb-dma.c | 2 +-
On Tue, Jun 07, 2016 at 06:38:33PM +0100, Peter Griffin wrote:
> Hi Vinod,
>
> This series is a bunch of cleanup updates to various
> dmaengine drivers, based on some of the review feeback to my fdma series.
Good cleanup, Applied, thanks
--
~Vinod
On Tue, Jun 21, 2016 at 04:02:05PM +, Appana Durga Kedareswara Rao wrote:
> Hi Vinod,
>
> Thanks for the review...
>
> >
> > On Fri, Jun 10, 2016 at 02:42:32PM +0530, Kedareswara rao Appana wrote:
> > > This patch adds support for AXI DMA multi-channel dma mode
> > > Multichannel mode
On Tue, Jun 21, 2016 at 04:19:38PM +, Punnaiah Choudary Kalluri wrote:
> > > > > > > mode Earlier In the driver this configuration is read from the
> > > > > > > device-tree But as per lars and your suggestion moved it as
> > > > > > > runtime
> > config
> > > > parameters.
> > > > > >
> > > >
On Thu, Sep 22, 2016 at 01:42:35PM +0200, Arnd Bergmann wrote:
> On Thursday, September 15, 2016 5:50:49 PM CEST Arnd Bergmann wrote:
> > The sdma_handle_channel_loop() function was modified in one patch
> > and removed in another, and the merge between those patches left
> > an unused function in
On Sat, Sep 17, 2016 at 05:05:16PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sat, 17 Sep 2016 16:56:56 +0200
>
> Several update suggestions were taken into account
> from static source code analysis.
Applied all, thanks
--
~Vinod
On Thu, Sep 22, 2016 at 08:51:15PM +0200, Sam Van Den Berge wrote:
> This patch updates the s3c24xx dma driver to be able to pass a
> dma_slave_map array via the platform data. This is needed to
> be able to use the new, simpler dmaengine API [1].
> I used the virtual DMA channels as a parameter fo
On Wed, Jul 27, 2016 at 02:32:58PM -0700, Viresh Kumar wrote:
> The DMA device can't be registered if it doesn't have any channels
> registered at all. Moreover, it leads to memory leak and is reported by
> kmemleak as (on 3.10 kernel, and same shall happen on mainline):
>
> unreferenced object 0x
style fix
Thierry Reding (1):
dmaengine: tegra: Remove some whitespace funkiness
Thomas Petazzoni (2):
dt-bindings: dma: add binding for the Marvell XOR v2 engine
dmaengine: mv_xor_v2: new driver
Vinod Koul (49):
dmaengine: mv_xor_v2: remove trailing whitespace
Merge bra
On Thu, Jul 28, 2016 at 07:55:10PM +0100, Mark Brown wrote:
> On Thu, Jul 28, 2016 at 11:14:20AM -0700, Nicolin Chen wrote:
> > On Thu, Jul 28, 2016 at 04:57:32PM +0100, Mark Brown wrote:
>
> > > This device seems to be used on x86 systems so we'll need to ensure that
> > > they register clocks fo
On Fri, Jul 29, 2016 at 05:39:33PM +0100, Mark Brown wrote:
> On Fri, Jul 29, 2016 at 09:45:21PM +0530, Vinod Koul wrote:
>
> > Yeah I am not aware of any plan to have clks on x86. For audio we are not
> > going to use much. ACPI and controller w/ firmware does the job.
>
&g
On Tue, Sep 06, 2016 at 03:17:49PM +0200, Arnd Bergmann wrote:
> The newly added k3_dma_prep_dma_cyclic function has some debug output
> that uses incorrect typecasts, some of which cause a warning like:
>
> drivers/dma/k3dma.c: In function 'k3_dma_prep_dma_cyclic':
> drivers/dma/k3dma.c:589:671:
On Tue, Sep 13, 2016 at 11:06:16AM -0700, Bjorn Andersson wrote:
> > I hate to send a ping,
>
> Sorry about that.
>
> > but do you think we can merge this fdma series? It has gone
> > through quite a few review rounds now.
> >
>
> I think the remoteproc part looks good.
yeah I was waiting for
On Sat, Sep 10, 2016 at 07:56:04PM +1000, Michael Ellerman wrote:
> We'd like to eventually remove NO_IRQ on powerpc, so remove usages of it
> from powerpc-only drivers.
Applied after fixing subsystem name
--
~Vinod
On Tue, Sep 13, 2016 at 10:58:43AM +0300, Peter Ujfalusi wrote:
> The type of CDEI, CSEI, CDFI and CSFI is signed.
> This did not caused issue so far as we only use unsigned values.
Applied, thanks
--
~Vinod
On Tue, Sep 13, 2016 at 04:20:54AM +0900, Masahiro Yamada wrote:
> Remove unneeded variables and assignments.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> drivers/dma/cppi41.c | 30 +-
> drivers/dma/imx-sdma.c| 15 ---
> drivers/dma/ppc4x
On Tue, Sep 13, 2016 at 03:08:17AM +0900, Masahiro Yamada wrote:
> The combo of list_empty() check and return list_first_entry()
> can be replaced with list_first_entry_or_null().
Applied, thanks
In future please do split this per driver, that helps..
--
~Vinod
On Tue, Sep 13, 2016 at 09:52:43AM +0100, Jon Hunter wrote:
>
> On 12/09/16 21:50, Nicolin Chen wrote:
> > On Mon, Sep 12, 2016 at 03:34:08PM +0100, Jon Hunter wrote:
> >
> >>> Sorry. I forgot to mention that the TEGRA210_CLK_APE_SLCG_OVR
> >>> clock is required for the tests. So I cherry-picked
On Wed, Sep 14, 2016 at 08:40:38PM +0300, Eugeniy Paltsev wrote:
> Commit 0d4cb44da6ca0e8 ("dmaengine: dmatest: Add support for
> scatter-gather DMA mode") changes default "dmatest" behavior by
> changing default mode from "memcpy" to "scatter-gather".
> Now "memcpy" gets back as default mode.
App
On Wed, Sep 14, 2016 at 06:37:40PM +0530, Vinod Koul wrote:
> On Tue, Sep 13, 2016 at 11:06:16AM -0700, Bjorn Andersson wrote:
> > > I hate to send a ping,
> >
> > Sorry about that.
> >
> > > but do you think we can merge this fdma series? It has gone
>
On Thu, Sep 15, 2016 at 11:05:12AM +0200, Sylwester Nawrocki wrote:
> On 09/14/2016 08:29 PM, Sam Van Den Berge wrote:
> > +static const struct dma_slave_map s3c2440_dma_slave_map[] = {
> ...
> > + { "3c2440-sdi", "rx", (void *)DMACH_SDI },
> > + { "3c2440-sdi", "tx", (void *)DMACH_SDI },
>
>
On Tue, Aug 30, 2016 at 01:51:02PM -0400, Sinan Kaya wrote:
> On 8/30/2016 1:37 PM, Sinan Kaya wrote:
> > On 8/30/2016 1:04 PM, Vinod Koul wrote:
> >> On Tue, Aug 23, 2016 at 12:48:11AM -0400, Sinan Kaya wrote:
> >>
> >>> spin_lock_init(&lldev-&g
On Mon, Aug 29, 2016 at 10:30:46AM -0700, John Stultz wrote:
> Just sending these the k3dma fixes and cyclic mode patches
> needed to support audio on HiKey, hopefully one last time. :)
>
> Again, no code changes here, but I did re-order the Kconfig
> chnage to be last to avoid a bisection build i
Hi Linus,
Here is the fixes PULL request for dmaengine. This time we have odd driver
fixes, nothing major.
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
are available in the git repository at:
git://git.infradead.org
On Thu, Sep 01, 2016 at 10:02:55AM -0400, Sinan Kaya wrote:
> Dmatest is currently including compare and fill time into the
> calculated performance numbers. This does not reflect the HW
> capability and the results vary based on the CPU speed instead of
> the HW speed.
Applied, thanks
--
~Vinod
On Thu, Sep 01, 2016 at 03:43:16PM -0700, Nicolin Chen wrote:
> +#define ADMA_CH_CTRL_MODE_ONCE (1 << 8)
BIT(8)? You should change the existing ones too :)
> #define ADMA_CH_CTRL_MODE_CONTINUOUS (2 << 8)
> +#define ADMA_CH_CTRL_MODE_LINKED_LIST
On Fri, Aug 05, 2016 at 10:53:20AM +0800, Shawn Lin wrote:
> This patch adds the "arm,pl330-periph-burst" for arm-pl330 to
> support busrt mode.
why should this be DT property. Only reason I can think of if some hw
versions support this and some won't.
If all are supporting, please enable it ever
On Thu, Aug 04, 2016 at 10:36:32AM -0700, John Stultz wrote:
> On Thu, Aug 4, 2016 at 6:08 AM, Vinod Koul wrote:
> > On Fri, Jul 29, 2016 at 03:40:46PM -0700, John Stultz wrote:
> >> On Sun, Jul 24, 2016 at 12:25 AM, Vinod Koul wrote:
> >> > On Wed, Jul 20, 2016 at
On Wed, Jul 20, 2016 at 11:50:32AM +0300, Peter Ujfalusi wrote:
> sDMA in OMAP3630 or newer SoC have support for LinkedList transfer. When
> LinkedList or Descriptor load feature is present we can create the
> descriptors for each and program sDMA to walk through the list of
> descriptors instead o
On Wed, Jul 27, 2016 at 04:41:16PM +0200, Julia Lawall wrote:
> No need to set .owner here. The core will do it.
And which tree was this generated against :-)
Upstream doesn't have _dpdma.c
>
> Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
>
> Signed-off-by: Julia Lawall
>
ext for the series!
>
> Cc: Dan Williams
> Cc: Vinod Koul
> Reviewed-by: Robin Murphy
> Tested-by: Robin Murphy
> Signed-off-by: Mitchel Humpherys
> ---
>
> Notes:
> v3..v4
>
> - Reworked against the new dma attrs format.
>
> drivers/
On Thu, Aug 04, 2016 at 09:59:43AM -0400, Sinan Kaya wrote:
> On 8/4/2016 8:46 AM, Vinod Koul wrote:
> >> > Yes, I do have a new device ID for platforms with MSI capability.
> >> >
> >> > Which new binding are you referring to?
> > If you have &q
On Fri, Aug 05, 2016 at 09:30:50AM -0700, Viresh Kumar wrote:
> On 03-08-16, 21:34, Greg Kroah-Hartman wrote:
> > To follow up on this, as you found out, this patch breaks working
> > hardware, so please don't apply it anywhere. It needs more debugging to
> > figure out exactly what is going on w
On Thu, Aug 04, 2016 at 10:17:24AM -0400, Sinan Kaya wrote:
> On 8/4/2016 8:55 AM, Vinod Koul wrote:
> > Dmaengine tells transaction is complete. It does not say if the txn is
> > success or failure. It can transfer data and not say if data was
> > correct. A successful tra
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