On Thu, Aug 04, 2016 at 11:27:46AM -0400, Sinan Kaya wrote:
> On 8/4/2016 10:40 AM, Russell King - ARM Linux wrote:
> > On Thu, Aug 04, 2016 at 10:17:24AM -0400, Sinan Kaya wrote:
> >> On 8/4/2016 8:55 AM, Vinod Koul wrote:
> >>> Dmaengine tells transaction is comple
On Thu, Aug 04, 2016 at 05:59:30PM +0200, Lars-Peter Clausen wrote:
> On 08/04/2016 05:38 PM, Russell King - ARM Linux wrote:
> [...]
> > What you instead need to do is to find some way to record in your
> > driver that transaction 2 failed, and when dma_cookie_status() says
> > that a transaction
On Fri, Aug 11, 2017 at 11:33:56AM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Fri, 11 Aug 2017 11:25:41 +0200
>
> Omit an extra message for a memory allocation failure in this function.
>
> This issue was detected by using the Coccinelle software.
Ac
On Wed, Jul 26, 2017 at 11:48:20AM +0200, Pierre-Yves MORDRET wrote:
> +/* MDMA Channel x transfer configuration register */
> +#define STM32_MDMA_CTCR(x) (0x50 + 0x40 * (x))
> +#define STM32_MDMA_CTCR_BWM BIT(31)
> +#define STM32_MDMA_CTCR_SWRM BIT(30)
> +#define STM32_
On Tue, Aug 01, 2017 at 04:07:45PM +0530, Anup Patel wrote:
> Make section comments consistent across the Broadcom SBA RAID driver
> by avoiding " SBA " in some of the comments.
and you add more comments..
>
> Signed-off-by: Anup Patel
> ---
> drivers/dma/bcm-sba-raid.c | 9 ++---
> 1 file
On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
> This patch merges sba_request state and fence into common
> sba_request flags. Also, in-future we can extend sba_request
> flags as required.
and it also changes the flag values to bits, which I have no idea why that
was done, care to e
On Tue, Aug 01, 2017 at 04:07:53PM +0530, Anup Patel wrote:
> The pending sba_request list can become very long in real-life usage
> (e.g. setting up RAID array) which can cause sba_issue_pending() to
> run for long duration.
that raises the warning flags.. Even if we have a long pending list why
On Tue, Aug 01, 2017 at 04:07:54PM +0530, Anup Patel wrote:
> We should allocate DMA channel resources before registering the
> DMA device in sba_probe() because we can get DMA request soon
> after registering the DMA device. If DMA channel resources are
> not allocated before first DMA request the
On Tue, Aug 01, 2017 at 04:07:55PM +0530, Anup Patel wrote:
> When setting up RAID array on several NVMe disks we observed that
> sba_alloc_request() start failing (due to no free requests left)
> and RAID array setup becomes very slow.
>
> To improve performance, we do mbox channel peek when we h
On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
> This patch adds debugfs support to report stats via debugfs
> which in-turn will help debug hang or error situations.
>
> Signed-off-by: Anup Patel
> Reviewed-by: Ray Jui
> Reviewed-by: Scott Branden
> ---
> drivers/dma/bcm-sba-raid
On Fri, Aug 18, 2017 at 10:26:54AM +0530, Anup Patel wrote:
> On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote:
> > On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
> >> This patch merges sba_request state and fence into common
> >> sba_request flags. Al
On Fri, Aug 18, 2017 at 10:33:54AM +0530, Anup Patel wrote:
> On Thu, Aug 17, 2017 at 1:31 PM, Vinod Koul wrote:
> > On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
> > why fail, debugfs should be an optional thingy, why would you want to fail
> > here?
>
&g
On Thu, Jun 22, 2017 at 10:32:31AM +0100, Colin King wrote:
> From: Colin Ian King
>
> The array ni_div does not need to be in global scope and is not
> modified, so make it static const.
>
> Cleans up sparse warning:
> "symbol 'ni_div' was not declared. Sh
On Mon, Jun 19, 2017 at 04:40:04PM +0200, Thomas Breitung wrote:
> The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared
> before a new value can be or-ed in.
Applied, thanks
--
~Vinod
gt;
> Hence to convey proper message, changing log level and message.
Acked-By: Vinod Koul
> Signed-off-by: Chintan Patel
> ---
> Changes in v2:
> Addressing review comments from Takashi Iwai by changing
> loglevel as info
>
> sound/soc/intel/skylake/skl-topology
On Fri, Oct 13, 2017 at 03:17:19PM -0500, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
> ---
> drivers/dma/nbpfaxi.c | 1 +
> 1 file changed, 1 insertion(+)
>
>
On Thu, Sep 28, 2017 at 03:49:24AM +0200, Stefan Brüns wrote:
> To avoid introduction of a new compatible for each small SoC/DMA controller
> variation, move the definition of the channel count to the devicetree.
>
> The number of vchans is no longer explicit, but limited by the highest
> port/DMA
On Thu, Sep 28, 2017 at 03:49:17AM +0200, Stefan Brüns wrote:
> Commit 3a03ea763a67 ("dmaengine: sun6i: Add support for Allwinner A83T
> (sun8i) variant") and commit f008db8c00c1 ("dmaengine: sun6i: Add support for
> Allwinner H3 (sun8i) variant") added support for the A83T resp. H3, but missed
> s
On Mon, Oct 16, 2017 at 02:21:02PM +, Brüns, Stefan wrote:
> On Montag, 16. Oktober 2017 09:02:17 CEST Vinod Koul wrote:
> > On Thu, Sep 28, 2017 at 03:49:24AM +0200, Stefan Brüns wrote:
> > > To avoid introduction of a new compatible for each small SoC/DMA
> > >
On Fri, May 19, 2017 at 03:06:44PM +0100, Robin Murphy wrote:
> Wire up dma_map_resource() for slave transfers, so that we can let the
> PL330 use IOMMU-backed DMA mapping ops on systems with an appropriate
> IOMMU and RAM above 4GB, to avoid CPU bounce buffering.
Applied, thanks
--
~Vinod
On Tue, May 23, 2017 at 07:08:43AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> In descriptor mode, the descriptor running pointer is not maintained
> by the interrupt handler, thus, driver finds the running descriptor
> from the descriptor pointer field in the CHCRB register.
On Thu, May 25, 2017 at 03:12:49PM +0800, sean.w...@mediatek.com wrote:
> +/* MTK_DMA_SIZE must be 2 of power and 4 for the minimal */
> +#define MTK_DMA_SIZE 256
> +#define MTK_HSDMA_NEXT_DESP_IDX(x, y)(((x) + 1) & ((y) - 1))
> +#define MTK_HSDMA_PREV_DESP_IDX(x, y)
lit these to per driver
>
> Signed-off-by: Logan Gunthorpe
> Signed-off-by: Stephen Bates
> Cc: Dan Williams
> Cc: Vinod Koul
> Cc: Linus Walleij
> ---
> drivers/dma/imx-dma.c | 7 ++-
> drivers/dma/ste_dma40.c | 5 +
> 2 files changed, 3 insertions(+)
On Thu, Oct 19, 2017 at 03:44:12PM +0200, Takashi Iwai wrote:
> On Thu, 19 Oct 2017 05:03:24 +0200,
> Vinod Koul wrote:
Sorry looks like I missed replying on this one, my apologies
> > +static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
> > +{
> > +
On Wed, Nov 01, 2017 at 02:49:15AM +0530, Pierre-Louis Bossart wrote:
>
> >
> >>>+ if (found == false) {
> >>>+ /* TODO: Park this device in Group 13 */
> >>>+ dev_err(bus->dev, "Slave Entry not found");
> >>
> >>No break here? Otherwise...
> >
> >Thats
On Wed, Nov 01, 2017 at 04:10:08PM -0500, Pierre-Louis Bossart wrote:
> On 11/1/17 4:08 AM, Vinod Koul wrote:
> >On Wed, Nov 01, 2017 at 02:49:15AM +0530, Pierre-Louis Bossart wrote:
> >>>
> >>>BUT given that we have seen stuff i am inclined to add a counter, we c
On Tue, Oct 31, 2017 at 02:56:07PM +0200, Andy Shevchenko wrote:
> As discussed at ELCE 2017 there is little to anticipate from me in the
> future with regard to the driver, and since I have many things to keep
> an eye on, I would like to step down to simple designated reviewer.
Applied, thanks
On Thu, Nov 02, 2017 at 02:12:11PM +0100, Arnd Bergmann wrote:
> On Thu, Nov 2, 2017 at 2:04 PM, Arnd Bergmann wrote:
> > On Thu, Nov 2, 2017 at 1:43 PM, Pierre-Louis Bossart
> > wrote:
> >> On 11/2/17 6:07 AM, Arnd Bergmann wrote:
> >>>
> >>> I ran into multiple problems during randconfig builds
On Thu, Nov 02, 2017 at 05:25:01PM +0100, Arnd Bergmann wrote:
> On Thu, Nov 2, 2017 at 5:04 PM, Vinod Koul wrote:
> > On Thu, Nov 02, 2017 at 02:12:11PM +0100, Arnd Bergmann wrote:
> >> On Thu, Nov 2, 2017 at 2:04 PM, Arnd Bergmann wrote:
> >> > On Thu, Nov 2,
On Tue, Oct 24, 2017 at 01:47:49PM +0800, Baolin Wang wrote:
> This patch adds the binding documentation for Spreadtrum SC9860 DMA
> controller device.
Applied both after fixing subsytem name, thanks
--
~Vinod
er.
> Cc: Vinod Koul
> Cc: Dan Williams
> Cc: Dave Jiang
> Cc: Ujjal Singh
> Cc: Pan Bian
> Cc: dmaeng...@vger.kernel.org
This is pretty useless for the log. i prefer adding this after s-o-b line so
that it doesn't get carried while applying
> Signed-off-
On Fri, Oct 20, 2017 at 09:31:34PM +0530, Vinod Koul wrote:
> On Fri, Oct 20, 2017 at 12:45:28PM +0200, Greg Kroah-Hartman wrote:
> > On Thu, Oct 19, 2017 at 08:33:18AM +0530, Vinod Koul wrote:
> > > +struct bus_type sdw_bus_type = {
> > > + .name = "soundwire&
binding for DMA controller
dmaengine: sun6i: Add support for Allwinner A64 and compatibles
dmaengine: sun6i: Retrieve channel count/max request from devicetree
Vinod Koul (21):
dmaengine: stm32: use %p format specfier for pointer
dmaengine: coh901318: Remove unnecessary 0x prefi
On Tue, Oct 31, 2017 at 04:33:13PM -0700, Joe Perches wrote:
> On Wed, 2017-11-01 at 10:16 +1100, Tobin C. Harding wrote:
> > Cool, thanks Joe I'll keep this in mind for when we get to %pa.
>
> fyi: There are more of these misuses of 0x%pa now:
>
> $ git grep -E -n "0[xX]%pa[dp]?\b"
> drivers/d
ops and IO transfer support
Vinod Koul (10):
soundwire: Add SoundWire bus type
soundwire: Add Master registration
soundwire: Add MIPI DisCo property helpers
soundwire: Add IO transfer
regmap: Add SoundWire bus support
soundwire: Add slave status handling
soundwire: Add sysfs for Sound
This adds the base SoundWire bus type, bus and driver registration.
along with changes to module device table for new SoundWire
device type.
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers
e the values with
platform specific data
c) Implement ones own methods which do not use anything provided
here
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/Makefile | 2 +-
drivers/soundwire/bus.c| 8 +
drivers/soundwire/bus_type.c
From: Sanyog Kale
MIPI SoundWire spec defines standard SoundWire registers mandatory for
SoundWire Slave devices, so add them.
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
include/linux/soundwire/sdw.h | 1 +
include/linux/soundwire/sdw_registers.h | 238
SoundWire bus provides sdw_read() and sdw_write() APIs for Slave
devices to program the registers. Provide support in regmap for
SoundWire bus.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/base/regmap/Kconfig | 4 ++
drivers/base/regmap
Bossart
Signed-off-by: Vinod Koul
---
Documentation/soundwire/summary.txt | 192
1 file changed, 192 insertions(+)
create mode 100644 Documentation/soundwire/summary.txt
diff --git a/Documentation/soundwire/summary.txt
b/Documentation/soundwire/summary.txt
It helps to read the properties for understanding and debug
SoundWire systems, so add sysfs files for SoundWire DisCo
properties.
TODO: Add ABI files for sysfs
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/Makefile| 2 +-
drivers/soundwire/bus.c | 5
Add status handling API sdw_handle_slave_status() to handle
Slave status changes.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/bus.c | 344 ++
drivers/soundwire/bus.h | 2
The SoundWire Master is implemented as part of Audio controller in
Intel platforms. Add a init module which creates SoundWire Master
platform devices based on the links supported in the hardware.
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/Makefile | 3
Cadence IP implements SoundWire Master. Add base cadence module
initialization and interrupt handling
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/Kconfig | 3 +
drivers/soundwire/Makefile | 4 +
drivers/soundwire
Some Intel platforms have SoundWire Master, so add Intel SoundWire
Master driver which uses Cadence module. This patch adds probe and
initialization routines for Intel Master driver.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire
From: Sanyog Kale
Implement sdw_master_ops with support for xfer_msg, xfer_msg_defer and
reset_page_addr. Since Cadence module doesn't know the systems it will be
used, set the read_prop to the bus helper.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod
From: Sanyog Kale
SoundWire Slaves report status to bus. Add helpers to handle
the status changes.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/bus.c | 211 ++
include/linux/soundwire
SoundWire bus supports read and write register(s) for SoundWire
Slave device. sdw_read() and sdw_write() APIs are provided for single
register read/write. sdw_nread() and sdw_nwrite() for operations on
contiguous register read/write.
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
A Master registers with SoundWire bus and scans the firmware provided
for device description. In this patch we scan the ACPI namespaces and
create the SoundWire Slave devices based on the ACPI description
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
drivers/soundwire/Makefile
Thanks for the quick review Randy,
On Wed, Oct 18, 2017 at 08:33:08PM -0700, Randy Dunlap wrote:
> On 10/18/17 20:03, Vinod Koul wrote:
> > +SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
> > +SoundWire is used for transporting data typically related to audio
On Fri, Oct 27, 2017 at 10:57:39AM +0200, Greg Kroah-Hartman wrote:
> On Thu, Oct 26, 2017 at 02:03:42PM +0530, Vinod Koul wrote:
> > On Fri, Oct 20, 2017 at 09:31:34PM +0530, Vinod Koul wrote:
> > > On Fri, Oct 20, 2017 at 12:45:28PM +0200, Greg Kroah-Hartman wrote:
> >
On Tue, Oct 17, 2017 at 04:26:50PM +0200, Benjamin Gaignard wrote:
> +Arnd since it should also fix 64 bits division issue
Arnd would be back from Prague, so would like to get an ack before I
apply...
>
> 2017-10-17 15:43 GMT+02:00 Pierre-Yves MORDRET :
> > If source and destination bus width di
On Mon, Oct 23, 2017 at 07:59:55PM +0200, Romain Perier wrote:
> From: Romain Perier
>
> The PCI pool API is deprecated. This commit replaces the PCI pool old
> API by the appropriate function with the DMA pool API.
Applied, thanks
--
~Vinod
On Tue, Oct 31, 2017 at 11:46:36AM +0100, Geert Uytterhoeven wrote:
> CC linux-renesas-soc
>
> On Tue, Oct 31, 2017 at 11:45 AM, Geert Uytterhoeven
> wrote:
> > Hi Vinod, Morimoto-san, Yokoyama-san,
> >
> > On Fri, Oct 20, 2017 at 8:15 AM, Vinod Koul wrote:
>
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> This is the driver for the AXI Central Direct Memory Access (AXI
> CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth
> Direct Memory Access (DMA) between a memory-mapped source address and a
> memory-map
On Fri, Sep 11, 2015 at 01:53:52PM +0800, Yuan Yao wrote:
> +Examples:
> +
> + qdma: qdma@839 {
> + compatible = "fsl,ls-qdma";
> + reg = <0x0 0x838 0x0 0x2>;
> + interrupts = ,
> + ;
> + interrupt-names =
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> +static struct xilinx_cdma_tx_segment *
> +xilinx_cdma_alloc_tx_segment(struct xilinx_cdma_chan *chan)
> +{
> + struct xilinx_cdma_tx_segment *segment;
> + dma_addr_t phys;
> +
> + segment = dma_pool_alloc(chan->
On Mon, Sep 14, 2015 at 03:31:05PM +0300, Peter Ujfalusi wrote:
> From: Misael Lopez Cruz
>
> The L3 throughput can be higher than expected when packed access
> is not enabled. The ratio depends on the number of bytes in a
> transaction and the EMIF interface width.
>
> The throughput was measu
On Mon, Sep 14, 2015 at 07:48:59AM +0800, Shawn Lin wrote:
> Add dmaengine_get_quirks API for peripheral devices to query
> quirks if they need it to make special workaround due to broken
> dma controller design.
>
> Signed-off-by: Shawn Lin
> ---
>
> Changes in v5: None
> Changes in v4: None
>
On Mon, Aug 24, 2015 at 09:41:06PM +0530, Kedareswara rao Appana wrote:
> This is the driver for the AXI Direct Memory Access (AXI DMA)
> core, which is a soft Xilinx IP core that provides high-
> bandwidth direct memory access between memory and AXI4-Stream
> type target peripherals.
Okay reviewi
On Mon, Oct 05, 2015 at 03:48:39PM +, Appana Durga Kedareswara Rao wrote:
> > Pls justify why we should have two drivers. Looking at code makes me think
> > otherwise
>
>
[pls wrap your messages within 80 chars, I have reflowed below]
> I agree with you and even initially we had a common dri
On Fri, Sep 11, 2015 at 03:14:26PM +0100, Peter Griffin wrote:
> +static char *fdma_clk_name[CLK_MAX_NUM] = {
> + [CLK_SLIM] = "fdma_slim",
> + [CLK_HI]= "fdma_hi",
> + [CLK_LOW] = "fdma_low",
> + [CLK_IC]= "fdma_ic",
> +};
why do we want to have this so
On Fri, Sep 11, 2015 at 03:14:27PM +0100, Peter Griffin wrote:
> This patch adds the code to load the xp70 fdma firmware
> using the asynchronous request_firmware_nowait call
> so as not to delay bootup of builtin code.
Okay we need to check here. Can the driver be built in, if so this is not
the
On Fri, Sep 11, 2015 at 03:14:28PM +0100, Peter Griffin wrote:
> +#define ST_FDMA_PM (&st_fdma_pm)
> +#else
> +#define ST_FDMA_PM NULL
> +#endif
Pls use PM helpers you dont need to do this
--
~Vinod
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a me
On Thu, Oct 01, 2015 at 04:52:37PM +0200, Maxime Ripard wrote:
> +static struct at_desc *atc_create_memset_desc(struct dma_chan *chan,
> + dma_addr_t psrc,
> + dma_addr_t pdst,
> +
On Thu, Sep 24, 2015 at 08:28:57PM +0300, Alexander Popov wrote:
> Initialize Freescale MPC512x DMA driver with subsys_initcall()
> to allow the depending drivers to call dma_request_slave_channel()
> during their probe.
Why can't we use defered probe ? I have been asking people to not move init
l
On Tue, Oct 06, 2015 at 05:21:13PM +0800, Shawn Lin wrote:
> >>+ int (*device_get_quirks)(struct dma_chan *chan);
> >
> >And why do we want to expose this to users? THis doesnt seem right!
> >
>
> Basically I agree not to expose dma's quirk to slave controllers...But, the
> fact I mentioned on
On Fri, Aug 28, 2015 at 10:03:32AM +0530, Vinod Koul wrote:
> On Tue, Aug 25, 2015 at 04:01:08PM +0800, yalin wang wrote:
> > Change ipu_irq_handler() to avoid gcc warning:
> >
> > drivers/dma/ipu/ipu_irq.c:305:4: warning: 'irq' may be used
> > un
On Tue, Aug 25, 2015 at 04:01:08PM +0800, yalin wang wrote:
> Change ipu_irq_handler() to avoid gcc warning:
>
> drivers/dma/ipu/ipu_irq.c:305:4: warning: 'irq' may be used
> uninitialized in this function [-Wmaybe-uninitialized]
> generic_handle_irq(irq);
Applied after fixing subsystem name
On Fri, Oct 09, 2015 at 10:08:32PM +0530, Rameshwar Sahu wrote:
> Hi Vinod,
>
> On Fri, Oct 9, 2015 at 9:42 PM, Vinod Koul wrote:
> > On Thu, Oct 08, 2015 at 02:36:57PM +0530, Rameshwar Prasad Sahu wrote:
> >> The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and
On Thu, Sep 24, 2015 at 01:01:58PM +0300, Peter Ujfalusi wrote:
> Move the code out from arch/arm/common and merge it inside of the dmaengine
> driver.
> This change is done with as minimal change to the code as possible to avoid
> any possibilities to introducing regression.
Is this a pure move p
On Thu, Sep 24, 2015 at 01:02:07PM +0300, Peter Ujfalusi wrote:
> + if (edesc->cyclic) {
> + vchan_cyclic_callback(&edesc->vdesc);
> + spin_unlock(&echan->vchan.lock);
> + return;
> + } else if (edesc->processed == edesc->pset_nr) {
> + dev_d
On Thu, Sep 24, 2015 at 01:01:47PM +0300, Peter Ujfalusi wrote:
> Hi,
>
> Cover letter:
>
> with this series the edma two driver setup will be changed to have only one
> driver to support eDMA3. The legacy edma interface will be removed and eDMA
> can
> only be used via dmaengine API from this p
On Thu, Oct 08, 2015 at 10:31:18AM +0200, Lars-Peter Clausen wrote:
> > Basically I agree not to expose dma's quirk to slave controllers...But, the
> > fact I mentioned on cover letter explain the reasons why I have to let slave
> > controllers know that they are working with a broken dma. It's a d
On Tue, Oct 13, 2015 at 04:05:25PM +0200, M'boumba Cedric Madianga wrote:
> +#define STM32_DMA_LISR 0x /* DMA Low Int Status
> Reg */
> +#define STM32_DMA_HISR 0x0004 /* DMA High Int Status
> Reg */
> +#define STM32_DMA_LIFCR 0x
On Mon, Oct 05, 2015 at 01:10:07PM +0100, Jon Hunter wrote:
> +static enum dma_status tegra_adma_tx_status(struct dma_chan *dc,
> + dma_cookie_t cookie,
> + struct dma_tx_state *txstate)
> +{
> + struct tegra_adma_
On Wed, Oct 14, 2015 at 03:07:16PM +0200, M'boumba Cedric Madianga wrote:
> >> +static inline uint32_t stm32_dma_read(struct stm32_dma_device *dmadev,
> >> u32 reg)
> >
> > this and few other could be made more readable
>
> Ok, I could replace uint32_t by u32. Is it what you expect ?
> For others
On Wed, Oct 14, 2015 at 02:42:42PM +0300, Peter Ujfalusi wrote:
> Hi,
>
> Cover letter:
>
> with this series the edma two driver setup will be changed to have only one
> driver to support eDMA3. The legacy edma interface will be removed and eDMA
> can
> only be used via dmaengine API from this p
On Wed, Oct 14, 2015 at 04:12:13PM +0300, Peter Ujfalusi wrote:
> @@ -1320,41 +1317,92 @@ static struct dma_async_tx_descriptor
> *edma_prep_dma_memcpy(
> struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
> size_t len, unsigned long tx_flags)
> {
> - int ret;
> + int ret
On Wed, Oct 14, 2015 at 04:12:21PM +0300, Peter Ujfalusi wrote:
> The DMA event crossbar on AM33xx/AM43xx is different from the one found in
> DRA7x family.
> Instead of a single event crossbar it has 64 identical mux attached to each
> eDMA event line. When the 0 event mux is selected, the default
On Wed, Oct 14, 2015 at 07:25:07PM +0530, Rameshwar Prasad Sahu wrote:
> The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and other
> computations. But the bandwidth of the entire DMA engine is shared
> among all channels. This patch re-configures operations availability
> such that one ca
On Wed, Oct 14, 2015 at 06:02:18PM +0300, Peter Ujfalusi wrote:
> On 10/14/2015 05:41 PM, Vinod Koul wrote:
> > On Wed, Oct 14, 2015 at 04:12:13PM +0300, Peter Ujfalusi wrote:
> >> @@ -1320,41 +1317,92 @@ static struct dma_async_tx_descriptor
> >> *edma_prep_dma_memc
On Thu, Oct 15, 2015 at 09:36:38AM +0800, Shawn Lin wrote:
> +int snd_dmaengine_pcm_get_caps(struct device *dev, struct dma_slave_caps
> *caps)
> +{
> + struct snd_soc_platform *platform;
> + struct dmaengine_pcm *pcm;
> + int ret = -ENODEV;
> +
> + platform = snd_soc_lookup_platfo
On Wed, Oct 14, 2015 at 05:41:26PM +0200, M'boumba Cedric Madianga wrote:
> 2015-10-14 17:28 GMT+02:00 Daniel Thompson :
> > On 14/10/15 16:26, M'boumba Cedric Madianga wrote:
> >>
> >> 2015-10-14 16:24 GMT+02:00 Daniel Thompson :
> >>>
> >>>
> >>> Hmnnn...
> >>>
> >>> The dmaengine framework will
On Thu, Oct 15, 2015 at 09:35:12AM +0800, Shawn Lin wrote:
> From: Boojin Kim
>
Please fix the subsystem name in this series. Its dmaengine:...
Git log should tell you the acceptable style for a subsystem
--
~Vinod
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t
val
dmaengine: ipu: Consolidate duplicated irq handlers
Thomas Petazzoni (2):
dmaengine: mv_xor: remove support for dmacap,* DT properties
dmaengine: mv_xor: optimize performance by using a subset of the XOR
channels
Vinod Koul (12):
dmaengine: zxdma: explicitly fr
On Tue, Sep 01, 2015 at 09:17:25AM +0200, Geert Uytterhoeven wrote:
> On Thu, Aug 27, 2015 at 5:24 AM, Vinod Koul wrote:
> > On Thu, Aug 27, 2015 at 11:26:45AM +1000, Stephen Rothwell wrote:
> >> Hi Vinod,
> >>
> >> Today's linux-next mer
On Sun, Oct 18, 2015 at 11:31:10PM +0800, Geliang Tang wrote:
> s/regsiter/register/
>
Applied, now
Please ensure the patches have right subsystem names. You can use git log on
that file/subsystem to find the convention used
I have fixed it up before applying
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On Fri, Oct 16, 2015 at 10:17:58AM +0300, Peter Ujfalusi wrote:
> Hi,
>
> Changes since v1:
> - Comments in the memcpy optimization patch extended
> - The crossbar patch has been improved:
> - debug prints changed
> - fallback xbar parameters now type specific as the fallback values for DRA7
>
On Mon, Oct 19, 2015 at 04:31:05PM +0800, Yuan Yao wrote:
The patch overall looks fine, but
>
> +static int fsl_edma_suspend_late(struct device *dev)
This needs protection and will have build failure when CONFIG_PM is not
defined
> +{
> + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(
On Fri, Oct 16, 2015 at 08:35:19AM +0100, Jon Hunter wrote:
> +static inline void tdma_ch_write(struct tegra_adma_chan *tdc,
> + u32 reg, u32 val)
Coding style issue here
> +static int tegra_adma_alloc_chan_resources(struct dma_chan *dc)
> +{
> + struct tegra_adma_chan *tdc = to_t
peripheral devices on LocalPlus Bus.
>
> > Changes in v4:
> > - the race condition is fixed;
> > - plenty of style fixes are made;
> > - devm_* functions and EPROBE_DEFER are used in probe().
>
> Hello,
>
> I've done my best to fix the issues pointed by Tim
On Thu, Oct 22, 2015 at 02:54:31PM -0500, Han Xu wrote:
> +static int mxs_dma_pm_resume(struct device *dev)
> +{
> + struct mxs_dma_engine *mxs_dma = dev_get_drvdata(dev);
> + int ret;
> +
> + ret = mxs_dma_init(mxs_dma);
> + if (ret)
> + return ret;
> + return 0;
>
Hi Linus,
Here is the fixes request for 4.3
This contains fixes spread throughout the drivers
Also fixes one more instance of privatecnt in dmaengine
bunch of pxa_dma fixes for reuse of descriptor issue, residue and
no-requestor
odd fixes in xgene, idma, sun4i and zxdma
at_xdmac fi
On 22-07-18, 23:20, Andreas Färber wrote:
> From: Damien Horsley
>
> It is possible that mdc_tx_status may be called before the first
> node has been read from memory.
>
> In this case, the residue value stored in the register is undefined.
> Return the transfer size instead.
>
> Signed-off-by:
expose two configs for
> SND_SST_ATOM_HIFI2_PLATFORM_PCI and SND_SST_ATOM_HIFI2_PLATFORM_ACPI,
> which select a common SND_SST_ATOM_HIFI2_PLATFORM option. To avoid
> breaking existing solutions with the semantics change,
> SND_SST_ATOM_HIFI2_PLATFORM_ACPI uses "default ACPI" so that "make
> oldnoconfig" and "make olddefconfig" still work as expected.
Acked-By: Vinod Koul
--
~Vinod
On Tue, May 09, 2017 at 07:18:37PM +0300, Andy Shevchenko wrote:
> AVR32 is gone. Now it's time to clean up the driver by removing
> leftovers that was used by AVR32 related code.
Since the cover didn't mention any dependency, I went ahead and applied this
now
--
~Vinod
to verify both direction it turned
> out that the setup was incorrect:
> omap_desc members are settings for the slave port while the omap_sg members
> apply to the memory side of the sDMA setup.
Acked-by: Vinod Koul
--
~Vinod
On Wed, May 10, 2017 at 11:29:40AM +0100, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in dev_err message. Also replace "fail"
> with "failure".
Acked-by: Vinod Koul
>
> Signed-off-by: Colin Ian King
> ---
> soun
On Tue, Jan 09, 2018 at 07:36:11AM +, Appana Durga Kedareswara Rao wrote:
> Hi,
>
> Thanks for the review...
>
> >On Tue, Jan 09, 2018 at 04:48:10AM +, Appana Durga Kedareswara Rao
> >wrote:
> >> Hi,
> >>
> >> >On Mon, Jan 08, 2018 at 05:25:01PM +, Appana Durga Kedareswara
> >>
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