Re: [PATCH v2 7/8] video: mark nuc900fb_map_video_memory as __devinit

nuc900fb_probe() references a function __init nuc900fb_map_video_memory(). If nuc900fb_map_video_memory is only used by nuc900fb_probe then annotate nuc900fb_map_video_memory with a matching annotation. Signed-off-by: Arnd Bergmann a...@arndb.de Cc: Wan ZongShun mcuos@gmail.com Cc: Florian

Re: [PATCH 10/29] drivers/watchdog/nuc900_wdt.c: simplify use of devm_ioremap_resource

;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // /smpl Signed-off-by: Julia Lawall julia.law...@lip6.fr Reviewed-by: Guenter Roeck li...@roeck-us.net Acked-by: Wan Zongshun mcuos@gmail.com Thanks for your patch

Re: [PATCH] ARM: w90x900: remove deprecated IRQF_DISABLED

2013/10/12 Michael Opdenacker michael.opdenac...@free-electrons.com: This patch proposes to remove the use of the IRQF_DISABLED flag It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker michael.opdenac...@free-electrons.com Acked-by: Wan zongshun mcuos

Re: [PATCH V2] USB: EHCI: make ehci-w90X900 a separate driver

into a separate module, as we do here for the w90X900 bus glue. Signed-off-by: Manjunath Goudar manjunath.gou...@linaro.org Acked-by: Arnd Bergmann a...@arndb.de Cc: Greg KH g...@kroah.com Cc: Alan Stern st...@rowland.harvard.edu Cc: Wan ZongShun mcuos@gmail.com Cc: linux

Re: [PATCH] mmc: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data

irq;/* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ -- 1.8.1.2 -- Wan ZongShun. www.mcuos.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http

[PATCH] ASoC: Add support for NAU8824 codec to ASoC

Signed-off-by: Wan Zongshun mcuos@gmail.com Signed-off-by: Chih-Chiang Chang ccchan...@nuvoton.com --- sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/nau8824.c | 770 + sound/soc/codecs/nau8824.h | 379

Re: [PATCH] SDHCI: Change AMD SDHCI quirk application scope

2015-06-04 23:32 GMT+08:00 Borislav Petkov b...@alien8.de: On Thu, Jun 04, 2015 at 10:33:57PM +0800, Wan ZongShun wrote: From: Vincent Wan vincent@amd.com Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Vincent Wan vincent@amd.com Signed-off-by: Wan ZongShun mcuos

Re: [PATCH] SDHCI: Change AMD SDHCI quirk application scope

2015-06-05 17:20 GMT+08:00 Borislav Petkov b...@alien8.de: On Fri, Jun 05, 2015 at 09:37:09AM +0800, Wan ZongShun wrote: Boris, I means I put this KERCZ Mircro in pci_ids.h, and I also will send the other patch to instead the following '0x790b' of codes. I think it is reasonable, right

[PATCH 1/3] pci_ids: Add AMD KERNCZ device ID support

The KERNCZ is new AMD SB/FCH generation name, like HUDSON2. We will adopt 0x790b as device ID since from this gereration. Signed-off-by: Wan ZongShun vincent@amd.com Signed-off-by: Wan ZongShun mcuos@gmail.com --- include/linux/pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 3/3] SDHCI: Change AMD SDHCI quirk application scope

Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Wan ZongShun vincent@amd.com Signed-off-by: Wan ZongShun mcuos@gmail.com Tested-by: Nath, Arindam arindam.n...@amd.com Tested-by: Ramesh, Ramya ramya.ram...@amd.com --- drivers/mmc/host/sdhci-pci.c | 25

[PATCH 2/3] i2c-piix4: Use Macro for AMD CZ SMBus device ID

Change AMD CZ SMBUS device ID from 0x790b to use Macro definition Signed-off-by: Wan ZongShun vincent@amd.com Signed-off-by: Wan ZongShun mcuos@gmail.com --- drivers/i2c/busses/i2c-piix4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c

[PATCH] SDHCI: Change AMD SDHCI quirk application scope

From: Vincent Wan vincent@amd.com Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Vincent Wan vincent@amd.com Signed-off-by: Wan ZongShun mcuos@gmail.com Signed-off-by: Wan ZongShun li...@mcuos.com Tested-by: Nath, Arindam arindam.n...@amd.com Tested-by: Ramesh

[PATCH V2 2/3] i2c-piix4: Use Macro for AMD CZ SMBus device ID

Change AMD CZ SMBUS device ID from 0x790b to use Macro definition Signed-off-by: Wan ZongShun vincent@amd.com --- drivers/i2c/busses/i2c-piix4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index

[PATCH V2 1/3] pci_ids: Add AMD KERNCZ device ID support

The KERNCZ is new AMD SB/FCH generation name, like HUDSON2. We will adopt 0x790b as device ID since from this gereration. Signed-off-by: Wan ZongShun vincent@amd.com --- include/linux/pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci_ids.h b/include/linux

[PATCH V2 3/3] SDHCI: Change AMD SDHCI quirk application scope

Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Wan ZongShun vincent@amd.com Tested-by: Nath, Arindam arindam.n...@amd.com Tested-by: Ramesh, Ramya ramya.ram...@amd.com --- drivers/mmc/host/sdhci-pci.c | 25 - 1 file changed, 24 insertions(+), 1

Re: [PATCH 01/15] ARM: kill off set_irq_flags usage

ZongShun mcuos@gmail.com For Nuvoton W90x900 Acked-by: Wan ZongShun mcuos@gmail.com Cc: linux-arm-ker...@lists.infradead.org Cc: linux-o...@vger.kernel.org +++ b/arch/arm/mach-w90x900/irq.c @@ -211,6 +211,6 @@ void __init nuc900_init_irq(void) for (irqno = IRQ_WDT; irqno

Re: [PATCH 16/18] ARM/w90x900/time: Migrate to new 'set-state' interface

, for example: ONESHOT_STOPPED. Cc: Wan ZongShun mcuos@gmail.com Signed-off-by: Viresh Kumar viresh.ku...@linaro.org --- arch/arm/mach-w90x900/time.c | 51 1 file changed, 28 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-w90x900

Re: [PATCH] input: i8042: add quirk to implement i8042 detect for AMD

mplementation, I doubt if their BIOS is providing this i8024 flag. So I have to implement my codes carefully. > >> + if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042)) >> + return -ENODEV; >> + } > > -- > Regards/Gruss, > Boris.

[PATCH v2] Implement i8042 detect by BIOS FADT i8042 flag

Detecting x86 platform supporting i8042 or not, we should resort to BIOS's FADT i8042 flag per ACPI spec. Currently, Windows is conforming to this spec, and request this flag to detect i8042 supporting. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/input/serio/i8042-x86ia

[PATCH 1/6] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h

[PATCH 0/6] iommu/amd: enable ACPI hardware ID device support

From: Wan Zongshun <vincent@amd.com> This patch series enable ACPI hardware ID device support, There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus

[PATCH 2/6] iommu/amd: Use the most comprehensive IVHD type that the driver can support

d_type()) before parsing the contents. [Vincent: fix the build error of IVHD_DEV_ACPI_HID flag not found] Signed-off-by: Wan Zongshun <vincent@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/iommu/amd_iommu_init.c | 107 ++

[PATCH 3/6] iommu/amd: Add new map for storing IVHD dev entry type HID

From: Wan Zongshun <vincent@amd.com> This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun &l

[PATCH 4/6] iommu/amd: Introduces ivrs_acpihid kernel parameter

From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun <vincent@amd.com>

[PATCH 5/6] iommu/amd: Add support for non-pci devices

From: Wan Zongshun <vincent@amd.com> Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path.

[PATCH 6/6] iommu/amd: Manage iommu_group for non-pci devices

From: Wan Zongshun <vincent@amd.com> This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page

Re: [PATCH] clk: let clk_disable() return immediately if clk is NULL or error

gt;ops->disable(clk); > + spin_unlock_irqrestore(_lock, flags); > } > EXPORT_SYMBOL(clk_disable); > > diff --git a/arch/arm/mach-w90x900/clock.c b/arch/arm/mach-w90x900/clock.c > index 2c371ff..90ec250 100644 > --- a/arch/arm/mach-w90x900/clock.c > +++ b/arch/arm/m

Re: [PATCH 2/3] mmc: sdhci-pci: Add platform tuning callback for amd hs200 mode

gt; >> + return err; >> } >> >> ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); >> -- >> 1.9.1 >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in >> th

Re: [PATCH 1/3] mmc: sdhci-pci: Add AMD HS200 mode tuning function

2015-12-22 17:52 GMT+08:00 Andy Shevchenko <andy.shevche...@gmail.com>: > On Tue, Dec 22, 2015 at 6:40 PM, Wan Zongshun <vincent@amd.com> wrote: >> From: Wan Zongshun <vincent@amd.com> >> >> This patch is to add software tuning functions for AMD

[PATCH 2/3] mmc: sdhci-pci: Add platform tuning callback for amd hs200 mode

From: Wan Zongshun <vincent@amd.com> AMD hs200 mode tuning mode is not compatible with standard tuning process, so we need .platform_execute_tuning callback support in sdhci-pci-core.c, this patch is to do: 1. Add platform_execute_tuning callback in sdhci_pci_slot. 2. Imp

[PATCH 1/3] mmc: sdhci-pci: Add AMD HS200 mode tuning function

From: Wan Zongshun <vincent@amd.com> This patch is to add software tuning functions for AMD hs200 mode. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/mmc/host/sdhci-pci-core.c | 146 ++ 1 file changed, 146 insertions(+)

[PATCH 3/3] mmc: sdhci-pci: enable AMD emmc hs200 mode

From: Wan Zongshun <vincent@amd.com> This patch is to remove the SDHCI_QUIRK2_BROKEN_HS200 quirk and enable the emmc hs200 mode for AMD current platforms. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/mmc/host/sdhci-pci-core.c | 4 +--- 1 file changed, 1 ins

[PATCH] iommu/amd: set AMD iommu-callbacks for the amba bus

From: Wan Zongshun <vincent@amd.com> Since uart dma is using AMD iommu, and it bases on amba bus. So we need set callbacks for amba bus type firstly. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 13 - 1 file changed, 12 inse

Re: [PATCH] iommu:Check that iommu_device_create has completed successfully in alloc_iommu

->iommu_dev' break your iommu work? It seems not necessary. > > return 0; > - > err_unmap: > unmap_iommu(iommu); > error_free_seq_id: > -- > 2.5.0 > > ___ > iommu mailing list > io...@lists.linux-foundation.org >

Re: [PATCH v2] iommu/amd: Set AMD iommu callbacks for platform bus driver

2016-05-10 21:21 GMT+08:00 Wan Zongshun <vincent@amd.com>: > From: Wan Zongshun <vincent@amd.com> > > AMD has more drivers will use ACPI to platform bus driver later, > all those devices need iommu support, for example: eMMC driver. > > For latest AMD eMMC con

Re: [Patch v4 3/9] iommu/amd: Detect pre enabled translation

Original Message Add functions to check whether translation is already enabled in IOMMU. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu_init.c | 25 + drivers/iommu/amd_iommu_types.h | 4 2 files changed, 29

Re: [Patch v4 6/9] iommu/amd: Add function copy_dev_tables

Original Message Add function copy_dev_tables to copy old DTE of the 1st kernel to the new DTE table. Since all iommu share the same DTE table the copy only need be done once as long as the physical address of old DTE table is retrieved from iommu reg. Besides the old domain

Re: [Patch v4 7/9] iommu/amd: copy old trans table from old kernel

Original Message From: Baoquan HE Here several things need be done: 1) Initialize amd_iommu_dev_table because it was set several times since kdump kernel reboot. We don't need the set because we will copy the content from old kernel.

Re: [Patch v4 9/9] iommu/amd: Check the validation of irq table and domain id

Original Message From: Baoquan HE If not valid just skip reserving the old domain id. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu.c | 4 drivers/iommu/amd_iommu_init.c | 5 +++--

[PATCH v2] iommu/amd: Add proper error check in two functions

From: Wan Zongshun <vincent@amd.com> This patch is to do the following: 1. Add error check for caller of iommu_device_create. 2. Add error check for caller of iommu_device_link and move 'iommu = amd_iommu_rlookup_table[dev_data->devid]' out of iommuv2 capability condition

[PATCH 0/6] ARM: NUC900: Add NUC970 SoC support

, such as dts, driver/clk, driver/clocksource , driver/irqchip drivers. The old w90x900 plat such as nuc910,nuc960 codes will also be changed to new style according to nuc970 codes after those patches was accepted. Wan Zongshun (6): ARM: NUC900: Add nuc970 machine support ARM: dts: nuc900: Add

[PATCH 2/6] ARM: dts: nuc900: Add nuc970 dts files

This patch is to add dts support for nuc970 platform. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- .../devicetree/bindings/arm/nuvoton/nuc970.txt | 30 +++ arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/nuc970-evb.dts | 20 ++

[PATCH 6/6] nuc900: add nuc970 platform defconfig file

Add nuc970_defconfig file support. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- arch/arm/configs/nuc970_defconfig | 1278 + 1 file changed, 1278 insertions(+) create mode 100644 arch/arm/configs/nuc970_defconfig diff --git a/arch/arm/c

[PATCH 0/6] ARM: NUC900: Add NUC970 SoC support

, such as dts, driver/clk, driver/clocksource , driver/irqchip drivers. The old w90x900 plat such as nuc910,nuc960 codes will also be changed to new style according to nuc970 codes after those patches was accepted. Wan Zongshun (6): ARM: NUC900: Add nuc970 machine support ARM: dts: nuc900: Add

[PATCH 0/6] ARM: NUC900: Add NUC970 SoC support

, such as dts, driver/clk, driver/clocksource , driver/irqchip drivers. The old w90x900 plat such as nuc910,nuc960 codes will also be changed to new style according to nuc970 codes after those patches was accepted. Wan Zongshun (6): ARM: NUC900: Add nuc970 machine support ARM: dts: nuc900: Add

[PATCH 5/6] clk: add Clock driver for nuc970

Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- drivers/clk/Makefile| 1 + drivers/clk/nuc900/Makefile | 6 + drivers/clk/nuc900/clk-apll.c | 168 drivers/clk/nuc900/clk-ccf.h| 53 +++ drivers/clk/nuc900/clk-nuc970.c

[PATCH 4/6] irqchip: add irqchip driver for nuc900

This patch is to add irqchip driver support for nuc900 plat, current this driver only supports nuc970 SoC. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- arch/arm/mach-w90x900/include/mach/irqs.h | 69 ++ .../mach-w90x900/include/mach/nuc970-regs-aic.h

[PATCH 3/6] Clocksource: add nuc970 clocksource driver

This patch is to add nuc970 clocksource driver support. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- .../mach-w90x900/include/mach/nuc970-regs-timer.h | 44 + drivers/clocksource/Kconfig| 8 + drivers/clocksource/Makefile

[PATCH 1/6] ARM: NUC900: Add nuc970 machine support

NUC970 is a new SoC of Nuvoton nuc900 series, this patch is to add machine file support for it. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- arch/arm/mach-w90x900/Kconfig | 25 arch/arm/mach-w90x900/Makefile | 3 + .../mach-w

[PATCH 0/6] ARM: NUC900: Add NUC970 SoC support

, such as dts, driver/clk, driver/clocksource , driver/irqchip drivers. The old w90x900 plat such as nuc910,nuc960 codes will also be changed to new style according to nuc970 codes after those patches was accepted. Wan Zongshun (6): ARM: NUC900: Add nuc970 machine support ARM: dts: nuc900: Add

Re: [PATCH 1/1] iommu/amd: initialize devid variable before using it

SLOT(devid), > PCI_FUNC(devid)); > > - devid = e->devid; > flags = e->flags; > Sure, thanks for your patch. This is my fault. > ret = add_acpi_hid_device(hid, uid, , false); > -- > 2.9.0 > -- --- Vincent Wan(Zongshun) www.mcuos.com

[PATCH V2 0/8] iommu/amd: enable ACPI hardware ID device support

From: Wan Zongshun <vincent@amd.com> There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus based device. The latest public version of AMD IOMMU specifi

[PATCH V2 1/8] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h

[PATCH V2 5/8] iommu/amd: Make call-sites of get_device_id aware of its return value

From: Wan Zongshun <vincent@amd.com> This patch is to make the call-sites of get_device_id aware of its return value. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 51 +-- 1 file changed, 41 inser

[PATCH V2 6/8] iommu/amd: Add iommu support for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path.

[PATCH V2 4/8] iommu/amd: Introduces ivrs_acpihid kernel parameter

From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun <vincent@amd.com>

[PATCH V2 7/8] iommu/amd: Manage iommu_group for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page

[PATCH V2 3/8] iommu/amd: Add new map for storing IVHD dev entry type HID

From: Wan Zongshun <vincent@amd.com> This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun &l

[PATCH V2 8/8] iommu/amd: Set AMD iommu callbacks for amba bus

From: Wan Zongshun <vincent@amd.com> AMD Uart DMA belongs to ACPI HID type device, and its driver is basing on AMBA Bus, need also IOMMU support. This patch is just to set the AMD iommu callbacks for amba bus. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu

[PATCH V2 2/8] iommu/amd: Use the most comprehensive IVHD type that the driver can support

d_type()) before parsing the contents. [Vincent: fix the build error of IVHD_DEV_ACPI_HID flag not found] Signed-off-by: Wan Zongshun <vincent@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/iommu/amd_iommu_init.c | 107 ++

Re: Warning from AMD IOMMU performance counters

Original Message Hi, Since about 4.4, we've been seeing reports of this warning on every boot from some users: WARNING: CPU: 2 PID: 1 at drivers/iommu/amd_iommu_init.c:2301 amd_iommu_pc_get_set_reg_val+0xa8/0xe0() Modules linked in: CPU: 2 PID: 1 Comm: swapper/0 Not tainted

[PATCH V3 3/9] iommu/amd: Use the most comprehensive IVHD type that the driver can support

d_type()) before parsing the contents. [Vincent: fix the build error of IVHD_DEV_ACPI_HID flag not found] Signed-off-by: Wan Zongshun <vincent@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/iommu/amd_iommu_init.c | 107 ++

[PATCH V3 1/9] iommu/amd: Adding Extended Feature Register check for PC support

From: Suravee Suthikulpanit The IVHD header type 11h and 40h introduce the PCSup bit in the EFR Register Image bit fileds. This should be used to determine the IOMMU performance support instead of relying on the PNCounters and PNBanks. Note also that the PNCouters

[PATCH V3 5/9] iommu/amd: Introduces ivrs_acpihid kernel parameter

From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun <vincent@amd.com>

[PATCH V3 7/9] iommu/amd: Add iommu support for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path.

[PATCH V3 6/9] iommu/amd: Make call-sites of get_device_id aware of its return value

From: Wan Zongshun <vincent@amd.com> This patch is to make the call-sites of get_device_id aware of its return value. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 51 +-- 1 file changed, 41 inser

[PATCH V3 0/9] iommu/amd: enable ACPI hardware ID device support

From: Wan Zongshun <vincent@amd.com> There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus based device. The latest public version of AMD IOMMU specifi

[PATCH V3 8/9] iommu/amd: Manage iommu_group for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page

[PATCH V3 9/9] iommu/amd: Set AMD iommu callbacks for amba bus

From: Wan Zongshun <vincent@amd.com> AMD Uart DMA belongs to ACPI HID type device, and its driver is basing on AMBA Bus, need also IOMMU support. This patch is just to set the AMD iommu callbacks for amba bus. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu

[PATCH V3 2/9] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h

[PATCH V3 4/9] iommu/amd: Add new map for storing IVHD dev entry type HID

From: Wan Zongshun <vincent@amd.com> This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun &l

[PATCH] iommu/amd: Set AMD iommu callbacks for platform bus driver

From: Wan Zongshun <vincent@amd.com> AMD has more drivers will use ACPI to platform bus driver later, all those devices need iommu support, such as eMMC acpi driver. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 4 1 file changed,

[PATCH v2] iommu/amd: Set AMD iommu callbacks for platform bus driver

From: Wan Zongshun <vincent@amd.com> AMD has more drivers will use ACPI to platform bus driver later, all those devices need iommu support, for example: eMMC driver. For latest AMD eMMC controller, it will utilize sdhci-acpi.c driver, which will rely on platform bus to match

Re: [PATCH] iommu/amd: Set AMD iommu callbacks for platform bus driver

Original Message On Thu, Apr 14, 2016 at 09:28:53AM -0400, Wan Zongshun wrote: From: Wan Zongshun <vincent@amd.com> AMD has more drivers will use ACPI to platform bus driver later, all those devices need iommu support, such as eMMC acpi driver. Signed-off-b

[PATCH] iommu/amd: Add proper error check in two functions

From: Wan Zongshun <vincent@amd.com> This patch is to do the following: 1. Add error check for caller of iommu_device_create. 2. Add error check for caller of iommu_device_link and move 'iommu = amd_iommu_rlookup_table[dev_data->devid]' out of iommuv2 capability condition

Re: [RFT v2] iommu/amd: use subsys_initcall() on amdv2 iommu

_initcall(fn) IOMMUV2 -- device_initcall(fn) kfd module -- late_initcall(fn) drm -- late_initcall(fn) Thanks! Wan Zongshun. Luis ___ iommu mailing list io...@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu

Re: [PATCH v2 01/10] ARM: NUC900: Add nuc970 machine support

On 2016年07月12日 12:30, Wan Zongshun wrote: On 2016年07月12日 00:04, Arnd Bergmann wrote: On Sunday, July 10, 2016 3:27:21 PM CEST Wan Zongshun wrote: +ifeq ($(CONFIG_SOC_NUC970),) obj-y := irq.o time.o mfp.o gpio.o clock.o obj-y += clksel.o

Re: [PATCH v2 02/10] irqchip: add irqchip driver for nuc900

On 2016年07月11日 23:46, Arnd Bergmann wrote: On Sunday, July 10, 2016 3:27:22 PM CEST Wan Zongshun wrote: + +#if !defined(CONFIG_SOC_NUC900) #define NR_IRQS(IRQ_ADC+1) +#else +#define NR_IRQS62 +#endif The Kconfig symbols are a bit confusing here

Re: [PATCH v2 06/10] soc: Add SoC specific driver support for nuc900

On 2016年07月11日 16:03, Arnd Bergmann wrote: On Sunday, July 10, 2016 3:27:26 PM CEST Wan Zongshun wrote: + ret = of_property_read_string(np, "compatible", _dev_attr->soc_id); + if (ret) return -EINVAL; + + soc_dev_attr->mach

Re: [PATCH v2 03/10] Clocksource: add nuc970 clocksource driver

On 2016年07月11日 23:36, Arnd Bergmann wrote: On Sunday, July 10, 2016 3:27:23 PM CEST Wan Zongshun wrote: +config NUC900_TIMER +bool "Clocksource timer for nuc900 platform" if COMPILE_TEST +depends on ARM +select CLKSRC_OF if OF +select CLKSRC_MMIO +

Re: [PATCH 00/20] iommu/amd: Use generic IOVA allocator

On 2016年07月08日 19:44, Joerg Roedel wrote: Hi, here is a patch-set to make the AMD IOMMU driver use the generic IOVA allocator, which is already used in the Intel VT-d driver and a few other places. The main reason for the conversion is to make the driver benefit from the recent scalability

Re: [PATCH 4/6] irqchip: add irqchip driver for nuc900

refer to your previous nuc900 series patches for SPARSE IRQ, now I am waiting for rc1 release, and will send v3 patches. > > Arnd -- --- Vincent Wan(Zongshun) www.mcuos.com

Re: [PATCH v2 08/10] ARM: dts: nuc900: Add nuc970 dts files

On 2016年07月12日 23:39, Afzal Mohammed wrote: Hi, On Sun, Jul 10, 2016 at 03:42:20PM +0800, Wan Zongshun wrote: This patch is to add dts support for nuc970 platform. cpu ! in soc ? lost in fab ? ;) Do you mean I should add cpus into soc like? cpus { #address-cells

Re: [PATCH v2 02/10] irqchip: add irqchip driver for nuc900

On 2016年07月14日 04:09, Jason Cooper wrote: Hi Wan Zongshun, On Sun, Jul 10, 2016 at 03:27:22PM +0800, Wan Zongshun wrote: This patch is to add irqchip driver support for nuc900 plat, current this driver only supports nuc970 SoC. Signed-off-by: Wan Zongshun <mcuos@gmail.com> ---

Re: [PATCH 00/20] iommu/amd: Use generic IOVA allocator

On 2016年07月12日 18:55, Joerg Roedel wrote: Hey Vincent, On Tue, Jul 12, 2016 at 05:03:08PM +0800, Wan Zongshun wrote: Currently, those patches can not work at my eCarrizo board. When I merged your patches, boot failed, and no any info print to me. I set iommu=pt, it also does not work; set

Re: [PATCH v2 02/10] irqchip: add irqchip driver for nuc900

On 2016年07月12日 16:26, Arnd Bergmann wrote: On Tuesday, July 12, 2016 3:04:42 PM CEST Wan Zongshun wrote: Ideally, this should just go away once we use SPARSE_IRQ. This platform also can use SPARSE_IRQ? this just a simple irq map and no more irq number in this Soc. SPARSE_IRQ is implied

Re: [PATCH v2 02/10] irqchip: add irqchip driver for nuc900

2016-07-15 15:00 GMT+08:00 Arnd Bergmann <a...@arndb.de>: > On Friday, July 15, 2016 1:15:58 PM CEST Wan Zongshun wrote: >> >> Actually, I have two choice to implement this function: >> >> option1: >> >> void __exception_irq_entry aic_handle_irq(st

Re: [PATCH v2 01/10] ARM: NUC900: Add nuc970 machine support

On 2016年07月12日 00:04, Arnd Bergmann wrote: On Sunday, July 10, 2016 3:27:21 PM CEST Wan Zongshun wrote: +ifeq ($(CONFIG_SOC_NUC970),) obj-y := irq.o time.o mfp.o gpio.o clock.o obj-y += clksel.o dev.o cpu.o +endif # W90X900 CPU support

Re: [PATCH v2 02/10] irqchip: add irqchip driver for nuc900

On 2016年07月14日 21:54, Jason Cooper wrote: Hi Wan Zongshun, On Thu, Jul 14, 2016 at 11:36:53AM +0800, Wan Zongshun wrote: On 2016年07月14日 04:09, Jason Cooper wrote: On Sun, Jul 10, 2016 at 03:27:22PM +0800, Wan Zongshun wrote: This patch is to add irqchip driver support for nuc900 plat

Re: [PATCH 1/6] ARM: NUC900: Add nuc970 machine support

On 2016年06月29日 23:19, Arnd Bergmann wrote: On Saturday, June 25, 2016 6:37:17 PM CEST Wan Zongshun wrote: NUC970 is a new SoC of Nuvoton nuc900 series, this patch is to add machine file support for it. Signed-off-by: Wan Zongshun <mcuos@gmail.com> Nice to see some activity on th

Re: [PATCH 4/6] irqchip: add irqchip driver for nuc900

On 2016年06月29日 23:27, Arnd Bergmann wrote: On Saturday, June 25, 2016 6:37:20 PM CEST Wan Zongshun wrote: +#define IRQ_WDTW90X900_IRQ(1) +#define IRQ_WWDT W90X900_IRQ(2) +#define IRQ_LVDW90X900_IRQ(3) +#define IRQ_EXT0 W90X900_IRQ(4) +#define

Re: [PATCH 3/6] Clocksource: add nuc970 clocksource driver

On 2016年06月28日 03:46, Daniel Lezcano wrote: On 06/25/2016 12:37 PM, Wan Zongshun wrote: This patch is to add nuc970 clocksource driver support. Hi Wan, add a detailed description of how works this timer and its general design. If there is a pointer or a reference to a manual that would

Re: [PATCH 3/6] Clocksource: add nuc970 clocksource driver

On 2016年06月29日 23:25, Arnd Bergmann wrote: On Saturday, June 25, 2016 6:37:19 PM CEST Wan Zongshun wrote: This patch is to add nuc970 clocksource driver support. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- .../mach-w90x900/include/mach/nuc970-regs-timer.h | 44 + d

Re: [PATCH 4/6] irqchip: add irqchip driver for nuc900

On 2016年06月29日 23:27, Arnd Bergmann wrote: On Saturday, June 25, 2016 6:37:20 PM CEST Wan Zongshun wrote: +#define IRQ_WDTW90X900_IRQ(1) +#define IRQ_WWDT W90X900_IRQ(2) +#define IRQ_LVDW90X900_IRQ(3) +#define IRQ_EXT0 W90X900_IRQ(4) +#define

[PATCH v2 06/10] soc: Add SoC specific driver support for nuc900

This patch is to add SoC specific driver for nuc970 SoC, it is for getting nuc970 version id and chip id. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/nuvoton/Kconfig | 10 d

[PATCH v2 03/10] Clocksource: add nuc970 clocksource driver

resolution, and programmable counting period. The timer can generate an interrupt signal upon timeout, or provide the current value of count during operation. Currently, we are using TIMER0 and TIMER1 for clocksource and clockevent device driver support. Signed-off-by: Wan Zongshun <mc

[PATCH v2 02/10] irqchip: add irqchip driver for nuc900

This patch is to add irqchip driver support for nuc900 plat, current this driver only supports nuc970 SoC. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- arch/arm/mach-w90x900/include/mach/irqs.h | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-nu

[PATCH v2 01/10] ARM: NUC900: Add nuc970 machine support

NUC970 is a new SoC of Nuvoton nuc900 series, this patch is to add machine file support for it. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- arch/arm/mach-w90x900/Kconfig | 20 arch/arm/mach-w90x900/Makefile | 3 +++ arch/arm/mach-w90x900/nuc900.

[PATCH v2 05/10] power/reset: Add reset driver support for nuc900

This driver is to add reset support for nuc900 series, currently, it only supports nuc970 SoC reset. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- drivers/power/reset/Kconfig| 7 +++ drivers/power/reset/Makefile | 1 + drivers/power/reset/nuc900-reset.

[PATCH v2 07/10] ARM: dts: Add clock header file into dt-bindings

This patch is to add nuc970 clock Macros header file into include/dt-bindings/clock. Signed-off-by: Wan Zongshun <mcuos@gmail.com> --- include/dt-bindings/clock/nuc970-clock.h | 233 +++ 1 file changed, 233 insertions(+) create mode 100644 include/dt-bi

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