Hi, all
Several months ago, I tried to use the generic thermal framework to work
with the lm90 driver on our SOC, but this work was not completed, and it
was pended.
Now I want to start it again. I noticed that many new patches of this
framework were submitted, I checked linux-next.git, but it
On Fri, 2012-07-13 at 09:51 +0800, Zhang Rui wrote:
On 四, 2012-07-12 at 04:54 -0600, R, Durgadoss wrote:
Hi,
-Original Message-
From: Wei Ni [mailto:w...@nvidia.com]
Sent: Thursday, July 12, 2012 3:53 PM
To: Zhang, Rui; Brown, Len; a...@linux-foundation.org; kh...@linux
On Fri, 2012-07-13 at 15:41 +0800, Zhang Rui wrote:
On 五, 2012-07-13 at 15:30 +0800, Wei Ni wrote:
Our tegra thermal framework also will use the generic thermal layer. It
will register the cooling device, and run the throttling in this generic
framework.
But we have a special mechanism
On Fri, 2012-07-13 at 16:11 +0800, Wei Ni wrote:
On Fri, 2012-07-13 at 15:41 +0800, Zhang Rui wrote:
On 五, 2012-07-13 at 15:30 +0800, Wei Ni wrote:
Our tegra thermal framework also will use the generic thermal layer. It
will register the cooling device, and run the throttling
On 01/07/2013 03:13 PM, Durgadoss R wrote:
This patch set is a v2 of the previous versions submitted here:
[v1]: https://lkml.org/lkml/2012/12/18/108
[RFC]: https://patchwork.kernel.org/patch/1758921/
This patch set is based on Rui's -thermal tree, and is
tested on a Core-i5 and an Atom
On 01/07/2013 03:13 PM, Durgadoss R wrote:
This patch set is a v2 of the previous versions submitted here:
[v1]: https://lkml.org/lkml/2012/12/18/108
[RFC]: https://patchwork.kernel.org/patch/1758921/
This patch set is based on Rui's -thermal tree, and is
tested on a Core-i5 and an Atom
for it.
Signed-off-by: Wei ni [EMAIL PROTECTED]
(See attached file: hda_intel.patch)
Have a good day!
wei
hda_intel.patch
Description: Binary data
Enable the SDHCI1 controller. This is connected to the WiFi module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra20-seaboard.dts |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20
Set up the wlan clock tree for Tegra20 and Tegra30.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/mach-tegra/board-dt-tegra20.c |4
arch/arm/mach-tegra/board-dt-tegra30.c |4
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-dt
-OOB issue, so we remove the patches for brcmfmac driver.
-Support Cardhu a02 and a04 board.
-Remove the config WLAN and WIRELESS in the patch,
because they are default=y
-Add bus-width for sdhci in the dts file
Wei Ni (5):
ARM: tegra: set up wlan clocks for tegra dt
ARM: dt
New options enabled:
* CFG80211_WEXT: (dependency)
* BRCMFMAC: wlan driver, enable as module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/configs/tegra_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs
Configure pinmux as required for WiFi.
Enable the SDHCI1 controller, which is connectted to the WiFi module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra20-ventana.dts | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts
Configure pinmux as required for WiFi.
Enable the SDHCI1 controller for a02 and a04 board, which is connected to the
WiFi module.
For now, always enable the regulator that provides power to the Wifi module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra30-cardhu-a02.dts |6
On Fri, 2012-07-13 at 15:41 +0800, Zhang Rui wrote:
On 五, 2012-07-13 at 15:30 +0800, Wei Ni wrote:
Our tegra thermal framework also will use the generic thermal layer. It
will register the cooling device, and run the throttling in this generic
framework.
But we have a special mechanism
On Fri, 2012-07-27 at 09:21 +0800, Zhang Rui wrote:
On 四, 2012-07-26 at 17:31 +0800, Wei Ni wrote:
On Fri, 2012-07-13 at 15:41 +0800, Zhang Rui wrote:
On 五, 2012-07-13 at 15:30 +0800, Wei Ni wrote:
Our tegra thermal framework also will use the generic thermal layer
On Fri, 2012-07-27 at 15:39 +0800, Zhang Rui wrote:
On 五, 2012-07-27 at 09:30 +0200, Jean Delvare wrote:
On Fri, 27 Jul 2012 10:58:21 +0800, Wei Ni wrote:
On Fri, 2012-07-27 at 09:21 +0800, Zhang Rui wrote:
is it possible to program the sensor at this time, in your own thermal
driver
Hi, all
I'm working on tegra wlan upstream issue.
The tegra board use the Broadcom 4329 as wlan device, and the driver is
the brcmfmac.
This wlan driver support out-band-interrupt (OOB), I want to add DT
support to use this OOB.
I can add following lines in the dts file to create platform device
On Thu, 2012-08-09 at 20:05 +0800, Mark Brown wrote:
On Thu, Aug 09, 2012 at 11:48:42AM +, Arnd Bergmann wrote:
On Thursday 09 August 2012, Wei Ni wrote:
The wlan driver wish this flags include the IRQF_TRGGER_* information,
and it will use this flags to configure other hw settings
On Thu, 2012-08-09 at 20:09 +0800, Arend van Spriel wrote:
On 08/09/2012 12:43 PM, Wei Ni wrote:
Hi, all
I'm working on tegra wlan upstream issue.
The tegra board use the Broadcom 4329 as wlan device, and the driver is
the brcmfmac.
This wlan driver support out-band-interrupt (OOB
Set up the wlan clock tree for Tegra20 and Tegra30.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/mach-tegra/board-dt-tegra20.c |4
arch/arm/mach-tegra/board-dt-tegra30.c |4
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-dt
directly will prevent thread context switching in
wifi driver. It can fix the instability problems.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c |2 ++
drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c |8 +++-
2 files changed, 9
New options enabled:
* WIRELESS: (dependency)
* CFG80211_WEXT: (dependency)
* WLAN: (dependency)
* BRCMFMAC: wlan driver, enable as module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/configs/tegra_defconfig |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch
Configure pinmux as required for WiFi.
Enable the SDHCI1 controller. This is connectted to the WiFi module.
For now, always enable the regulator that provides power to the Wifi module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra30-cardhu.dtsi | 32
Configure pinmux as required for WiFi.
Enable the SDHCI1 controller, which is connectted to the WiFi module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra20-ventana.dts | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts
Enable wlan for following tegra board:
Tegra30: Cardhu.
Tegra20: Seaboard, Ventana.
Wei Ni (6):
ARM: tegra: set up wlan clocks for tegra dt
brcmfmac: Handling the interrupt in ISR directly for non-OOB
ARM: dt: t20 seaboard: turn on the power for wlan
ARM: dt: t20 ventana: set pinmux
Enable the SDHCI1 controller. This is connected to the WiFi module.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra20-seaboard.dts |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20
On Tue, 2012-08-28 at 00:24 +0800, Arend van Spriel wrote:
On 08/27/2012 12:25 PM, Wei Ni wrote:
In case of inband interrupts, if we handle the interrupt in dpc thread,
two level of thread switching takes place to process wifi interrupts.
One in SDHCI driver and the other in Wifi driver
On Tue, 2012-08-28 at 04:06 +0800, Stephen Warren wrote:
On 08/27/2012 09:24 AM, Arend van Spriel wrote:
On 08/27/2012 12:25 PM, Wei Ni wrote:
In case of inband interrupts, if we handle the interrupt in dpc thread,
two level of thread switching takes place to process wifi interrupts.
One
On Wed, 2012-08-01 at 09:02 +0800, Zhang Rui wrote:
On 五, 2012-07-27 at 18:48 +0800, Wei Ni wrote:
On Fri, 2012-07-27 at 15:39 +0800, Zhang Rui wrote:
On 五, 2012-07-27 at 09:30 +0200, Jean Delvare wrote:
On Fri, 27 Jul 2012 10:58:21 +0800, Wei Ni wrote:
On Fri, 2012-07-27 at 09:21
Hi, all
I'm working on the tegra thermal throttling upstream issue.
The tegra30 board use the nct1008 as the thermal sensor, and the lm90 is
the sensor driver. We want to use the generic thermal sysfs.
My question is where should we register the thermal zone device? We may
have two place to do
serial patches for
these implementation?
Thanks to Rui Zhang, Honghbo Zhang, Wei Ni for their feedback on the
RFC version.
Durgadoss R (8):
Thermal: Create sensor level APIs
Thermal: Create zone level APIs
Thermal: Add APIs to bind cdev to new zone structure
Thermal: Add Thermal_trip
On 12/18/2012 05:29 PM, Durgadoss R wrote:
This patch creates new APIs to add/remove a
cdev to/from a zone. This patch does not change
the old cooling device implementation.
Signed-off-by: Durgadoss R durgados...@intel.com
---
drivers/thermal/thermal_sys.c | 80
On 12/18/2012 05:29 PM, Durgadoss R wrote:
This patch has a dummy driver that can be used for
testing purposes. This patch is not for merge.
Signed-off-by: Durgadoss R durgados...@intel.com
---
drivers/thermal/Kconfig|5 +
drivers/thermal/Makefile |3 +
On 01/07/2013 03:13 PM, Durgadoss R wrote:
This patch adds Documentation for the new APIs
introduced in this patch set. The documentation
also has a model sysfs structure for reference.
Signed-off-by: Durgadoss R durgados...@intel.com
---
Documentation/thermal/sysfs-api2.txt | 248
On 01/07/2013 04:53 PM, R, Durgadoss wrote:
-Original Message-
From: Wei Ni [mailto:w...@nvidia.com]
Sent: Monday, January 07, 2013 2:10 PM
To: R, Durgadoss
Cc: Zhang, Rui; linux...@vger.kernel.org; linux-kernel@vger.kernel.org;
eduardo.valen...@ti.com; hongbo.zh...@linaro.org
Split setshow temp codes as common functions, so we can use it directly when
implement linux thermal framework.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 112 +++---
1 file changed, 69 insertions(+), 43 deletions(-)
diff --git
Sorry, I made a mistake, please ignore this patch.
Wei.
On 08/06/2013 06:06 PM, Wei Ni wrote:
Split setshow temp codes as common functions, so we can use it directly when
implement linux thermal framework.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 112
Split setshow temp codes as common functions, so we can use it
directly when implement linux thermal framework.
And handle error return value for the lm90_select_remote_channel
and write_tempx, then set_temp8 and set_temp11 could return it
to user-space.
Signed-off-by: Wei Ni w...@nvidia.com
This patch is separated from my previous v3 series, which is in
http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg466772.html
Changes from v3:
1. Add error handler for lm90_select_remote_channel(), set_temp8(), and
set_temp11().
Wei.
On 08/06/2013 06:36 PM, Wei Ni wrote:
Split
When the temperature exceed the limit range value,
the driver can handle the interrupt.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index 1da2eff..2e68773
Add bit defines for the status register. And add a function
lm90_is_tripped() which will read status register and return
tripped or not, then lm90_alert can call it directly, and in the
future the IRQ thread also can use it.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 75
Using enums for the indexes and nrs of temp8 and temp11.
This make the code much more readable.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 154 +-
1 file changed, 90 insertions(+), 64 deletions(-)
diff --git a/drivers/hwmon
macro defines for the alarm status
3. consider the shared IRQ.
Changes from RFC:
1. change _show_temp() to read_temp(), _set_temp() to write_temp().
2. simply return value for the read_temp(), not use pointer.
3. use devm_request_threaded_irq() to request irq and set flag IRQF_ONESHOT.
Wei Ni (3
Enable thermal sensor nct1008 for t114 dalmore.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra114-dalmore.dts | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
b/arch/arm/boot/dts/tegra114-dalmore.dts
index
The device lm90 can be controlled by the vdd rail.
Adding the power control support to power on/off the vdd rail.
And make sure that power is enabled before accessing the device.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 52
The device lm90 can be controlled by the vdd rail.
Add function to power on/off the vdd.
Enable the nct1008 on Tegra114 Dalmore board, and set the vdd-regulator.
Wei Ni (2):
hwmon: (lm90) Add power control
ARM: dt: t114 dalmore: add dt entry for nct1008
arch/arm/boot/dts/tegra114
On 08/07/2013 03:03 PM, Guenter Roeck wrote:
On 08/06/2013 11:52 PM, Wei Ni wrote:
The device lm90 can be controlled by the vdd rail.
Adding the power control support to power on/off the vdd rail.
And make sure that power is enabled before accessing the device.
Signed-off-by: Wei Ni w
On 08/07/2013 03:27 PM, Alexander Shiyan wrote:
The device lm90 can be controlled by the vdd rail.
Adding the power control support to power on/off the vdd rail.
And make sure that power is enabled before accessing the device.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c
On 08/07/2013 03:50 PM, Guenter Roeck wrote:
On 08/07/2013 12:32 AM, Wei Ni wrote:
On 08/07/2013 03:27 PM, Alexander Shiyan wrote:
The device lm90 can be controlled by the vdd rail.
Adding the power control support to power on/off the vdd rail.
And make sure that power is enabled before
On 08/07/2013 04:45 PM, Alexander Shiyan wrote:
On 08/07/2013 03:50 PM, Guenter Roeck wrote:
On 08/07/2013 12:32 AM, Wei Ni wrote:
On 08/07/2013 03:27 PM, Alexander Shiyan wrote:
The device lm90 can be controlled by the vdd rail.
Adding the power control support to power on/off the vdd rail
On 07/27/2013 11:02 PM, Jean Delvare wrote:
Hi Wei,
Sorry for the late reply.
On Fri, 19 Jul 2013 14:41:54 +0800, Wei Ni wrote:
On 07/18/2013 11:58 PM, Jean Delvare wrote:
First of all, how is the chip wired on your system? You are using an
NCT1008, right? Which output of the chip
On 07/27/2013 11:38 PM, Jean Delvare wrote:
Hi Wei,
On Fri, 12 Jul 2013 15:48:07 +0800, Wei Ni wrote:
Using enums for the indexes and nrs of temp8 and temp11.
This make the code much more readable.
I can't say I'm thrilled by this patch. The improved readability is
questionable
On 07/09/2013 10:00 PM, Eduardo Valentin wrote:
In order to be able to build thermal policies
based on generic sensors, like I2C device, that
can be places in different points on different boards,
there is a need to have a way to feed board dependent
data into the thermal framework.
This
When the temperature exceed the limit range value,
the driver can handle the interrupt.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 77 +-
1 file changed, 64 insertions(+), 13 deletions(-)
diff --git a/drivers/hwmon/lm90.c b
() to request irq and set flag IRQF_ONESHOT.
Wei Ni (3):
hwmon: (lm90) split setshow temp as common codes
hwmon: (lm90) add support to handle IRQ.
hwmon: (lm90) use enums for the indexes of temp8 and temp11
drivers/hwmon/lm90.c | 374 ++
1 file
Using enums for the indexes and nrs of temp8 and temp11.
This make the code much more readable.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 179 --
1 file changed, 114 insertions(+), 65 deletions(-)
diff --git a/drivers/hwmon
Split setshow temp codes as common functions, so we can use it directly when
implement linux thermal framework.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 118 --
1 file changed, 75 insertions(+), 43 deletions(-)
diff --git
Enable thermal sensor nct1008 for t30 cardhu.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra30-cardhu.dtsi |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi
b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index f65b53d..3d568a1 100644
Enable thermal sensor nct1008 for t114 dalmore.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra114-dalmore.dts |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
b/arch/arm/boot/dts/tegra114-dalmore.dts
index cb640eb..95c5079
for nct1008 node.
Changes from RFC:
1. Enable it for Tegra114 Dalmore.
Wei Ni (2):
ARM: dt: t30 cardhu: add dt entry for nct1008
ARM: dt: t114 dalmore: add dt entry for nct1008
arch/arm/boot/dts/tegra114-dalmore.dts |7 +++
arch/arm/boot/dts/tegra30-cardhu.dtsi |7 +++
2
On 07/11/2013 01:13 AM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Wed, Jul 10, 2013 at 07:29:57PM +0800, Wei Ni wrote:
Enable thermal sensor nct1008 for t30 cardhu.
Nit: Tegra30 Cardhu
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi
b/arch/arm/boot/dts/tegra30
On 07/11/2013 02:12 AM, Guenter Roeck wrote:
On Wed, Jul 10, 2013 at 10:05:53AM -0700, Thierry Reding wrote:
On Wed, Jul 10, 2013 at 07:25:38PM +0800, Wei Ni wrote:
When the temperature exceed the limit range value,
the driver can handle the interrupt.
Signed-off-by: Wei Ni w...@nvidia.com
On 07/11/2013 02:18 AM, Guenter Roeck wrote:
On Wed, Jul 10, 2013 at 07:25:38PM +0800, Wei Ni wrote:
When the temperature exceed the limit range value,
the driver can handle the interrupt.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 77
On 07/11/2013 02:21 AM, Guenter Roeck wrote:
On Wed, Jul 10, 2013 at 07:25:37PM +0800, Wei Ni wrote:
Split setshow temp codes as common functions, so we can use it directly when
implement linux thermal framework.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 118
Add host-off-card-on dt property and parse it to support the
quirk SDHCI_QUIRK2_HOST_OFF_CARD_ON.
Signed-off-by: Wei Ni w...@nvidia.com
---
Documentation/devicetree/bindings/mmc/mmc.txt |2 ++
drivers/mmc/host/sdhci-pltfm.c|3 +++
2 files changed, 5 insertions(+)
diff
Add bit defines for the status register.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 72 ++
1 file changed, 49 insertions(+), 23 deletions(-)
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index 5f30f90..c90037f
Enable thermal sensor nct1008 for t30 cardhu.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra30-cardhu.dtsi |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi
b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index f65b53d..e5759ca 100644
Using enums for the indexes and nrs of temp8 and temp11.
This make the code much more readable.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 179 --
1 file changed, 114 insertions(+), 65 deletions(-)
diff --git a/drivers/hwmon
-kernel@vger.kernel.org/msg465561.html
Changes from v2:
1. remove the label nct1008.
Changes from v1:
1. add vendor strings onnn for nct1008 node.
Changes from RFC:
1. Enable it for Tegra114 Dalmore.
Wei Ni (2):
ARM: dt: t30 cardhu: add dt entry for nct1008
ARM: dt: t114 dalmore: add dt entry
defines for the alarm status
3. consider the shared IRQ.
Changes from RFC:
1. change _show_temp() to read_temp(), _set_temp() to write_temp().
2. simply return value for the read_temp(), not use pointer.
3. use devm_request_threaded_irq() to request irq and set flag IRQF_ONESHOT.
Wei Ni (4):
hwmon
When the temperature exceed the limit range value,
the driver can handle the interrupt.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index c90037f
Split setshow temp codes as common functions, so we can use it directly when
implement linux thermal framework.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 112 +++---
1 file changed, 69 insertions(+), 43 deletions(-)
diff --git
Enable thermal sensor nct1008 for t114 dalmore.
Signed-off-by: Wei Ni w...@nvidia.com
---
arch/arm/boot/dts/tegra114-dalmore.dts |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
b/arch/arm/boot/dts/tegra114-dalmore.dts
index cb640eb..47ec7eb
to be that fast on my end, sorry about that.
On Fri, 12 Jul 2013 15:48:04 +0800, Wei Ni wrote:
Split setshow temp codes as common functions, so we can use it directly when
implement linux thermal framework.
Can I see a recent version of the code which will need this change? It
makes no sense to apply
On 07/12/2013 10:40 PM, Guenter Roeck wrote:
On Fri, Jul 12, 2013 at 04:30:34PM +0200, Jean Delvare wrote:
Hi Guenter,
On Fri, 12 Jul 2013 06:50:00 -0700, Guenter Roeck wrote:
On Fri, Jul 12, 2013 at 03:26:15PM +0200, Jean Delvare wrote:
One thing I am a little worried about (but maybe I'm
On 07/15/2013 03:24 PM, Jean Delvare wrote:
On Mon, 15 Jul 2013 14:25:29 +0800, Wei Ni wrote:
On 07/12/2013 10:40 PM, Guenter Roeck wrote:
On Fri, Jul 12, 2013 at 04:30:34PM +0200, Jean Delvare wrote:
If that means that for example the ACPI thermal zone is no longer
displayed by sensors
Atomic operations are undefined behavior on ARM for device or strongly
ordered memory types. So use write-combine variants for mappings. This
corresponds to normal, non-cacheable memory on ARM. For many other
architectures, this change should not change the mapping type.
Hi, all
I have met
On 07/16/2013 01:13 AM, Stephen Warren wrote:
On 07/15/2013 10:48 AM, Stephen Warren wrote:
On 07/12/2013 01:49 AM, Wei Ni wrote:
Enable thermal sensor lm90 for Tegra30 Cardhu and Tegra114 Dalmore.
I have applied the series to Tegra's for-3.12/dt branch.
Actually, I see the following
On 07/17/2013 01:14 PM, Guenter Roeck wrote:
On Wed, Jul 17, 2013 at 06:26:20AM +0200, Thierry Reding wrote:
On Mon, Jul 15, 2013 at 09:24:15AM +0200, Jean Delvare wrote:
On Mon, 15 Jul 2013 14:25:29 +0800, Wei Ni wrote:
On 07/12/2013 10:40 PM, Guenter Roeck wrote:
On Fri, Jul 12, 2013 at 04
On 07/16/2013 12:57 AM, Jean Delvare wrote:
Hi Wei, Guenter,
On Fri, 12 Jul 2013 15:48:05 +0800, Wei Ni wrote:
Add bit defines for the status register.
Regarding the subject: for me these are constants, not macros. AFAIK
the term macro refers to defines with parameters only.
How about
On 07/17/2013 03:03 PM, Wei Ni wrote:
On 07/16/2013 12:57 AM, Jean Delvare wrote:
Hi Wei, Guenter,
+
+ if ((status 0x7f) == 0 (status2 0xfe) == 0)
+ return false;
It's a bit disappointing to not use the freshly introduced constants.
That being said I agree it would make
On 07/16/2013 07:14 PM, Wei Ni wrote:
On 07/16/2013 01:13 AM, Stephen Warren wrote:
On 07/15/2013 10:48 AM, Stephen Warren wrote:
On 07/12/2013 01:49 AM, Wei Ni wrote:
Enable thermal sensor lm90 for Tegra30 Cardhu and Tegra114 Dalmore.
I have applied the series to Tegra's for-3.12/dt branch
On 07/17/2013 04:23 PM, Mikko Perttunen wrote:
On 07/17/2013 11:17 AM, Wei Ni wrote:
On 07/16/2013 07:14 PM, Wei Ni wrote:
On 07/16/2013 01:13 AM, Stephen Warren wrote:
On 07/15/2013 10:48 AM, Stephen Warren wrote:
On 07/12/2013 01:49 AM, Wei Ni wrote:
Enable thermal sensor lm90 for Tegra30
On 07/17/2013 04:28 PM, Jean Delvare wrote:
Hi Wei,
On Wed, 17 Jul 2013 15:03:35 +0800, Wei Ni wrote:
On 07/16/2013 12:57 AM, Jean Delvare wrote:
On Fri, 12 Jul 2013 15:48:05 +0800, Wei Ni wrote:
Add bit defines for the status register.
Regarding the subject: for me these are constants
On 07/10/2013 12:54 AM, Eduardo Valentin wrote:
* PGP Signed: 07/09/2013 at 09:54:04 AM
On 09-07-2013 12:04, R, Durgadoss wrote:
Hi Eduardo,
-Original Message-
From: linux-pm-ow...@vger.kernel.org [mailto:linux-pm-
ow...@vger.kernel.org] On Behalf Of Eduardo Valentin
Sent:
On 07/17/2013 05:11 PM, Jean Delvare wrote:
On Wed, 17 Jul 2013 14:26:54 +0800, Wei Ni wrote:
On 07/17/2013 01:14 PM, Guenter Roeck wrote:
On Wed, Jul 17, 2013 at 06:26:20AM +0200, Thierry Reding wrote:
On Mon, Jul 15, 2013 at 09:24:15AM +0200, Jean Delvare wrote:
On Mon, 15 Jul 2013 14:25:29
On 07/17/2013 11:17 PM, Eduardo Valentin wrote:
This patch adds to lm75 temperature sensor the possibility
to expose itself as thermal zone device, registered on the
thermal framework.
The thermal zone is built only if a device tree node
describing a thermal zone for this sensor is present
On 07/18/2013 11:58 PM, Jean Delvare wrote:
Hi Wei,
On Fri, 12 Jul 2013 15:48:06 +0800, Wei Ni wrote:
When the temperature exceed the limit range value,
the driver can handle the interrupt.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 24
On 07/18/2013 09:12 PM, Eduardo Valentin wrote:
* PGP Signed: 07/18/2013 at 06:12:01 AM
Hi Wei,
On 18-07-2013 01:33, Wei Ni wrote:
On 07/17/2013 11:17 PM, Eduardo Valentin wrote:
This patch adds to lm75 temperature sensor the possibility
to expose itself as thermal zone device
previous review.
Changes from v1:
1. if get regulator failed, we should continue to run probe function,
not return fail.
2. call regulator_put() in error handler and remove function.
3. add LM90 DT binding document.
Wei Ni (2):
hwmon: (lm90) Add power control
Documentation: dt: hwmon: add
The device lm90 can be controlled by the vcc rail.
Adding the regulator support to power on/off the vcc rail.
Enable the vcc regulator before accessing the device.
Signed-off-by: Wei Ni w...@nvidia.com
---
drivers/hwmon/lm90.c | 25 +
1 file changed, 25 insertions
Add OF document for LM90 in Documentation/devicetree/.
Signed-off-by: Wei Ni w...@nvidia.com
---
Documentation/devicetree/bindings/hwmon/lm90.txt | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/lm90.txt
diff --git
On 09/09/2013 11:50 PM, Guenter Roeck wrote:
On Mon, Sep 09, 2013 at 02:50:22PM +0100, Mark Brown wrote:
On Mon, Sep 09, 2013 at 04:34:43AM -0700, Guenter Roeck wrote:
On 09/09/2013 04:12 AM, Mark Brown wrote:
On Mon, Sep 09, 2013 at 06:29:11PM +0800, Wei Ni wrote:
This doesn't look good
On 09/10/2013 04:39 AM, Mark Brown wrote:
* PGP Signed by an unknown key
On Mon, Sep 09, 2013 at 09:17:35AM -0700, Guenter Roeck wrote:
On Mon, Sep 09, 2013 at 05:02:37PM +0100, Mark Brown wrote:
It does, though it gets complicated trying to use it for a case like
this since you can't
On 09/10/2013 11:53 AM, Guenter Roeck wrote:
On 09/09/2013 08:40 PM, Stephen Warren wrote:
On 09/09/2013 09:36 PM, Guenter Roeck wrote:
On 09/09/2013 08:22 PM, Wei Ni wrote:
On 09/09/2013 11:50 PM, Guenter Roeck wrote:
On Mon, Sep 09, 2013 at 02:50:22PM +0100, Mark Brown wrote:
On Mon, Sep
On 09/10/2013 06:14 AM, Stephen Warren wrote:
On 09/09/2013 04:52 AM, Guenter Roeck wrote:
On 09/09/2013 03:29 AM, Wei Ni wrote:
Add OF document for LM90 in Documentation/devicetree/.
diff --git a/Documentation/devicetree/bindings/hwmon/lm90.txt
+* LM90 series thermometer.
+
+Required
On 09/10/2013 06:23 AM, Guenter Roeck wrote:
On Mon, Sep 09, 2013 at 04:15:57PM -0600, Stephen Warren wrote:
On 09/09/2013 04:29 AM, Wei Ni wrote:
Add OF document for LM90 in Documentation/devicetree/.
diff --git a/Documentation/devicetree/bindings/hwmon/lm90.txt
b/Documentation/devicetree
On 09/09/2013 06:57 PM, Ramkumar Ramachandra wrote:
Wei Ni wrote:
diff --git a/Documentation/devicetree/bindings/hwmon/lm90.txt
b/Documentation/devicetree/bindings/hwmon/lm90.txt
new file mode 100644
index 000..5570875
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/lm90
On 09/10/2013 12:35 PM, Wei Ni wrote:
On 09/09/2013 06:57 PM, Ramkumar Ramachandra wrote:
Wei Ni wrote:
diff --git a/Documentation/devicetree/bindings/hwmon/lm90.txt
b/Documentation/devicetree/bindings/hwmon/lm90.txt
new file mode 100644
index 000..5570875
--- /dev/null
+++ b
On 09/10/2013 12:50 PM, Guenter Roeck wrote:
On 09/09/2013 09:05 PM, Wei Ni wrote:
On 09/10/2013 04:39 AM, Mark Brown wrote:
* PGP Signed by an unknown key
On Mon, Sep 09, 2013 at 09:17:35AM -0700, Guenter Roeck wrote:
On Mon, Sep 09, 2013 at 05:02:37PM +0100, Mark Brown wrote:
It does
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