com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Zhang Yi <yi.z.zh...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.co
-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/Kconfig| 8 +++
drivers/fpga/intel/Makefile | 2 +
drivers/fpga/intel/fme-main.c | 158 ++
3 files changed, 168 insertio
intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/feature-dev.h | 9 +
d
opher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
Documentation/ioctl/ioctl-number.txt | 1 +
drivers/fpga/intel/fme-main.c| 12 +
include/uapi/linux/intel-fpga.h | 52 +
intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/Makefile | 2 +-
drivers/fpga/intel/afu-dma-region.c | 373
drivers/fpga/intel/afu-main.c |
bb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/Makefile | 2
com>
Signed-off-by: Enno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel
.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/Kconfig
nno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com&g
connects to.
Kang Luwei (3):
fpga: intel: add FPGA Management Engine driver basic framework
fpga: intel: fme: add header sub feature support
fpga: intel: fme: add partial reconfiguration sub feature support
Wu Hao (8):
docs: fpga: add a document for Intel FPGA driver overview
fpga: add FPGA
;
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/Makefile | 2 +-
drivers/fpga/intel/feature-dev.h | 58 ++
drivers/fpga/intel/fme-main.c
...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/afu-main.c | 44 -
include/uapi/linux/intel-fpga.h | 14 +
2 files changed, 57 inse
>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/Kconfig | 6 +++
drivers/fpga/Makefile | 3 ++
drivers/fpga/fpga-dev.c | 120 ++
include/linux/fpga/fp
er Rauer <christopher.ra...@intel.com>
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Zhang Yi <yi.z.zh...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/feature-dev
Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/intel/Makefile | 2 +-
drivers/fpga/intel/feature-dev.c | 139 +++
drivers/fpga/intel/feature-dev.h | 342
drivers/fpga/intel/pcie.c| 841
Add a document for Intel FPGA driver overview.
Signed-off-by: Enno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
Documentation/fpga/intel-fpga.txt | 259
intel.com>
Signed-off-by: Enno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Zhang Yi <yi.z.zh...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...
On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > During FPGA device (e.g PCI-based) discovery, platform devices are
> > registered for different FPGA function units. But the device node path
> >
On Fri, Mar 31, 2017 at 12:11:12PM +0800, Xiao Guangrong wrote:
> On 31/03/2017 4:30 AM, Alan Tull wrote:
> >On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> >>From: Kang Luwei <luwei.k...@intel.com>
> >>
> >>Partial Reconfigura
On Fri, Mar 31, 2017 at 11:03:28AM +0200, Greg KH wrote:
> On Fri, Mar 31, 2017 at 03:48:42PM +0800, Wu Hao wrote:
> > On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> > > On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > > > During FPGA de
> On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > During FPGA device (e.g PCI-based) discovery, platform devices are
> > registered for different FPGA function units. But the device node path
> > isn't quite friendly to applications.
> >
> > Cons
On Mon, Apr 03, 2017 at 03:44:17PM -0500, Alan Tull wrote:
> On Sun, Apr 2, 2017 at 9:41 AM, Moritz Fischer <m...@kernel.org> wrote:
> > On Sat, Apr 01, 2017 at 07:16:19PM +0800, Wu Hao wrote:
> >> On Fri, Mar 31, 2017 at 01:38:06PM -0500, Alan Tull wrote:
> >>
On Mon, Apr 03, 2017 at 03:26:14PM -0500, Alan Tull wrote:
> On Fri, Mar 31, 2017 at 3:50 AM, Wu Hao <hao...@intel.com> wrote:
> > On Fri, Mar 31, 2017 at 12:11:12PM +0800, Xiao Guangrong wrote:
> >> On 31/03/2017 4:30 AM, Alan Tull wrote:
> >> >On Thu,
On Sun, Apr 02, 2017 at 07:41:46AM -0700, Moritz Fischer wrote:
> On Sat, Apr 01, 2017 at 07:16:19PM +0800, Wu Hao wrote:
> > On Fri, Mar 31, 2017 at 01:38:06PM -0500, Alan Tull wrote:
> > > On Fri, Mar 31, 2017 at 1:24 PM, <matthew.gerl...@linux.intel.com> wrote:
> &
On Mon, Apr 03, 2017 at 11:30:55AM -0500, Alan Tull wrote:
> On Sat, Apr 1, 2017 at 6:08 AM, Wu Hao <hao...@intel.com> wrote:
> > On Fri, Mar 31, 2017 at 02:10:12PM -0500, Alan Tull wrote:
> >> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
&g
On Mon, Apr 03, 2017 at 03:49:41PM -0700, matthew.gerl...@linux.intel.com wrote:
>
>
> On Mon, 3 Apr 2017, Alan Tull wrote:
>
> >On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> >>From: Kang Luwei <luwei.k...@intel.com>
> >&
On Mon, Apr 03, 2017 at 04:24:13PM -0500, Alan Tull wrote:
> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> > From: Kang Luwei <luwei.k...@intel.com>
> >
> > Partial Reconfiguration (PR) is the most important function for FME. It
> >
On Fri, Mar 31, 2017 at 02:10:12PM -0500, Alan Tull wrote:
> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> > From: Kang Luwei <luwei.k...@intel.com>
> >
> > Partial Reconfiguration (PR) is the most important function for FME. It
> >
On Fri, Mar 31, 2017 at 01:38:06PM -0500, Alan Tull wrote:
> On Fri, Mar 31, 2017 at 1:24 PM, <matthew.gerl...@linux.intel.com> wrote:
> >
> >
> > On Thu, 30 Mar 2017, Wu Hao wrote:
> >
> >
> > Hi Wu Hao,
> >
> > Great documentation. I'm l
On Fri, Mar 31, 2017 at 04:10:09PM +0200, Greg KH wrote:
> On Fri, Mar 31, 2017 at 09:31:09PM +0800, Wu Hao wrote:
> > > On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > > > +#include
> > > > +#include
> > > > +#include
> &g
On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@linux.intel.com wrote:
> On Fri, 31 Mar 2017, Wu Hao wrote:
> >On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> >>On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> >>>During FPGA device (e.g
> >> > >
> >> > >
> >> > > Does this HW Architecture require an Intel FPGA? Couldn't any vendors
> FPGA
> >> > > be used as long as it presented itself the PCIe bus the same and
> >> > > contained
> >> > > an appropriate Device Feature List?
> >
> > I think this is a good (and important) point.
On Tue, Apr 04, 2017 at 05:09:23PM -0500, Alan Tull wrote:
> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> > From: Xiao Guangrong <guangrong.x...@linux.intel.com>
> >
> > Device Featuer List structure creates a link list of feature headers
>
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define DRV_VERSION"EXPERIMENTAL VERSION"
>
> Is that a leftover? :)
Sorry, will fix this.
> > +#define DRV_NAME "intel-fpga-pci"
> > +
> > +/* PCI Device ID */
> >
On Wed, Apr 05, 2017 at 10:39:05AM -0500, Alan Tull wrote:
> On Wed, Apr 5, 2017 at 10:26 AM, Alan Tull <at...@kernel.org> wrote:
> > On Wed, Apr 5, 2017 at 6:40 AM, Wu, Hao <hao...@intel.com> wrote:
> >>> >> The fpga_image_info struct started life as just i
> On Wed, Apr 5, 2017 at 6:58 AM, Wu Hao <hao...@intel.com> wrote:
> > On Mon, Apr 03, 2017 at 04:44:15PM -0500, Alan Tull wrote:
> >> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> >> > From: Xiao Guangrong <guangrong.x...@linux
On Mon, Apr 03, 2017 at 04:44:15PM -0500, Alan Tull wrote:
> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao <hao...@intel.com> wrote:
> > From: Xiao Guangrong <guangrong.x...@linux.intel.com>
> >
> > Device Featuer List structure creates a link list of feature headers
>
> >> The fpga_image_info struct started life as just image specific info,
> >> but I want it to go in the direction of including parameters needed to
> >> program it this specific time. Otherwise we are stuck having to keep
> >> adding parameters as our use of FPGA develops. It probably could be
On Mon, Apr 03, 2017 at 07:44:55PM -0700, Moritz Fischer wrote:
> Xiao,
>
> few nits inline, I'll need to come back to this once I went over the
> rest of the patchset ;-)
Sure, Thanks for your comments and review. :)
>
> On Thu, Mar 30, 2017 at 08:08:04PM +0800, Wu Hao wro
On Thu, Apr 06, 2017 at 02:27:42PM -0500, Alan Tull wrote:
> On Thu, Apr 6, 2017 at 5:57 AM, Wu Hao <hao...@intel.com> wrote:
> > On Wed, Apr 05, 2017 at 10:39:05AM -0500, Alan Tull wrote:
> >> On Wed, Apr 5, 2017 at 10:26 AM, Alan Tull <at...@kernel.org> wrote:
>
On Mon, Jul 31, 2017 at 04:41:26PM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
Hi Alan
Thanks a lot for the code review. :)
>
> Hi Hao,
>
> Please run checkpatch.pl --strict on this.
Sure, thanks for the suggestion,
On Mon, Jul 31, 2017 at 04:40:16PM -0500, Alan Tull wrote:
> On Thu, Jul 27, 2017 at 2:10 PM, Rob Herring <robh...@kernel.org> wrote:
> > On Thu, Jul 27, 2017 at 11:35 AM, Alan Tull <at...@kernel.org> wrote:
> >> On Sun, Jun 25, 2017 at 8:51 PM, Wu Hao <hao...@i
On Tue, Aug 01, 2017 at 11:15:48AM -0700, Moritz Fischer wrote:
> Hi Wu,
>
> couple of minor things inline below.
Hi Moritz,
Thanks a lot for your comments. :)
I will fix all the problems below in the next version patchset.
Thanks
Hao
>
> On Sun, Jun 25, 2017 at 6:52
On Wed, Aug 02, 2017 at 04:16:32PM -0500, Alan Tull wrote:
> On Wed, Aug 2, 2017 at 7:19 AM, Wu Hao <hao...@intel.com> wrote:
> > This patch is a RFC patch which replaces the patch[1] which
> > creates 'fpga-dev' class as container device. It introduces
> > a 'f
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> > The header register set is always present for the Port/AFU, it is mainly
> > for capability, control and status of the ports that AFU connected to.
>
> So just to be
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> Making my way through your patchset.
Hi Alan
Thanks a lot for your comments. :)
>
> > From: Zhang Yi <yi.z.zh...@intel.com>
> >
> > The Intel FPGA device ap
> On Tue, Aug 8, 2017 at 1:25 PM, Wu, Hao <hao...@intel.com> wrote:
> >> On Thu, Aug 3, 2017 at 2:53 AM, Wu Hao <hao...@intel.com> wrote:
> >> > On Wed, Aug 02, 2017 at 04:16:32PM -0500, Alan Tull wrote:
> >> >> On Wed, Aug 2, 2017 at 7:19 AM, Wu
> On Sun, Aug 6, 2017 at 1:24 PM, <matthew.gerl...@linux.intel.com> wrote:
>
> + Wu Hao and the people who signed off on the Intel feature-dev stuff.
>
> Hi Matthew,
>
> By the way, this patch is against v1 of their patchset. They have v2 out.
>
> You could s
> On Mon, Aug 14, 2017 at 5:59 AM, Wu, Hao <hao...@intel.com> wrote:
> >> On Tue, Aug 8, 2017 at 1:25 PM, Wu, Hao <hao...@intel.com> wrote:
> >> >> On Thu, Aug 3, 2017 at 2:53 AM, Wu Hao <hao...@intel.com> wrote:
> >> >>
On Wed, Jul 12, 2017 at 11:09:46AM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> Thanks for using the region patchset. This looks good except for one
> thing below.
Hi Alan
Thank you v
On Wed, Jul 12, 2017 at 10:22:17AM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
Hi Alan
Thanks a lot for your feedback. : )
> > This patch adds status to fpga-manager data structure, to allow
> >
On Wed, Jul 12, 2017 at 09:51:32AM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:51 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> > Add a document for Intel FPGA driver overview.
> >
> > Signed-off-by: Enno Luebbers <enno.luebb...@intel
On Thu, Jul 13, 2017 at 12:52:30PM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
> > From: Xiao Guangrong <guangrong.x...@linux.intel.com>
> >
> > Device Feature List structure creates a link list of feature headers
>
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> I'm making my way through this (very large) patchset. Some minor
> comments below.
>
Hi Alan
Thanks for your review. : )
> > From: Kang Luwei <luwei.k...@intel.com>
&g
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
> > From: Xiao Guangrong <guangrong.x...@linux.intel.com>
> >
> > Device Feature List structure creates a link list of feature headers
> > within the MMIO space to provide an extensible wa
On Wed, Jul 26, 2017 at 05:29:11PM -0500, Alan Tull wrote:
> On Wed, Jul 26, 2017 at 9:20 AM, Alan Tull <at...@kernel.org> wrote:
> > On Wed, Jul 26, 2017 at 4:50 AM, Wu Hao <hao...@intel.com> wrote:
> >> On Tue, Jul 25, 2017 at 04:32:10PM -0500, Alan Tull wrote:
>
On Wed, Jul 26, 2017 at 01:33:53PM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> > This patch adds region_id to fpga_image_info data structure, it
> > allows driver to pass region id information to fp
On Thu, Jul 27, 2017 at 11:44:01AM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:51 PM, Wu Hao <hao...@intel.com> wrote:
> > During FPGA device (e.g PCI-based) discovery, platform devices are
> > registered for different FPGA function units. But the device node path
>
On Tue, Jul 25, 2017 at 04:32:10PM -0500, Alan Tull wrote:
> On Sat, Apr 1, 2017 at 7:18 AM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> > On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@linux.intel.com
> > wrote:
> >> On Fri, 31 Mar 2017, W
On Thu, Apr 20, 2017 at 09:10:01AM -0500, Alan Tull wrote:
> Create of-fpga-region.c
>
> Move the following functions without modification from
> fpga-region.c to of-fpga-region.c:
>
> * of_fpga_region_find
> * of_fpga_region_get_mgr
> * of_fpga_region_get_bridges
> * child_regions_with_firmware
The following sysfs files are created:
* /sys/bus/fpga/devices//name
Name of the fpga bus device.
[1] http://marc.info/?l=linux-fpga=149844237209829=2
[2] http://marc.info/?l=linux-fpga=149844232609819=2
Signed-off-by: Wu Hao <hao...@intel.com>
---
Documentation/ABI/testing/sysfs-bus-fpga
On Tue, Aug 01, 2017 at 04:04:44PM -0500, Alan Tull wrote:
> On Tue, Aug 1, 2017 at 3:43 AM, Wu Hao <hao...@intel.com> wrote:
> > On Mon, Jul 31, 2017 at 04:40:16PM -0500, Alan Tull wrote:
> >> On Thu, Jul 27, 2017 at 2:10 PM, Rob Herring <robh...@kernel.org> wrot
> On Thu, Aug 3, 2017 at 2:53 AM, Wu Hao <hao...@intel.com> wrote:
> > On Wed, Aug 02, 2017 at 04:16:32PM -0500, Alan Tull wrote:
> >> On Wed, Aug 2, 2017 at 7:19 AM, Wu Hao <hao...@intel.com> wrote:
> >> > This patch is a RFC patch which replaces the patc
On Thu, Aug 17, 2017 at 12:12:00PM -0700, Moritz Fischer wrote:
> Hi,
>
> On Sun, Jun 25, 2017 at 6:52 PM, Wu Hao <hao...@intel.com> wrote:
> > FPGA_GET_API_VERSION and FPGA_CHECK_EXTENSION ioctls are common ones which
> > need to be supported by all feature devices dr
On Thu, Aug 17, 2017 at 12:55:37PM -0700, Moritz Fischer wrote:
> Hi Wu,
>
> looks good. Minor nits inline.
Hi Moritz,
Thanks for your comments. : )
>
> On Sun, Jun 25, 2017 at 6:52 PM, Wu Hao <hao...@intel.com> wrote:
> > This patch adds fpga bridge platform drive
On Thu, Aug 17, 2017 at 04:31:56PM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> > For FPGA Management Engine (FME), it requires fpga_for_each_port callback
> > for actions on ports, so export this funct
On Thu, Aug 17, 2017 at 02:00:21PM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> Just a few minor things below. Otherwise, it's fine.
Hi Alan
Thanks a lot for the review. :)
>
> > On Intel FPGA dev
On Thu, Aug 17, 2017 at 12:09:51PM -0700, Moritz Fischer wrote:
> On Sun, Jun 25, 2017 at 6:52 PM, Wu Hao <hao...@intel.com> wrote:
> > On Intel FPGA devices, the Accelerated Function Unit (AFU), can be
> > reprogrammed for different functions. It connects to the FPGA
>
On Thu, Apr 20, 2017 at 09:09:47AM -0500, Alan Tull wrote:
> Add two functions for getting the FPGA bridge from the device
> rather than device tree node. This is to enable writing code
> that will support using FPGA bridges without device tree.
> Rename one old function to make it clear that it
On Mon, May 08, 2017 at 03:44:12PM -0500, Alan Tull wrote:
> On Mon, May 8, 2017 at 3:44 AM, Wu, Hao <hao...@intel.com> wrote:
> >> On Wed, May 3, 2017 at 3:07 PM, Alan Tull <at...@kernel.org> wrote:
> >> > On Wed, May 3, 2017 at 6:58 AM, Wu Hao <hao...@i
atches.
Hao
>
>
> On Mon, Jun 26, 2017 at 09:52:03AM +0800, Wu Hao wrote:
> > From: Xiao Guangrong <guangrong.x...@linux.intel.com>
> >
> > Device Feature List structure creates a link list of feature headers
> > within the MMIO space to provide an extensible way of a
>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: added sysfs documentation for fpga-dev class.
switched to GPLv2 license.
---
Documentation/ABI/testing/sysfs-class-fpga-dev | 5 ++
drivers/fpga/Kconfig
Add a document for Intel FPGA driver overview.
Signed-off-by: Enno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
v2: added FME fpga-mgr/bridge/region platform driver to d
Engine driver basic framework
fpga: intel: fme: add header sub feature support
fpga: intel: fme: add partial reconfiguration sub feature support
Wu Hao (14):
docs: fpga: add a document for Intel FPGA driver overview
fpga: add FPGA device framework
fpga: bridge: remove OF dependency for fpga
This patch adds status to fpga-manager data structure, to allow
driver to store full/partial reconfiguration errors and other
status information.
one sysfs interface created for user space application to read
fpga-manager status.
Signed-off-by: Wu Hao <hao...@intel.com>
---
Documentati
intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: moved the code to drivers/fpga folder
intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: rebased
---
drivers/fpga/intel-feature-dev.
This patch removes OF dependency of fpga-bridge, it allows drivers
to use fpga-bridge class without device tree support.
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index e
er Rauer <christopher.ra...@intel.com>
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Zhang Yi <yi.z.zh...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
a Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
.../ABI/testing/sysfs-pla
intel.com>
Signed-off-by: Enno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Zhang Yi <yi.z.zh...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...
com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Zhang Yi <yi.z.zh...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v
Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: moved the code to drivers/fpga folder as suggested by Alan Tull.
switched to GPLv2 license.
fixed comments from Moritz Fischer.
fixed kbuild warning, typos and clean up the code.
---
d
-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: moved the code to drivers/fpga folder as suggested by Alan Tull.
switched to GPLv2 license.
---
drivers/fpga/Kconfig | 8 +++
drivers/fpga/Makefile
This patch adds region_id to fpga_image_info data structure, it
allows driver to pass region id information to fpga-mgr via
fpga_image_info for fpga reconfiguration function.
Signed-off-by: Wu Hao <hao...@intel.com>
---
include/linux/fpga/fpga-mgr.h | 1 +
1 file changed, 1 insertion(+)
.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: moved the code to drivers/fpga
opher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: switched to GPLv2 license.
---
Documentation/ioctl/ioctl-number.txt | 1 +
drivers/fpga/intel-fme-main.c| 12 +
inclu
bb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: moved the code to drivers/fpga folde
intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: moved the code to drivers/fpga folder as suggested by Alan Tull.
switched to GPLv2 license.
fixed kbuild warnings.
---
drivers/fpga/Makefile
nno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Kang Luwei <luwei.k...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signe
a Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/Kconfig | 7 +++
drivers/fpga/Makefile| 1 +
drivers/fpga/intel-fpga-fme-region.c | 91 +++
tel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
drivers/fpga/Kconfig | 7
drivers/fpga/Makefile| 1 +
drivers/fpga/intel-fpga-fme-br.c | 77
...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.com>
---
v2: add sysfs documentation.
---
.../ABI/testing/sysfs-platform-intel-fpga-afu | 7
drivers/fpga/intel-afu-main.c | 44 ++
com>
Signed-off-by: Enno Luebbers <enno.luebb...@intel.com>
Signed-off-by: Shiva Rao <shiva@intel.com>
Signed-off-by: Christopher Rauer <christopher.ra...@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.x...@linux.intel.com>
Signed-off-by: Wu Hao <hao...@intel.
On Wed, May 03, 2017 at 03:07:33PM -0500, Alan Tull wrote:
> On Wed, May 3, 2017 at 6:58 AM, Wu Hao <hao...@intel.com> wrote:
> > On Thu, Apr 20, 2017 at 09:09:47AM -0500, Alan Tull wrote:
> >> Add two functions for getting the FPGA bridge from the device
> >
> On Wed, May 3, 2017 at 3:07 PM, Alan Tull <at...@kernel.org> wrote:
> > On Wed, May 3, 2017 at 6:58 AM, Wu Hao <hao...@intel.com> wrote:
> >> On Thu, Apr 20, 2017 at 09:09:47AM -0500, Alan Tull wrote:
> >>> Add two functions for getting the FPGA bridg
On Thu, May 04, 2017 at 10:13:41AM -0500, Li, Yi wrote:
> hi Hao
>
>
> On 3/30/2017 7:08 AM, Wu Hao wrote:
> >From: Xiao Guangrong <guangrong.x...@linux.intel.com>
> >
> >Device Featuer List structure creates a link list of feature headers
> >within th
On Thu, Sep 14, 2017 at 04:48:34AM +0800, Alan Tull wrote:
> * Create fpga-region.h.
> * Export fpga_region_program_fpga.
> * Move struct fpga_region and other things to the header.
>
> This is a step in separating FPGA region common code
> from Device Tree support.
>
> Signed-off-by: Alan Tull
On Thu, Sep 14, 2017 at 04:48:36AM +0800, Alan Tull wrote:
> Another step in separating common code from device tree specific
> code for FPGA regions.
>
> * add FPGA region register/unregister functions.
> * add the register/unregister functions to the header
> * use devm_kzalloc to alloc the
On Wed, Sep 20, 2017 at 04:24:10PM -0500, Alan Tull wrote:
> a (wh., *()On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao...@intel.com> wrote:
>
> Hi Hao,
>
> I'm done with some board bringup so I have time to look at your patchset
> again.
Hi Alan
Thanks for
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