On 2014/12/11 14:37, Joe Perches wrote:
On Thu, 2014-12-11 at 11:57 +0530, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 11 December 2014 11:42 AM, Joe Perches wrote:
On Thu, 2014-12-11 at 11:32 +0530, Kishon Vijay Abraham I wrote:
On Wednesday 10 December 2014 04:16 PM, Yunzhi Li wrote
Hi Kishon:
On 2014/12/11 14:02, Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 10 December 2014 04:16 PM, Yunzhi Li wrote:
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all
only one
branch of the conditional statement is a single statement
should have braces.
- No need to test dwc2-phy for NULL before calling generic phy
APIs.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
Documentation: bindings: add dt documentation for Rockchip usb
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li l...@rock
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v6: None
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes in v4:
- Updata description for phy
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
Acked-by: Paul Zimmerman pa...@synopsys.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix coding style: both branches
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v6: None
Changes in v5:
- reorder the phy dt node to a correct position.
Changes in v4:
- Add
Enable usb PHY for all usb ports on rk3288-evb.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288
Hi Kishon:
On 2014/12/11 18:27, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 11 December 2014 03:25 PM, Yunzhi Li wrote:
+
+static struct phy *rockchip_usb_phy_xlate(struct device *dev,
+ struct of_phandle_args *args)
+{
+ struct
Hi Doug:
On 2014/12/12 2:09, Doug Anderson wrote:
Yunzhi,
On Thu, Dec 11, 2014 at 1:55 AM, Yunzhi Li l...@rock-chips.com wrote:
+ rk_phy-clk = of_clk_get(child, 0);
+ if (IS_ERR(rk_phy-clk)) {
+ dev_warn(dev, failed to get clock\n
generic phy
APIs.
Yunzhi Li (5):
Documentation: bindings: add dt documentation for Rockchip usb PHY
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform driver.
ARM: dts: rockchip: add rk3288 usb PHY
ARM
generic phy
APIs.
Yunzhi Li (5):
Documentation: bindings: add dt documentation for Rockchip usb PHY
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform driver.
ARM: dts: rockchip: add rk3288 usb PHY
ARM
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v7:
- Update bindings doc
Changes in v6: None
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li l...@rock
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
Acked-by: Paul Zimmerman pa...@synopsys.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix coding style: both
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v7:
- Update dtsi for new usb phy driver.
Changes in v6: None
Changes in v5:
- reorder the phy
Enable usb PHY for all usb ports on rk3288-evb.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch
Hi Heiko
Am Mittwoch, 3. Dezember 2014, 21:46:50 schrieb LiYunzhi:
+
+};
+
+static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
+ bool siddq)
+{
+ return regmap_write(phy-reg_base, phy-reg_offset,
+ SIDDQ_MSK
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/gadget.c | 33 -
drivers/usb/dwc2/platform.c | 34 ++
2 files changed, 46
Add dt nodes for rk3288 usb PHY.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 874e66d..a663c4c 100644
--- a/arch/arm/boot/dts
Document the bindings of the Rockchip usb PHY driver.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
.../devicetree/bindings/phy/rockchip-usb-phy.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
in total during sustem
suspend.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY.
Documentation: bindings: add doc for the Rockchip usb PHY
usb: dwc2: Add generic PHY framework support for dwc2 usb
controler platform driver.
ARM: dts: add rk3288 usb PHY
ARM
This patche to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li l...@rock
Hi Paul:
Thank you for replying.
On 2014/12/6 3:04, Paul Zimmerman wrote:
From: Yunzhi Li [mailto:l...@rock-chips.com]
Sent: Friday, December 05, 2014 4:52 AM
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
Hi Romain :
On 2014/12/5 21:38, Romain Perier wrote:
Hi,
Some quick comments
2014-12-05 13:52 GMT+01:00 Yunzhi Li l...@rock-chips.com:
[...]
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index ccad880..e3a5857 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -239,6
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v3:
- Add more context about the changes in the long description.
arch/arm/boot/dts/rk3288
-phy for NULL before calling generic phy
APIs.
- Add more context about the changes in the long description.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
Documentation: bindings: add doc for the Rockchip usb PHY
usb: dwc2: add generic PHY framework support
This patche to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li l...@rock
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v3:
- Fix coding style: both branches of the if() which only one
branch of the conditional statement is a single statement should
have braces
Document the bindings of the Rockchip usb PHY driver.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v3: None
.../devicetree/bindings/phy/rockchip-usb-phy.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy
Hi Kishon :
On 2014/12/8 17:57, Kishon Vijay Abraham I wrote:
Hi,
On Monday 08 December 2014 03:16 PM, Yunzhi Li wrote:
This patche to add a generic PHY driver for ROCKCHIP usb PHYs,
%s/patche/patch
Sorry for this typo.
+#include linux/reset.h
+#include linux/regmap.h
+#include linux/mfd
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li l...@rock
to PHY_ROCKCHIP_USB.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
Documentation: bindings: add doc for the Rockchip usb PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform driver.
ARM: dts: add rk3288 usb PHY
ARM: dts: Enable usb PHY
Document the bindings of the Rockchip usb PHY driver.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v4:
- Updata description for phy device tree subnode.
Changes in v3: None
.../devicetree/bindings/phy/rockchip-usb-phy.txt | 32 ++
1 file changed, 32
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
Acked-by: Paul Zimmerman pa...@synopsys.com
Changes in v3:
- Fix coding style: both branches of the if() which only one
branch of the conditional statement is a single
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v4:
- Add phy subnodes.
Changes in v3: None
arch/arm/boot/dts/rk3288.dtsi | 27
Enable usb PHY for all usb ports on rk3288-evb.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi
b/arch/arm/boot/dts/rk3288
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
Acked-by: Paul Zimmerman pa...@synopsys.com
---
Hi Felipe,
Sorry for my mistake, I have fixed the commit log.
Changes in v4: None
Changes in v3:
- Fix coding
Hi Romain:
On 2014/12/9 18:41, Romain Perier wrote:
Hi,
2014-12-09 3:43 GMT+01:00 Yunzhi Li l...@rock-chips.com:
Changes in v3:
- Use BIT macro instead of bit shift ops.
- Rename the config entry to PHY_ROCKCHIP_USB.
Contradiction between this , [1] and [2]
drivers/phy/Kconfig
dwc2-phy for NULL before calling generic phy
APIs.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
Documentation: bindings: add dt documentation for Rockchip usb PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform driver.
ARM
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li l...@rock
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes in v4:
- Updata description for phy device tree subnode
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Changes in v5:
- reorder the phy dt node to a correct position.
Changes in v4:
- Add phy subnodes
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li l...@rock-chips.com
Acked-by: Paul Zimmerman pa...@synopsys.com
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix coding style: both branches of the if() which only one
Hi Kishon :
Hi,
On Wednesday 21 January 2015 03:36 PM, Yunzhi Li wrote:
Hi Kishon :
Hi,
On Friday 12 December 2014 08:37 PM, Yunzhi Li wrote:
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB
Hi Kishon :
Hi,
On Friday 12 December 2014 08:37 PM, Yunzhi Li wrote:
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF
Hi paul:
在 2015/1/9 10:15, Paul Zimmerman 写道:
[...]
/*
-* Attempt to find a generic PHY, then look for an old style
-* USB PHY, finally fall back to pdata
+* If platform probe couldn't find a generic PHY or an old style
+* USB PHY, fall back to pdata
Hi Paul:
On 2015/1/9 10:15, Paul Zimmerman wrote:
/*
-* Attempt to find a generic PHY, then look for an old style
-* USB PHY, finally fall back to pdata
+* If platform probe couldn't find a generic PHY or an old style
+* USB PHY, fall back to pdata
board. It works well.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index d5197d4..bdafb9d 100644
--- a/drivers/usb/dwc2/core.c
+++ b
;
+ } else {
+ hsotg-non_periodic_channels = 0;
+ hsotg-periodic_channels = 0;
+ }
}
/**
I have reviewed this patch. Obviously,it makes sense.
Reviewed-by: Yunzhi Li l...@rock-chips.com
--
To unsubscribe from this list: send the line unsubscribe linux
dwc2 gadget driver s3c_hsotg_of_probe() run twice in
dwc2_gadget_init() and the first one is useless, so remove it.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/gadget.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2
rk3288-firefly board use the dwc2 usb otg controller as a host
controller and the device mode not used, so the dr_mode should be
host then the dwc2 usb otg controller will work at host only
mode
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
arch/arm/boot/dts/rk3288-firefly.dtsi | 1 +
1
Add properties for dwc2 usb device controller according to
Documentation/devicetree/bindings/usb/dwc2.txt
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts
] (__handle_domain_irq) from [c01003b0]
(gic_handle_irq+0x48/0x6c)
[ 27.849695] [c01003b0] (gic_handle_irq) from [c010b340]
(__irq_svc+0x40/0x50)
[ 27.886907] Exception stack(0xc0d01ee0 to 0xc0d01f28)
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/gadget.c | 6 +++---
1 file
Hi John,
在 2015/8/15 3:41, John Youn 写道:
On 8/13/2015 8:29 PM, Yunzhi Li wrote:
在 2015/8/14 8:09, John Youn 写道:
On 8/11/2015 12:57 AM, Yunzhi Li wrote:
We initiate dwc2 usb controller in BIOS, when kernel driver
start-up we should reset AHB hclk domain to reset all AHB
interface registers
could avoid warnning massage like in rk3288 platform:
[2.074764] dwc2 ff58.usb: 256 invalid for
host_perio_tx_fifo_size. Check HW configuration.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/core.c | 2 +-
drivers/usb/dwc2/core.h | 1 +
drivers/usb/dwc2
could avoid warnning massage like in rk3288 platform:
[2.074764] dwc2 ff58.usb: 256 invalid for
host_perio_tx_fifo_size. Check HW configuration.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/core.c | 2 +-
drivers/usb/dwc2/core.h | 1 +
drivers/usb/dwc2
.
This patch could avoid warnning massage like in rk3288 platform:
[2.074764] dwc2 ff58.usb: 256 invalid for
host_perio_tx_fifo_size. Check HW configuration.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/platform.c | 12
1 file changed, 12 insertions
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
Documentation/devicetree/bindings/usb/dwc2.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt
b/Documentation/devicetree/bindings/usb/dwc2.txt
index fd132cb..6a84099 100644
This patch adds dwc2 reset property for rk3288 dwc2 usb
controller to fix FIFO setting bug
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
在 2015/8/14 8:09, John Youn 写道:
On 8/11/2015 12:57 AM, Yunzhi Li wrote:
We initiate dwc2 usb controller in BIOS, when kernel driver
start-up we should reset AHB hclk domain to reset all AHB
interface registers to default. Without this the FIFO value
setting might be incorrect because
.
This patch could avoid warnning massage like in rk3288 platform:
[2.074764] dwc2 ff58.usb: 256 invalid for
host_perio_tx_fifo_size. Check HW configuration.
Signed-off-by: Yunzhi Li l...@rock-chips.com
---
drivers/usb/dwc2/platform.c | 12
1 file changed, 12 insertions
Hi ,
在 2015/8/11 22:12, Felipe Balbi 写道:
Hi,
On Tue, Aug 11, 2015 at 10:27:42AM +0800, Yunzhi Li wrote:
We initiate dwc2 usb controller in BIOS, when kernel driver
start-up we should reset AHB hclk domain to reset all AHB
interface registers to default. Without this the FIFO value
setting
Hi John
在 2015/11/12 12:29, John Youn 写道:
On 11/11/2015 4:22 PM, Doug Anderson wrote:
John,
On Fri, Nov 6, 2015 at 2:04 AM, Yunzhi Li <l...@rock-chips.com> wrote:
hi John ,
As we talked yesterday, I tried to fix the split schedule sequence. This
patch will
avoid scheduling
When checking dwc2 host channel interrupts, handle qh in
periodic_sched_queued list at first, then we could make sure CSPLIT
packets scheduled in the same order as SSPLIT packets.
Signed-off-by: Yunzhi Li <l...@rock-chips.com>
---
drivers/usb/dwc2/hcd_intr.c | 22 ++
hi Doug
在 2015/11/7 7:56, Doug Anderson 写道:
lyz@,
On Fri, Nov 6, 2015 at 1:36 AM, Yunzhi Li <l...@rock-chips.com> wrote:
Fix dwc2 split schedule sequence issue. Not schedule a SSPLIT_IN
packet between SSPLIT-begin and SSPLIT-end.
Signed-off-by: Yunzhi Li <l...@rock-chips.com>
-
if this is exactly the right way to schedule split transfers and
if there
is any dide effect with this patch. Please help review this patch. Thanks.
Fix dwc2 split schedule sequence issue. Not schedule a SSPLIT_IN
packet between SSPLIT-begin and SSPLIT-end.
Signed-off-by: Yunzhi Li <l...@rock-chips.
Fix dwc2 split schedule sequence issue. Not schedule a SSPLIT_IN
packet between SSPLIT-begin and SSPLIT-end.
Signed-off-by: Yunzhi Li <l...@rock-chips.com>
---
drivers/usb/dwc2/hcd.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
Fix the rc vs. pc typo. There is no a register named rc, I felt
confused when I read this assembler command in comment.
Signed-off-by: Yunzhi Li <yunzhi...@deephi.tech>
---
arch/arm/mach-hisi/platsmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mac
Fix the rc vs. pc typo. There is no a register named rc, I felt
confused when I read this assembler command in comment.
Signed-off-by: Yunzhi Li <yunzhi...@deephi.tech>
---
arch/arm/mach-hisi/platsmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mac
Fix the rc vs. pc typo. There is no a register named rc, I felt
confused when I read this assembler command in comment.
Signed-off-by: Yunzhi Li
---
arch/arm/mach-hisi/platsmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-hisi/platsmp.c b/arch/arm/mach
Fix the rc vs. pc typo. There is no a register named rc, I felt
confused when I read this assembler command in comment.
Signed-off-by: Yunzhi Li
---
arch/arm/mach-hisi/platsmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-hisi/platsmp.c b/arch/arm/mach
Hi Heiko
Am Mittwoch, 3. Dezember 2014, 21:46:50 schrieb LiYunzhi:
+
+};
+
+static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
+ bool siddq)
+{
+ return regmap_write(phy->reg_base, phy->reg_offset,
+
Hi Romain:
On 2014/12/9 18:41, Romain Perier wrote:
Hi,
2014-12-09 3:43 GMT+01:00 Yunzhi Li :
Changes in v3:
- Use BIT macro instead of bit shift ops.
- Rename the config entry to PHY_ROCKCHIP_USB.
Contradiction between this , [1] and [2]
drivers/phy/Kconfig| 7 ++
drivers
dwc2->phy for NULL before calling generic phy
APIs.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
Documentation: bindings: add dt documentation for Rockchip usb PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform dri
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li
---
Changes
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li
---
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes in v4:
- Updata description for phy device tree subnode.
Changes in v3: None
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li
---
Changes in v5:
- reorder the phy dt node to a correct position.
Changes in v4:
- Add phy subnodes.
Changes in v3: None
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li
Acked-by: Paul Zimmerman
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix coding style: both branches of the if() which only one
branch of the conditional statement
On 2014/12/11 14:37, Joe Perches wrote:
On Thu, 2014-12-11 at 11:57 +0530, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 11 December 2014 11:42 AM, Joe Perches wrote:
On Thu, 2014-12-11 at 11:32 +0530, Kishon Vijay Abraham I wrote:
On Wednesday 10 December 2014 04:16 PM, Yunzhi Li wrote
Hi Kishon:
On 2014/12/11 14:02, Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 10 December 2014 04:16 PM, Yunzhi Li wrote:
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all
only one
branch of the conditional statement is a single statement
should have braces.
- No need to test dwc2->phy for NULL before calling generic phy
APIs.
Yunzhi Li (5):
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
Documentation: bindings: add dt documentation for Rockc
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li
---
Changes
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li
---
Changes in v6: None
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes in v4:
- Updata description for phy device tree subnode
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li
Acked-by: Paul Zimmerman
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix coding style: both branches of the if() which only one
branch
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li
---
Changes in v6: None
Changes in v5:
- reorder the phy dt node to a correct position.
Changes in v4:
- Add phy subnodes
Enable usb PHY for all usb ports on rk3288-evb.
Signed-off-by: Yunzhi Li
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi
b/arch/arm
Hi Kishon:
On 2014/12/11 18:27, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 11 December 2014 03:25 PM, Yunzhi Li wrote:
+
+static struct phy *rockchip_usb_phy_xlate(struct device *dev,
+ struct of_phandle_args *args)
+{
+ struct
Hi Doug:
On 2014/12/12 2:09, Doug Anderson wrote:
Yunzhi,
On Thu, Dec 11, 2014 at 1:55 AM, Yunzhi Li wrote:
+ rk_phy->clk = of_clk_get(child, 0);
+ if (IS_ERR(rk_phy->clk)) {
+ dev_warn(dev, "failed to
ing generic phy
APIs.
Yunzhi Li (5):
Documentation: bindings: add dt documentation for Rockchip usb PHY
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform driver.
ARM: dts: rockchip: add rk3288 usb PHY
ing generic phy
APIs.
Yunzhi Li (5):
Documentation: bindings: add dt documentation for Rockchip usb PHY
phy: add a driver for the Rockchip SoC internal USB2.0 PHY
usb: dwc2: add generic PHY framework support for dwc2 usb controler
platform driver.
ARM: dts: rockchip: add rk3288 usb PHY
This patch adds a binding that describes the Rockchip usb PHYs
found on Rockchip SoCs usb interface.
Signed-off-by: Yunzhi Li
---
Changes in v7:
- Update bindings doc
Changes in v6: None
Changes in v5:
- Adjust entry order of example devicetree node in document.
Changes in v4:
- Updata
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.
Signed-off-by: Yunzhi Li
---
Changes
Get PHY parameters from devicetree and power off usb PHY during
system suspend.
Signed-off-by: Yunzhi Li
Acked-by: Paul Zimmerman
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix coding style: both branches of the if() which only one
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.
Signed-off-by: Yunzhi Li
---
Changes in v7:
- Update dtsi for new usb phy driver.
Changes in v6: None
Changes in v5:
- reorder the phy dt node
Enable usb PHY for all usb ports on rk3288-evb.
Signed-off-by: Yunzhi Li
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288
nnels;
+ } else {
+ hsotg->non_periodic_channels = 0;
+ hsotg->periodic_channels = 0;
+ }
}
/**
I have reviewed this patch. Obviously,it makes sense.
Reviewed-by: Yunzhi Li
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q+0x48/0x6c)
[ 27.849695] [] (gic_handle_irq) from []
(__irq_svc+0x40/0x50)
[ 27.886907] Exception stack(0xc0d01ee0 to 0xc0d01f28)
Signed-off-by: Yunzhi Li
---
drivers/usb/dwc2/gadget.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/dwc2/gadget.c b/d
在 2015/8/14 8:09, John Youn 写道:
On 8/11/2015 12:57 AM, Yunzhi Li wrote:
We initiate dwc2 usb controller in BIOS, when kernel driver
start-up we should reset AHB hclk domain to reset all AHB
interface registers to default. Without this the FIFO value
setting might be incorrect because
could avoid warnning massage like in rk3288 platform:
[2.074764] dwc2 ff58.usb: 256 invalid for
host_perio_tx_fifo_size. Check HW configuration.
Signed-off-by: Yunzhi Li
---
drivers/usb/dwc2/core.c | 2 +-
drivers/usb/dwc2/core.h | 1 +
drivers/usb/dwc2/platform.c | 6 ++
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