Re: [PATCH] mm: slub: print_hex_dump() with DUMP_PREFIX_OFFSET

2019-09-21 Thread cl 
On Sat, 21 Sep 2019, David Rientjes wrote:

> I agree it looks nicer for poisoning, I'm not sure that every caller of
> print_section() is the same, however.  For example trace() seems better
> off as DUMP_PREFIX_ADDRESS since it already specifies the address of the
> object being allocated or freed and offset here wouldn't really be useful,
> no?

The address is printed earlier before the object dump. Maybe that is
sufficient and we could even reduce the number of digits further to have
the display more compact? In this case two hex digits would do the trick.

[PATCH v3 3/4] arm64: dts: rockchip: add core dtsi file for PX30 SoCs

2018-08-01 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip PX30 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 1 file changed, 2043 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi 
b/arch/arm64/boot/dts/rockchip/px30.dtsi
new file mode 100644
index 000..5e15aee
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -0,0 +1,2043 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,px30";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   spi0 = 
+   spi1 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   #cooling-cells = <2>;
+   dynamic-power-coefficient = <90>;
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <120>;
+   exit-latency-us = <250>;
+   min-residency-us = <900>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <400>;
+   exit-latency-us = <500>;
+   min-residency-us = <2000>;
+   };
+   };
+   };
+
+   cpu0_opp_table: cpu0-opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-40800 {
+   opp-hz = /bits/ 64 <40800>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   opp-suspend;
+   };
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-81600 {
+   opp-hz = /bits/ 64 <81600>;
+   opp-microvolt = <105 105 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-100800 {
+   opp-hz = /bits/ 64 <100800>;
+   opp-microvolt = <1175000 1175000 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-12 {
+

[PATCH v3 4/4] arm64: dts: rockchip: add PX30 eavluation board devicetree

2018-08-01 Thread cl 
From: Liang Chen 

This patch add px30-evb.dts for PX30 evaluation board.
Tested on PX30 evb.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +
 arch/arm64/boot/dts/rockchip/Makefile  |   1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  | 470 +
 3 files changed, 475 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index 1c1d62d..e33b23a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -158,6 +158,10 @@ Rockchip platforms device tree bindings
 Required root node properties:
   - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
+- Rockchip PX30 evb:
+Required root node properties:
+  - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RK3368 evb:
 Required root node properties:
   - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 48a83f8..19aa9c6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts 
b/arch/arm64/boot/dts/rockchip/px30-evb.dts
new file mode 100644
index 000..f7bd2e3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -0,0 +1,470 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+#include "px30.dtsi"
+
+/ {
+   model = "Rockchip PX30 EVB";
+   compatible = "rockchip,px30-evb", "rockchip,px30";
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 2>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "esc";
+   press-threshold-microvolt = <131>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "home";
+   press-threshold-microvolt = <624000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "menu";
+   press-threshold-microvolt = <987000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <17000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 25000 0>;
+   };
+
+   chosen {
+   bootargs = "console=ttyS2,150n8";
+   };
+
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+   };
+
+   vcc_phy: vcc-phy-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_phy";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc5v0_sys: vccsys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
+};
+
+ {
+   cpu-supply = <_arm>;
+};
+
+_subsystem {
+   status = "okay";
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   phy-supply = <_phy>;
+   clock_in_out = "output";
+   snps,reset-gpio = < 13 GPIO_ACTIVE_LOW>;
+   snps,reset-active-low;
+   snps,reset-delays-us = <0 5

[PATCH v3 3/4] arm64: dts: rockchip: add core dtsi file for PX30 SoCs

2018-08-01 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip PX30 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 1 file changed, 2043 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi 
b/arch/arm64/boot/dts/rockchip/px30.dtsi
new file mode 100644
index 000..5e15aee
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -0,0 +1,2043 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,px30";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   spi0 = 
+   spi1 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   #cooling-cells = <2>;
+   dynamic-power-coefficient = <90>;
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <120>;
+   exit-latency-us = <250>;
+   min-residency-us = <900>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <400>;
+   exit-latency-us = <500>;
+   min-residency-us = <2000>;
+   };
+   };
+   };
+
+   cpu0_opp_table: cpu0-opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-40800 {
+   opp-hz = /bits/ 64 <40800>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   opp-suspend;
+   };
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-81600 {
+   opp-hz = /bits/ 64 <81600>;
+   opp-microvolt = <105 105 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-100800 {
+   opp-hz = /bits/ 64 <100800>;
+   opp-microvolt = <1175000 1175000 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-12 {
+

[PATCH v3 4/4] arm64: dts: rockchip: add PX30 eavluation board devicetree

2018-08-01 Thread cl 
From: Liang Chen 

This patch add px30-evb.dts for PX30 evaluation board.
Tested on PX30 evb.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +
 arch/arm64/boot/dts/rockchip/Makefile  |   1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  | 470 +
 3 files changed, 475 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index 1c1d62d..e33b23a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -158,6 +158,10 @@ Rockchip platforms device tree bindings
 Required root node properties:
   - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
+- Rockchip PX30 evb:
+Required root node properties:
+  - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RK3368 evb:
 Required root node properties:
   - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 48a83f8..19aa9c6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts 
b/arch/arm64/boot/dts/rockchip/px30-evb.dts
new file mode 100644
index 000..f7bd2e3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -0,0 +1,470 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+#include "px30.dtsi"
+
+/ {
+   model = "Rockchip PX30 EVB";
+   compatible = "rockchip,px30-evb", "rockchip,px30";
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 2>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "esc";
+   press-threshold-microvolt = <131>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "home";
+   press-threshold-microvolt = <624000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "menu";
+   press-threshold-microvolt = <987000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <17000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 25000 0>;
+   };
+
+   chosen {
+   bootargs = "console=ttyS2,150n8";
+   };
+
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+   };
+
+   vcc_phy: vcc-phy-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_phy";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc5v0_sys: vccsys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
+};
+
+ {
+   cpu-supply = <_arm>;
+};
+
+_subsystem {
+   status = "okay";
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   phy-supply = <_phy>;
+   clock_in_out = "output";
+   snps,reset-gpio = < 13 GPIO_ACTIVE_LOW>;
+   snps,reset-active-low;
+   snps,reset-delays-us = <0 5

[PATCH v3 2/4] dt-bindings: rockchip: grf: add grf and pmugrf description for px30

2018-08-01 Thread cl 
From: Liang Chen 

This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 7dc5ce8..46e27cd 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
- "rockchip,rk3036-grf", "syscon": for rk3036
- "rockchip,rk3066-grf", "syscon": for rk3066
- "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
- "rockchip,rk3399-grf", "syscon": for rk3399
- "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
-- 
1.9.1

[PATCH v3 2/4] dt-bindings: rockchip: grf: add grf and pmugrf description for px30

2018-08-01 Thread cl 
From: Liang Chen 

This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 7dc5ce8..46e27cd 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
- "rockchip,rk3036-grf", "syscon": for rk3036
- "rockchip,rk3066-grf", "syscon": for rk3066
- "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
- "rockchip,rk3399-grf", "syscon": for rk3399
- "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
-- 
1.9.1

[PATCH v3 0/4] arm64: dts: rockchip: add basic dts file for PX30 SoCs

2018-08-01 Thread cl 
From: Liang Chen 

Changes in v3:
1. backlight: remove properties ,,
, as the driver will compute a default table.

Changes in V2:
1. change the subject to format "dt-bindings: module: ..." for the documents. 
2. use new property  for backlight.
3. remove pinctrl of rk809, because the driver is not ready.

Liang Chen (4):
  dt-bindings: usb: dwc2: add description for px30
  dt-bindings: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  arm64: dts: rockchip: add PX30 eavluation board devicetree

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |2 +
 Documentation/devicetree/bindings/usb/dwc2.txt |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  |  470 +
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 6 files changed, 2521 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

-- 
1.9.1

[PATCH v3 1/4] dt-bindings: usb: dwc2: add description for px30

2018-08-01 Thread cl 
From: Liang Chen 

This patch adds the compatible of dwc2 for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 46da5f1..6dc3c4a 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -6,6 +6,7 @@ Required properties:
   - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
   - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
   - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
-- 
1.9.1

[PATCH v3 0/4] arm64: dts: rockchip: add basic dts file for PX30 SoCs

2018-08-01 Thread cl 
From: Liang Chen 

Changes in v3:
1. backlight: remove properties ,,
, as the driver will compute a default table.

Changes in V2:
1. change the subject to format "dt-bindings: module: ..." for the documents. 
2. use new property  for backlight.
3. remove pinctrl of rk809, because the driver is not ready.

Liang Chen (4):
  dt-bindings: usb: dwc2: add description for px30
  dt-bindings: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  arm64: dts: rockchip: add PX30 eavluation board devicetree

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |2 +
 Documentation/devicetree/bindings/usb/dwc2.txt |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  |  470 +
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 6 files changed, 2521 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

-- 
1.9.1

[PATCH v3 1/4] dt-bindings: usb: dwc2: add description for px30

2018-08-01 Thread cl 
From: Liang Chen 

This patch adds the compatible of dwc2 for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 46da5f1..6dc3c4a 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -6,6 +6,7 @@ Required properties:
   - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
   - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
   - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
-- 
1.9.1

[PATCH v2 6/6] arm64: dts: rockchip: add PX30 eavluation board devicetree

2018-07-23 Thread cl 
From: Liang Chen 

This patch add px30-evb.dts for PX30 evaluation board.
Tested on PX30 evb.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +
 arch/arm64/boot/dts/rockchip/Makefile  |   1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  | 473 +
 3 files changed, 478 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index 1c1d62d..e33b23a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -158,6 +158,10 @@ Rockchip platforms device tree bindings
 Required root node properties:
   - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
+- Rockchip PX30 evb:
+Required root node properties:
+  - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RK3368 evb:
 Required root node properties:
   - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 48a83f8..19aa9c6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts 
b/arch/arm64/boot/dts/rockchip/px30-evb.dts
new file mode 100644
index 000..11dbe1a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -0,0 +1,473 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+#include "px30.dtsi"
+
+/ {
+   model = "Rockchip PX30 EVB";
+   compatible = "rockchip,px30-evb", "rockchip,px30";
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 2>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "esc";
+   press-threshold-microvolt = <131>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "home";
+   press-threshold-microvolt = <624000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "menu";
+   press-threshold-microvolt = <987000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <17000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 25000 0>;
+   brightness-levels = <0 255>;
+   num-interpolated-steps = <255>;
+   default-brightness-level = <200>;
+   };
+
+   chosen {
+   bootargs = "console=ttyS2,150n8";
+   };
+
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+   };
+
+   vcc_phy: vcc-phy-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_phy";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc5v0_sys: vccsys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
+};
+
+ {
+   cpu-supply = <_arm>;
+};
+
+_subsystem {
+   status = "okay";
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   phy-supply = <_phy>;
+

[PATCH v2 6/6] arm64: dts: rockchip: add PX30 eavluation board devicetree

2018-07-23 Thread cl 
From: Liang Chen 

This patch add px30-evb.dts for PX30 evaluation board.
Tested on PX30 evb.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +
 arch/arm64/boot/dts/rockchip/Makefile  |   1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  | 473 +
 3 files changed, 478 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index 1c1d62d..e33b23a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -158,6 +158,10 @@ Rockchip platforms device tree bindings
 Required root node properties:
   - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
+- Rockchip PX30 evb:
+Required root node properties:
+  - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RK3368 evb:
 Required root node properties:
   - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 48a83f8..19aa9c6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts 
b/arch/arm64/boot/dts/rockchip/px30-evb.dts
new file mode 100644
index 000..11dbe1a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -0,0 +1,473 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+#include "px30.dtsi"
+
+/ {
+   model = "Rockchip PX30 EVB";
+   compatible = "rockchip,px30-evb", "rockchip,px30";
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 2>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "esc";
+   press-threshold-microvolt = <131>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "home";
+   press-threshold-microvolt = <624000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "menu";
+   press-threshold-microvolt = <987000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <17000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 25000 0>;
+   brightness-levels = <0 255>;
+   num-interpolated-steps = <255>;
+   default-brightness-level = <200>;
+   };
+
+   chosen {
+   bootargs = "console=ttyS2,150n8";
+   };
+
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+   };
+
+   vcc_phy: vcc-phy-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_phy";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc5v0_sys: vccsys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
+};
+
+ {
+   cpu-supply = <_arm>;
+};
+
+_subsystem {
+   status = "okay";
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   phy-supply = <_phy>;
+

[PATCH v2 5/6] arm64: dts: rockchip: add core dtsi file for PX30 SoCs

2018-07-23 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip PX30 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 1 file changed, 2043 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi 
b/arch/arm64/boot/dts/rockchip/px30.dtsi
new file mode 100644
index 000..5e15aee
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -0,0 +1,2043 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,px30";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   spi0 = 
+   spi1 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   #cooling-cells = <2>;
+   dynamic-power-coefficient = <90>;
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <120>;
+   exit-latency-us = <250>;
+   min-residency-us = <900>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <400>;
+   exit-latency-us = <500>;
+   min-residency-us = <2000>;
+   };
+   };
+   };
+
+   cpu0_opp_table: cpu0-opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-40800 {
+   opp-hz = /bits/ 64 <40800>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   opp-suspend;
+   };
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-81600 {
+   opp-hz = /bits/ 64 <81600>;
+   opp-microvolt = <105 105 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-100800 {
+   opp-hz = /bits/ 64 <100800>;
+   opp-microvolt = <1175000 1175000 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-12 {
+

[PATCH v2 5/6] arm64: dts: rockchip: add core dtsi file for PX30 SoCs

2018-07-23 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip PX30 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 1 file changed, 2043 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi 
b/arch/arm64/boot/dts/rockchip/px30.dtsi
new file mode 100644
index 000..5e15aee
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -0,0 +1,2043 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,px30";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   spi0 = 
+   spi1 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   #cooling-cells = <2>;
+   dynamic-power-coefficient = <90>;
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <120>;
+   exit-latency-us = <250>;
+   min-residency-us = <900>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <400>;
+   exit-latency-us = <500>;
+   min-residency-us = <2000>;
+   };
+   };
+   };
+
+   cpu0_opp_table: cpu0-opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-40800 {
+   opp-hz = /bits/ 64 <40800>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   opp-suspend;
+   };
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-81600 {
+   opp-hz = /bits/ 64 <81600>;
+   opp-microvolt = <105 105 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-100800 {
+   opp-hz = /bits/ 64 <100800>;
+   opp-microvolt = <1175000 1175000 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-12 {
+

[PATCH v2 1/6] dt-bindings: usb: dwc2: add description for px30

2018-07-23 Thread cl 
From: Liang Chen 

This patch adds the compatible of dwc2 for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 46da5f1..6dc3c4a 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -6,6 +6,7 @@ Required properties:
   - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
   - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
   - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
-- 
1.9.1

[PATCH v2 4/6] dt-bindings: rockchip: grf: add grf and pmugrf description for px30

2018-07-23 Thread cl 
From: Liang Chen 

This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 7dc5ce8..46e27cd 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
- "rockchip,rk3036-grf", "syscon": for rk3036
- "rockchip,rk3066-grf", "syscon": for rk3066
- "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
- "rockchip,rk3399-grf", "syscon": for rk3399
- "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
-- 
1.9.1

[PATCH v2 1/6] dt-bindings: usb: dwc2: add description for px30

2018-07-23 Thread cl 
From: Liang Chen 

This patch adds the compatible of dwc2 for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 46da5f1..6dc3c4a 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -6,6 +6,7 @@ Required properties:
   - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
   - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
   - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
-- 
1.9.1

[PATCH v2 4/6] dt-bindings: rockchip: grf: add grf and pmugrf description for px30

2018-07-23 Thread cl 
From: Liang Chen 

This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 7dc5ce8..46e27cd 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
- "rockchip,rk3036-grf", "syscon": for rk3036
- "rockchip,rk3066-grf", "syscon": for rk3066
- "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
- "rockchip,rk3399-grf", "syscon": for rk3399
- "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
-- 
1.9.1

[PATCH v2 2/6] dt-bindings: mmc: rockchip-dw-mshc: add description for px30

2018-07-23 Thread cl 
From: Liang Chen 

Add "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on px30 platform.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 8ce49b2..6f629b1 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -14,6 +14,7 @@ Required Properties:
before RK3288
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RV1108
+   - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3036
- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK322x
- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3328
-- 
1.9.1

[PATCH v2 3/6] dt-bindings: sound: rockchip-i2s: add description for px30

2018-07-23 Thread cl 
From: Liang Chen 

Add "rockchip,px30-i2s", "rockchip,rk3066-i2s" for i2s on px30 platform.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt 
b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index b208a75..54aefab 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -7,6 +7,7 @@ Required properties:
 
 - compatible: should be one of the following:
- "rockchip,rk3066-i2s": for rk3066
+   - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
- "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
- "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
-- 
1.9.1

[PATCH v2 3/6] dt-bindings: sound: rockchip-i2s: add description for px30

2018-07-23 Thread cl 
From: Liang Chen 

Add "rockchip,px30-i2s", "rockchip,rk3066-i2s" for i2s on px30 platform.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt 
b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index b208a75..54aefab 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -7,6 +7,7 @@ Required properties:
 
 - compatible: should be one of the following:
- "rockchip,rk3066-i2s": for rk3066
+   - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
- "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
- "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
-- 
1.9.1

[PATCH v2 2/6] dt-bindings: mmc: rockchip-dw-mshc: add description for px30

2018-07-23 Thread cl 
From: Liang Chen 

Add "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on px30 platform.

Acked-by: Rob Herring 
Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 8ce49b2..6f629b1 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -14,6 +14,7 @@ Required Properties:
before RK3288
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RV1108
+   - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3036
- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK322x
- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3328
-- 
1.9.1

[PATCH v2 0/6] arm64: dts: rockchip: add basic dts file for PX30 SoCs

2018-07-23 Thread cl 
From: Liang Chen 

Changes in V2:
1. change the subject to format "dt-bindings: module: ..." for the documents. 
2. use new property  for backlight.
3. remove pinctrl of rk809, because the driver is not ready.

Liang Chen (6):
  dt-bindings: usb: dwc2: add description for px30
  dt-bindings: mmc: rockchip-dw-mshc: add description for px30
  dt-bindings: sound: rockchip-i2s: add description for px30
  dt-bindings: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  arm64: dts: rockchip: add PX30 eavluation board devicetree

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |2 +
 .../devicetree/bindings/sound/rockchip-i2s.txt |1 +
 Documentation/devicetree/bindings/usb/dwc2.txt |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  |  473 +
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 8 files changed, 2526 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

-- 
1.9.1

[PATCH v2 0/6] arm64: dts: rockchip: add basic dts file for PX30 SoCs

2018-07-23 Thread cl 
From: Liang Chen 

Changes in V2:
1. change the subject to format "dt-bindings: module: ..." for the documents. 
2. use new property  for backlight.
3. remove pinctrl of rk809, because the driver is not ready.

Liang Chen (6):
  dt-bindings: usb: dwc2: add description for px30
  dt-bindings: mmc: rockchip-dw-mshc: add description for px30
  dt-bindings: sound: rockchip-i2s: add description for px30
  dt-bindings: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  arm64: dts: rockchip: add PX30 eavluation board devicetree

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |2 +
 .../devicetree/bindings/sound/rockchip-i2s.txt |1 +
 Documentation/devicetree/bindings/usb/dwc2.txt |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  |  473 +
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2043 
 8 files changed, 2526 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

-- 
1.9.1

[PATCH v1 0/7] arm64: dts: rockchip: add basic dts file for PX30 SoCs

2018-07-17 Thread cl 
From: Liang Chen 

Liang Chen (7):
  Documentation: usb: dwc2: add description for px30
  Documentation: rockchip-dw-mshc: add description for px30
  Documentation: spi-rockchip: add description for px30
  Documentation: rockchip-i2s: add description for px30
  Documentation: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  arm64: dts: rockchip: add PX30 eavluation board devicetree

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |2 +
 .../devicetree/bindings/sound/rockchip-i2s.txt |1 +
 .../devicetree/bindings/spi/spi-rockchip.txt   |1 +
 Documentation/devicetree/bindings/usb/dwc2.txt |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  |  539 ++
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2044 
 9 files changed, 2594 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

-- 
1.9.1

[PATCH v1 0/7] arm64: dts: rockchip: add basic dts file for PX30 SoCs

2018-07-17 Thread cl 
From: Liang Chen 

Liang Chen (7):
  Documentation: usb: dwc2: add description for px30
  Documentation: rockchip-dw-mshc: add description for px30
  Documentation: spi-rockchip: add description for px30
  Documentation: rockchip-i2s: add description for px30
  Documentation: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  arm64: dts: rockchip: add PX30 eavluation board devicetree

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |2 +
 .../devicetree/bindings/sound/rockchip-i2s.txt |1 +
 .../devicetree/bindings/spi/spi-rockchip.txt   |1 +
 Documentation/devicetree/bindings/usb/dwc2.txt |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  |  539 ++
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2044 
 9 files changed, 2594 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

-- 
1.9.1

[PATCH v1 7/7] arm64: dts: rockchip: add PX30 eavluation board devicetree

2018-07-17 Thread cl 
From: Liang Chen 

This patch add px30-evb.dts for PX30 evaluation board.
Tested on PX30 evb.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +
 arch/arm64/boot/dts/rockchip/Makefile  |   1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  | 539 +
 3 files changed, 544 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index 1c1d62d..e33b23a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -158,6 +158,10 @@ Rockchip platforms device tree bindings
 Required root node properties:
   - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
+- Rockchip PX30 evb:
+Required root node properties:
+  - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RK3368 evb:
 Required root node properties:
   - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 48a83f8..19aa9c6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts 
b/arch/arm64/boot/dts/rockchip/px30-evb.dts
new file mode 100644
index 000..b481408
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -0,0 +1,539 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+#include "px30.dtsi"
+
+/ {
+   model = "Rockchip PX30 EVB";
+   compatible = "rockchip,px30-evb", "rockchip,px30";
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 2>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "esc";
+   press-threshold-microvolt = <131>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "home";
+   press-threshold-microvolt = <624000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "menu";
+   press-threshold-microvolt = <987000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <17000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 25000 0>;
+   brightness-levels = <
+ 0   1   2   3   4   5   6   7
+ 8   9  10  11  12  13  14  15
+16  17  18  19  20  21  22  23
+24  25  26  27  28  29  30  31
+32  33  34  35  36  37  38  39
+40  41  42  43  44  45  46  47
+48  49  50  51  52  53  54  55
+56  57  58  59  60  61  62  63
+64  65  66  67  68  69  70  71
+72  73  74  75  76  77  78  79
+80  81  82  83  84  85  86  87
+88  89  90  91  92  93  94  95
+96  97  98  99 100 101 102 103
+   104 105 106 107 108 109 110 111
+   112 113 114 115 116 117 118 119
+   120 121 122 123 124 125 126 127
+   128 129 130 131 132 133 134 135
+   136 137 138 139 140 141 142 143
+   144 145 146 147 148 149 150 151
+   152 153 154 155 156 157 158 159
+   160 161 162 163 164 165 166 167
+   168 169 170 171 172 173 174 175
+   176 177 178 179 180 181 182 183
+   184 185 186 187 188 189 190 191
+   192 193 194 195 196 197 198 199
+   200 201 202 203 204 205 206 207
+   208 209 210 211 212 213 214 215
+

[PATCH v1 6/7] arm64: dts: rockchip: add core dtsi file for PX30 SoCs

2018-07-17 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip PX30 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2044 
 1 file changed, 2044 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi 
b/arch/arm64/boot/dts/rockchip/px30.dtsi
new file mode 100644
index 000..4d57002
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -0,0 +1,2044 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,px30";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   spi0 = 
+   spi1 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   #cooling-cells = <2>;
+   dynamic-power-coefficient = <90>;
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <120>;
+   exit-latency-us = <250>;
+   min-residency-us = <900>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <400>;
+   exit-latency-us = <500>;
+   min-residency-us = <2000>;
+   };
+   };
+   };
+
+   cpu0_opp_table: cpu0-opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-40800 {
+   opp-hz = /bits/ 64 <40800>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   opp-suspend;
+   };
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-81600 {
+   opp-hz = /bits/ 64 <81600>;
+   opp-microvolt = <105 105 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-100800 {
+   opp-hz = /bits/ 64 <100800>;
+   opp-microvolt = <1175000 1175000 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-12 {

[PATCH v1 7/7] arm64: dts: rockchip: add PX30 eavluation board devicetree

2018-07-17 Thread cl 
From: Liang Chen 

This patch add px30-evb.dts for PX30 evaluation board.
Tested on PX30 evb.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +
 arch/arm64/boot/dts/rockchip/Makefile  |   1 +
 arch/arm64/boot/dts/rockchip/px30-evb.dts  | 539 +
 3 files changed, 544 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index 1c1d62d..e33b23a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -158,6 +158,10 @@ Rockchip platforms device tree bindings
 Required root node properties:
   - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
+- Rockchip PX30 evb:
+Required root node properties:
+  - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RK3368 evb:
 Required root node properties:
   - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 48a83f8..19aa9c6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts 
b/arch/arm64/boot/dts/rockchip/px30-evb.dts
new file mode 100644
index 000..b481408
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -0,0 +1,539 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+#include "px30.dtsi"
+
+/ {
+   model = "Rockchip PX30 EVB";
+   compatible = "rockchip,px30-evb", "rockchip,px30";
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 2>;
+   io-channel-names = "buttons";
+   poll-interval = <100>;
+   keyup-threshold-microvolt = <180>;
+
+   esc-key {
+   linux,code = ;
+   label = "esc";
+   press-threshold-microvolt = <131>;
+   };
+
+   home-key {
+   linux,code = ;
+   label = "home";
+   press-threshold-microvolt = <624000>;
+   };
+
+   menu-key {
+   linux,code = ;
+   label = "menu";
+   press-threshold-microvolt = <987000>;
+   };
+
+   vol-down-key {
+   linux,code = ;
+   label = "volume down";
+   press-threshold-microvolt = <30>;
+   };
+
+   vol-up-key {
+   linux,code = ;
+   label = "volume up";
+   press-threshold-microvolt = <17000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 25000 0>;
+   brightness-levels = <
+ 0   1   2   3   4   5   6   7
+ 8   9  10  11  12  13  14  15
+16  17  18  19  20  21  22  23
+24  25  26  27  28  29  30  31
+32  33  34  35  36  37  38  39
+40  41  42  43  44  45  46  47
+48  49  50  51  52  53  54  55
+56  57  58  59  60  61  62  63
+64  65  66  67  68  69  70  71
+72  73  74  75  76  77  78  79
+80  81  82  83  84  85  86  87
+88  89  90  91  92  93  94  95
+96  97  98  99 100 101 102 103
+   104 105 106 107 108 109 110 111
+   112 113 114 115 116 117 118 119
+   120 121 122 123 124 125 126 127
+   128 129 130 131 132 133 134 135
+   136 137 138 139 140 141 142 143
+   144 145 146 147 148 149 150 151
+   152 153 154 155 156 157 158 159
+   160 161 162 163 164 165 166 167
+   168 169 170 171 172 173 174 175
+   176 177 178 179 180 181 182 183
+   184 185 186 187 188 189 190 191
+   192 193 194 195 196 197 198 199
+   200 201 202 203 204 205 206 207
+   208 209 210 211 212 213 214 215
+

[PATCH v1 6/7] arm64: dts: rockchip: add core dtsi file for PX30 SoCs

2018-07-17 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip PX30 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2044 
 1 file changed, 2044 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi 
b/arch/arm64/boot/dts/rockchip/px30.dtsi
new file mode 100644
index 000..4d57002
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -0,0 +1,2044 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,px30";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   spi0 = 
+   spi1 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   #cooling-cells = <2>;
+   dynamic-power-coefficient = <90>;
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a35", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   operating-points-v2 = <_opp_table>;
+   cpu-idle-states = <_SLEEP _SLEEP>;
+   };
+
+   idle-states {
+   entry-method = "psci";
+
+   CPU_SLEEP: cpu-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <120>;
+   exit-latency-us = <250>;
+   min-residency-us = <900>;
+   };
+
+   CLUSTER_SLEEP: cluster-sleep {
+   compatible = "arm,idle-state";
+   local-timer-stop;
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <400>;
+   exit-latency-us = <500>;
+   min-residency-us = <2000>;
+   };
+   };
+   };
+
+   cpu0_opp_table: cpu0-opp-table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-40800 {
+   opp-hz = /bits/ 64 <40800>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   opp-suspend;
+   };
+   opp-6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <95 95 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-81600 {
+   opp-hz = /bits/ 64 <81600>;
+   opp-microvolt = <105 105 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-100800 {
+   opp-hz = /bits/ 64 <100800>;
+   opp-microvolt = <1175000 1175000 135>;
+   clock-latency-ns = <4>;
+   };
+   opp-12 {

[PATCH v1 5/7] Documentation: rockchip: grf: add grf and pmugrf description for px30

2018-07-17 Thread cl 
From: Liang Chen 

This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 7dc5ce8..46e27cd 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
- "rockchip,rk3036-grf", "syscon": for rk3036
- "rockchip,rk3066-grf", "syscon": for rk3066
- "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
- "rockchip,rk3399-grf", "syscon": for rk3399
- "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
-- 
1.9.1

[PATCH v1 5/7] Documentation: rockchip: grf: add grf and pmugrf description for px30

2018-07-17 Thread cl 
From: Liang Chen 

This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 7dc5ce8..46e27cd 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
- "rockchip,rk3036-grf", "syscon": for rk3036
- "rockchip,rk3066-grf", "syscon": for rk3066
- "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
- "rockchip,rk3399-grf", "syscon": for rk3399
- "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
-- 
1.9.1

[PATCH v1 2/7] Documentation: rockchip-dw-mshc: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

Add "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on px30 platform.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 8ce49b2..6f629b1 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -14,6 +14,7 @@ Required Properties:
before RK3288
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RV1108
+   - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3036
- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK322x
- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3328
-- 
1.9.1

[PATCH v1 2/7] Documentation: rockchip-dw-mshc: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

Add "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on px30 platform.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 8ce49b2..6f629b1 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -14,6 +14,7 @@ Required Properties:
before RK3288
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RV1108
+   - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3036
- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK322x
- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip 
RK3328
-- 
1.9.1

[PATCH v1 4/7] Documentation: rockchip-i2s: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

Add "rockchip,px30-i2s", "rockchip,rk3066-i2s" for i2s on px30 platform.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt 
b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index b208a75..54aefab 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -7,6 +7,7 @@ Required properties:
 
 - compatible: should be one of the following:
- "rockchip,rk3066-i2s": for rk3066
+   - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
- "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
- "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
-- 
1.9.1

[PATCH v1 1/7] Documentation: usb: dwc2: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

This patch adds the compatible of dwc2 for PX30 SoCs.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 46da5f1..6dc3c4a 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -6,6 +6,7 @@ Required properties:
   - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
   - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
   - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
-- 
1.9.1

[PATCH v1 4/7] Documentation: rockchip-i2s: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

Add "rockchip,px30-i2s", "rockchip,rk3066-i2s" for i2s on px30 platform.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt 
b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index b208a75..54aefab 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -7,6 +7,7 @@ Required properties:
 
 - compatible: should be one of the following:
- "rockchip,rk3066-i2s": for rk3066
+   - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
- "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
- "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
-- 
1.9.1

[PATCH v1 1/7] Documentation: usb: dwc2: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

This patch adds the compatible of dwc2 for PX30 SoCs.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 46da5f1..6dc3c4a 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -6,6 +6,7 @@ Required properties:
   - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
   - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
   - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
-- 
1.9.1

[PATCH v1 3/7] Documentation: spi-rockchip: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

Add "rockchip,px30-spi", "rockchip,rk3066-spi" for spi on px30 platform.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/spi/spi-rockchip.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt 
b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
index 6e3ffac..a0edac1 100644
--- a/Documentation/devicetree/bindings/spi/spi-rockchip.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
@@ -7,6 +7,7 @@ Required Properties:
 
 - compatible: should be one of the following.
 "rockchip,rv1108-spi" for rv1108 SoCs.
+"rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs.
 "rockchip,rk3036-spi" for rk3036 SoCS.
 "rockchip,rk3066-spi" for rk3066 SoCs.
 "rockchip,rk3188-spi" for rk3188 SoCs.
-- 
1.9.1

[PATCH v1 3/7] Documentation: spi-rockchip: add description for px30

2018-07-17 Thread cl 
From: Liang Chen 

Add "rockchip,px30-spi", "rockchip,rk3066-spi" for spi on px30 platform.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/spi/spi-rockchip.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt 
b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
index 6e3ffac..a0edac1 100644
--- a/Documentation/devicetree/bindings/spi/spi-rockchip.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
@@ -7,6 +7,7 @@ Required Properties:
 
 - compatible: should be one of the following.
 "rockchip,rv1108-spi" for rv1108 SoCs.
+"rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs.
 "rockchip,rk3036-spi" for rk3036 SoCS.
 "rockchip,rk3066-spi" for rk3066 SoCs.
 "rockchip,rk3188-spi" for rk3188 SoCs.
-- 
1.9.1

[PATCH v2 3/3] arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

RK3328 Evaluation Board use rk805 pmic, and one of the DCDCs in
rk805 is for cpu regulator, assign the cpu regulator, so the
cpufreq can work fine.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 30816c1..f82b2d0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -96,6 +96,10 @@
};
 };
 
+ {
+   cpu-supply = <_arm>;
+};
+
  {
bus-width = <8>;
cap-mmc-highspeed;
-- 
1.9.1

[PATCH v2 3/3] arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

RK3328 Evaluation Board use rk805 pmic, and one of the DCDCs in
rk805 is for cpu regulator, assign the cpu regulator, so the
cpufreq can work fine.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 30816c1..f82b2d0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -96,6 +96,10 @@
};
 };
 
+ {
+   cpu-supply = <_arm>;
+};
+
  {
bus-width = <8>;
cap-mmc-highspeed;
-- 
1.9.1

[PATCH v1 0/3] Enable some devices for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

1. enalbe sdio/sdmmc/emmc.
2. enable cpufreq.

change in v2:

1. remove useless properties in mmc nodes.

Liang Chen (3):
  arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
  cpufreq: rockchip: add support for rk3328 soc
  arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 70 +
 drivers/cpufreq/cpufreq-dt-platdev.c|  1 +
 2 files changed, 71 insertions(+)

-- 
1.9.1

[PATCH v2 2/3] cpufreq: rockchip: add support for rk3328 soc

2017-08-23 Thread cl 
From: Liang Chen 

Add compatible rockchip,rk3328 to the machines table to
launch cpufreq-dt driver for rk3328 soc.

Signed-off-by: Liang Chen 
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c 
b/drivers/cpufreq/cpufreq-dt-platdev.c
index 1c26292..f16c3ba 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -76,6 +76,7 @@
{ .compatible = "rockchip,rk3188", },
{ .compatible = "rockchip,rk3228", },
{ .compatible = "rockchip,rk3288", },
+   { .compatible = "rockchip,rk3328", },
{ .compatible = "rockchip,rk3366", },
{ .compatible = "rockchip,rk3368", },
{ .compatible = "rockchip,rk3399", },
-- 
1.9.1

[PATCH v1 0/3] Enable some devices for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

1. enalbe sdio/sdmmc/emmc.
2. enable cpufreq.

change in v2:

1. remove useless properties in mmc nodes.

Liang Chen (3):
  arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
  cpufreq: rockchip: add support for rk3328 soc
  arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 70 +
 drivers/cpufreq/cpufreq-dt-platdev.c|  1 +
 2 files changed, 71 insertions(+)

-- 
1.9.1

[PATCH v2 2/3] cpufreq: rockchip: add support for rk3328 soc

2017-08-23 Thread cl 
From: Liang Chen 

Add compatible rockchip,rk3328 to the machines table to
launch cpufreq-dt driver for rk3328 soc.

Signed-off-by: Liang Chen 
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c 
b/drivers/cpufreq/cpufreq-dt-platdev.c
index 1c26292..f16c3ba 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -76,6 +76,7 @@
{ .compatible = "rockchip,rk3188", },
{ .compatible = "rockchip,rk3228", },
{ .compatible = "rockchip,rk3288", },
+   { .compatible = "rockchip,rk3328", },
{ .compatible = "rockchip,rk3366", },
{ .compatible = "rockchip,rk3368", },
{ .compatible = "rockchip,rk3399", },
-- 
1.9.1

[PATCH v2 1/3] arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

Rockchip's rk3328 evaluation board has 3 mmc controllers for
sdio/sdmmc/emmc, let's enable them.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 66 +
 1 file changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 86605ae..30816c1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -60,6 +60,20 @@
regulator-max-microvolt = <1200>;
};
 
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+   };
+
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -69,6 +83,26 @@
regulator-max-microvolt = <500>;
vin-supply = <_12v>;
};
+
+   vcc_sd: sdmmc-regulator {
+   compatible = "regulator-fixed";
+   gpio = < 30 GPIO_ACTIVE_LOW>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_gpio>;
+   regulator-name = "vcc_sd";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_io>;
+   };
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   non-removable;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _bus8>;
+   status = "okay";
 };
 
  {
@@ -186,6 +220,38 @@
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO _pull_up>;
};
};
+
+   sdio-pwrseq {
+   wifi_enable_h: wifi-enable-h {
+   rockchip,pins =
+   <1 18 RK_FUNC_GPIO _pull_none>;
+   };
+   };
+};
+
+ {
+   bus-width = <4>;
+   cap-sd-highspeed;
+   cap-sdio-irq;
+   keep-power-in-suspend;
+   max-frequency = <15000>;
+   mmc-pwrseq = <_pwrseq>;
+   non-removable;
+   pinctrl-names = "default";
+   pinctrl-0 = <_bus4 _cmd _clk>;
+   status = "okay";
+};
+
+ {
+   bus-width = <4>;
+   cap-mmc-highspeed;
+   cap-sd-highspeed;
+   disable-wp;
+   max-frequency = <15000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _dectn _bus4>;
+   vmmc-supply = <_sd>;
+   status = "okay";
 };
 
  {
-- 
1.9.1

[PATCH v2 1/3] arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

Rockchip's rk3328 evaluation board has 3 mmc controllers for
sdio/sdmmc/emmc, let's enable them.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 66 +
 1 file changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 86605ae..30816c1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -60,6 +60,20 @@
regulator-max-microvolt = <1200>;
};
 
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+   };
+
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -69,6 +83,26 @@
regulator-max-microvolt = <500>;
vin-supply = <_12v>;
};
+
+   vcc_sd: sdmmc-regulator {
+   compatible = "regulator-fixed";
+   gpio = < 30 GPIO_ACTIVE_LOW>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_gpio>;
+   regulator-name = "vcc_sd";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_io>;
+   };
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   non-removable;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _bus8>;
+   status = "okay";
 };
 
  {
@@ -186,6 +220,38 @@
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO _pull_up>;
};
};
+
+   sdio-pwrseq {
+   wifi_enable_h: wifi-enable-h {
+   rockchip,pins =
+   <1 18 RK_FUNC_GPIO _pull_none>;
+   };
+   };
+};
+
+ {
+   bus-width = <4>;
+   cap-sd-highspeed;
+   cap-sdio-irq;
+   keep-power-in-suspend;
+   max-frequency = <15000>;
+   mmc-pwrseq = <_pwrseq>;
+   non-removable;
+   pinctrl-names = "default";
+   pinctrl-0 = <_bus4 _cmd _clk>;
+   status = "okay";
+};
+
+ {
+   bus-width = <4>;
+   cap-mmc-highspeed;
+   cap-sd-highspeed;
+   disable-wp;
+   max-frequency = <15000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _dectn _bus4>;
+   vmmc-supply = <_sd>;
+   status = "okay";
 };
 
  {
-- 
1.9.1

[PATCH v1 1/3] arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

Rockchip's rk3328 evaluation board has 3 mmc controllers for
sdio/sdmmc/emmc, let's enable them.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 74 +
 1 file changed, 74 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 86605ae..479f9d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -60,6 +60,20 @@
regulator-max-microvolt = <1200>;
};
 
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+   };
+
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -69,6 +83,29 @@
regulator-max-microvolt = <500>;
vin-supply = <_12v>;
};
+
+   vcc_sd: sdmmc-regulator {
+   compatible = "regulator-fixed";
+   gpio = < 30 GPIO_ACTIVE_LOW>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_gpio>;
+   regulator-name = "vcc_sd";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_io>;
+   };
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   supports-emmc;
+   disable-wp;
+   non-removable;
+   num-slots = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _bus8>;
+   status = "okay";
 };
 
  {
@@ -186,6 +223,43 @@
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO _pull_up>;
};
};
+
+   sdio-pwrseq {
+   wifi_enable_h: wifi-enable-h {
+   rockchip,pins =
+   <1 18 RK_FUNC_GPIO _pull_none>;
+   };
+   };
+};
+
+ {
+   bus-width = <4>;
+   cap-sd-highspeed;
+   cap-sdio-irq;
+   disable-wp;
+   keep-power-in-suspend;
+   max-frequency = <15000>;
+   mmc-pwrseq = <_pwrseq>;
+   non-removable;
+   num-slots = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_bus4 _cmd _clk>;
+   supports-sdio;
+   status = "okay";
+};
+
+ {
+   bus-width = <4>;
+   cap-mmc-highspeed;
+   cap-sd-highspeed;
+   disable-wp;
+   max-frequency = <15000>;
+   num-slots = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _dectn _bus4>;
+   supports-sd;
+   vmmc-supply = <_sd>;
+   status = "okay";
 };
 
  {
-- 
1.9.1

[PATCH v1 1/3] arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

Rockchip's rk3328 evaluation board has 3 mmc controllers for
sdio/sdmmc/emmc, let's enable them.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 74 +
 1 file changed, 74 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 86605ae..479f9d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -60,6 +60,20 @@
regulator-max-microvolt = <1200>;
};
 
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+
+   /*
+* On the module itself this is one of these (depending
+* on the actual card populated):
+* - SDIO_RESET_L_WL_REG_ON
+* - PDN (power down when low)
+*/
+   reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+   };
+
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -69,6 +83,29 @@
regulator-max-microvolt = <500>;
vin-supply = <_12v>;
};
+
+   vcc_sd: sdmmc-regulator {
+   compatible = "regulator-fixed";
+   gpio = < 30 GPIO_ACTIVE_LOW>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_gpio>;
+   regulator-name = "vcc_sd";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_io>;
+   };
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   supports-emmc;
+   disable-wp;
+   non-removable;
+   num-slots = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _bus8>;
+   status = "okay";
 };
 
  {
@@ -186,6 +223,43 @@
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO _pull_up>;
};
};
+
+   sdio-pwrseq {
+   wifi_enable_h: wifi-enable-h {
+   rockchip,pins =
+   <1 18 RK_FUNC_GPIO _pull_none>;
+   };
+   };
+};
+
+ {
+   bus-width = <4>;
+   cap-sd-highspeed;
+   cap-sdio-irq;
+   disable-wp;
+   keep-power-in-suspend;
+   max-frequency = <15000>;
+   mmc-pwrseq = <_pwrseq>;
+   non-removable;
+   num-slots = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_bus4 _cmd _clk>;
+   supports-sdio;
+   status = "okay";
+};
+
+ {
+   bus-width = <4>;
+   cap-mmc-highspeed;
+   cap-sd-highspeed;
+   disable-wp;
+   max-frequency = <15000>;
+   num-slots = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _dectn _bus4>;
+   supports-sd;
+   vmmc-supply = <_sd>;
+   status = "okay";
 };
 
  {
-- 
1.9.1

[PATCH v1 3/3] arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

RK3328 Evaluation Board use rk805 pmic, and one of the DCDCs in
rk805 is for cpu regulator, assign the cpu regulator, so the
cpufreq can work fine.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 479f9d9..b0658f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -96,6 +96,10 @@
};
 };
 
+ {
+   cpu-supply = <_arm>;
+};
+
  {
bus-width = <8>;
cap-mmc-highspeed;
-- 
1.9.1

[PATCH v1 3/3] arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

RK3328 Evaluation Board use rk805 pmic, and one of the DCDCs in
rk805 is for cpu regulator, assign the cpu regulator, so the
cpufreq can work fine.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 479f9d9..b0658f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -96,6 +96,10 @@
};
 };
 
+ {
+   cpu-supply = <_arm>;
+};
+
  {
bus-width = <8>;
cap-mmc-highspeed;
-- 
1.9.1

[PATCH v1 2/3] cpufreq: rockchip: add support for rk3328 soc

2017-08-23 Thread cl 
From: Liang Chen 

Add compatible rockchip,rk3328 to the machines table to
launch cpufreq-dt driver for rk3328 soc.

Signed-off-by: Liang Chen 
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c 
b/drivers/cpufreq/cpufreq-dt-platdev.c
index 1c26292..f16c3ba 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -76,6 +76,7 @@
{ .compatible = "rockchip,rk3188", },
{ .compatible = "rockchip,rk3228", },
{ .compatible = "rockchip,rk3288", },
+   { .compatible = "rockchip,rk3328", },
{ .compatible = "rockchip,rk3366", },
{ .compatible = "rockchip,rk3368", },
{ .compatible = "rockchip,rk3399", },
-- 
1.9.1

[PATCH v1 2/3] cpufreq: rockchip: add support for rk3328 soc

2017-08-23 Thread cl 
From: Liang Chen 

Add compatible rockchip,rk3328 to the machines table to
launch cpufreq-dt driver for rk3328 soc.

Signed-off-by: Liang Chen 
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c 
b/drivers/cpufreq/cpufreq-dt-platdev.c
index 1c26292..f16c3ba 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -76,6 +76,7 @@
{ .compatible = "rockchip,rk3188", },
{ .compatible = "rockchip,rk3228", },
{ .compatible = "rockchip,rk3288", },
+   { .compatible = "rockchip,rk3328", },
{ .compatible = "rockchip,rk3366", },
{ .compatible = "rockchip,rk3368", },
{ .compatible = "rockchip,rk3399", },
-- 
1.9.1

[PATCH v1 0/3] Enable some devices for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

1. enalbe sdio/sdmmc/emmc.
2. enable cpufreq.

Liang Chen (3):
  arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
  cpufreq: rockchip: add support for rk3328 soc
  arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 78 +
 drivers/cpufreq/cpufreq-dt-platdev.c|  1 +
 2 files changed, 79 insertions(+)

-- 
1.9.1

[PATCH v1 0/3] Enable some devices for rk3328 evaluation board

2017-08-23 Thread cl 
From: Liang Chen 

1. enalbe sdio/sdmmc/emmc.
2. enable cpufreq.

Liang Chen (3):
  arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
  cpufreq: rockchip: add support for rk3328 soc
  arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 78 +
 drivers/cpufreq/cpufreq-dt-platdev.c|  1 +
 2 files changed, 79 insertions(+)

-- 
1.9.1

[PATCH v4 6/6] dt-bindings: document rockchip rk3328-evb board

2017-03-27 Thread cl 
From: Liang Chen 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Liang Chen 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v4 6/6] dt-bindings: document rockchip rk3328-evb board

2017-03-27 Thread cl 
From: Liang Chen 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Liang Chen 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v4 1/6] dt-bindings: iio: rockchip-saradc: add support for rk3328

2017-03-27 Thread cl 
From: Liang Chen 

The rk3328 saradc is the same as rk3399.

Signed-off-by: Liang Chen 
Reviewed-by: Heiko Stuebner 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt 
b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..e0a9b9d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc"
- "rockchip,saradc": for rk3188, rk3288
- "rockchip,rk3066-tsadc": for rk3036
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
 
 - reg: physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v4 0/6] initialize dtsi file and dts file for RK3328 SoCs

2017-03-27 Thread cl 
From: Liang Chen 

Changes in v4:
Remove some assigned-clocks as they should be inited in their
respective device nodes.

Changes in v3:
Adjust some descriptions in dtsi.

Changes in v2:
Remove RK_FUNC_* in dtsi as it dose not help understand things better.
Adjust the order of description in dt-bindings.

v1:
These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Liang Chen (6):
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |1 +
 .../bindings/iio/adc/rockchip-saradc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts|   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi   | 1275 
 7 files changed, 1340 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

[PATCH v4 1/6] dt-bindings: iio: rockchip-saradc: add support for rk3328

2017-03-27 Thread cl 
From: Liang Chen 

The rk3328 saradc is the same as rk3399.

Signed-off-by: Liang Chen 
Reviewed-by: Heiko Stuebner 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt 
b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..e0a9b9d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc"
- "rockchip,saradc": for rk3188, rk3288
- "rockchip,rk3066-tsadc": for rk3036
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
 
 - reg: physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v4 0/6] initialize dtsi file and dts file for RK3328 SoCs

2017-03-27 Thread cl 
From: Liang Chen 

Changes in v4:
Remove some assigned-clocks as they should be inited in their
respective device nodes.

Changes in v3:
Adjust some descriptions in dtsi.

Changes in v2:
Remove RK_FUNC_* in dtsi as it dose not help understand things better.
Adjust the order of description in dt-bindings.

v1:
These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Liang Chen (6):
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |1 +
 .../bindings/iio/adc/rockchip-saradc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts|   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi   | 1275 
 7 files changed, 1340 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

[PATCH v4 5/6] arm64: dts: rockchip: add dts file for RK3328

2017-03-27 Thread cl 
From: Liang Chen 

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/Makefile   |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..d09ea3c 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+   model = "Rockchip RK3328 EVB";
+   compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1

[PATCH v4 3/6] dt-bindings: soc: rockchip: grf: add support for rk3328

2017-03-27 Thread cl 
From: Liang Chen 

Signed-off-by: Liang Chen 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..de8b983 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -16,6 +16,7 @@ Required Properties:
- "rockchip,rk3188-grf", "syscon": for rk3188
- "rockchip,rk3228-grf", "syscon": for rk3228
- "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3328-grf", "syscon": for rk3328
- "rockchip,rk3368-grf", "syscon": for rk3368
- "rockchip,rk3399-grf", "syscon": for rk3399
 - compatible: PMUGRF should be one of the following:
-- 
1.9.1

[PATCH v4 5/6] arm64: dts: rockchip: add dts file for RK3328

2017-03-27 Thread cl 
From: Liang Chen 

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/Makefile   |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..d09ea3c 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+   model = "Rockchip RK3328 EVB";
+   compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1

[PATCH v4 3/6] dt-bindings: soc: rockchip: grf: add support for rk3328

2017-03-27 Thread cl 
From: Liang Chen 

Signed-off-by: Liang Chen 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..de8b983 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -16,6 +16,7 @@ Required Properties:
- "rockchip,rk3188-grf", "syscon": for rk3188
- "rockchip,rk3228-grf", "syscon": for rk3228
- "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3328-grf", "syscon": for rk3328
- "rockchip,rk3368-grf", "syscon": for rk3368
- "rockchip,rk3399-grf", "syscon": for rk3399
 - compatible: PMUGRF should be one of the following:
-- 
1.9.1

[PATCH v4 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-27 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1275 ++
 1 file changed, 1275 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..ddc95c8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1275 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+
+   l2: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   amba {
+   compatible = "simple-bus";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   dmac: dmac@ff1f {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x0 0xff1f 0x0 0x4000>;
+   interrupts = ,
+;
+

[PATCH v4 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-27 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1275 ++
 1 file changed, 1275 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..ddc95c8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1275 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+
+   l2: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   amba {
+   compatible = "simple-bus";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   dmac: dmac@ff1f {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x0 0xff1f 0x0 0x4000>;
+   interrupts = ,
+;
+   clocks = < ACLK_DMAC>;
+

[PATCH v3 6/6] dt-bindings: document rockchip rk3328-evb board

2017-03-24 Thread cl 
From: Liang Chen 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v3 6/6] dt-bindings: document rockchip rk3328-evb board

2017-03-24 Thread cl 
From: Liang Chen 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v3 5/6] arm64: dts: rockchip: add dts file for RK3328

2017-03-24 Thread cl 
From: Liang Chen 

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/Makefile   |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..d09ea3c 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+   model = "Rockchip RK3328 EVB";
+   compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1

[PATCH v3 5/6] arm64: dts: rockchip: add dts file for RK3328

2017-03-24 Thread cl 
From: Liang Chen 

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/Makefile   |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..d09ea3c 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+   model = "Rockchip RK3328 EVB";
+   compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1

[PATCH v3 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-24 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1286 ++
 1 file changed, 1286 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..1eb4832
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1286 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+
+   l2: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   amba {
+   compatible = "simple-bus";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   dmac: dmac@ff1f {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x0 0xff1f 0x0 0x4000>;
+   interrupts = ,
+;
+

[PATCH v3 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-24 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1286 ++
 1 file changed, 1286 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..1eb4832
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1286 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   next-level-cache = <>;
+   clocks = < ARMCLK>;
+   };
+
+   l2: l2-cache0 {
+   compatible = "cache";
+   };
+   };
+
+   amba {
+   compatible = "simple-bus";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   dmac: dmac@ff1f {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x0 0xff1f 0x0 0x4000>;
+   interrupts = ,
+;
+   clocks = < ACLK_DMAC>;
+

[PATCH v3 2/6] dt-bindings: i2c: rk3x: add support for rk3328

2017-03-24 Thread cl 
From: Liang Chen 

The rk3328 i2c is the same as rk3399

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index bbc5a1e..e18445d 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -11,6 +11,7 @@ Required properties :
- "rockchip,rk3188-i2c": for rk3188
- "rockchip,rk3228-i2c": for rk3228
- "rockchip,rk3288-i2c": for rk3288
+   - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328
- "rockchip,rk3399-i2c": for rk3399
  - interrupts : interrupt number
  - clocks: See ../clock/clock-bindings.txt
-- 
1.9.1

[PATCH v3 2/6] dt-bindings: i2c: rk3x: add support for rk3328

2017-03-24 Thread cl 
From: Liang Chen 

The rk3328 i2c is the same as rk3399

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index bbc5a1e..e18445d 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -11,6 +11,7 @@ Required properties :
- "rockchip,rk3188-i2c": for rk3188
- "rockchip,rk3228-i2c": for rk3228
- "rockchip,rk3288-i2c": for rk3288
+   - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328
- "rockchip,rk3399-i2c": for rk3399
  - interrupts : interrupt number
  - clocks: See ../clock/clock-bindings.txt
-- 
1.9.1

[PATCH v3 3/6] dt-bindings: soc: rockchip: grf: add support for rk3328

2017-03-24 Thread cl 
From: Liang Chen 

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..de8b983 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -16,6 +16,7 @@ Required Properties:
- "rockchip,rk3188-grf", "syscon": for rk3188
- "rockchip,rk3228-grf", "syscon": for rk3228
- "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3328-grf", "syscon": for rk3328
- "rockchip,rk3368-grf", "syscon": for rk3368
- "rockchip,rk3399-grf", "syscon": for rk3399
 - compatible: PMUGRF should be one of the following:
-- 
1.9.1

[PATCH v3 3/6] dt-bindings: soc: rockchip: grf: add support for rk3328

2017-03-24 Thread cl 
From: Liang Chen 

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..de8b983 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -16,6 +16,7 @@ Required Properties:
- "rockchip,rk3188-grf", "syscon": for rk3188
- "rockchip,rk3228-grf", "syscon": for rk3228
- "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3328-grf", "syscon": for rk3328
- "rockchip,rk3368-grf", "syscon": for rk3368
- "rockchip,rk3399-grf", "syscon": for rk3399
 - compatible: PMUGRF should be one of the following:
-- 
1.9.1

[PATCH v3 1/6] dt-bindings: iio: rockchip-saradc: add support for rk3328

2017-03-24 Thread cl 
From: Liang Chen 

The rk3328 saradc is the same as rk3399.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt 
b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..e0a9b9d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc"
- "rockchip,saradc": for rk3188, rk3288
- "rockchip,rk3066-tsadc": for rk3036
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
 
 - reg: physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v3 1/6] dt-bindings: iio: rockchip-saradc: add support for rk3328

2017-03-24 Thread cl 
From: Liang Chen 

The rk3328 saradc is the same as rk3399.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt 
b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..e0a9b9d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc"
- "rockchip,saradc": for rk3188, rk3288
- "rockchip,rk3066-tsadc": for rk3036
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
 
 - reg: physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v3 0/6] initialize dtsi file and dts file for RK3328 SoCs

2017-03-24 Thread cl 
From: Liang Chen 

Changes in v3:
Adjust some descriptions in dtsi.

Changes in v2:
Remove RK_FUNC_* in dtsi as it dose not help understand things better.
Adjust the order of description in dt-bindings.

v1:
These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Liang Chen (6):
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |1 +
 .../bindings/iio/adc/rockchip-saradc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts|   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi   | 1286 
 7 files changed, 1351 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

[PATCH v3 0/6] initialize dtsi file and dts file for RK3328 SoCs

2017-03-24 Thread cl 
From: Liang Chen 

Changes in v3:
Adjust some descriptions in dtsi.

Changes in v2:
Remove RK_FUNC_* in dtsi as it dose not help understand things better.
Adjust the order of description in dt-bindings.

v1:
These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Liang Chen (6):
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |1 +
 .../bindings/iio/adc/rockchip-saradc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts|   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi   | 1286 
 7 files changed, 1351 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

[PATCH v2 3/6] dt-bindings: soc: rockchip: grf: add support for rk3328

2017-03-16 Thread cl 
From: Liang Chen 

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..de8b983 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -16,6 +16,7 @@ Required Properties:
- "rockchip,rk3188-grf", "syscon": for rk3188
- "rockchip,rk3228-grf", "syscon": for rk3228
- "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3328-grf", "syscon": for rk3328
- "rockchip,rk3368-grf", "syscon": for rk3368
- "rockchip,rk3399-grf", "syscon": for rk3399
 - compatible: PMUGRF should be one of the following:
-- 
1.9.1

[PATCH v2 3/6] dt-bindings: soc: rockchip: grf: add support for rk3328

2017-03-16 Thread cl 
From: Liang Chen 

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..de8b983 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -16,6 +16,7 @@ Required Properties:
- "rockchip,rk3188-grf", "syscon": for rk3188
- "rockchip,rk3228-grf", "syscon": for rk3228
- "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3328-grf", "syscon": for rk3328
- "rockchip,rk3368-grf", "syscon": for rk3368
- "rockchip,rk3399-grf", "syscon": for rk3399
 - compatible: PMUGRF should be one of the following:
-- 
1.9.1

[PATCH v2 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-16 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362 ++
 1 file changed, 1362 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..a92955c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1362 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   };
+   };
+
+   arm-pmu {
+   compatible = "arm,cortex-a53-pmu";
+   interrupts = ,
+,
+,
+;
+   interrupt-affinity = <>, <>, <>, <>;
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+   };
+
+   xin24m: xin24m {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   clock-output-names = "xin24m";
+   };
+
+   grf: syscon@ff10 {
+

[PATCH v2 4/6] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-16 Thread cl 
From: Liang Chen 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362 ++
 1 file changed, 1362 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..a92955c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1362 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   };
+   };
+
+   arm-pmu {
+   compatible = "arm,cortex-a53-pmu";
+   interrupts = ,
+,
+,
+;
+   interrupt-affinity = <>, <>, <>, <>;
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+   };
+
+   xin24m: xin24m {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   clock-output-names = "xin24m";
+   };
+
+   grf: syscon@ff10 {
+   compatible = "rockchip,rk3328-grf", "syscon",

[PATCH v2 6/6] dt-bindings: document rockchip rk3328-evb board

2017-03-16 Thread cl 
From: Liang Chen 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v2 6/6] dt-bindings: document rockchip rk3328-evb board

2017-03-16 Thread cl 
From: Liang Chen 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v2 5/6] arm64: dts: rockchip: add dts file for RK3328

2017-03-16 Thread cl 
From: Liang Chen 

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/Makefile   |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..853fc7d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+   model = "Rockchip RK3328 EVB";
+   compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1

[PATCH v2 5/6] arm64: dts: rockchip: add dts file for RK3328

2017-03-16 Thread cl 
From: Liang Chen 

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Liang Chen 
---
 arch/arm64/boot/dts/rockchip/Makefile   |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile 
b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..853fc7d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts 
b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+   model = "Rockchip RK3328 EVB";
+   compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   status = "okay";
+};
-- 
1.9.1

[PATCH v2 2/6] dt-bindings: i2c: rk3x: add support for rk3328

2017-03-16 Thread cl 
From: Liang Chen 

The rk3328 i2c is the same as rk3399

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index bbc5a1e..e18445d 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -11,6 +11,7 @@ Required properties :
- "rockchip,rk3188-i2c": for rk3188
- "rockchip,rk3228-i2c": for rk3228
- "rockchip,rk3288-i2c": for rk3288
+   - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328
- "rockchip,rk3399-i2c": for rk3399
  - interrupts : interrupt number
  - clocks: See ../clock/clock-bindings.txt
-- 
1.9.1

[PATCH v2 2/6] dt-bindings: i2c: rk3x: add support for rk3328

2017-03-16 Thread cl 
From: Liang Chen 

The rk3328 i2c is the same as rk3399

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index bbc5a1e..e18445d 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -11,6 +11,7 @@ Required properties :
- "rockchip,rk3188-i2c": for rk3188
- "rockchip,rk3228-i2c": for rk3228
- "rockchip,rk3288-i2c": for rk3288
+   - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328
- "rockchip,rk3399-i2c": for rk3399
  - interrupts : interrupt number
  - clocks: See ../clock/clock-bindings.txt
-- 
1.9.1

[PATCH v2 0/6] initialize dtsi file and dts file for RK3328 SoCs

2017-03-16 Thread cl 
From: Liang Chen 

Changes in v2:
Remove RK_FUNC_* in dtsi as it dose not help understand things better.
Adjust the order of description in dt-bindings.

These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Liang Chen (6):
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |1 +
 .../bindings/iio/adc/rockchip-saradc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts|   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi   | 1362 
 7 files changed, 1427 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

[PATCH v2 0/6] initialize dtsi file and dts file for RK3328 SoCs

2017-03-16 Thread cl 
From: Liang Chen 

Changes in v2:
Remove RK_FUNC_* in dtsi as it dose not help understand things better.
Adjust the order of description in dt-bindings.

These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Liang Chen (6):
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |1 +
 .../bindings/iio/adc/rockchip-saradc.txt   |1 +
 .../devicetree/bindings/soc/rockchip/grf.txt   |1 +
 arch/arm64/boot/dts/rockchip/Makefile  |1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts|   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi   | 1362 
 7 files changed, 1427 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

[PATCH v2 1/6] dt-bindings: iio: rockchip-saradc: add support for rk3328

2017-03-16 Thread cl 
From: Liang Chen 

The rk3328 saradc is the same as rk3399.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt 
b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..e0a9b9d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc"
- "rockchip,saradc": for rk3188, rk3288
- "rockchip,rk3066-tsadc": for rk3036
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
 
 - reg: physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v2 1/6] dt-bindings: iio: rockchip-saradc: add support for rk3328

2017-03-16 Thread cl 
From: Liang Chen 

The rk3328 saradc is the same as rk3399.

Signed-off-by: Liang Chen 
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt 
b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..e0a9b9d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc"
- "rockchip,saradc": for rk3188, rk3288
- "rockchip,rk3066-tsadc": for rk3036
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
 
 - reg: physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v1 7/7] dt-bindings: document rockchip rk3328-evb board

2017-03-15 Thread cl 
From: Chen Liang 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Chen Liang 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v1 7/7] dt-bindings: document rockchip rk3328-evb board

2017-03-15 Thread cl 
From: Chen Liang 

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Chen Liang 
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt 
b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
 Required root node properties:
   - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+Required root node properties:
+  - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

[PATCH v1 5/7] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

2017-03-15 Thread cl 
From: Chen Liang 

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Chen Liang 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362 ++
 1 file changed, 1362 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 000..ff53af9
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1362 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   enable-method = "psci";
+   };
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   enable-method = "psci";
+   };
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x3>;
+   enable-method = "psci";
+   };
+   };
+
+   arm-pmu {
+   compatible = "arm,cortex-a53-pmu";
+   interrupts = ,
+,
+,
+;
+   interrupt-affinity = <>, <>, <>, <>;
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+   };
+
+   xin24m: xin24m {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   clock-output-names = "xin24m";
+   };
+
+   grf: syscon@ff10 {
+

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