Re: [PATCH v3 6/6] clk: rockchip: rk3399: Support module build

hi, 在 2020/9/7 上午6:49, Heiko Stübner 写道: Am Freitag, 4. September 2020, 09:45:05 CEST schrieb Elaine Zhang: support CLK_OF_DECLARE and builtin_platform_driver_probe double clk init method. add module author, description and license to support building Soc Rk3399 clock driver as module.

Re: [PATCH] clk: rockchip: Fix overflow rate during fractional approximation

hi, We have two submissions which I hope will be helpful to you. https://patchwork.kernel.org/patch/11272465/ https://patchwork.kernel.org/patch/11272471/ A few more notes: 1. DCLK does not recommend the use of fractional frequency divider. Generally, DCLK will monopolize a PLL, and the

Re: [PATCH v3 1/3] thermal: rockchip: fix up the tsadc pinctrl setting error

hi, Heiko & Enric: 在 2019/5/22 下午8:27, Heiko Stuebner 写道: Hi Enric, Am Montag, 20. Mai 2019, 15:38:32 CEST schrieb Enric Balletbo Serra: Hi all, As pointed by [1] and [2] this commit, that now is upstream, breaks veyron (rk3288) and kevin (rk3399) boards. The problem is especially critical

Re: [PATCH v1] clk: Export __clk_lookup()

在 2020/7/23 上午8:51, Stephen Boyd 写道: Quoting Heiko Stuebner (2020-07-22 11:26:50) Hi Elaine, Am Mittwoch, 22. Juli 2020, 04:32:30 CEST schrieb Elaine Zhang: Export __clk_lookup() to support user built as module. ERROR: drivers/clk/rockchip/clk.ko: In function

Re: [PATCH v1] clk: Export __clk_lookup()

在 2020/7/23 上午9:42, elaine.zhang 写道: 在 2020/7/23 上午8:51, Stephen Boyd 写道: Quoting Heiko Stuebner (2020-07-22 11:26:50) Hi Elaine, Am Mittwoch, 22. Juli 2020, 04:32:30 CEST schrieb Elaine Zhang: Export __clk_lookup() to support user built as module. ERROR: drivers/clk/rockchip/clk.ko

Re: [PATCH v1] clk: Export __clk_lookup()

在 2020/7/23 上午2:26, Heiko Stuebner 写道: Hi Elaine, Am Mittwoch, 22. Juli 2020, 04:32:30 CEST schrieb Elaine Zhang: Export __clk_lookup() to support user built as module. ERROR: drivers/clk/rockchip/clk.ko: In function `rockchip_clk_protect_critical': drivers/clk/rockchip/clk.c:741: undefined

Re: [PATCH] clk: rockchip: mark pclk_uart2 as critical on rk3328

在 2020/7/8 下午10:45, Johan Jonker 写道: The rk3328 uart2 port is used as boot console and to debug. During the boot pclk_uart2 is disabled by a clk_disable_unused initcall. Fix the uart2 function by marking pclk_uart2 as critical on rk3328. Also add sclk_uart2 as that is needed for the same DT

Re: [PATCH] clk: rockchip: mark pclk_uart2 as critical on rk3328

d..1 2.208646: clk_enable: sclk_uart2 On 7/9/20 3:32 AM, elaine.zhang wrote: 在 2020/7/8 下午10:45, Johan Jonker 写道: The rk3328 uart2 port is used as boot console and to debug. During the boot pclk_uart2 is disabled by a clk_disable_unused initcall. Fix the uart2 function by marking pclk_uar

Re: [PATCH v1 1/3] thermal: rockchip: add pinctrl control

hi, 在 2019/4/16 下午6:12, Daniel Lezcano 写道: Hi Elaine, On 11/04/2019 09:46, elaine.zhang wrote: hi, 在 2019/4/4 上午11:03, Daniel Lezcano 写道: On 01/04/2019 08:43, Elaine Zhang wrote: Based on the TSADC Tshut mode to select pinctrl, instead of setting pinctrl based on architecture (Not depends

Re: [PATCH v2] clk: rockchip: undo several noc and special clocks as critical on rk3288

hi, 在 2019/4/22 下午11:23, Doug Anderson 写道: Elaine, On Fri, Apr 12, 2019 at 9:18 AM Douglas Anderson wrote: This is mostly a revert of commit 55bb6a633c33 ("clk: rockchip: mark noc and some special clk as critical on rk3288") except that we're keeping "pmu_hclk_otg0" as critical still. NOTE:

Re: [PATCH v2 1/3] thermal: rockchip: fix up the tsadc pinctrl setting error

hi, 在 2019/4/28 下午8:45, Daniel Lezcano 写道: On 25/04/2019 12:12, Elaine Zhang wrote: Explicitly use the pinctrl to set/unset the right mode instead of relying on the pinctrl init mode. And it requires setting the tshut polarity before select pinctrl. When the temperature sensor mode is set to

Re: [PATCH 1/3] Revert "clk: rockchip: mark noc and some special clk as critical on rk3288"

hi, 在 2019/4/10 上午4:47, Douglas Anderson 写道: This reverts commit 55bb6a633c33caf68ab470907ecf945289cb733d. The clocks that were enabled by that patch are pretty questionable. Specifically looking at what has been shipping on rk3288-veyron Chromebooks almost all of these clocks are safely

Re: [PATCH 2/3] clk: rockchip: Make rkpwm a critical clock on rk3288

hi, 在 2019/4/10 上午4:47, Douglas Anderson 写道: Most rk3288-based boards are derived from the EVB and thus use a PWM regulator for the logic rail. However, most rk3288-based boards don't specify the PWM regulator in their device tree. We'll deal with that by making it critical. NOTE: it's

Re: [PATCH] clk: rockchip: Fix video codec clocks on rk3288

hi, 在 2019/4/11 上午7:37, Doug Anderson 写道: Hi, On Wed, Apr 10, 2019 at 11:38 AM Jonas Karlman wrote: On 2019-04-10 17:45, Doug Anderson wrote: Hi, On Fri, Mar 29, 2019 at 2:55 PM Douglas Anderson wrote: It appears that there is a typo in the rk3288 TRM. For GRF_SOC_CON0[7] it says that 0

Re: [PATCH 2/3] clk: rockchip: Make rkpwm a critical clock on rk3288

hi, 在 2019/4/10 下午11:25, Doug Anderson 写道: Hi, On Tue, Apr 9, 2019 at 11:42 PM elaine.zhang wrote: hi, 在 2019/4/10 上午4:47, Douglas Anderson 写道: Most rk3288-based boards are derived from the EVB and thus use a PWM regulator for the logic rail. However, most rk3288-based boards don't

Re: [PATCH v1 1/3] thermal: rockchip: add pinctrl control

hi, 在 2019/4/4 上午11:03, Daniel Lezcano 写道: On 01/04/2019 08:43, Elaine Zhang wrote: Based on the TSADC Tshut mode to select pinctrl, instead of setting pinctrl based on architecture (Not depends on pinctrl setting by "init" or "default"). And it requires setting the tshut polarity before

Re: [PATCH 1/3] Revert "clk: rockchip: mark noc and some special clk as critical on rk3288"

hi, 在 2019/4/12 上午6:05, Heiko Stübner 写道: Hi, Am Donnerstag, 11. April 2019, 17:26:41 CEST schrieb Doug Anderson: On Wed, Apr 10, 2019 at 8:27 PM elaine.zhang wrote: 在 2019/4/10 下午11:34, Doug Anderson 写道: On Tue, Apr 9, 2019 at 11:23 PM elaine.zhang wrote: 在 2019/4/10 上午4:47, Douglas

Re: [PATCH 4/5] ARM: dts: rockchip: vcc33_ccd off in suspend for rk3288-veyron-chromebook

hi, 在 2019/4/12 上午7:21, Douglas Anderson 写道: As per my comments when the device tree for rk3288-veyron-chromebook first landed: Technically I think vcc33_ccd can be off since we have 'needs-reset-on-resume' down in the EHCI port (this regulator is for the USB webcam that's connected to the

Re: [PATCH 5/5] ARM: dts: rockchip: vdd_gpu off in suspend for rk3288-veyron

hi, 在 2019/4/12 上午7:21, Douglas Anderson 写道: At some point long long ago the downstream GPU driver would crash if we turned the GPU off during suspend. For some context you can see: https://chromium-review.googlesource.com/#/c/215780/5..6/arch/arm/boot/dts/rk3288-pinky-rev2.dts At some point

Re: [PATCH 1/5] clk: rockchip: Turn on "aclk_dmac1" for suspend

hi, 在 2019/4/12 上午7:21, Douglas Anderson 写道: Experimentally it can be seen that going into deep sleep (specifically setting PMU_CLR_DMA and PMU_CLR_BUS in RK3288_PMU_PWRMODE_CON1) appears to fail unless "aclk_dmac1" is on. The failure is that the system never signals that it made it into

Re: [PATCH v2 2/3] dt-bindings: Convert the rockchip power_domain to YAML and extend

Hi, Enric 在 2021/3/24 上午4:58, Enric Balletbo Serra 写道: Hi Elaine, Missatge de Johan Jonker del dia dt., 23 de març 2021 a les 12:06: Hi Elaine, Some comments. Have a look if it's useful or that you disagree with...(part 1) == There is currently already a patch proposal that does the

Re: [PATCH v2 2/3] dt-bindings: Convert the rockchip power_domain to YAML and extend【请注意，邮件由robherri...@gmail.com代发】

Hi, Rob Herring 在 2021/3/24 上午4:16, Rob Herring 写道: On Tue, 23 Mar 2021 16:24:09 +0800, Elaine Zhang wrote: This converts the rockchip power domain family bindings to YAML schema, and add binding documentation for the power domains found on Rockchip RK3568 SoCs. Signed-off-by: Elaine Zhang

Re: [PATCH v4 2/4] dt-bindings: power: rockchip: Convert to json-schema

Hi,  Enric 在 2021/3/24 下午5:56, Enric Balletbo i Serra 写道: Hi Elaine, This is not the exact version I sent, and you reintroduced a "problem" that were already solved/discussed on previous versions. See below: On 24/3/21 8:16, Elaine Zhang wrote: Convert the soc/rockchip/power_domain.txt

Re: [PATCH v4 2/4] dt-bindings: power: rockchip: Convert to json-schema

Hi, Johan: 在 2021/3/24 下午5:17, Johan Jonker 写道: Hi Elaine, >From Rob's build log it turns out that 2 more properties must be added. Add these new properties in separate patch. Retest with commands below. See rk3288.dtsi assigned-clocks = < SCLK_EDP_24M>;

Re: [PATCH v4 2/4] dt-bindings: power: rockchip: Convert to json-schema

Hi,Heiko: 在 2021/3/24 下午9:31, Heiko Stübner 写道: Am Mittwoch, 24. März 2021, 11:32:42 CET schrieb Enric Balletbo i Serra: On 24/3/21 11:25, Enric Balletbo i Serra wrote: Hi Elaine, On 24/3/21 11:18, elaine.zhang wrote: Hi, Enric 在 2021/3/24 下午5:56, Enric Balletbo i Serra 写道: Hi Elaine

Re: [PATCH v2] PM: runtime: Update device status before letting suppliers suspend

in __rpm_callback() to always check the device's PM-runtime status under its PM lock. Link: https://lore.kernel.org/linux-pm/capdykfqm06kdw_p8wxsm4dijdbho4bb6t4k50uqqvr1_cos...@mail.gmail.com/ Fixes: 21d5c57b3726 ("PM / runtime: Use device links") Reported-by: elaine.zhang Diagnosed-by: U

Re: [PATCH v1] PM: runtime: Update device status before letting suppliers suspend

status under its PM lock. Link: https://lore.kernel.org/linux-pm/capdykfqm06kdw_p8wxsm4dijdbho4bb6t4k50uqqvr1_cos...@mail.gmail.com/ Fixes: 21d5c57b3726 ("PM / runtime: Use device links") Reported-by: elaine.zhang Diagnosed-by: Ulf Hansson Signed-off-by: Rafael J. Wysocki --- This is

Re: [PATCH v1 3/4] clk: rockchip: support more core div setting

Hi,Heiko: 在 2021/2/23 下午6:22, Heiko Stübner 写道: Hi Elaine, Am Dienstag, 23. Februar 2021, 10:53:51 CET schrieb Elaine Zhang: A55 supports each core to work at different frequencies, and each core has an independent divider control. Signed-off-by: Elaine Zhang ---

Re: [PATCH v1 2/4] clk: rockchip: add dt-binding header for rk3568

Hi, Heiko: 在 2021/2/23 下午6:45, Heiko Stübner 写道: Hi Elaine, Am Dienstag, 23. Februar 2021, 10:53:50 CET schrieb Elaine Zhang: Add the dt-bindings header for the rk3568, that gets shared between the clock controller and the clock references in the dts. Add softreset ID for rk3568.