@@ -1444,8 +1445,21 @@ int kvm_handle_guest_abort(struct kvm_vcpu
*vcpu, struct kvm_run *run)
/* Check the stage-2 fault is trans. fault or write fault */
fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
- if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
-
Hi,
In the kernel 4.1, I am confused for the
runnable_avg_sum/avg_period/running_avg_sum,
for example below code.
Does the task runnable_avg_sum includes running_avg_sum? Does avg_period
includes the task runnable_avg_sum and the task sleep time? thank you.
static inline void
Hi James,
Thank you very much for your detailed comment and answer.
On 2017/3/21 21:10, James Morse wrote:
> Hi,
>
> On 21/03/17 06:32, gengdongjiu wrote:
>> On 2017/3/20 23:08, James Morse wrote:
>>> On 20/03/17 13:58, Marc Zyngier wrote:
>>>>
Hi James,
thanks for your review.
On 2017/3/23 23:06, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 23/03/17 13:01, Dongjiu Geng wrote:
>> when the pfn is KVM_PFN_ERR_HWPOISON, it indicates to send
>> SIGBUS signal from KVM's fault-handling code to qemu, qemu
>> can handle this signal
into this picture)
>>>
>>> On 21/03/17 19:39, Christoffer Dall wrote:
>>>> On Tue, Mar 21, 2017 at 07:11:44PM +, James Morse wrote:
>>>>> On 21/03/17 11:34, Christoffer Dall wrote:
>>>>>> On Tue, Mar 21, 2017 at 02:32:29PM +08
Hi,
On 2017/3/22 6:47, Tyler Baicar wrote:
> + fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
> +
> + /* The host kernel will handle the synchronous external abort. There
> + * is no need to pass the error into the guest.
> + */
> + if (is_abort_synchronous(fault_status))
> +
Hi Achin,
Thanks for your mail and answer.
2017-03-29 18:36 GMT+08:00, Achin Gupta <achin.gu...@arm.com>:
> Hi gengdongjiu,
>
> On Wed, Mar 29, 2017 at 05:36:37PM +0800, gengdongjiu wrote:
>>
>> Hi Laszlo/Biesheuvel/Qemu developer,
>>
>>Now I encount
Hi Christoffer/Laszlo,
On 2017/3/30 1:44, Christoffer Dall wrote:
> On Wed, Mar 29, 2017 at 05:37:49PM +0200, Laszlo Ersek wrote:
>> On 03/29/17 16:48, Christoffer Dall wrote:
>>> On Wed, Mar 29, 2017 at 10:36:51PM +0800, gengdongjiu wrote:
>>>> 2017-03-29 18:36 GM
,
then inject abort error to guest OS, guest OS read the APEI table.
Do you think which modules generates the APEI table is better? UEFI or Qemu?
On 2017/3/28 21:40, James Morse wrote:
> Hi gengdongjiu,
>
> On 28/03/17 13:16, gengdongjiu wrote:
>> On 2017/3/28 19:54, Ac
Hi Tyler,
I have a question for below code.
On 2017/3/25 0:01, Christoffer Dall wrote:
> is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
> - if (unlikely(!is_iabt && kvm_vcpu_dabt_isextabt(vcpu))) {
> + if (unlikely(!is_iabt && kvm_vcpu_dabt_isextabt(vcpu)) && sea_status) {
>
Hi Marc,
Thank you very much for your review.
On 2017/3/20 21:58, Marc Zyngier wrote:
> On 20/03/17 12:28, gengdongjiu wrote:
>>
>>
>> On 2017/3/20 19:24, Marc Zyngier wrote:
>>> Please include James Morse on anything RAS related, as he's already
>>> lo
On 2017/3/20 23:08, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 20/03/17 13:58, Marc Zyngier wrote:
>> On 20/03/17 12:28, gengdongjiu wrote:
>>> On 2017/3/20 19:24, Marc Zyngier wrote:
>>>> Please include James Morse on anything RAS related, as he's alr
On 2017/3/20 19:24, Marc Zyngier wrote:
> Please include James Morse on anything RAS related, as he's already
> looking at related patches.
>
> On 20/03/17 07:55, Dongjiu Geng wrote:
>> In the RAS implementation, hardware pass the virtual SEI
>> syndrome information through the VSESR_EL2, so
Hi kbuild test robot,
Thank you.
The build error is due to "vsesr_el2" is armv8.2 register, I will change
"vsesr_el2" to sysreg usage
On 2017/3/21 21:51, kbuild test robot wrote:
> Hi Dongjiu,
>
> [auto build test ERROR on arm64/for-next/core]
> [also build test ERROR on v4.11-rc3
On 03/29/17 12:36, Achin Gupta wrote:
>> Hi gengdongjiu,
>>
>> On Wed, Mar 29, 2017 at 05:36:37PM +0800, gengdongjiu wrote:
>>>
>>> Hi Laszlo/Biesheuvel/Qemu developer,
>>>
>>>Now I encounter a issue and want to consult with you in
Hi all/Laszlo,
sorry, I have a question to consult with you.
On 2017/4/7 2:55, Laszlo Ersek wrote:
> On 04/06/17 14:35, gengdongjiu wrote:
>> Dear, Laszlo
>>Thanks for your detailed explanation.
>>
>> On 2017/3/29 19:58, Laszlo Ersek wrote:
>>> (This ou
when devices parse and map an per-cpu interrupt into linux virq space
using irq_of_parse_and_map API, it will always be failed if needs to set
the specified irq trigger type, because irq_set_irq_type is only for 1-N
mode interrupt source, not for per-cpu interrupt source. so handle
Hi Gleixner,
Thank you very much for your comment and review, I will update it later.
>
>
>
> On Fri, 10 Mar 2017, gengdongjiu wrote:
>
>> when devices parse and map an per-cpu interrupt into linux virq space
>> using irq_of_parse_and_map API, it wil
Hi James,
> Hi Wang Xiongfeng,
>
> On 25/02/17 07:15, Xiongfeng Wang wrote:
>> On 2017/2/22 5:22, Tyler Baicar wrote:
>>> Currently external aborts are unsupported by the guest abort
>>> handling. Add handling for SEAs so that the host kernel reports
>>> SEAs which occur in the guest kernel.
>
Hi Laszlo,
thanks.
On 2017/4/7 2:55, Laszlo Ersek wrote:
> On 04/06/17 14:35, gengdongjiu wrote:
>> Dear, Laszlo
>>Thanks for your detailed explanation.
>>
>> On 2017/3/29 19:58, Laszlo Ersek wrote:
>>> (This ought to be one of the longest addres
Hi,
please ignore this fix, original logic is right. the Read ACK register
directly contain the ACK value, not the ACK address.
On 2017/8/3 23:42, Dongjiu Geng wrote:
> In GHESv2, The read_ack_register is used to specify the
> location of the read ack register, it is only the physical
>
Borislav,
2017-08-16 0:32 GMT+08:00, Borislav Petkov <b...@suse.de>:
> On Wed, Aug 16, 2017 at 12:30:55AM +0800, gengdongjiu wrote:
>> I think this patch has merged them to one.
>
> Look at both patches again.
I ever discuss it with Tyler about it, as shown below link, tha
Hi Borislav,
>
> ... and uses that accessor.
>
> Tyler?
>
> I'd prefer if you guys merge your two patches, Tyler's from
> https://marc.info/?l=linux-acpi=150179595323038=2 and this one into
> a single one.
I think this patch has merged them to one.
>
> How does that sound?
>
> --
>
Hi Tyler ,
> Hello Boris,
>
> His patch fixes the define for apei_estatus_for_each_section which in turn
> should fix ghes_do_proc(). So my patch should no longer be needed. I'm going
> to test this out just to verify if fixes the issue I found.
I have verified the issue about the iteration for
it.
thanks.
On 2017/8/16 7:26, Baicar, Tyler wrote:
> On 8/15/2017 3:34 PM, gengdongjiu wrote:
>> Hi Tyler ,
>>
>>> Hello Boris,
>>>
>>> His patch fixes the define for apei_estatus_for_each_section which in turn
>>> should fix ghes_do_proc()
Loop more people to review the patch.
2017-08-15 19:15 GMT+08:00, Dongjiu Geng :
> The revision 0x300 generic error data entry is different
> from the old version, but currently iterating through the
> GHES estatus blocks does not take into account this difference.
> This
Hi,Tyler,
Yes, I will add a patch based on it, thanks a lot that you will also have a
test.
On 2017/8/14 22:04, Baicar, Tyler wrote:
> This change works too, I think it just makes sense to have the iterations in
> the CPER and GHES code match. Do you want to add a patch to your patch here
Hello,
sorry, I do not see that. Just know I have reviewed your modification, may
be my change can be simpleness and reserve the macro of
apei_estatus_for_each_section
can be used by other place to avoid duplicated code, such as prints the estatus
blocks.
On 2017/8/11 1:48, Baicar, Tyler
may be directly remove the macro apei_estatus_for_each_section is not better,
if other place code also
needs to iterate through the GHES estatus blocks, it will be repeated written
again.
On 2017/8/11 5:31, gengdongjiu wrote:
> Hello,
>
>sorry, I do not see that. Just know I have
On 2017/8/9 8:52, Rafael J. Wysocki wrote:
> On Tuesday, August 8, 2017 6:32:20 PM CEST Will Deacon wrote:
>> On Thu, Aug 03, 2017 at 03:32:25PM -0600, Tyler Baicar wrote:
>>> Currently iterating through the GHES estatus blocks does not
>>> take into account the new generic data v3 structure
on");
printk("%s""event severity: %s\n", pfx, cper_severity_str(severity));
snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
apei_estatus_for_each_section {
cper_estatus_print_section(newpfx, gdata, sec_no);
sec_no++;
}
}
>
> Thanks,
>
CC Will and Jonathan
On 2017/8/16 21:55, Baicar, Tyler wrote:
> On 8/16/2017 2:14 AM, Dongjiu Geng wrote:
>> The revision 0x300 generic error data entry is different
>> from the old version, but currently iterating through the
>> GHES estatus blocks does not take into account this difference.
>>
Borislav,
thanks for the review,
On 2017/8/17 17:25, Borislav Petkov wrote:
> On Wed, Aug 16, 2017 at 04:14:50PM +0800, Dongjiu Geng wrote:
>> The revision 0x300 generic error data entry is different
>> from the old version, but currently iterating through the
>> GHES estatus blocks does not
Hi Christoffer,
thanks for the review.
On 2017/7/3 16:39, Christoffer Dall wrote:
> Hi Dongjiu,
>
> On Mon, Jun 26, 2017 at 08:46:39PM +0800, Dongjiu Geng wrote:
>> when SError happen, kvm notifies user space to record the CPER,
>> user space specifies and passes the contents of ESR_EL1 on
Hi Christoffer,
On 2017/7/3 16:23, Christoffer Dall wrote:
> On Tue, Jun 27, 2017 at 08:15:49PM +0800, gengdongjiu wrote:
>> correct the commit message:
>>
>> In the firmware-first RAS solution, OS receives an synchronous
>> external abort, then trapped to EL3 by SC
Hi James,
Thanks for the review. I will read your comments carefully and then reply to
you.
On 2017/7/4 18:14, James Morse wrote:
> Hi gengdongjiu,
>
> Can you give us a specific example of an error you are trying to handle?
> How would a non-KVM user space process handle the err
Hi Christoffer,
On 2017/7/3 16:21, Christoffer Dall wrote:
> On Mon, Jun 26, 2017 at 08:45:43PM +0800, Dongjiu Geng wrote:
>> Handle userspace's detection for RAS extension, because sometimes
>> the userspace needs to know the CPU's capacity
>
> Why? Can you please provide some more rationale.
Hi Christoffer,
thank you very much for your review.
2017-07-03 15:50 GMT+08:00, Christoffer Dall :
> Hi Dongjiu,
>
> It seems you sent this patch twice, once on its own and then part of a
> series?
Christoffer, yes, it is. once on its own and then part of a
series
>
> Also,
Hi James,
On 2017/7/4 18:14, James Morse wrote:
> Hi gengdongjiu,
>
> Can you give us a specific example of an error you are trying to handle?
For example:
guest OS user space accesses device type memory, but happen SError. because the
SError is asynchronous faults, it does not take im
Hi James,
On 2017/8/9 0:27, James Morse wrote:
> Hi gengdongjiu,
>
> On 07/08/17 18:43, gengdongjiu wrote:
>> Another question, For the SEI, I want to also use SIGBUS both for the KVM
>> user and non-kvm user,
>> if SEA and SEI Error all use the SIGBUS to notify
Marc,
On 2017/8/8 0:56, Marc Zyngier wrote:
> On 07/08/17 17:23, gengdongjiu wrote:
>> Hi Marc,
>> As James's suggestion, I move injection SEA Error logic to the user
>> space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr
>> through IOCTL KVM_SET_ONE_
Marc,
On 2017/8/8 3:07, Marc Zyngier wrote:
> So if you want that information, extract it, expose what is required,
> strictly what is required, and only when it is required.
>
> In the meantime, I'm NAKing this patch, and any patch that will expose
> _EL2 registers outside of nested
Hi Marc,
As James's suggestion, I move injection SEA Error logic to the user
space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr
through IOCTL KVM_SET_ONE_REG. For the SEA, when Qemu sets the esr_el1.IL bit,
it needs to refer to esr_el2.IL, else Qemu does not know the trapped
wrote:
> Hi gengdongjiu,
>
> On 07/08/17 17:23, gengdongjiu wrote:
>> As James's suggestion, I move injection SEA Error logic to the user
>> space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr
>
> (because for firmware-first its the CPER records that matter,
Jonathan,
Thanks for the review, will correct the typo issue in the next patch version.
On 2017/8/22 15:54, Jonathan Cameron wrote:
> On Fri, 18 Aug 2017 22:11:50 +0800
> Dongjiu Geng wrote:
>
>> In the firmware-first RAS solution, corrupt data is detected in a
>>
Dear, James
On 2017/5/9 1:31, James Morse wrote:
> Hi gengdongjiu,
>
> On 04/05/17 18:20, gengdongjiu wrote:
>>> On 30/04/17 06:37, Dongjiu Geng wrote:
>>>> Handle kvmtool's detection for RAS extension, because sometimes
>>>> the APP needs to know the
Hi James,
thanks a lot for your answer.
On 2017/5/9 1:28, James Morse wrote:
> Hi gengdongjiu,
>
> On 04/05/17 17:52, gengdongjiu wrote:
>> 2017-05-04 23:42 GMT+08:00 gengdongjiu <gengdj.1...@gmail.com>:
>>> On 30/04/17 06:37, Dongjiu Geng wrote:
>>>>
Thanks James's explanation.
Hi Christoffer,
On 2017/5/9 22:28, James Morse wrote:
> Hi Christoffer,
>
> On 08/05/17 18:54, Christoffer Dall wrote:
>> On Mon, May 08, 2017 at 06:28:02PM +0100, James Morse wrote:
>> I must admit I am losing track of exactly what this proposed API was
>> supposed
Hi Christoffer,
On 2017/5/10 20:20, Christoffer Dall wrote:
> On Wed, May 10, 2017 at 05:15:04PM +0800, gengdongjiu wrote:
>> Thanks James's explanation.
>>
>> Hi Christoffer,
>>
>> On 2017/5/9 22:28, James Morse wrote:
>>> Hi Christoffer,
>>
Hi James,
sorry for the late response due to recently verify and debug the
RAS solution.
2017-05-13 1:24 GMT+08:00, James Morse <james.mo...@arm.com>:
> Hi gengdongjiu,
>
> On 05/05/17 13:31, gengdongjiu wrote:
>> when guest OS happen an SEA, My current solution is shown
2017-05-13 1:25 GMT+08:00, James Morse <james.mo...@arm.com>:
> Hi gengdongjiu,
>
> On 10/05/17 09:44, gengdongjiu wrote:
>> On 2017/5/9 1:28, James Morse wrote:
>>>>> (hwpoison for KVM is a corner case as Qemu's memory effectively has two
>>>>>
Dear Laszlo,
Thank your very much for your review and detailed comment. and very sorry for
the late response due to recently debug the wholes RAS solution.
On 2017/5/22 22:23, Laszlo Ersek wrote:
> Keeping some context:
>
> On 05/12/17 23:00, Laszlo Ersek wrote:
>> On 04/30/17 07:35, Dongjiu
lo Ersek wrote:
> Hi,
>
> did you remove me from the To: / Cc: list intentionally, or was that an
> oversight? I caught your message in my list folders only by luck.
>
> Some followup below:
>
> On 05/29/17 17:27, gengdongjiu wrote:
>
>>> (46) What is "phy
Hi Christoffer,
thanks for your review and comments.
On 2017/5/2 15:56, Christoffer Dall wrote:
> Hi Dongjiu,
>
> Please send a cover letter for patch series with more than a single
> patch.
OK, got it.
>
> The subject and description of these patches are also misleading.
> Hopefully this
Hello Christoffer.
On 2017/5/2 16:03, Christoffer Dall wrote:
> On Sun, Apr 30, 2017 at 01:37:56PM +0800, Dongjiu Geng wrote:
>> when SError happen, kvm notifies kvmtool to generate GHES table
>> to record the error, then kvmtools inject the SError with specified
>
> again, is this really
HI James,
2017-05-05 0:52 GMT+08:00 gengdongjiu <gengdj.1...@gmail.com>:
> Dear James,
>Thanks a lot for your review and comments. I am very sorry for the
> late response.
>
>
> 2017-05-04 23:42 GMT+08:00 gengdongjiu <gengdj.1...@gmail.com>:
>> Hi D
Dear James,
Thanks a lot for your review and comments. I am very sorry for the
late response.
2017-05-04 23:42 GMT+08:00 gengdongjiu <gengdj.1...@gmail.com>:
> Hi Dongjiu Geng,
>
> On 30/04/17 06:37, Dongjiu Geng wrote:
>> when happen SEA, deliver signal bus
Dear James,
>
> Hi Dongjiu Geng,
>
> On 30/04/17 06:37, Dongjiu Geng wrote:
>> Handle kvmtool's detection for RAS extension, because sometimes
>> the APP needs to know the CPU's capacity
>
>> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
>> index d9e9697..1004039 100644
>> ---
correct the commit message:
In the firmware-first RAS solution, OS receives an synchronous
external abort, then trapped to EL3 by SCR_EL3.EA. Firmware inspects
the HCR_EL2.TEA and chooses the target to send APEI's SEA notification.
If the SCR_EL3.EA is set, delegates the error exception to
James,
On 2017/9/8 0:31, James Morse wrote:
> KVM already handles external aborts from lower exception levels, no more work
> needs doing for TEA.
If it is firmware first solution, that is SCR_EL3.EA=1, all SError interrupt
and synchronous External
Abort exceptions are taken to EL3, so EL3
On 2017/9/14 20:35, James Morse wrote:
>> James, whether it is possible you can review the previous v5 patch which
>> adds the support for
> Spreading 'current discussion' over two versions is a problem for anyone
> trying
> to follow this series.
>
> If you post a newer version its normal
James,
Thanks for your comments, hope we can make the solution better.
On 2017/9/14 21:00, James Morse wrote:
> Hi gengdongjiu,
>
> (re-ordered hunks)
>
> On 13/09/17 08:32, gengdongjiu wrote:
>> On 2017/9/8 0:30, James Morse wrote:
>>> On 28/0
Hi James
On 2017/9/14 21:00, James Morse wrote:
> Hi gengdongjiu,
> user-space can choose whether to use SEA or SEI, it doesn't have to choose the
> same notification type that firmware used, which in turn doesn't have to be
> the
> same as that used by the CPU to
Borislav,
Thank you for your time to review it.
On 2017/10/13 21:21, Borislav Petkov wrote:
>> .notifier_call = ghes_notify_hed,
>> };
>>
>> -#ifdef CONFIG_ACPI_APEI_SEA
>> static LIST_HEAD(ghes_sea);
> But now those get compiled in on x86 where there's no SEA and where we
> don't need
Hi Marc,
On 2017/10/13 23:12, Marc Zyngier wrote:
> On 13/10/17 15:29, gengdongjiu wrote:
>> Hi Marc,
>> Thank you very much for your time to review it.
>>
>>> On 12/10/17 17:44, Dongjiu Geng wrote:
>>>> When a exception is trapped to EL2, hardware us
Have fixed it in the patch v5.
On 2017/10/17 18:20, kbuild test robot wrote:
> Hi Dongjiu,
>
> [auto build test ERROR on pm/linux-next]
> [also build test ERROR on v4.14-rc5 next-20171016]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
Hi Marc,
>
> Please also update the 32bit code accordingly, as it looks broken too.
I have updated the 32 bit code according, in my hand, there is no arm32 host
environment,
So there is no method to verify it in the arm32 host, only verify the patch in
the arm64 host.
Anyway I firstly send
Hi Christoffer
On 2017/10/17 3:59, Christoffer Dall wrote:
> On Mon, Oct 16, 2017 at 04:10:01PM +0000, gengdongjiu wrote:
>> Hi Marc,
>>
>>>
>>> Please also update the 32bit code accordingly, as it looks broken too.
>>
>> I have updated the 32 bit
Hi Marc,
Thank you very much for your time to review it.
> On 12/10/17 17:44, Dongjiu Geng wrote:
> > When a exception is trapped to EL2, hardware uses ELR_ELx to hold the
> > current fault instruction address. If KVM wants to inject a abort to
> > 32 bit guest, it needs to set the LR
Hi James/Rafael/Borislav,
what is your comments about these two patches? Seems they are pending
long time, I will appreciate that if you can give some review
comments. Thanks very much, Tyler has tested the second patch.
[PATCH v3 1/2] acpi: apei: remove the unused dead-code for SEA notification
Hi James,
>
>> Today I added the support to do some minimal emulation for
>> RAS-Error-Record registers, thanks
>> for the good suggestion.
>
> Where can I find this patch?
> I'd like to repost it as part of the SError_rework/RAS/IESB series: this is
> one
> of the bits KVM needs but I didn't
Hi Marc,
>
> On 08/09/17 10:05, gengdongjiu wrote:
> > Marc,
> >Thanks for reply.
> >
> > On 2017/9/8 16:21, Marc Zyngier wrote:
> >>> Marc,
> >>>
> >>> sorry I have another question for the PAN.
[...]
> There cannot be
On 2017/9/7 23:23, Marc Zyngier wrote:
> On 07/09/17 16:03, gengdongjiu wrote:
>>> On 07/09/17 12:49, gengdongjiu wrote:
>>>>
[...]
>
> I really cannot think of a good reason why we'd want to do that. Playing
> with set_fs() is almost universally wrong, an
Marc,
Thanks for reply.
On 2017/9/8 16:21, Marc Zyngier wrote:
>> Marc,
>>
>> sorry I have another question for the PAN.
>>
>> In the non-VHE mode, The host kernel is running in the EL1. Before
>> host kernel enter guest, host OS will call 'HVC' instruction to do
>> the world-switch, and the
On 2017/9/7 18:13, Marc Zyngier wrote:
> On 07/09/17 11:05, gengdongjiu wrote:
>> Hi James,
>>
>> On 2017/9/7 17:20, James Morse wrote:
>>> Hi Dongjiu Geng,
>>>
>>> On 07/09/17 06:54, Dongjiu Geng wrote:
>>>> In VHE mode, host kern
Hi James,
On 2017/9/7 17:20, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 07/09/17 06:54, Dongjiu Geng wrote:
>> In VHE mode, host kernel runs in the EL2 and can enable
>> 'User Access Override' when fs==KERNEL_DS so that it can
>> access kernel memory. However, PSTATE.UAO is set to 0 on
>> an
CC Catalin
On 2017/9/6 2:58, gengdongjiu wrote:
> when exit from guest, some host PSTATE bits may be lost, such as
> PSTATE.PAN or PSTATE.UAO. It is because host and hypervisor all run
> in the EL2, host PSTATE value cannot be saved and restored via
> SPSR_EL2. So if guest has change
Hi Peter,
Sorry for my late response.
>
> On 18 August 2017 at 15:23, Dongjiu Geng wrote:
> > check if kvm supports guest RAS EXTENSION. if so, set corresponding
> > feature bit for vcpu.
> >
> > Signed-off-by: Dongjiu Geng
> > ---
> >
[...]
> >
> > /*
> > * xx
> > */
> > void kvm_hwpoison_page_add(ram_addr_t ram_addr);
>
> It should be in the doc-comment format, which begins "/**" and has some
> stylization of how you list parameters and so on. Lots of
> examples in the existing headers.
Hi peter,
Sorry for the late response.
>
> On 18 August 2017 at 15:23, Dongjiu Geng wrote:
> > Add SIGBUS signal handler. In this handler, it checks the exception
> > type, translates the host VA which is delivered by host or KVM to
> > guest PA, then fills this PA to
James,
Thanks for the review.
On 2017/9/9 2:17, James Morse wrote:
> Hi gengdongjiu,
>
> On 04/09/17 12:43, gengdongjiu wrote:
>> On 2017/9/1 1:50, James Morse wrote:
>>> On 28/08/17 11:38, Dongjiu Geng wrote:
>>>> In current code l
Hi Vladimir,
On 2017/9/11 19:20, Vladimir Murzin wrote:
> On 11/09/17 12:16, Dongjiu Geng wrote:
>> PSTATE.PAN disables reading and/or writing to a userspace virtual
>> address from EL1 in non-VHE or from EL2 in VHE. In non-VHE, there is
>> no any userspace mapping at EL2, so no need to reest the
Hi peter,
>
> On 18 August 2017 at 15:23, Dongjiu Geng wrote:
> > When guest OS happens SError interrupt(SEI), it will trap to host.
> > Host firstly calls memory failure to deal with this error and decide
> > whether it needs to deliver SIGBUS signal to userspace. The
Hi Peter,
Thanks very much for your review, I will check your comments in detail and
reply.
On 2017/9/6 1:26, Peter Maydell wrote:
> On 18 August 2017 at 15:23, Dongjiu Geng wrote:
>> check if kvm supports guest RAS EXTENSION. if so, set
>> corresponding feature bit
Hi Marc,
On 2017/9/6 16:17, Marc Zyngier wrote:
> On 05/09/17 19:58, gengdongjiu wrote:
>> when exit from guest, some host PSTATE bits may be lost, such as
>> PSTATE.PAN or PSTATE.UAO. It is because host and hypervisor all run
>> in the EL2, host PSTATE value cannot be s
ate, __sysreg_restore_state_vhe,
ARM64_HAS_VIRT_HOST_EXTN);
void __hyp_text __sysreg_restore_host_state(struct kvm_cpu_context *ctxt)
On 2017/9/6 17:32, gengdongjiu wrote:
> Hi Marc,
>
> On 2017/9/6 16:17, Marc Zyngier wrote:
>> On 05/09/17 19:58,
On 2017/9/6 20:00, Vladimir Murzin wrote:
> On 06/09/17 11:35, gengdongjiu wrote:
>> Vladimir,
>>
>> On 2017/9/6 17:41, Vladimir Murzin wrote:
>>> Can you please elaborate on cases where PAN is not enabled?
>>
>> I mean the informal private usage, For ex
Hi Peter,
On 2017/9/6 19:19, Peter Maydell wrote:
> On 28 August 2017 at 11:38, Dongjiu Geng wrote:
>> In the firmware-first RAS solution, corrupt data is detected in a
>> memory location when guest OS application software executing at EL0
>> or guest OS kernel El1
On 2017/9/6 20:00, Vladimir Murzin wrote:
> On 06/09/17 11:35, gengdongjiu wrote:
>> Vladimir,
>>
>> On 2017/9/6 17:41, Vladimir Murzin wrote:
>>> Can you please elaborate on cases where PAN is not enabled?
>>
>> I mean the informal private usage, For ex
Vladimir,
On 2017/9/6 17:41, Vladimir Murzin wrote:
> Can you please elaborate on cases where PAN is not enabled?
I mean the informal private usage, For example, he disabled the PAN dynamically
to let kernel space to access the user space.
After he dynamic disabled the PAN, then switched to
James,
On 2017/9/1 2:04, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 28/08/17 11:38, Dongjiu Geng wrote:
>> In ARMV8.2 RAS extension, a virtual SError exception syndrome
>> register(VSESR_EL2) is added. This value may be specified from
>> userspace.
>
> I agree that the CPU support for
On 2017/9/6 20:30, Vladimir Murzin wrote:
> On 06/09/17 13:14, gengdongjiu wrote:
>>
>>
>> On 2017/9/6 20:00, Vladimir Murzin wrote:
>>> On 06/09/17 11:35, gengdongjiu wrote:
>>>> Vladimir,
>>>>
>>>> On 2017/9/6 17:41, Vladim
Hi, Vladimir
> >> Do you see effect of "PAN is unexpectedly enabled"?
> > In fact I did not encounter this case, but I think it can exist.
> > I think if host OS dynamically disable PAN, it wants the host kernel access
> > the user space address space not through copy_to/from_user
> API.
> > Now
> On 07/09/17 12:49, gengdongjiu wrote:
> >
> >
> > On 2017/9/7 18:13, Marc Zyngier wrote:
> >> On 07/09/17 11:05, gengdongjiu wrote:
> >>> Hi James,
> >>>
> >>> On 2017/9/7 17:20, James Morse wrote:
> >>>> Hi Dongj
On 2017/9/12 0:39, Peter Maydell wrote:
+return kvm_vcpu_ioctl(CPU(cpu), KVM_ARM_SEI, );
>>> This looks odd. If we don't have the RAS extension why do we need to do
>>> anything at all here ?
>> This is because Qemu may need to support non-RAS extension as discussed with
>> ARM James
On 2017/9/8 0:31, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 28/08/17 11:38, Dongjiu Geng wrote:
>> ARMv8.2 adds a new bit HCR_EL2.TEA which controls to
>> route synchronous external aborts to EL2, and adds a
>> trap control bit HCR_EL2.TERR which controls to
>> trap all Non-secure EL1&0
Hi James,
On 2017/9/8 0:30, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 28/08/17 11:38, Dongjiu Geng wrote:
>> when userspace gets SIGBUS signal, it does not know whether
>> this is a synchronous external abort or SError,
>
> Why would Qemu/kvmtool need to know if the original notification
On 2017/9/13 18:52, Peter Maydell wrote:
> This question seems to be not really related to the review
> comment that it is responding to.
>
> (1) If the host does not support notifying us about
> errors, then there is clearly nothing to do in this
> code, because we will never get a
when exit from guest, some host PSTATE bits may be lost, such as
PSTATE.PAN or PSTATE.UAO. It is because host and hypervisor all run
in the EL2, host PSTATE value cannot be saved and restored via
SPSR_EL2. So if guest has changed the PSTATE, host continues with
a wrong value guest has set.
> On Mon, Sep 11 2017 at 7:16:52 pm BST, Dongjiu Geng
> wrote:
> > PSTATE.PAN disables reading and/or writing to a userspace virtual
> > address from EL1 in non-VHE or from EL2 in VHE. In non-VHE, there is
> > no any userspace mapping at EL2, so no need to reest the
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