From: Jassi Brar jaswinder.si...@linaro.org
Introduce common framework for client/protocol drivers and
controller drivers of Inter-Processor-Communication (IPC).
Client driver developers should have a look at
include/linux/mailbox_client.h to understand the part of
the API exposed to client
From: Jassi Brar jaswinder.si...@linaro.org
Convert the PL320 controller driver to work with the common
mailbox API. Also convert the only user of PL320, highbank-cpufreq.c
to work with thee API. Drop the obsoleted driver pl320-ipc.c
Signed-off-by: Jassi Brar jaswinder.si...@linaro.org
---
From: Jassi Brar
Introduce common framework for client/protocol drivers and
controller drivers of Inter-Processor-Communication (IPC).
Client driver developers should have a look at
include/linux/mailbox_client.h to understand the part of
the API exposed to client drivers.
Similarly controller
From: Jassi Brar
Convert the PL320 controller driver to work with the common
mailbox API. Also convert the only user of PL320, highbank-cpufreq.c
to work with thee API. Drop the obsoleted driver pl320-ipc.c
Signed-off-by: Jassi Brar
---
drivers/cpufreq/highbank-cpufreq.c | 22 +++-
From: Jassi Brar
If the txdone is done by polling, it is possible for msg_submit() to start
the timer while txdone_hrtimer() callback is running. If the timer needs
recheduling, it could already be enqueued by the time hrtimer_forward_now()
is called, leading hrtimer to loudly complain.
From: Jassi Brar
Changes since v1:
1) Drop uncessary headers from driver
2) Some Cosmetic changes.
3) Define macro for magic numbers
4) Specify constraints on number of channels/irq in DT bindings
Jassi Brar (2):
dt-bindings: milbeaut-m10v-hdmac: Add Socionext Milbeaut HDMAC
bindings
From: Jassi Brar
Driver for Socionext Milbeaut HDMAC controller. The controller has
upto 8 floating channels, that need a predefined slave-id to work
from a set of slaves.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut HDMAC
controller. Controller has upto 8 floating channels, that need
a predefined slave-id to work from a set of slaves.
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-hdmac.txt | 32
From: Jassi Brar
The following series adds AXI DMA (XDMAC) controller support on Milbeaut series.
This controller is capable of only Mem<->MEM transfers. Number of channels is
configurable {2,4,8}
Jassi Brar (2):
dt-bindings: milbeaut-m10v-xdmac: Add Socionext Milbeaut XDMAC
bindings
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut XDMAC
controller. Controller only supports Mem->Mem transfers. Number
of physical channels are determined by the number of irqs registered.
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-xdmac.txt | 24
From: Jassi Brar
Driver for Socionext Milbeaut XDMAC controller. The controller only
supports Mem-To-Mem transfers over upto 8 configurable channels.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
drivers/dma/milbeaut-xdmac.c | 426
From: Jassi Brar
Driver for Socionext Milbeaut HDMAC controller. The controller has
upto 8 floating channels, that need a predefined slave-id to work
from a set of slaves.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut HDMAC
controller. Controller has upto 8 floating channels, that need
a predefined slave-id to work from a set of slaves.
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-hdmac.txt | 54
From: Jassi Brar
The following series adds AHB DMA (HDMAC) controller support on Milbeaut series.
This controller is capable of Mem<->MEM and DEV<->MEM transfer. But only
DEV<->MEM
is currently supported.
Jassi Brar (2):
dt-bindings: milbeaut-hdmac: Add Socionext Milbeaut HDMAC bindings
From: Jassi Brar
The following series adds AXI DMA (XDMAC) controller support on Milbeaut series.
This controller is capable of only Mem<->MEM transfers. Number of channels is
configurable {2,4,8}
Changes Since v1:
# Spelling mistake fix
Jassi Brar (2):
dt-bindings: milbeaut-m10v-xdmac:
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut XDMAC
controller. Controller only supports Mem->Mem transfers. Number
of physical channels are determined by the number of irqs registered.
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
---
From: Jassi Brar
Driver for Socionext Milbeaut XDMAC controller. The controller only
supports Mem-To-Mem transfers over upto 8 configurable channels.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
drivers/dma/milbeaut-xdmac.c | 426
From: Jassi Brar
The following series adds AHB DMA (HDMAC) controller support on Milbeaut series.
This controller is capable of Mem<->MEM and DEV<->MEM transfer. But only
DEV<->MEM
is currently supported.
Changes since v2:
# Spelling mistake fix
# Bug fix prep_slave - made local copy of sgl
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut HDMAC
controller. Controller has upto 8 floating channels, that need
a predefined slave-id to work from a set of slaves.
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-hdmac.txt
From: Jassi Brar
Driver for Socionext Milbeaut HDMAC controller. The controller has
upto 8 floating channels, that need a predefined slave-id to work
from a set of slaves.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
From: Jassi Brar
The following series adds AXI DMA (XDMAC) controller support on Milbeaut series.
This controller is capable of only Mem<->MEM transfers. Number of channels is
configurable {2,4,8}
Changes Since v2:
# Drop unused variable
Changes Since v1:
# Spelling mistake fix
Jassi Brar
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut XDMAC
controller. Controller only supports Mem->Mem transfers. Number
of physical channels are determined by the number of irqs registered.
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
---
From: Jassi Brar
Driver for Socionext Milbeaut XDMAC controller. The controller only
supports Mem-To-Mem transfers over upto 8 configurable channels.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
drivers/dma/milbeaut-xdmac.c | 418
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut HDMAC
controller. Controller has upto 8 floating channels, that need
a predefined slave-id to work from a set of slaves.
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-hdmac.txt
From: Jassi Brar
The following series adds AHB DMA (HDMAC) controller support on Milbeaut series.
This controller is capable of Mem<->MEM and DEV<->MEM transfer. But only
DEV<->MEM
is currently supported.
Changes since v3:
# Drop unused variables
# Add controller init instruction
Changes
From: Jassi Brar
Driver for Socionext Milbeaut HDMAC controller. The controller has
upto 8 floating channels, that need a predefined slave-id to work
from a set of slaves.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
From: Jassi Brar
Currently scmi_do_xfer() submits a message to mailbox api and waits
for an apparently very short time. This works if there are not many
messages in the queue already. However, if many clients share a
channel and/or each client submits many messages in a row, the
timeout value
27 matches
Mail list logo
